Function: hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1 | Module: exec | Source: IJMatrix_parcsr.c:3240-3500 [...] | Coverage: 1.39% |
---|
Function: hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1 | Module: exec | Source: IJMatrix_parcsr.c:3240-3500 [...] | Coverage: 1.39% |
---|
/home/hbollore/qaas/qaas-runs/169-817-3176/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c: 3240 - 3500 |
-------------------------------------------------------------------------------- |
3240: #pragma omp parallel |
[...] |
3256: num_threads = hypre_NumActiveThreads(); |
3257: my_thread_num = hypre_GetThreadNum(); |
3258: |
3259: len = nrows/num_threads; |
3260: rest = nrows - len*num_threads; |
3261: |
3262: if (my_thread_num < rest) |
3263: { |
3264: ns = my_thread_num*(len+1); |
3265: ne = (my_thread_num+1)*(len+1); |
3266: } |
3267: else |
3268: { |
3269: ns = my_thread_num*len+rest; |
3270: ne = (my_thread_num+1)*len+rest; |
3271: } |
3272: |
3273: value_start[my_thread_num] = 0; |
3274: for (ii=ns; ii < ne; ii++) |
3275: value_start[my_thread_num] += ncols[ii]; |
3276: |
3277: #ifdef HYPRE_USING_OPENMP |
3278: #pragma omp barrier |
3279: #endif |
3280: if (my_thread_num == 0) |
3281: { |
3282: for (i=0; i < max_num_threads; i++) |
3283: value_start[i+1] += value_start[i]; |
3284: } |
3285: #ifdef HYPRE_USING_OPENMP |
3286: #pragma omp barrier |
3287: #endif |
3288: indx = 0; |
3289: if (my_thread_num) |
3290: indx = value_start[my_thread_num-1]; |
3291: for (ii=ns; ii < ne; ii++) |
3292: { |
3293: row = rows[ii]; |
3294: n = ncols[ii]; |
3295: /* processor owns the row */ |
3296: if (row >= row_partitioning[pstart] && row < row_partitioning[pstart+1]) |
3297: { |
3298: row_local = row - row_partitioning[pstart]; |
3299: /* compute local row number */ |
3300: if (need_aux) |
3301: { |
3302: local_j = aux_j[row_local]; |
3303: local_data = aux_data[row_local]; |
3304: space = row_space[row_local]; |
3305: old_size = row_length[row_local]; |
3306: size = space - old_size; |
3307: if (size < n) |
3308: { |
3309: size = n - size; |
3310: tmp_j = hypre_CTAlloc(HYPRE_Int,size); |
3311: tmp_data = hypre_CTAlloc(HYPRE_Complex,size); |
3312: } |
3313: tmp_indx = 0; |
3314: not_found = 1; |
3315: size = old_size; |
3316: for (i=0; i < n; i++) |
3317: { |
3318: for (j=0; j < old_size; j++) |
3319: { |
3320: if (local_j[j] == cols[indx]) |
3321: { |
3322: local_data[j] = values[indx]; |
3323: not_found = 0; |
3324: break; |
3325: } |
3326: } |
3327: if (not_found) |
3328: { |
3329: if (size < space) |
3330: { |
3331: local_j[size] = cols[indx]; |
3332: local_data[size++] = values[indx]; |
3333: } |
3334: else |
3335: { |
3336: tmp_j[tmp_indx] = cols[indx]; |
3337: tmp_data[tmp_indx++] = values[indx]; |
3338: } |
3339: } |
3340: not_found = 1; |
3341: indx++; |
3342: } |
3343: |
3344: row_length[row_local] = size+tmp_indx; |
3345: |
3346: if (tmp_indx) |
3347: { |
3348: aux_j[row_local] = hypre_TReAlloc(aux_j[row_local],HYPRE_Int, |
3349: size+tmp_indx); |
3350: aux_data[row_local] = hypre_TReAlloc(aux_data[row_local], |
3351: HYPRE_Complex,size+tmp_indx); |
3352: row_space[row_local] = size+tmp_indx; |
3353: local_j = aux_j[row_local]; |
[...] |
3359: for (i=0; i < tmp_indx; i++) |
3360: { |
3361: local_j[cnt] = tmp_j[i]; |
3362: local_data[cnt++] = tmp_data[i]; |
3363: } |
3364: |
3365: if (tmp_j) |
3366: { |
3367: hypre_TFree(tmp_j); |
3368: hypre_TFree(tmp_data); |
[...] |
3376: offd_indx = hypre_AuxParCSRMatrixIndxOffd(aux_matrix)[row_local]; |
3377: diag_indx = hypre_AuxParCSRMatrixIndxDiag(aux_matrix)[row_local]; |
3378: cnt_diag = diag_indx; |
3379: cnt_offd = offd_indx; |
3380: diag_space = diag_i[row_local+1]; |
3381: offd_space = offd_i[row_local+1]; |
3382: not_found = 1; |
3383: for (i=0; i < n; i++) |
3384: { |
3385: if (cols[indx] < col_0 || cols[indx] > col_n) |
3386: /* insert into offd */ |
3387: { |
3388: for (j=offd_i[row_local]; j < offd_indx; j++) |
3389: { |
3390: if (offd_j[j] == cols[indx]) |
3391: { |
3392: offd_data[j] = values[indx]; |
3393: not_found = 0; |
3394: break; |
3395: } |
3396: } |
3397: if (not_found) |
3398: { |
3399: if (cnt_offd < offd_space) |
3400: { |
3401: offd_j[cnt_offd] = cols[indx]; |
3402: offd_data[cnt_offd++] = values[indx]; |
3403: } |
3404: else |
3405: { |
3406: hypre_error(HYPRE_ERROR_GENERIC); |
3407: #ifdef HYPRE_USING_OPENMP |
3408: #pragma omp atomic |
3409: #endif |
3410: error_flag++; |
3411: if (print_level) |
3412: hypre_printf("Error in row %d ! Too many elements!\n", |
[...] |
3422: for (j=diag_i[row_local]; j < diag_indx; j++) |
3423: { |
3424: if (diag_j[j] == cols[indx]) |
3425: { |
3426: diag_data[j] = values[indx]; |
3427: not_found = 0; |
3428: break; |
3429: } |
3430: } |
3431: if (not_found) |
3432: { |
3433: if (cnt_diag < diag_space) |
3434: { |
3435: diag_j[cnt_diag] = cols[indx]; |
3436: diag_data[cnt_diag++] = values[indx]; |
3437: } |
3438: else |
3439: { |
3440: hypre_error(HYPRE_ERROR_GENERIC); |
3441: #ifdef HYPRE_USING_OPENMP |
3442: #pragma omp atomic |
3443: #endif |
3444: error_flag++; |
3445: if (print_level) |
3446: hypre_printf("Error in row %d ! Too many elements !\n", |
[...] |
3454: indx++; |
3455: } |
3456: |
3457: hypre_AuxParCSRMatrixIndxDiag(aux_matrix)[row_local] = cnt_diag; |
3458: hypre_AuxParCSRMatrixIndxOffd(aux_matrix)[row_local] = cnt_offd; |
[...] |
3466: indx += n; |
3467: if (aux_matrix) |
3468: { |
3469: col_indx = 0; |
3470: for (i=0; i < off_proc_i_indx; i=i+2) |
3471: { |
3472: row_len = off_proc_i[i+1]; |
3473: if (off_proc_i[i] == row) |
3474: { |
3475: for (j=0; j < n; j++) |
3476: { |
3477: cnt1 = col_indx; |
3478: for (k=0; k < row_len; k++) |
3479: { |
3480: if (off_proc_j[cnt1] == cols[j]) |
3481: { |
3482: off_proc_j[cnt1++] = -1; |
3483: /*cancel_indx++;*/ |
3484: offproc_cnt[my_thread_num]++; |
[...] |
3500: col_indx += row_len; |
0x4e2ce8 STP X29, X30, [SP, #672]! |
0x4e2cec ADD X29, SP, #0 |
0x4e2cf0 STP X25, X26, [SP, #64] |
0x4e2cf4 STP X27, X28, [SP, #80] |
0x4e2cf8 LDP X26, X1, [X0] |
0x4e2cfc LDP X15, X28, [X0, #24] |
0x4e2d00 STP X19, X20, [SP, #16] |
0x4e2d04 LDR X2, [X0, #16] |
0x4e2d08 STP X21, X22, [SP, #32] |
0x4e2d0c LDR X3, [X0, #40] |
0x4e2d10 STP X23, X24, [SP, #48] |
0x4e2d14 LDR X4, [X0, #56] |
0x4e2d18 STP X15, X1, [SP, #104] |
0x4e2d1c LDR X5, [X0, #64] |
0x4e2d20 STR X2, [SP, #120] |
0x4e2d24 LDR X6, [X0, #72] |
0x4e2d28 STR X3, [SP, #136] |
0x4e2d2c LDR X7, [X0, #80] |
0x4e2d30 STR X5, [SP, #176] |
0x4e2d34 STR X4, [SP, #208] |
0x4e2d38 STR X6, [SP, #256] |
0x4e2d3c STR X0, [SP, #336] |
0x4e2d40 LDR X25, [X0, #48] |
0x4e2d44 STR X7, [SP, #248] |
0x4e2d48 LDR X8, [X0, #88] |
0x4e2d4c LDP X22, X20, [X0, #192] |
0x4e2d50 LDR X9, [X0, #96] |
0x4e2d54 STR X8, [SP, #200] |
0x4e2d58 LDR X10, [X0, #104] |
0x4e2d5c LDR X11, [X0, #112] |
0x4e2d60 STR X9, [SP, #240] |
0x4e2d64 LDR X24, [X0, #120] |
0x4e2d68 STR X10, [SP, #192] |
0x4e2d6c LDR X12, [X0, #128] |
0x4e2d70 STR X11, [SP, #232] |
0x4e2d74 LDR X13, [X0, #136] |
0x4e2d78 LDR X23, [X0, #144] |
0x4e2d7c STR X12, [SP, #304] |
0x4e2d80 LDR X14, [X0, #152] |
0x4e2d84 STR X13, [SP, #224] |
0x4e2d88 LDR X16, [X0, #160] |
0x4e2d8c LDR X17, [X0, #168] |
0x4e2d90 STR X14, [SP, #296] |
0x4e2d94 LDR X18, [X0, #176] |
0x4e2d98 STR X16, [SP, #128] |
0x4e2d9c LDR X19, [X0, #184] |
0x4e2da0 LDP X21, X0, [X0, #208] |
0x4e2da4 STR X17, [SP, #160] |
0x4e2da8 STR X18, [SP, #168] |
0x4e2dac STR X0, [SP, #152] |
0x4e2db0 STR X19, [SP, #184] |
0x4e2db4 STR X21, [SP, #328] |
0x4e2db8 BL 5063e0 |
0x4e2dbc ORR X27, XZR, X0 |
0x4e2dc0 BL 506400 |
0x4e2dc4 SDIV X1, X26, X27 |
0x4e2dc8 ORR X21, XZR, X0 |
0x4e2dcc LDR X15, [SP, #104] |
0x4e2dd0 MSUB X2, X1, X27, X26 |
0x4e2dd4 CMP X2, X0 |
0x4e2dd8 B.LE 4e3b94 |
0x4e2ddc MADD X26, X1, X0, X0 |
0x4e2de0 ADD X4, X1, #1 |
0x4e2de4 ADD X5, X4, X26 |
0x4e2de8 STR X5, [SP, #104] |
0x4e2dec UBFM X19, X21, #61, #60 |
0x4e2df0 STR XZR, [X22, X21,LSL #3] |
0x4e2df4 ADD X27, X22, X19 |
0x4e2df8 CMP X26, X5 |
0x4e2dfc B.GE 4e2f18 |
0x4e2e00 LDR X7, [SP, #112] |
0x4e2e04 MOVZ X0, #0 |
0x4e2e08 ADD X2, X7, X26,LSL #3 |
0x4e2e0c ADD X8, X7, X5,LSL #3 |
0x4e2e10 SUB X9, X8, X2 |
0x4e2e14 SUB X10, X9, #8 |
0x4e2e18 UBFM X11, X10, #3, #63 |
0x4e2e1c ADD X12, X11, #1 |
0x4e2e20 ANDS X13, X12, #4224 |
0x4e2e24 B.EQ 4e2ea8 |
0x4e2e28 CMP X13, #1 |
0x4e2e2c B.EQ 4e2e94 |
0x4e2e30 CMP X13, #2 |
0x4e2e34 B.EQ 4e2e88 |
0x4e2e38 CMP X13, #3 |
0x4e2e3c B.EQ 4e2e7c |
0x4e2e40 CMP X13, #4 |
0x4e2e44 B.EQ 4e2e70 |
0x4e2e48 CMP X13, #5 |
0x4e2e4c B.EQ 4e2e64 |
0x4e2e50 CMP X13, #6 |
0x4e2e54 B.NE 4e3c88 |
0x4e2e58 LDR X14, [X2], #8 |
0x4e2e5c ADD X0, X0, X14 |
0x4e2e60 STR X0, [X27] |
0x4e2e64 LDR X16, [X2], #8 |
0x4e2e68 ADD X0, X0, X16 |
0x4e2e6c STR X0, [X27] |
0x4e2e70 LDR X17, [X2], #8 |
0x4e2e74 ADD X0, X0, X17 |
0x4e2e78 STR X0, [X27] |
0x4e2e7c LDR X18, [X2], #8 |
0x4e2e80 ADD X0, X0, X18 |
0x4e2e84 STR X0, [X27] |
0x4e2e88 LDR X1, [X2], #8 |
0x4e2e8c ADD X0, X0, X1 |
0x4e2e90 STR X0, [X27] |
0x4e2e94 LDR X30, [X2], #8 |
0x4e2e98 ADD X0, X0, X30 |
0x4e2e9c STR X0, [X27] |
0x4e2ea0 CMP X8, X2 |
0x4e2ea4 B.EQ 4e2f18 |
(3443) 0x4e2ea8 ORR X3, XZR, X2 |
(3443) 0x4e2eac ADD X2, X2, #64 |
(3443) 0x4e2eb0 LDR X4, [X3], #8 |
(3443) 0x4e2eb4 ADD X5, X0, X4 |
(3443) 0x4e2eb8 STR X5, [X27] |
(3443) 0x4e2ebc LDUR X6, [X2, #456] |
(3443) 0x4e2ec0 ADD X7, X5, X6 |
(3443) 0x4e2ec4 STR X7, [X27] |
(3443) 0x4e2ec8 LDR X9, [X3, #8] |
(3443) 0x4e2ecc ADD X10, X7, X9 |
(3443) 0x4e2ed0 STR X10, [X27] |
(3443) 0x4e2ed4 LDUR X11, [X2, #472] |
(3443) 0x4e2ed8 ADD X12, X10, X11 |
(3443) 0x4e2edc STR X12, [X27] |
(3443) 0x4e2ee0 LDUR X13, [X2, #480] |
(3443) 0x4e2ee4 ADD X14, X12, X13 |
(3443) 0x4e2ee8 STR X14, [X27] |
(3443) 0x4e2eec LDUR X16, [X2, #488] |
(3443) 0x4e2ef0 ADD X17, X14, X16 |
(3443) 0x4e2ef4 STR X17, [X27] |
(3443) 0x4e2ef8 LDUR X18, [X2, #496] |
(3443) 0x4e2efc ADD X30, X17, X18 |
(3443) 0x4e2f00 STR X30, [X27] |
(3443) 0x4e2f04 LDUR X1, [X2, #504] |
(3443) 0x4e2f08 ADD X0, X30, X1 |
(3443) 0x4e2f0c STR X0, [X27] |
(3443) 0x4e2f10 CMP X8, X2 |
(3443) 0x4e2f14 B.NE 4e2ea8 |
0x4e2f18 STR X15, [SP, #144] |
0x4e2f1c BL 40f1c0 |
0x4e2f20 LDR X15, [SP, #144] |
0x4e2f24 CBNZ X21, 4e3b80 |
0x4e2f28 LDR X8, [SP, #152] |
0x4e2f2c CMP X8, #0 |
0x4e2f30 B.LE 4e3068 |
0x4e2f34 UBFM X0, X8, #61, #60 |
0x4e2f38 ADD X9, X22, X8,LSL #3 |
0x4e2f3c ORR X1, XZR, X22 |
0x4e2f40 SUB X3, X0, #8 |
0x4e2f44 LDR X16, [X22] |
0x4e2f48 UBFM X4, X3, #3, #63 |
0x4e2f4c ADD X5, X4, #1 |
0x4e2f50 ANDS X6, X5, #4224 |
0x4e2f54 B.EQ 4e2fe4 |
0x4e2f58 CMP X6, #1 |
0x4e2f5c B.EQ 4e2fd0 |
0x4e2f60 CMP X6, #2 |
0x4e2f64 B.EQ 4e2fc4 |
0x4e2f68 CMP X6, #3 |
0x4e2f6c B.EQ 4e2fb8 |
0x4e2f70 CMP X6, #4 |
0x4e2f74 B.EQ 4e2fac |
0x4e2f78 CMP X6, #5 |
0x4e2f7c B.EQ 4e2fa0 |
0x4e2f80 CMP X6, #6 |
0x4e2f84 B.EQ 4e2f94 |
0x4e2f88 LDR X22, [X22, #8] |
0x4e2f8c ADD X16, X16, X22 |
0x4e2f90 STR X16, [X1, #8]! |
0x4e2f94 LDR X7, [X1, #8] |
0x4e2f98 ADD X16, X16, X7 |
0x4e2f9c STR X16, [X1, #8]! |
0x4e2fa0 LDR X10, [X1, #8] |
0x4e2fa4 ADD X16, X16, X10 |
0x4e2fa8 STR X16, [X1, #8]! |
0x4e2fac LDR X11, [X1, #8] |
0x4e2fb0 ADD X16, X16, X11 |
0x4e2fb4 STR X16, [X1, #8]! |
0x4e2fb8 LDR X12, [X1, #8] |
0x4e2fbc ADD X16, X16, X12 |
0x4e2fc0 STR X16, [X1, #8]! |
0x4e2fc4 LDR X13, [X1, #8] |
0x4e2fc8 ADD X16, X16, X13 |
0x4e2fcc STR X16, [X1, #8]! |
0x4e2fd0 LDR X14, [X1, #8] |
0x4e2fd4 ADD X16, X16, X14 |
0x4e2fd8 STR X16, [X1, #8]! |
0x4e2fdc CMP X9, X1 |
0x4e2fe0 B.EQ 4e3068 |
(3442) 0x4e2fe4 LDR X2, [X1, #8] |
(3442) 0x4e2fe8 ORR X17, XZR, X1 |
(3442) 0x4e2fec ADD X18, X1, #24 |
(3442) 0x4e2ff0 ADD X30, X1, #32 |
(3442) 0x4e2ff4 ADD X27, X1, #40 |
(3442) 0x4e2ff8 ADD X4, X1, #48 |
(3442) 0x4e2ffc ADD X3, X1, #56 |
(3442) 0x4e3000 ADD X1, X1, #64 |
(3442) 0x4e3004 ADD X8, X16, X2 |
(3442) 0x4e3008 STR X8, [X17, #8]! |
(3442) 0x4e300c LDR X0, [X17, #8] |
(3442) 0x4e3010 ADD X5, X8, X0 |
(3442) 0x4e3014 STR X5, [X17, #8]! |
(3442) 0x4e3018 LDR X6, [X17, #8] |
(3442) 0x4e301c ADD X22, X5, X6 |
(3442) 0x4e3020 STR X22, [X17, #8] |
(3442) 0x4e3024 LDR X7, [X18, #8] |
(3442) 0x4e3028 ADD X10, X22, X7 |
(3442) 0x4e302c STR X10, [X18, #8] |
(3442) 0x4e3030 LDR X11, [X30, #8] |
(3442) 0x4e3034 ADD X12, X10, X11 |
(3442) 0x4e3038 STR X12, [X30, #8] |
(3442) 0x4e303c LDR X13, [X27, #8] |
(3442) 0x4e3040 ADD X14, X12, X13 |
(3442) 0x4e3044 STR X14, [X27, #8] |
(3442) 0x4e3048 LDR X16, [X4, #8] |
(3442) 0x4e304c ADD X17, X14, X16 |
(3442) 0x4e3050 STR X17, [X4, #8] |
(3442) 0x4e3054 LDR X18, [X3, #8] |
(3442) 0x4e3058 ADD X16, X17, X18 |
(3442) 0x4e305c STR X16, [X3, #8] |
(3442) 0x4e3060 CMP X9, X1 |
(3442) 0x4e3064 B.NE 4e2fe4 |
0x4e3068 STR X15, [SP, #144] |
0x4e306c BL 40f1c0 |
0x4e3070 LDR X27, [SP, #144] |
0x4e3074 LDR X15, [SP, #104] |
0x4e3078 CMP X26, X15 |
0x4e307c B.GE 4e3354 |
0x4e3080 LDR X30, [SP, #160] |
0x4e3084 ORR X5, XZR, X28 |
0x4e3088 MOVN X22, #0 |
0x4e308c STR XZR, [SP, #144] |
0x4e3090 LDR X28, [SP, #128] |
0x4e3094 LDR X1, [SP, #168] |
0x4e3098 SUB X4, X30, #1 |
0x4e309c LDR X8, [SP, #176] |
0x4e30a0 UBFM X0, X4, #1, #63 |
0x4e30a4 UBFM X2, X28, #61, #60 |
0x4e30a8 LDR X9, [SP, #208] |
0x4e30ac ADD X3, X2, #8 |
0x4e30b0 ADD X10, X25, X2 |
0x4e30b4 ADD X6, X1, #16 |
0x4e30b8 ADD X25, X25, X3 |
0x4e30bc ADD X7, X6, X0,LSL #4 |
0x4e30c0 STR X10, [SP, #128] |
0x4e30c4 STR X25, [SP, #152] |
(3428) 0x4e30c8 LDR X11, [SP, #120] |
(3428) 0x4e30cc LDR X12, [SP, #128] |
(3428) 0x4e30d0 LDR X14, [SP, #112] |
(3428) 0x4e30d4 LDR X25, [X11, X26,LSL #3] |
(3428) 0x4e30d8 LDR X13, [X12] |
(3428) 0x4e30dc LDR X2, [X14, X26,LSL #3] |
(3428) 0x4e30e0 CMP X25, X13 |
(3428) 0x4e30e4 B.LT 4e3518 |
(3428) 0x4e30e8 LDR X16, [SP, #152] |
(3428) 0x4e30ec LDR X17, [X16] |
(3428) 0x4e30f0 CMP X25, X17 |
(3428) 0x4e30f4 B.GE 4e3518 |
(3428) 0x4e30f8 SUB X14, X25, X13 |
(3428) 0x4e30fc LDR X18, [SP, #192] |
(3428) 0x4e3100 UBFM X6, X14, #61, #60 |
(3428) 0x4e3104 CBNZ X18, 4e3820 |
0x4e3108 LDR X1, [SP, #136] |
0x4e310c ADD X13, X6, #8 |
0x4e3110 ADD X17, X21, X2 |
0x4e3114 LDR X16, [SP, #232] |
0x4e3118 LDR X11, [SP, #224] |
0x4e311c LDP X30, X0, [X1, #56] |
0x4e3120 LDR X15, [X16, X13] |
0x4e3124 ADD X10, X0, X6 |
0x4e3128 ADD X4, X30, X6 |
0x4e312c LDR X16, [X30, X14,LSL #3] |
0x4e3130 STP X10, X4, [SP, #208] |
0x4e3134 LDR X3, [X0, X14,LSL #3] |
0x4e3138 STR X15, [SP, #176] |
0x4e313c ORR X10, XZR, X16 |
0x4e3140 LDR X12, [X11, X13] |
0x4e3144 ORR X28, XZR, X3 |
0x4e3148 CMP X2, #0 |
0x4e314c B.LE 4e3f00 |
0x4e3150 STP X20, X19, [SP, #264] |
0x4e3154 ORR X18, XZR, X11 |
0x4e3158 ORR X20, XZR, X12 |
0x4e315c STP X26, X7, [SP, #280] |
0x4e3160 LDR X26, [SP, #232] |
0x4e3164 LDP X19, X7, [SP, #296] |
0x4e3168 STR X25, [SP, #312] |
(3436) 0x4e316c LDR X1, [X27, X21,LSL #3] |
(3436) 0x4e3170 CMP X8, X1 |
(3436) 0x4e3174 CCMP X9, X1, #0, #10 |
(3436) 0x4e3178 B.LE 4e3370 |
(3436) 0x4e317c LDR X0, [X18, X6] |
(3436) 0x4e3180 CMP X3, X0 |
(3436) 0x4e3184 B.LE 4e3300 |
(3436) 0x4e3188 SUB X30, X3, X0 |
(3436) 0x4e318c ANDS X4, X30, #4224 |
(3436) 0x4e3190 B.EQ 4e3258 |
(3436) 0x4e3194 CMP X4, #1 |
(3436) 0x4e3198 B.EQ 4e323c |
(3436) 0x4e319c CMP X4, #2 |
(3436) 0x4e31a0 B.EQ 4e3228 |
(3436) 0x4e31a4 CMP X4, #3 |
(3436) 0x4e31a8 B.EQ 4e3214 |
(3436) 0x4e31ac CMP X4, #4 |
(3436) 0x4e31b0 B.EQ 4e3200 |
(3436) 0x4e31b4 CMP X4, #5 |
(3436) 0x4e31b8 B.EQ 4e31ec |
(3436) 0x4e31bc CMP X4, #6 |
(3436) 0x4e31c0 B.EQ 4e31d8 |
(3436) 0x4e31c4 LDR X11, [X23, X0,LSL #3] |
(3436) 0x4e31c8 UBFM X2, X0, #61, #60 |
(3436) 0x4e31cc CMP X1, X11 |
(3436) 0x4e31d0 B.EQ 4e3808 |
(3436) 0x4e31d4 ADD X0, X0, #1 |
(3436) 0x4e31d8 LDR X12, [X23, X0,LSL #3] |
(3436) 0x4e31dc UBFM X2, X0, #61, #60 |
(3436) 0x4e31e0 CMP X1, X12 |
(3436) 0x4e31e4 B.EQ 4e3808 |
(3436) 0x4e31e8 ADD X0, X0, #1 |
(3436) 0x4e31ec LDR X13, [X23, X0,LSL #3] |
(3436) 0x4e31f0 UBFM X2, X0, #61, #60 |
(3436) 0x4e31f4 CMP X1, X13 |
(3436) 0x4e31f8 B.EQ 4e3808 |
(3436) 0x4e31fc ADD X0, X0, #1 |
(3436) 0x4e3200 LDR X14, [X23, X0,LSL #3] |
(3436) 0x4e3204 UBFM X2, X0, #61, #60 |
(3436) 0x4e3208 CMP X1, X14 |
(3436) 0x4e320c B.EQ 4e3808 |
(3436) 0x4e3210 ADD X0, X0, #1 |
(3436) 0x4e3214 LDR X15, [X23, X0,LSL #3] |
(3436) 0x4e3218 UBFM X2, X0, #61, #60 |
(3436) 0x4e321c CMP X1, X15 |
(3436) 0x4e3220 B.EQ 4e3808 |
(3436) 0x4e3224 ADD X0, X0, #1 |
(3436) 0x4e3228 LDR X25, [X23, X0,LSL #3] |
(3436) 0x4e322c UBFM X2, X0, #61, #60 |
(3436) 0x4e3230 CMP X1, X25 |
(3436) 0x4e3234 B.EQ 4e3808 |
(3436) 0x4e3238 ADD X0, X0, #1 |
(3436) 0x4e323c LDR X30, [X23, X0,LSL #3] |
(3436) 0x4e3240 UBFM X2, X0, #61, #60 |
(3436) 0x4e3244 CMP X1, X30 |
(3436) 0x4e3248 B.EQ 4e3808 |
(3436) 0x4e324c ADD X0, X0, #1 |
(3436) 0x4e3250 CMP X3, X0 |
(3436) 0x4e3254 B.EQ 4e3300 |
(3437) 0x4e3258 LDR X30, [X23, X0,LSL #3] |
(3437) 0x4e325c ADD X4, X0, #1 |
(3437) 0x4e3260 ADD X12, X0, #3 |
(3437) 0x4e3264 ADD X11, X0, #2 |
(3437) 0x4e3268 ADD X13, X0, #4 |
(3437) 0x4e326c ADD X14, X0, #5 |
(3437) 0x4e3270 ADD X15, X0, #6 |
(3437) 0x4e3274 ADD X25, X0, #7 |
(3437) 0x4e3278 UBFM X2, X0, #61, #60 |
(3437) 0x4e327c ADD X0, X0, #8 |
(3437) 0x4e3280 CMP X1, X30 |
(3437) 0x4e3284 B.EQ 4e3808 |
(3437) 0x4e3288 LDR X30, [X23, X4,LSL #3] |
(3437) 0x4e328c UBFM X2, X4, #61, #60 |
(3437) 0x4e3290 CMP X1, X30 |
(3437) 0x4e3294 B.EQ 4e3808 |
(3437) 0x4e3298 LDR X4, [X23, X11,LSL #3] |
(3437) 0x4e329c UBFM X2, X11, #61, #60 |
(3437) 0x4e32a0 CMP X1, X4 |
(3437) 0x4e32a4 B.EQ 4e3808 |
(3437) 0x4e32a8 LDR X11, [X23, X12,LSL #3] |
(3437) 0x4e32ac UBFM X2, X12, #61, #60 |
(3437) 0x4e32b0 CMP X1, X11 |
(3437) 0x4e32b4 B.EQ 4e3808 |
(3437) 0x4e32b8 LDR X12, [X23, X13,LSL #3] |
(3437) 0x4e32bc UBFM X2, X13, #61, #60 |
(3437) 0x4e32c0 CMP X1, X12 |
(3437) 0x4e32c4 B.EQ 4e3808 |
(3437) 0x4e32c8 LDR X13, [X23, X14,LSL #3] |
(3437) 0x4e32cc UBFM X2, X14, #61, #60 |
(3437) 0x4e32d0 CMP X1, X13 |
(3437) 0x4e32d4 B.EQ 4e3808 |
(3437) 0x4e32d8 LDR X14, [X23, X15,LSL #3] |
(3437) 0x4e32dc UBFM X2, X15, #61, #60 |
(3437) 0x4e32e0 CMP X1, X14 |
(3437) 0x4e32e4 B.EQ 4e3808 |
(3437) 0x4e32e8 LDR X15, [X23, X25,LSL #3] |
(3437) 0x4e32ec UBFM X2, X25, #61, #60 |
(3437) 0x4e32f0 CMP X1, X15 |
(3437) 0x4e32f4 B.EQ 4e3808 |
(3437) 0x4e32f8 CMP X3, X0 |
(3437) 0x4e32fc B.NE 4e3258 |
(3436) 0x4e3300 CMP X20, X28 |
(3436) 0x4e3304 B.LE 4e3c0c |
(3436) 0x4e3308 LDR D2, [X5, X21,LSL #3] |
(3436) 0x4e330c UBFM X2, X28, #61, #60 |
(3436) 0x4e3310 STR X1, [X23, X28,LSL #3] |
(3436) 0x4e3314 ADD X28, X28, #1 |
(3436) 0x4e3318 STR D2, [X19, X2] |
(3436) 0x4e331c ADD X21, X21, #1 |
(3436) 0x4e3320 CMP X21, X17 |
(3436) 0x4e3324 B.NE 4e316c |
(3433) 0x4e3328 LDP X20, X19, [SP, #264] |
(3433) 0x4e332c LDP X26, X7, [SP, #280] |
(3433) 0x4e3330 ORR X21, XZR, X17 |
(3433) 0x4e3334 LDR X25, [SP, #216] |
(3433) 0x4e3338 STR X10, [X25] |
(3433) 0x4e333c LDR X10, [SP, #208] |
(3433) 0x4e3340 STR X28, [X10] |
(3428) 0x4e3344 LDR X12, [SP, #104] |
(3428) 0x4e3348 ADD X26, X26, #1 |
(3428) 0x4e334c CMP X12, X26 |
(3428) 0x4e3350 B.NE 4e30c8 |
(3433) 0x4e3354 LDP X19, X20, [SP, #16] |
(3433) 0x4e3358 LDP X21, X22, [SP, #32] |
(3433) 0x4e335c LDP X23, X24, [SP, #48] |
(3433) 0x4e3360 LDP X25, X26, [SP, #64] |
(3433) 0x4e3364 LDP X27, X28, [SP, #80] |
(3433) 0x4e3368 LDP X29, X30, [SP], #352 |
(3433) 0x4e336c RET |
(3434) 0x4e3370 LDR X0, [X26, X6] |
(3434) 0x4e3374 CMP X16, X0 |
(3434) 0x4e3378 B.LE 4e34f4 |
(3434) 0x4e337c SUB X2, X16, X0 |
(3434) 0x4e3380 ANDS X14, X2, #4224 |
(3434) 0x4e3384 B.EQ 4e344c |
(3434) 0x4e3388 CMP X14, #1 |
(3434) 0x4e338c B.EQ 4e3430 |
(3434) 0x4e3390 CMP X14, #2 |
(3434) 0x4e3394 B.EQ 4e341c |
(3434) 0x4e3398 CMP X14, #3 |
(3434) 0x4e339c B.EQ 4e3408 |
(3434) 0x4e33a0 CMP X14, #4 |
(3434) 0x4e33a4 B.EQ 4e33f4 |
(3434) 0x4e33a8 CMP X14, #5 |
(3434) 0x4e33ac B.EQ 4e33e0 |
(3434) 0x4e33b0 CMP X14, #6 |
(3434) 0x4e33b4 B.EQ 4e33cc |
(3434) 0x4e33b8 LDR X25, [X24, X0,LSL #3] |
(3434) 0x4e33bc UBFM X2, X0, #61, #60 |
(3434) 0x4e33c0 CMP X1, X25 |
(3434) 0x4e33c4 B.EQ 4e3814 |
(3434) 0x4e33c8 ADD X0, X0, #1 |
(3434) 0x4e33cc LDR X13, [X24, X0,LSL #3] |
(3434) 0x4e33d0 UBFM X2, X0, #61, #60 |
(3434) 0x4e33d4 CMP X1, X13 |
(3434) 0x4e33d8 B.EQ 4e3814 |
(3434) 0x4e33dc ADD X0, X0, #1 |
(3434) 0x4e33e0 LDR X15, [X24, X0,LSL #3] |
(3434) 0x4e33e4 UBFM X2, X0, #61, #60 |
(3434) 0x4e33e8 CMP X1, X15 |
(3434) 0x4e33ec B.EQ 4e3814 |
(3434) 0x4e33f0 ADD X0, X0, #1 |
(3434) 0x4e33f4 LDR X30, [X24, X0,LSL #3] |
(3434) 0x4e33f8 UBFM X2, X0, #61, #60 |
(3434) 0x4e33fc CMP X1, X30 |
(3434) 0x4e3400 B.EQ 4e3814 |
(3434) 0x4e3404 ADD X0, X0, #1 |
(3434) 0x4e3408 LDR X4, [X24, X0,LSL #3] |
(3434) 0x4e340c UBFM X2, X0, #61, #60 |
(3434) 0x4e3410 CMP X1, X4 |
(3434) 0x4e3414 B.EQ 4e3814 |
(3434) 0x4e3418 ADD X0, X0, #1 |
(3434) 0x4e341c LDR X11, [X24, X0,LSL #3] |
(3434) 0x4e3420 UBFM X2, X0, #61, #60 |
(3434) 0x4e3424 CMP X1, X11 |
(3434) 0x4e3428 B.EQ 4e3814 |
(3434) 0x4e342c ADD X0, X0, #1 |
(3434) 0x4e3430 LDR X12, [X24, X0,LSL #3] |
(3434) 0x4e3434 UBFM X2, X0, #61, #60 |
(3434) 0x4e3438 CMP X1, X12 |
(3434) 0x4e343c B.EQ 4e3814 |
(3434) 0x4e3440 ADD X0, X0, #1 |
(3434) 0x4e3444 CMP X16, X0 |
(3434) 0x4e3448 B.EQ 4e34f4 |
(3438) 0x4e344c LDR X30, [X24, X0,LSL #3] |
(3438) 0x4e3450 ADD X4, X0, #1 |
(3438) 0x4e3454 ADD X12, X0, #3 |
(3438) 0x4e3458 ADD X11, X0, #2 |
(3438) 0x4e345c ADD X13, X0, #4 |
(3438) 0x4e3460 ADD X14, X0, #5 |
(3438) 0x4e3464 ADD X15, X0, #6 |
(3438) 0x4e3468 ADD X25, X0, #7 |
(3438) 0x4e346c UBFM X2, X0, #61, #60 |
(3438) 0x4e3470 ADD X0, X0, #8 |
(3438) 0x4e3474 CMP X1, X30 |
(3438) 0x4e3478 B.EQ 4e3814 |
(3438) 0x4e347c LDR X30, [X24, X4,LSL #3] |
(3438) 0x4e3480 UBFM X2, X4, #61, #60 |
(3438) 0x4e3484 CMP X1, X30 |
(3438) 0x4e3488 B.EQ 4e3814 |
(3438) 0x4e348c LDR X4, [X24, X11,LSL #3] |
(3438) 0x4e3490 UBFM X2, X11, #61, #60 |
(3438) 0x4e3494 CMP X1, X4 |
(3438) 0x4e3498 B.EQ 4e3814 |
(3438) 0x4e349c LDR X11, [X24, X12,LSL #3] |
(3438) 0x4e34a0 UBFM X2, X12, #61, #60 |
(3438) 0x4e34a4 CMP X1, X11 |
(3438) 0x4e34a8 B.EQ 4e3814 |
(3438) 0x4e34ac LDR X12, [X24, X13,LSL #3] |
(3438) 0x4e34b0 UBFM X2, X13, #61, #60 |
(3438) 0x4e34b4 CMP X1, X12 |
(3438) 0x4e34b8 B.EQ 4e3814 |
(3438) 0x4e34bc LDR X13, [X24, X14,LSL #3] |
(3438) 0x4e34c0 UBFM X2, X14, #61, #60 |
(3438) 0x4e34c4 CMP X1, X13 |
(3438) 0x4e34c8 B.EQ 4e3814 |
(3438) 0x4e34cc LDR X14, [X24, X15,LSL #3] |
(3438) 0x4e34d0 UBFM X2, X15, #61, #60 |
(3438) 0x4e34d4 CMP X1, X14 |
(3438) 0x4e34d8 B.EQ 4e3814 |
(3438) 0x4e34dc LDR X15, [X24, X25,LSL #3] |
(3438) 0x4e34e0 UBFM X2, X25, #61, #60 |
(3438) 0x4e34e4 CMP X1, X15 |
(3438) 0x4e34e8 B.EQ 4e3814 |
(3438) 0x4e34ec CMP X16, X0 |
(3438) 0x4e34f0 B.NE 4e344c |
(3434) 0x4e34f4 LDR X25, [SP, #176] |
(3434) 0x4e34f8 CMP X25, X10 |
(3434) 0x4e34fc B.LE 4e3e78 |
(3434) 0x4e3500 LDR D0, [X5, X21,LSL #3] |
(3434) 0x4e3504 UBFM X0, X10, #61, #60 |
(3434) 0x4e3508 STR X1, [X24, X10,LSL #3] |
(3434) 0x4e350c ADD X10, X10, #1 |
(3434) 0x4e3510 STR D0, [X7, X0] |
(3434) 0x4e3514 B 4e331c |
(3428) 0x4e3518 LDR X18, [SP, #136] |
(3428) 0x4e351c ADD X21, X21, X2 |
(3428) 0x4e3520 CBZ X18, 4e3344 |
0x4e3524 LDR X15, [SP, #160] |
0x4e3528 CMP X15, #0 |
0x4e352c B.LE 4e3344 |
0x4e3530 ADD X14, X27, X2,LSL #3 |
0x4e3534 MOVZ X11, #0 |
0x4e3538 LDR X6, [SP, #168] |
0x4e353c LDR X10, [SP, #184] |
0x4e3540 B 4e3550 |
(3439) 0x4e3544 ADD X6, X6, #16 |
(3439) 0x4e3548 CMP X7, X6 |
(3439) 0x4e354c B.EQ 4e3344 |
(3439) 0x4e3550 LDP X30, X4, [X6] |
(3439) 0x4e3554 ORR X28, XZR, X11 |
(3439) 0x4e3558 ADD X11, X11, X4 |
(3439) 0x4e355c CMP X25, X30 |
(3439) 0x4e3560 B.NE 4e3544 |
(3439) 0x4e3564 CMP X2, #0 |
(3439) 0x4e3568 B.LE 4e3544 |
(3439) 0x4e356c CMP X4, #0 |
(3439) 0x4e3570 B.LE 4e3544 |
(3439) 0x4e3574 ADD X12, X10, X28,LSL #3 |
(3439) 0x4e3578 ORR X3, XZR, X27 |
(3439) 0x4e357c ADD X4, X10, X11,LSL #3 |
(3441) 0x4e3580 SUB X1, X4, X12 |
(3441) 0x4e3584 ORR X0, XZR, X12 |
(3441) 0x4e3588 SUB X13, X1, #8 |
(3441) 0x4e358c UBFM X16, X13, #3, #63 |
(3441) 0x4e3590 ADD X17, X16, #1 |
(3441) 0x4e3594 ANDS X18, X17, #4224 |
(3441) 0x4e3598 B.EQ 4e3670 |
(3441) 0x4e359c CMP X18, #1 |
(3441) 0x4e35a0 B.EQ 4e3644 |
(3441) 0x4e35a4 CMP X18, #2 |
(3441) 0x4e35a8 B.EQ 4e3630 |
(3441) 0x4e35ac CMP X18, #3 |
(3441) 0x4e35b0 B.EQ 4e361c |
(3441) 0x4e35b4 CMP X18, #4 |
(3441) 0x4e35b8 B.EQ 4e3608 |
(3441) 0x4e35bc CMP X18, #5 |
(3441) 0x4e35c0 B.EQ 4e35f4 |
(3441) 0x4e35c4 CMP X18, #6 |
(3441) 0x4e35c8 B.EQ 4e35e0 |
(3441) 0x4e35cc LDR X15, [X3] |
(3441) 0x4e35d0 LDR X28, [X12] |
(3441) 0x4e35d4 CMP X15, X28 |
(3441) 0x4e35d8 B.EQ 4e37f4 |
(3441) 0x4e35dc ADD X0, X12, #8 |
(3441) 0x4e35e0 LDR X1, [X0] |
(3441) 0x4e35e4 LDR X13, [X3] |
(3441) 0x4e35e8 CMP X13, X1 |
(3441) 0x4e35ec B.EQ 4e37e0 |
(3441) 0x4e35f0 ADD X0, X0, #8 |
(3441) 0x4e35f4 LDR X18, [X0] |
(3441) 0x4e35f8 LDR X15, [X3] |
(3441) 0x4e35fc CMP X15, X18 |
(3441) 0x4e3600 B.EQ 4e37cc |
(3441) 0x4e3604 ADD X0, X0, #8 |
(3441) 0x4e3608 LDR X1, [X0] |
(3441) 0x4e360c LDR X13, [X3] |
(3441) 0x4e3610 CMP X13, X1 |
(3441) 0x4e3614 B.EQ 4e37b8 |
(3441) 0x4e3618 ADD X0, X0, #8 |
(3441) 0x4e361c LDR X18, [X0] |
(3441) 0x4e3620 LDR X15, [X3] |
(3441) 0x4e3624 CMP X15, X18 |
(3441) 0x4e3628 B.EQ 4e37a4 |
(3441) 0x4e362c ADD X0, X0, #8 |
(3441) 0x4e3630 LDR X1, [X0] |
(3441) 0x4e3634 LDR X13, [X3] |
(3441) 0x4e3638 CMP X13, X1 |
(3441) 0x4e363c B.EQ 4e3790 |
(3441) 0x4e3640 ADD X0, X0, #8 |
(3441) 0x4e3644 LDR X18, [X0] |
(3441) 0x4e3648 LDR X15, [X3] |
(3441) 0x4e364c CMP X15, X18 |
(3441) 0x4e3650 B.NE 4e3664 |
(3441) 0x4e3654 STR X22, [X0] |
(3441) 0x4e3658 LDR X28, [X20, X19] |
(3441) 0x4e365c ADD X30, X28, #1 |
(3441) 0x4e3660 STR X30, [X20, X19] |
(3441) 0x4e3664 ADD X0, X0, #8 |
(3441) 0x4e3668 CMP X0, X4 |
(3441) 0x4e366c B.EQ 4e3780 |
(3440) 0x4e3670 LDR X1, [X0] |
(3440) 0x4e3674 LDR X13, [X3] |
(3440) 0x4e3678 CMP X13, X1 |
(3440) 0x4e367c B.NE 4e3690 |
(3440) 0x4e3680 STR X22, [X0] |
(3440) 0x4e3684 LDR X16, [X20, X19] |
(3440) 0x4e3688 ADD X17, X16, #1 |
(3440) 0x4e368c STR X17, [X20, X19] |
(3440) 0x4e3690 LDR X15, [X3] |
(3440) 0x4e3694 ADD X18, X0, #8 |
(3440) 0x4e3698 LDR X28, [X0, #8] |
(3440) 0x4e369c CMP X15, X28 |
(3440) 0x4e36a0 B.NE 4e36b4 |
(3440) 0x4e36a4 STR X22, [X0, #8] |
(3440) 0x4e36a8 LDR X0, [X20, X19] |
(3440) 0x4e36ac ADD X30, X0, #1 |
(3440) 0x4e36b0 STR X30, [X20, X19] |
(3440) 0x4e36b4 LDR X13, [X3] |
(3440) 0x4e36b8 LDR X1, [X18, #8] |
(3440) 0x4e36bc CMP X13, X1 |
(3440) 0x4e36c0 B.NE 4e36d4 |
(3440) 0x4e36c4 STR X22, [X18, #8] |
(3440) 0x4e36c8 LDR X16, [X20, X19] |
(3440) 0x4e36cc ADD X17, X16, #1 |
(3440) 0x4e36d0 STR X17, [X20, X19] |
(3440) 0x4e36d4 LDR X15, [X3] |
(3440) 0x4e36d8 LDR X28, [X18, #16] |
(3440) 0x4e36dc CMP X15, X28 |
(3440) 0x4e36e0 B.NE 4e36f4 |
(3440) 0x4e36e4 STR X22, [X18, #16] |
(3440) 0x4e36e8 LDR X0, [X20, X19] |
(3440) 0x4e36ec ADD X30, X0, #1 |
(3440) 0x4e36f0 STR X30, [X20, X19] |
(3440) 0x4e36f4 LDR X13, [X3] |
(3440) 0x4e36f8 LDR X1, [X18, #24] |
(3440) 0x4e36fc CMP X13, X1 |
(3440) 0x4e3700 B.NE 4e3714 |
(3440) 0x4e3704 STR X22, [X18, #24] |
(3440) 0x4e3708 LDR X16, [X20, X19] |
(3440) 0x4e370c ADD X17, X16, #1 |
(3440) 0x4e3710 STR X17, [X20, X19] |
(3440) 0x4e3714 LDR X15, [X3] |
(3440) 0x4e3718 LDR X28, [X18, #32] |
(3440) 0x4e371c CMP X15, X28 |
(3440) 0x4e3720 B.NE 4e3734 |
(3440) 0x4e3724 STR X22, [X18, #32] |
(3440) 0x4e3728 LDR X0, [X20, X19] |
(3440) 0x4e372c ADD X30, X0, #1 |
(3440) 0x4e3730 STR X30, [X20, X19] |
(3440) 0x4e3734 LDR X13, [X3] |
(3440) 0x4e3738 LDR X1, [X18, #40] |
(3440) 0x4e373c CMP X13, X1 |
(3440) 0x4e3740 B.NE 4e3754 |
(3440) 0x4e3744 STR X22, [X18, #40] |
(3440) 0x4e3748 LDR X16, [X20, X19] |
(3440) 0x4e374c ADD X17, X16, #1 |
(3440) 0x4e3750 STR X17, [X20, X19] |
(3440) 0x4e3754 LDR X15, [X3] |
(3440) 0x4e3758 LDR X28, [X18, #48] |
(3440) 0x4e375c CMP X15, X28 |
(3440) 0x4e3760 B.NE 4e3774 |
(3440) 0x4e3764 STR X22, [X18, #48] |
(3440) 0x4e3768 LDR X0, [X20, X19] |
(3440) 0x4e376c ADD X30, X0, #1 |
(3440) 0x4e3770 STR X30, [X20, X19] |
(3440) 0x4e3774 ADD X0, X18, #56 |
(3440) 0x4e3778 CMP X0, X4 |
(3440) 0x4e377c B.NE 4e3670 |
(3441) 0x4e3780 ADD X3, X3, #8 |
(3441) 0x4e3784 CMP X14, X3 |
(3441) 0x4e3788 B.NE 4e3580 |
(3439) 0x4e378c B 4e3544 |
(3441) 0x4e3790 STR X22, [X0] |
(3441) 0x4e3794 LDR X16, [X20, X19] |
(3441) 0x4e3798 ADD X17, X16, #1 |
(3441) 0x4e379c STR X17, [X20, X19] |
(3441) 0x4e37a0 B 4e3640 |
(3441) 0x4e37a4 STR X22, [X0] |
(3441) 0x4e37a8 LDR X28, [X20, X19] |
(3441) 0x4e37ac ADD X30, X28, #1 |
(3441) 0x4e37b0 STR X30, [X20, X19] |
(3441) 0x4e37b4 B 4e362c |
(3441) 0x4e37b8 STR X22, [X0] |
(3441) 0x4e37bc LDR X16, [X20, X19] |
(3441) 0x4e37c0 ADD X17, X16, #1 |
(3441) 0x4e37c4 STR X17, [X20, X19] |
(3441) 0x4e37c8 B 4e3618 |
(3441) 0x4e37cc STR X22, [X0] |
(3441) 0x4e37d0 LDR X28, [X20, X19] |
(3441) 0x4e37d4 ADD X30, X28, #1 |
(3441) 0x4e37d8 STR X30, [X20, X19] |
(3441) 0x4e37dc B 4e3604 |
(3441) 0x4e37e0 STR X22, [X0] |
(3441) 0x4e37e4 LDR X16, [X20, X19] |
(3441) 0x4e37e8 ADD X17, X16, #1 |
(3441) 0x4e37ec STR X17, [X20, X19] |
(3441) 0x4e37f0 B 4e35f0 |
(3441) 0x4e37f4 STR X22, [X12] |
(3441) 0x4e37f8 LDR X30, [X20, X19] |
(3441) 0x4e37fc ADD X0, X30, #1 |
(3441) 0x4e3800 STR X0, [X20, X19] |
(3441) 0x4e3804 B 4e35dc |
(3436) 0x4e3808 LDR D3, [X5, X21,LSL #3] |
(3436) 0x4e380c STR D3, [X19, X2] |
(3436) 0x4e3810 B 4e331c |
(3434) 0x4e3814 LDR D1, [X5, X21,LSL #3] |
(3434) 0x4e3818 STR D1, [X7, X2] |
(3434) 0x4e381c B 4e331c |
(3428) 0x4e3820 LDR X1, [SP, #200] |
(3428) 0x4e3824 LDR X0, [SP, #240] |
(3428) 0x4e3828 LDR X11, [SP, #248] |
(3428) 0x4e382c LDR X28, [X1, X14,LSL #3] |
(3428) 0x4e3830 LDR X30, [X0, X14,LSL #3] |
(3428) 0x4e3834 LDR X12, [X11, X14,LSL #3] |
(3428) 0x4e3838 LDR X4, [SP, #256] |
(3428) 0x4e383c SUB X17, X30, X28 |
(3428) 0x4e3840 STP X12, X30, [SP, #208] |
(3428) 0x4e3844 LDR X25, [X4, X14,LSL #3] |
(3428) 0x4e3848 CMP X2, X17 |
(3428) 0x4e384c B.GT 4e3bac |
(3428) 0x4e3850 CMP X2, #0 |
(3428) 0x4e3854 B.LE 4e3344 |
(3428) 0x4e3858 MOVZ X12, #0 |
(3428) 0x4e385c ADD X3, X21, X2 |
(3428) 0x4e3860 STR X20, [SP, #264] |
(3428) 0x4e3864 ORR X13, XZR, X28 |
(3428) 0x4e3868 ORR X20, XZR, X3 |
(3428) 0x4e386c MOVZ X6, #0 |
(3428) 0x4e3870 LDR X30, [SP, #208] |
(3428) 0x4e3874 STR X3, [SP, #176] |
(3428) 0x4e3878 LDR X3, [SP, #216] |
(3428) 0x4e387c STR X14, [SP, #208] |
(3429) 0x4e3880 MOVZ X0, #0 |
(3429) 0x4e3884 LDR X1, [X27, X21,LSL #3] |
(3429) 0x4e3888 CMP X28, #0 |
(3429) 0x4e388c B.LE 4e3a04 |
(3429) 0x4e3890 ANDS X16, X28, #4224 |
(3429) 0x4e3894 B.EQ 4e395c |
(3429) 0x4e3898 CMP X16, #1 |
(3429) 0x4e389c B.EQ 4e3940 |
(3429) 0x4e38a0 CMP X16, #2 |
(3429) 0x4e38a4 B.EQ 4e392c |
(3429) 0x4e38a8 CMP X16, #3 |
(3429) 0x4e38ac B.EQ 4e3918 |
(3429) 0x4e38b0 CMP X16, #4 |
(3429) 0x4e38b4 B.EQ 4e3904 |
(3429) 0x4e38b8 CMP X16, #5 |
(3429) 0x4e38bc B.EQ 4e38f0 |
(3429) 0x4e38c0 CMP X16, #6 |
(3429) 0x4e38c4 B.EQ 4e38dc |
(3429) 0x4e38c8 LDR X18, [X25] |
(3429) 0x4e38cc MOVZ X2, #0 |
(3429) 0x4e38d0 CMP X18, X1 |
(3429) 0x4e38d4 B.EQ 4e3a74 |
(3429) 0x4e38d8 MOVZ X0, #1 |
(3429) 0x4e38dc LDR X10, [X25, X0,LSL #3] |
(3429) 0x4e38e0 UBFM X2, X0, #61, #60 |
(3429) 0x4e38e4 CMP X10, X1 |
(3429) 0x4e38e8 B.EQ 4e3a74 |
(3429) 0x4e38ec ADD X0, X0, #1 |
(3429) 0x4e38f0 LDR X17, [X25, X0,LSL #3] |
(3429) 0x4e38f4 UBFM X2, X0, #61, #60 |
(3429) 0x4e38f8 CMP X17, X1 |
(3429) 0x4e38fc B.EQ 4e3a74 |
(3429) 0x4e3900 ADD X0, X0, #1 |
(3429) 0x4e3904 LDR X4, [X25, X0,LSL #3] |
(3429) 0x4e3908 UBFM X2, X0, #61, #60 |
(3429) 0x4e390c CMP X4, X1 |
(3429) 0x4e3910 B.EQ 4e3a74 |
(3429) 0x4e3914 ADD X0, X0, #1 |
(3429) 0x4e3918 LDR X11, [X25, X0,LSL #3] |
(3429) 0x4e391c UBFM X2, X0, #61, #60 |
(3429) 0x4e3920 CMP X11, X1 |
(3429) 0x4e3924 B.EQ 4e3a74 |
(3429) 0x4e3928 ADD X0, X0, #1 |
(3429) 0x4e392c LDR X14, [X25, X0,LSL #3] |
(3429) 0x4e3930 UBFM X2, X0, #61, #60 |
(3429) 0x4e3934 CMP X14, X1 |
(3429) 0x4e3938 B.EQ 4e3a74 |
(3429) 0x4e393c ADD X0, X0, #1 |
(3429) 0x4e3940 LDR X15, [X25, X0,LSL #3] |
(3429) 0x4e3944 UBFM X2, X0, #61, #60 |
(3429) 0x4e3948 CMP X15, X1 |
(3429) 0x4e394c B.EQ 4e3a74 |
(3429) 0x4e3950 ADD X0, X0, #1 |
(3429) 0x4e3954 CMP X28, X0 |
(3429) 0x4e3958 B.EQ 4e3a04 |
(3432) 0x4e395c LDR X18, [X25, X0,LSL #3] |
(3432) 0x4e3960 ADD X4, X0, #1 |
(3432) 0x4e3964 ADD X11, X0, #3 |
(3432) 0x4e3968 ADD X10, X0, #2 |
(3432) 0x4e396c ADD X14, X0, #4 |
(3432) 0x4e3970 ADD X15, X0, #5 |
(3432) 0x4e3974 ADD X16, X0, #6 |
(3432) 0x4e3978 ADD X17, X0, #7 |
(3432) 0x4e397c UBFM X2, X0, #61, #60 |
(3432) 0x4e3980 ADD X0, X0, #8 |
(3432) 0x4e3984 CMP X18, X1 |
(3432) 0x4e3988 B.EQ 4e3a74 |
(3432) 0x4e398c LDR X18, [X25, X4,LSL #3] |
(3432) 0x4e3990 UBFM X2, X4, #61, #60 |
(3432) 0x4e3994 CMP X18, X1 |
(3432) 0x4e3998 B.EQ 4e3a74 |
(3432) 0x4e399c LDR X4, [X25, X10,LSL #3] |
(3432) 0x4e39a0 UBFM X2, X10, #61, #60 |
(3432) 0x4e39a4 CMP X4, X1 |
(3432) 0x4e39a8 B.EQ 4e3a74 |
(3432) 0x4e39ac LDR X10, [X25, X11,LSL #3] |
(3432) 0x4e39b0 UBFM X2, X11, #61, #60 |
(3432) 0x4e39b4 CMP X10, X1 |
(3432) 0x4e39b8 B.EQ 4e3a74 |
(3432) 0x4e39bc LDR X11, [X25, X14,LSL #3] |
(3432) 0x4e39c0 UBFM X2, X14, #61, #60 |
(3432) 0x4e39c4 CMP X11, X1 |
(3432) 0x4e39c8 B.EQ 4e3a74 |
(3432) 0x4e39cc LDR X14, [X25, X15,LSL #3] |
(3432) 0x4e39d0 UBFM X2, X15, #61, #60 |
(3432) 0x4e39d4 CMP X14, X1 |
(3432) 0x4e39d8 B.EQ 4e3a74 |
(3432) 0x4e39dc LDR X15, [X25, X16,LSL #3] |
(3432) 0x4e39e0 UBFM X2, X16, #61, #60 |
(3432) 0x4e39e4 CMP X15, X1 |
(3432) 0x4e39e8 B.EQ 4e3a74 |
(3432) 0x4e39ec LDR X16, [X25, X17,LSL #3] |
(3432) 0x4e39f0 UBFM X2, X17, #61, #60 |
(3432) 0x4e39f4 CMP X16, X1 |
(3432) 0x4e39f8 B.EQ 4e3a74 |
(3432) 0x4e39fc CMP X28, X0 |
(3432) 0x4e3a00 B.NE 4e395c |
(3429) 0x4e3a04 LDR D4, [X5, X21,LSL #3] |
(3429) 0x4e3a08 CMP X3, X13 |
(3429) 0x4e3a0c B.LE 4e3a80 |
(3429) 0x4e3a10 UBFM X0, X13, #61, #60 |
(3429) 0x4e3a14 STR X1, [X25, X13,LSL #3] |
(3429) 0x4e3a18 ADD X13, X13, #1 |
(3429) 0x4e3a1c STR D4, [X30, X0] |
(3429) 0x4e3a20 ADD X21, X21, #1 |
(3429) 0x4e3a24 CMP X21, X20 |
(3429) 0x4e3a28 B.NE 4e3880 |
(3428) 0x4e3a2c LDP X18, X4, [SP, #200] |
(3428) 0x4e3a30 ADD X21, X13, X6 |
(3428) 0x4e3a34 LDR X20, [SP, #264] |
(3428) 0x4e3a38 STR X21, [X18, X4,LSL #3] |
(3428) 0x4e3a3c CBNZ X6, 4e3a98 |
(3428) 0x4e3a40 LDR X21, [SP, #176] |
(3428) 0x4e3a44 CBZ X12, 4e3344 |
(3428) 0x4e3a48 ORR X0, XZR, X12 |
(3428) 0x4e3a4c STP X8, X9, [SP, #208] |
(3428) 0x4e3a50 STP X5, X7, [SP, #264] |
(3428) 0x4e3a54 LDR X21, [SP, #176] |
(3428) 0x4e3a58 BL 5038c0 |
(3428) 0x4e3a5c LDR X0, [SP, #144] |
(3428) 0x4e3a60 STR XZR, [SP, #144] |
(3428) 0x4e3a64 BL 5038c0 |
(3428) 0x4e3a68 LDP X8, X9, [SP, #208] |
(3428) 0x4e3a6c LDP X5, X7, [SP, #264] |
(3428) 0x4e3a70 B 4e3344 |
(3429) 0x4e3a74 LDR D5, [X5, X21,LSL #3] |
(3429) 0x4e3a78 STR D5, [X30, X2] |
(3429) 0x4e3a7c B 4e3a20 |
(3429) 0x4e3a80 STR X1, [X12, X6,LSL #3] |
(3429) 0x4e3a84 UBFM X17, X6, #61, #60 |
(3429) 0x4e3a88 ADD X6, X6, #1 |
(3429) 0x4e3a8c LDR X1, [SP, #144] |
(3429) 0x4e3a90 STR D4, [X1, X17] |
(3429) 0x4e3a94 B 4e3a20 |
(3428) 0x4e3a98 LDR X28, [SP, #256] |
(3428) 0x4e3a9c UBFM X25, X21, #61, #60 |
(3428) 0x4e3aa0 ORR X1, XZR, X25 |
(3428) 0x4e3aa4 STP X4, X13, [SP, #208] |
(3428) 0x4e3aa8 STP X6, X12, [SP, #264] |
(3428) 0x4e3aac LDR X0, [X28, X4,LSL #3] |
(3428) 0x4e3ab0 STP X8, X9, [SP, #280] |
(3428) 0x4e3ab4 STP X5, X7, [SP, #312] |
(3428) 0x4e3ab8 BL 50382c |
(3428) 0x4e3abc ORR X1, XZR, X25 |
(3428) 0x4e3ac0 LDR X8, [SP, #208] |
(3428) 0x4e3ac4 ORR X12, XZR, X0 |
(3428) 0x4e3ac8 LDR X25, [SP, #248] |
(3428) 0x4e3acc LDR X0, [X25, X8,LSL #3] |
(3428) 0x4e3ad0 STR X12, [X28, X8,LSL #3] |
(3428) 0x4e3ad4 BL 50382c |
(3428) 0x4e3ad8 LDP X3, X11, [SP, #208] |
(3428) 0x4e3adc ORR X15, XZR, X0 |
(3428) 0x4e3ae0 LDP X6, X12, [SP, #264] |
(3428) 0x4e3ae4 UBFM X13, X11, #61, #60 |
(3428) 0x4e3ae8 ADD X0, X0, X13 |
(3428) 0x4e3aec ADD X2, X13, #8 |
(3428) 0x4e3af0 LDP X8, X9, [SP, #280] |
(3428) 0x4e3af4 ADD X4, X12, #8 |
(3428) 0x4e3af8 LDP X5, X7, [SP, #312] |
(3428) 0x4e3afc LDR X10, [SP, #144] |
(3428) 0x4e3b00 LDR X14, [X28, X3,LSL #3] |
(3428) 0x4e3b04 STR X15, [X25, X3,LSL #3] |
(3428) 0x4e3b08 ADD X1, X10, #8 |
(3428) 0x4e3b0c SUB X18, X0, X1 |
(3428) 0x4e3b10 LDR X1, [SP, #240] |
(3428) 0x4e3b14 ADD X28, X14, X2 |
(3428) 0x4e3b18 ADD X25, X14, X13 |
(3428) 0x4e3b1c SUB X10, X0, X28 |
(3428) 0x4e3b20 SUB X2, X25, X4 |
(3428) 0x4e3b24 CMP X10, X18 |
(3428) 0x4e3b28 CSEL X11, X10, X18, #9 |
(3428) 0x4e3b2c CNTD X4, ALL |
(3428) 0x4e3b30 CMP X11, X2 |
(3428) 0x4e3b34 CSEL X18, X11, X2, #9 |
(3428) 0x4e3b38 STR X21, [X1, X3,LSL #3] |
(3428) 0x4e3b3c CNTB X21, ALL |
(3428) 0x4e3b40 MOVZ X1, #0 |
(3428) 0x4e3b44 SUB X3, X21, #16 |
(3428) 0x4e3b48 WHILELO P0.D, XZR, X6 |
(3428) 0x4e3b4c CMP X18, X3 |
(3428) 0x4e3b50 B.LS 4e3ce0 |
(3428) 0x4e3b54 LDR X16, [SP, #144] |
(3428) 0x4e3b58 HINT #0 |
(3428) 0x4e3b5c HINT #0 |
(3431) 0x4e3b60 LD1D {Z6.D}, P0/Z, [X12, X1,LSL #3] |
(3431) 0x4e3b64 ST1D {Z6.D}, P0, [X25, X1,LSL #3] |
(3431) 0x4e3b68 LD1D {Z7.D}, P0/Z, [X16, X1,LSL #3] |
(3431) 0x4e3b6c ST1D {Z7.D}, P0, [X0, X1,LSL #3] |
(3431) 0x4e3b70 ADD X1, X1, X4 |
(3431) 0x4e3b74 WHILELO P0.D, X1, X6 |
(3431) 0x4e3b78 B.NE 4e3b60 |
(3428) 0x4e3b7c B 4e3a40 |
0x4e3b80 STR X15, [SP, #144] |
0x4e3b84 BL 40f1c0 |
0x4e3b88 LDUR X21, [X27, #504] |
0x4e3b8c LDR X27, [SP, #144] |
0x4e3b90 B 4e3074 |
0x4e3b94 MADD X30, X0, X1, XZR |
0x4e3b98 ADD X3, X1, X30 |
0x4e3b9c ADD X26, X2, X30 |
0x4e3ba0 ADD X5, X3, X2 |
0x4e3ba4 STR X5, [SP, #104] |
0x4e3ba8 B 4e2dec |
(3428) 0x4e3bac SUB X13, X2, X17 |
(3428) 0x4e3bb0 MOVZ X1, #8 |
(3428) 0x4e3bb4 STP X2, X14, [SP, #264] |
(3428) 0x4e3bb8 ORR X0, XZR, X13 |
(3428) 0x4e3bbc STR X13, [SP, #144] |
(3428) 0x4e3bc0 STP X8, X9, [SP, #280] |
(3428) 0x4e3bc4 STP X5, X7, [SP, #312] |
(3428) 0x4e3bc8 BL 5037ec |
(3428) 0x4e3bcc ORR X8, XZR, X0 |
(3428) 0x4e3bd0 MOVZ X1, #8 |
(3428) 0x4e3bd4 LDR X0, [SP, #144] |
(3428) 0x4e3bd8 STR X8, [SP, #176] |
(3428) 0x4e3bdc BL 5037ec |
(3428) 0x4e3be0 LDP X2, X14, [SP, #264] |
(3428) 0x4e3be4 STR X0, [SP, #144] |
(3428) 0x4e3be8 LDR X12, [SP, #176] |
(3428) 0x4e3bec CMP X2, #0 |
(3428) 0x4e3bf0 LDP X8, X9, [SP, #280] |
(3428) 0x4e3bf4 LDP X5, X7, [SP, #312] |
(3428) 0x4e3bf8 B.GT 4e385c |
(3428) 0x4e3bfc STR X21, [SP, #176] |
(3428) 0x4e3c00 LDR X15, [SP, #200] |
(3428) 0x4e3c04 STR X28, [X15, X14,LSL #3] |
(3428) 0x4e3c08 B 4e3a40 |
(3435) 0x4e3c0c ADRP X26, |
(3435) 0x4e3c10 MOVZ X3, #0 |
(3435) 0x4e3c14 STR X6, [SP, #176] |
(3435) 0x4e3c18 ADD X0, X26, #1384 |
(3435) 0x4e3c1c LDP X26, X18, [SP, #280] |
(3435) 0x4e3c20 MOVZ X2, #1 |
(3435) 0x4e3c24 MOVZ X1, #3406 |
(3435) 0x4e3c28 STR X8, [SP, #320] |
(3435) 0x4e3c2c STR X10, [SP, #344] |
(3435) 0x4e3c30 STP X18, X5, [SP, #208] |
(3435) 0x4e3c34 LDP X20, X19, [SP, #264] |
(3435) 0x4e3c38 STR X9, [SP, #264] |
(3435) 0x4e3c3c LDR X25, [SP, #312] |
(3435) 0x4e3c40 BL 506500 |
(3435) 0x4e3c44 LDR X7, [SP, #336] |
(3435) 0x4e3c48 MOVZ X1, #1 |
(3435) 0x4e3c4c LDR X9, [X7, #224] |
(3435) 0x4e3c50 LDADD X1, X1, [X9] |
(3435) 0x4e3c54 LDP X8, X3, [SP, #320] |
(3435) 0x4e3c58 LDP X7, X5, [SP, #208] |
(3435) 0x4e3c5c LDR X6, [SP, #176] |
(3435) 0x4e3c60 LDR X9, [SP, #264] |
(3435) 0x4e3c64 LDR X10, [SP, #344] |
(3435) 0x4e3c68 CBNZ X3, 4e3c94 |
(3433) 0x4e3c6c ORR X17, XZR, X21 |
(3433) 0x4e3c70 LDR X21, [SP, #136] |
(3433) 0x4e3c74 LDP X16, X0, [X21, #56] |
(3433) 0x4e3c78 ADD X30, X16, X6 |
(3433) 0x4e3c7c ADD X6, X0, X6 |
(3433) 0x4e3c80 STP X6, X30, [SP, #208] |
(3433) 0x4e3c84 B 4e3330 |
0x4e3c88 LDR X0, [X2], #8 |
0x4e3c8c STR X0, [X27] |
0x4e3c90 B 4e2e58 |
(3435) 0x4e3c94 ADRP X17, |
(3435) 0x4e3c98 ORR X1, XZR, X25 |
(3435) 0x4e3c9c STR X10, [SP, #176] |
(3435) 0x4e3ca0 ADD X0, X17, #1544 |
(3435) 0x4e3ca4 STR X6, [SP, #208] |
(3435) 0x4e3ca8 STP X8, X9, [SP, #264] |
(3435) 0x4e3cac STP X5, X7, [SP, #280] |
(3435) 0x4e3cb0 BL 503a40 |
0x4e3cb4 LDR X4, [SP, #136] |
0x4e3cb8 ORR X17, XZR, X21 |
0x4e3cbc LDP X8, X9, [SP, #264] |
0x4e3cc0 LDP X5, X7, [SP, #280] |
0x4e3cc4 LDP X12, X13, [X4, #56] |
0x4e3cc8 LDR X11, [SP, #208] |
0x4e3ccc LDR X10, [SP, #176] |
0x4e3cd0 ADD X14, X12, X11 |
0x4e3cd4 ADD X15, X13, X11 |
0x4e3cd8 STP X15, X14, [SP, #208] |
0x4e3cdc B 4e3330 |
(3428) 0x4e3ce0 ANDS X17, X6, #4224 |
(3428) 0x4e3ce4 B.EQ 4e3ef8 |
(3428) 0x4e3ce8 CMP X17, #1 |
(3428) 0x4e3cec B.EQ 4e3da8 |
(3428) 0x4e3cf0 CMP X17, #2 |
(3428) 0x4e3cf4 B.EQ 4e3d90 |
(3428) 0x4e3cf8 CMP X17, #3 |
(3428) 0x4e3cfc B.EQ 4e3d78 |
(3428) 0x4e3d00 CMP X17, #4 |
(3428) 0x4e3d04 B.EQ 4e3d60 |
(3428) 0x4e3d08 CMP X17, #5 |
(3428) 0x4e3d0c B.EQ 4e3d48 |
(3428) 0x4e3d10 CMP X17, #6 |
(3428) 0x4e3d14 B.EQ 4e3d30 |
(3428) 0x4e3d18 LDR X28, [SP, #144] |
(3428) 0x4e3d1c MOVZ X1, #1 |
(3428) 0x4e3d20 LDR X30, [X12] |
(3428) 0x4e3d24 LDR D16, [X28] |
(3428) 0x4e3d28 STR X30, [X14, X13] |
(3428) 0x4e3d2c STR D16, [X15, X13] |
(3428) 0x4e3d30 LDR X14, [SP, #144] |
(3428) 0x4e3d34 LDR X15, [X12, X1,LSL #3] |
(3428) 0x4e3d38 LDR D17, [X14, X1,LSL #3] |
(3428) 0x4e3d3c STR X15, [X25, X1,LSL #3] |
(3428) 0x4e3d40 STR D17, [X0, X1,LSL #3] |
(3428) 0x4e3d44 ADD X1, X1, #1 |
(3428) 0x4e3d48 LDR X10, [SP, #144] |
(3428) 0x4e3d4c LDR X13, [X12, X1,LSL #3] |
(3428) 0x4e3d50 LDR D18, [X10, X1,LSL #3] |
(3428) 0x4e3d54 STR X13, [X25, X1,LSL #3] |
(3428) 0x4e3d58 STR D18, [X0, X1,LSL #3] |
(3428) 0x4e3d5c ADD X1, X1, #1 |
(3428) 0x4e3d60 LDR X11, [SP, #144] |
(3428) 0x4e3d64 LDR X2, [X12, X1,LSL #3] |
(3428) 0x4e3d68 LDR D19, [X11, X1,LSL #3] |
(3428) 0x4e3d6c STR X2, [X25, X1,LSL #3] |
(3428) 0x4e3d70 STR D19, [X0, X1,LSL #3] |
(3428) 0x4e3d74 ADD X1, X1, #1 |
(3428) 0x4e3d78 LDR X4, [SP, #144] |
(3428) 0x4e3d7c LDR X18, [X12, X1,LSL #3] |
(3428) 0x4e3d80 LDR D20, [X4, X1,LSL #3] |
(3428) 0x4e3d84 STR X18, [X25, X1,LSL #3] |
(3428) 0x4e3d88 STR D20, [X0, X1,LSL #3] |
(3428) 0x4e3d8c ADD X1, X1, #1 |
(3428) 0x4e3d90 LDR X3, [SP, #144] |
(3428) 0x4e3d94 LDR X21, [X12, X1,LSL #3] |
(3428) 0x4e3d98 LDR D21, [X3, X1,LSL #3] |
(3428) 0x4e3d9c STR X21, [X25, X1,LSL #3] |
(3428) 0x4e3da0 STR D21, [X0, X1,LSL #3] |
(3428) 0x4e3da4 ADD X1, X1, #1 |
(3428) 0x4e3da8 LDR X3, [SP, #144] |
(3428) 0x4e3dac LDR X16, [X12, X1,LSL #3] |
(3428) 0x4e3db0 LDR D22, [X3, X1,LSL #3] |
(3428) 0x4e3db4 ORR X17, XZR, X3 |
(3428) 0x4e3db8 STR X16, [X25, X1,LSL #3] |
(3428) 0x4e3dbc STR D22, [X0, X1,LSL #3] |
(3428) 0x4e3dc0 ADD X1, X1, #1 |
(3428) 0x4e3dc4 CMP X6, X1 |
(3428) 0x4e3dc8 B.EQ 4e3a48 |
(3430) 0x4e3dcc LDR X30, [X12, X1,LSL #3] |
(3430) 0x4e3dd0 ADD X28, X1, #1 |
(3430) 0x4e3dd4 ADD X15, X1, #2 |
(3430) 0x4e3dd8 ADD X14, X1, #3 |
(3430) 0x4e3ddc ADD X13, X1, #4 |
(3430) 0x4e3de0 LDR D23, [X17, X1,LSL #3] |
(3430) 0x4e3de4 ADD X11, X1, #5 |
(3430) 0x4e3de8 ADD X21, X1, #6 |
(3430) 0x4e3dec ADD X4, X1, #7 |
(3430) 0x4e3df0 STR X30, [X25, X1,LSL #3] |
(3430) 0x4e3df4 LDR X10, [X12, X28,LSL #3] |
(3430) 0x4e3df8 STR D23, [X0, X1,LSL #3] |
(3430) 0x4e3dfc ADD X1, X1, #8 |
(3430) 0x4e3e00 LDR D24, [X17, X28,LSL #3] |
(3430) 0x4e3e04 STR X10, [X25, X28,LSL #3] |
(3430) 0x4e3e08 LDR X2, [X12, X15,LSL #3] |
(3430) 0x4e3e0c STR D24, [X0, X28,LSL #3] |
(3430) 0x4e3e10 LDR D25, [X17, X15,LSL #3] |
(3430) 0x4e3e14 STR X2, [X25, X15,LSL #3] |
(3430) 0x4e3e18 LDR X18, [X12, X14,LSL #3] |
(3430) 0x4e3e1c STR D25, [X0, X15,LSL #3] |
(3430) 0x4e3e20 LDR D26, [X17, X14,LSL #3] |
(3430) 0x4e3e24 STR X18, [X25, X14,LSL #3] |
(3430) 0x4e3e28 LDR X16, [X12, X13,LSL #3] |
(3430) 0x4e3e2c STR D26, [X0, X14,LSL #3] |
(3430) 0x4e3e30 LDR D27, [X17, X13,LSL #3] |
(3430) 0x4e3e34 STR X16, [X25, X13,LSL #3] |
(3430) 0x4e3e38 LDR X3, [X12, X11,LSL #3] |
(3430) 0x4e3e3c STR D27, [X0, X13,LSL #3] |
(3430) 0x4e3e40 LDR D28, [X17, X11,LSL #3] |
(3430) 0x4e3e44 STR X3, [X25, X11,LSL #3] |
(3430) 0x4e3e48 LDR X30, [X12, X21,LSL #3] |
(3430) 0x4e3e4c STR D28, [X0, X11,LSL #3] |
(3430) 0x4e3e50 LDR D29, [X17, X21,LSL #3] |
(3430) 0x4e3e54 STR X30, [X25, X21,LSL #3] |
(3430) 0x4e3e58 LDR X28, [X12, X4,LSL #3] |
(3430) 0x4e3e5c STR D29, [X0, X21,LSL #3] |
(3430) 0x4e3e60 LDR D30, [X17, X4,LSL #3] |
(3430) 0x4e3e64 STR X28, [X25, X4,LSL #3] |
(3430) 0x4e3e68 STR D30, [X0, X4,LSL #3] |
(3430) 0x4e3e6c CMP X6, X1 |
(3430) 0x4e3e70 B.NE 4e3dcc |
(3428) 0x4e3e74 B 4e3a48 |
(3433) 0x4e3e78 LDP X26, X7, [SP, #280] |
(3433) 0x4e3e7c ADRP X20, |
(3433) 0x4e3e80 MOVZ X3, #0 |
(3433) 0x4e3e84 ADD X0, X20, #1384 |
(3433) 0x4e3e88 MOVZ X2, #1 |
(3433) 0x4e3e8c MOVZ X1, #3440 |
(3433) 0x4e3e90 STR X6, [SP, #176] |
(3433) 0x4e3e94 STR X8, [SP, #320] |
(3433) 0x4e3e98 STP X7, X5, [SP, #208] |
(3433) 0x4e3e9c STR X10, [SP, #344] |
(3433) 0x4e3ea0 LDP X20, X19, [SP, #264] |
(3433) 0x4e3ea4 STR X9, [SP, #264] |
(3433) 0x4e3ea8 LDR X25, [SP, #312] |
(3433) 0x4e3eac BL 506500 |
(3433) 0x4e3eb0 LDR X8, [SP, #336] |
(3433) 0x4e3eb4 MOVZ X9, #1 |
(3433) 0x4e3eb8 LDR X5, [X8, #224] |
(3433) 0x4e3ebc LDADD X9, X1, [X5] |
(3433) 0x4e3ec0 LDP X8, X3, [SP, #320] |
(3433) 0x4e3ec4 LDP X7, X5, [SP, #208] |
(3433) 0x4e3ec8 LDR X6, [SP, #176] |
(3433) 0x4e3ecc LDR X9, [SP, #264] |
(3433) 0x4e3ed0 LDR X10, [SP, #344] |
(3433) 0x4e3ed4 CBZ X3, 4e3c6c |
0x4e3ed8 ADRP X17, |
0x4e3edc ORR X1, XZR, X25 |
0x4e3ee0 STR X10, [SP, #176] |
0x4e3ee4 ADD X0, X17, #1584 |
0x4e3ee8 STR X6, [SP, #208] |
0x4e3eec STP X8, X9, [SP, #264] |
0x4e3ef0 STP X5, X7, [SP, #280] |
0x4e3ef4 B 4e3cb0 |
(3428) 0x4e3ef8 LDR X17, [SP, #144] |
(3428) 0x4e3efc B 4e3dcc |
0x4e3f00 ORR X17, XZR, X21 |
0x4e3f04 B 4e3330 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | GOMP_parallel | libomp.so | |
○ | hypre_IJMatrixSetValuesOMPParC[...] | IJMatrix_parcsr.c:3509 | exec |
○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
○ | main | amg.c:274 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | amg.c:599 | exec |
Path / |
Source file and lines | IJMatrix_parcsr.c:3240-3500 |
Module | exec |
nb instructions | 255 |
loop length | 1020 |
nb stack references | 0 |
front end | 31.88 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 17.50 | 17.50 | 25.50 | 25.50 | 25.50 | 25.50 | 0.00 | 0.00 | 0.00 | 0.00 | 43.67 | 43.67 | 43.67 | 30.00 | 30.00 |
cycles | 17.50 | 17.50 | 25.50 | 25.50 | 25.50 | 25.50 | 0.00 | 0.00 | 0.00 | 0.00 | 43.67 | 43.67 | 43.67 | 30.00 | 30.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Front-end | 31.88 |
Overall L1 | 43.67 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #672]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X26, X1, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X15, X28, [X0, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X2, [X0, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X4, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X15, X1, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X5, [X0, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X2, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X6, [X0, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X3, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X7, [X0, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X5, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X6, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X0, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X25, [X0, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X7, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X22, X20, [X0, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X9, [X0, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X0, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X11, [X0, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X9, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X24, [X0, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X10, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X0, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X13, [X0, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X23, [X0, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X12, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X14, [X0, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X13, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X16, [X0, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X17, [X0, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X14, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X18, [X0, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X16, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X19, [X0, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X21, X0, [X0, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X17, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X18, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X0, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X19, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X21, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5063e0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X27, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 506400 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SDIV X1, X26, X27 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ORR X21, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X15, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MSUB X2, X1, X27, X26 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
CMP X2, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3b94 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xeac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MADD X26, X1, X0, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X4, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X5, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
UBFM X19, X21, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [X22, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X27, X22, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X26, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 4e2f18 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x230> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X7, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ X0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X7, X26,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X8, X7, X5,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X8, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X9, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X11, X10, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X12, X11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X13, X12, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2ea8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e94 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e88 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e7c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x194> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e70 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x188> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e64 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x17c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 4e3c88 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfa0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X14, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X16, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X17, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X18, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X1, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X30, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2f18 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x230> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f1c0 <@plt_start@+0x1c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBNZ X21, 4e3b80 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xe98> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3068 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x380> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UBFM X0, X8, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X9, X22, X8,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X1, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X0, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X16, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X4, X3, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X4, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X6, X5, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fe4 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fd0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fc4 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fb8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2d0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fac <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2c4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fa0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2f94 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X22, [X22, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X7, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X11, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X13, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X14, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X9, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e3068 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x380> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f1c0 <@plt_start@+0x1c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X27, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X15, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X26, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 4e3354 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x66c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X5, XZR, X28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVN X22, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X28, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X4, X30, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X8, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X0, X4, #1, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X2, X28, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X9, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X3, X2, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X10, X25, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, X1, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X25, X25, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, X6, X0,LSL #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X25, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X1, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X13, X6, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X17, X21, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X16, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X11, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X30, X0, [X1, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X15, [X16, X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X10, X0, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, X30, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X16, [X30, X14,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X10, X4, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, X14,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X15, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X10, XZR, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X12, [X11, X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X28, XZR, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X2, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3f00 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1218> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STP X20, X19, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X18, XZR, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X20, XZR, X12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X26, X7, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X26, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X19, X7, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X25, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X15, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X15, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3344 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x65c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X27, X2,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X11, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 4e3550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x868> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f1c0 <@plt_start@+0x1c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X21, [X27, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X27, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 4e3074 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x38c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MADD X30, X0, X1, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X3, X1, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X26, X2, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X3, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X5, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e2dec <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x104> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X0, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e2e58 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x170> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X4, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X17, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X8, X9, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X5, X7, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X12, X13, [X4, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X11, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X14, X12, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X13, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X15, X14, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e3330 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x648> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X17, <50ced8> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X1, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X0, X17, #1584 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X6, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X9, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X5, X7, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e3cb0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfc8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X17, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4e3330 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x648> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Source file and lines | IJMatrix_parcsr.c:3240-3500 |
Module | exec |
nb instructions | 255 |
loop length | 1020 |
nb stack references | 0 |
front end | 31.88 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 17.50 | 17.50 | 25.50 | 25.50 | 25.50 | 25.50 | 0.00 | 0.00 | 0.00 | 0.00 | 43.67 | 43.67 | 43.67 | 30.00 | 30.00 |
cycles | 17.50 | 17.50 | 25.50 | 25.50 | 25.50 | 25.50 | 0.00 | 0.00 | 0.00 | 0.00 | 43.67 | 43.67 | 43.67 | 30.00 | 30.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Front-end | 31.88 |
Overall L1 | 43.67 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #672]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X26, X1, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X15, X28, [X0, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X2, [X0, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X4, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X15, X1, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X5, [X0, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X2, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X6, [X0, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X3, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X7, [X0, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X5, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X6, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X0, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X25, [X0, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X7, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X22, X20, [X0, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X9, [X0, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X0, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X11, [X0, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X9, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X24, [X0, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X10, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X0, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X13, [X0, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X23, [X0, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X12, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X14, [X0, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X13, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X16, [X0, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X17, [X0, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X14, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X18, [X0, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X16, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X19, [X0, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X21, X0, [X0, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X17, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X18, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X0, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X19, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X21, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5063e0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X27, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 506400 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SDIV X1, X26, X27 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ORR X21, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X15, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MSUB X2, X1, X27, X26 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
CMP X2, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3b94 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xeac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MADD X26, X1, X0, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X4, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X5, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
UBFM X19, X21, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [X22, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X27, X22, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X26, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 4e2f18 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x230> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X7, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ X0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X7, X26,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X8, X7, X5,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X8, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X9, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X11, X10, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X12, X11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X13, X12, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2ea8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e94 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e88 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e7c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x194> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e70 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x188> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2e64 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x17c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X13, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 4e3c88 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfa0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X14, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X16, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X17, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X18, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X1, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X30, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X0, X0, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2f18 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x230> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f1c0 <@plt_start@+0x1c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBNZ X21, 4e3b80 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xe98> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3068 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x380> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UBFM X0, X8, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X9, X22, X8,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X1, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X0, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X16, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X4, X3, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X4, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X6, X5, #4224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fe4 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fd0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fc4 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fb8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2d0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fac <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2c4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2fa0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X6, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e2f94 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X22, [X22, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X7, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X11, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X13, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X14, [X1, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X16, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X16, [X1, #8]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X9, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4e3068 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x380> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f1c0 <@plt_start@+0x1c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X27, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X15, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X26, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 4e3354 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x66c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X5, XZR, X28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVN X22, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X28, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X4, X30, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X8, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X0, X4, #1, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X2, X28, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X9, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X3, X2, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X10, X25, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, X1, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X25, X25, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, X6, X0,LSL #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X25, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X1, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X13, X6, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X17, X21, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X16, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X11, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X30, X0, [X1, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X15, [X16, X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X10, X0, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, X30, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X16, [X30, X14,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X10, X4, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, X14,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X15, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X10, XZR, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X12, [X11, X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X28, XZR, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X2, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3f00 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1218> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STP X20, X19, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X18, XZR, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X20, XZR, X12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X26, X7, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X26, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X19, X7, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X25, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X15, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X15, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4e3344 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x65c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X27, X2,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X11, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 4e3550 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x868> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X15, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f1c0 <@plt_start@+0x1c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X21, [X27, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X27, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 4e3074 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x38c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MADD X30, X0, X1, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X3, X1, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X26, X2, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X3, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X5, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e2dec <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x104> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X0, [X2], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [X27] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e2e58 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x170> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X4, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X17, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X8, X9, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X5, X7, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X12, X13, [X4, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X11, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X14, X12, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X13, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X15, X14, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e3330 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x648> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X17, <50ced8> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X1, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X0, X17, #1584 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X6, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X9, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X5, X7, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 4e3cb0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfc8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X17, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4e3330 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x648> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1– | 1.39 | 0.21 |
▼Loop 3433 - IJMatrix_parcsr.c:3240-3467 - exec– | 0.19 | 0.03 |
▼Loop 3434 - IJMatrix_parcsr.c:3383-3454 - exec– | 0.84 | 0.13 |
▼Loop 3436 - IJMatrix_parcsr.c:3383-3454 - exec– | 0.23 | 0.03 |
○Loop 3437 - IJMatrix_parcsr.c:3388-3390 - exec | 0 | 0 |
○Loop 3438 - IJMatrix_parcsr.c:3422-3424 - exec | 0 | 0 |
▼Loop 3428 - IJMatrix_parcsr.c:3291-3467 - exec– | 0.06 | 0.01 |
▼Loop 3429 - IJMatrix_parcsr.c:3316-3341 - exec– | 0 | 0 |
○Loop 3432 - IJMatrix_parcsr.c:3318-3320 - exec | 0 | 0 |
○Loop 3430 - IJMatrix_parcsr.c:3359-3362 - exec | 0 | 0 |
○Loop 3431 - IJMatrix_parcsr.c:3359-3362 - exec | 0 | 0 |
○Loop 3443 - IJMatrix_parcsr.c:3274-3275 - exec | 0.03 | 0 |
○Loop 3435 - IJMatrix_parcsr.c:3406-3446 - exec | 0 | 0 |
○Loop 3442 - IJMatrix_parcsr.c:3282-3283 - exec | 0 | 0 |
▼Loop 3439 - IJMatrix_parcsr.c:3470-3500 - exec– | 0 | 0 |
▼Loop 3441 - IJMatrix_parcsr.c:3475-3484 - exec– | 0 | 0 |
○Loop 3440 - IJMatrix_parcsr.c:3478-3484 - exec | 0 | 0 |