Loop Id: 3762 | Module: exec | Source: csr_matvec.c:256-263 | Coverage: 0.26% |
---|
Loop Id: 3762 | Module: exec | Source: csr_matvec.c:256-263 | Coverage: 0.26% |
---|
0x4f9048 UBFM X3, X26, #61, #60 |
0x4f904c MOVZ X1, #0 |
0x4f9050 DUP Z9.D, #0 |
0x4f9054 ADD X14, X25, X3 |
0x4f9058 ADD X15, X24, X3 |
0x4f905c SUB X16, X13, X26 |
0x4f9060 WHILELO P7.D, XZR, X16 |
(3761) 0x4f9064 LD1D {Z4.D}, P7/Z, [X15, X1,LSL #3] |
(3761) 0x4f9068 LD1D {Z5.D}, P7/Z, [X14, X1,LSL #3] |
(3761) 0x4f906c LD1D {Z2.D}, P7/Z, [X20, Z4.D,LSL #3] |
(3761) 0x4f9070 ADD X1, X1, X12 |
(3761) 0x4f9074 FMLA Z9.D, P7/M, Z2.D, Z5.D |
(3761) 0x4f9078 WHILELO P7.D, X1, X16 |
(3761) 0x4f907c B.NE 4f9064 |
0x4f9080 FADDV D6, P6, Z9.D |
0x4f9084 STR D6, [X23, X19,LSL #3] |
0x4f9088 ADD X19, X19, #1 |
0x4f908c CMP X21, X19 |
0x4f9090 B.EQ 4f8ff8 |
0x4f9094 LDR X26, [X22, X19,LSL #3] |
0x4f9098 LDR X13, [X11, X19,LSL #3] |
0x4f909c CMP X13, X26 |
0x4f90a0 B.GT 4f9048 |
/home/hbollore/qaas/qaas-runs/169-817-3176/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 256 - 263 |
-------------------------------------------------------------------------------- |
256: for (i = iBegin; i < iEnd; i++) |
257: { |
258: tempx = 0.0; |
259: for (jj = A_i[i]; jj < A_i[i+1]; jj++) |
260: { |
261: tempx += A_data[jj] * x_data[A_j[jj]]; |
262: } |
263: y_data[i] = tempx; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | GOMP_parallel | libomp.so | |
○ | hypre_CSRMatrixMatvecOutOfPlac[...] | csr_matvec.c:243 | exec |
○ | hypre_ParCSRMatrixMatvecOutOfP[...] | par_csr_matvec.c:216 | exec |
○ | hypre_PCGSolve | pcg.c:496 | exec |
○ | main | amg.c:419 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | amg.c:599 | exec |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.50 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.50 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.13 |
Bottlenecks | P2, P3, P4, P5, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source | csr_matvec.c:256-256,csr_matvec.c:259-259,csr_matvec.c:263-263 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 2.25 |
CQA cycles if no scalar integer | 1.50 |
CQA cycles if FP arith vectorized | 2.25 |
CQA cycles if fully vectorized | 1.50 |
Front-end cycles | 2.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 2.25 |
P2 cycles | 2.25 |
P3 cycles | 2.25 |
P4 cycles | 2.25 |
P5 cycles | 1.50 |
P6 cycles | 1.50 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.17 |
P10 cycles | 0.83 |
P11 cycles | 1.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 16.00 |
Nb uops | 16.00 |
Nb loads | NA |
Nb stores | 1.00 |
Nb stack references | 0.00 |
FLOP/cycle | 1.78 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.67 |
Bytes prefetched | 0.00 |
Bytes loaded | 16.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 12.50 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 25.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 31.64 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 25.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 43.75 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 17.71 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.50 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.50 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.13 |
Bottlenecks | P2, P3, P4, P5, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source | csr_matvec.c:256-256,csr_matvec.c:259-259,csr_matvec.c:263-263 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 2.25 |
CQA cycles if no scalar integer | 1.50 |
CQA cycles if FP arith vectorized | 2.25 |
CQA cycles if fully vectorized | 1.50 |
Front-end cycles | 2.00 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 2.25 |
P2 cycles | 2.25 |
P3 cycles | 2.25 |
P4 cycles | 2.25 |
P5 cycles | 1.50 |
P6 cycles | 1.50 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.17 |
P10 cycles | 0.83 |
P11 cycles | 1.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 16.00 |
Nb uops | 16.00 |
Nb loads | NA |
Nb stores | 1.00 |
Nb stack references | 0.00 |
FLOP/cycle | 1.78 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.67 |
Bytes prefetched | 0.00 |
Bytes loaded | 16.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 12.50 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 25.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 31.64 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 25.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 43.75 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 17.71 |
Path / |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source file and lines | csr_matvec.c:256-263 |
Module | exec |
nb instructions | 16 |
loop length | 64 |
nb stack references | 0 |
front end | 2.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 0.50 | 0.50 | 1.17 | 0.83 | 1.00 | 0.00 | 0.00 |
cycles | 1.00 | 1.00 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 1.00 | 1.00 | 1.17 | 0.83 | 1.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 2.00 |
Overall L1 | 2.25 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
UBFM X3, X26, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X1, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DUP Z9.D, #0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADD X14, X25, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X24, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X16, X13, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
WHILELO P7.D, XZR, X16 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 2 |
FADDV D6, P6, Z9.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 0.75 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 9 | 2 |
STR D6, [X23, X19,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X19, X19, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X21, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f8ff8 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x12c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X26, [X22, X19,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [X11, X19,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X13, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4f9048 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x17c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source file and lines | csr_matvec.c:256-263 |
Module | exec |
nb instructions | 16 |
loop length | 64 |
nb stack references | 0 |
front end | 2.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 0.50 | 0.50 | 1.17 | 0.83 | 1.00 | 0.00 | 0.00 |
cycles | 1.00 | 1.00 | 2.25 | 2.25 | 2.25 | 2.25 | 1.50 | 1.50 | 1.00 | 1.00 | 1.17 | 0.83 | 1.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 2.00 |
Overall L1 | 2.25 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
UBFM X3, X26, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X1, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DUP Z9.D, #0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADD X14, X25, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X24, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X16, X13, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
WHILELO P7.D, XZR, X16 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 2 |
FADDV D6, P6, Z9.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.75 | 0.75 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 9 | 2 |
STR D6, [X23, X19,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X19, X19, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X21, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f8ff8 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x12c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X26, [X22, X19,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [X11, X19,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X13, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4f9048 <hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6+0x17c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |