Function: hypre_BoomerAMGBuildMultipass._omp_fn.10 | Module: exec | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 4.93% |
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Function: hypre_BoomerAMGBuildMultipass._omp_fn.10 | Module: exec | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 4.93% |
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/home/hbollore/qaas/qaas-runs/169-817-3176/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1737 - 1881 |
-------------------------------------------------------------------------------- |
1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd) |
[...] |
1746: tmp_marker = NULL; |
1747: if (n_fine) |
1748: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1749: tmp_marker_offd = NULL; |
1750: if (num_cols_offd) |
1751: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1752: tmp_array = NULL; |
1753: if (n_coarse) |
1754: { tmp_array = hypre_CTAlloc(HYPRE_Int,n_coarse); } |
1755: tmp_array_offd = NULL; |
1756: if (new_num_cols_offd > n_coarse_offd) |
1757: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); } |
1758: else |
1759: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd);} |
1760: for (i=0; i < n_fine; i++) |
1761: { tmp_marker[i] = -1; } |
1762: for (i=0; i < num_cols_offd; i++) |
1763: { tmp_marker_offd[i] = -1; } |
1764: |
1765: /* Compute this thread's range of pass_length */ |
1766: my_thread_num = hypre_GetThreadNum(); |
1767: num_threads = hypre_NumActiveThreads(); |
1768: thread_start = pass_pointer[pass] + (pass_length/num_threads)*my_thread_num; |
1769: if (my_thread_num == num_threads-1) |
1770: { thread_stop = pass_pointer[pass] + pass_length; } |
1771: else |
1772: { thread_stop = pass_pointer[pass] + (pass_length/num_threads)*(my_thread_num+1); } |
1773: |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
1877: } |
1878: hypre_TFree(tmp_marker); |
1879: hypre_TFree(tmp_marker_offd); |
1880: hypre_TFree(tmp_array); |
1881: hypre_TFree(tmp_array_offd); |
0x44bef0 STP X29, X30, [SP, #640]! |
0x44bef4 ADD X29, SP, #0 |
0x44bef8 LDR X1, [X0, #80] |
0x44befc STP X19, X20, [SP, #16] |
0x44bf00 LDR X3, [X0, #88] |
0x44bf04 STP X21, X22, [SP, #32] |
0x44bf08 LDR X4, [X0, #96] |
0x44bf0c STP X23, X24, [SP, #48] |
0x44bf10 LDR X5, [X0, #104] |
0x44bf14 STP X25, X26, [SP, #64] |
0x44bf18 LDR X6, [X0, #112] |
0x44bf1c STP X27, X28, [SP, #80] |
0x44bf20 LDR X7, [X0, #128] |
0x44bf24 STR X5, [SP, #112] |
0x44bf28 LDR X8, [X0, #152] |
0x44bf2c STR X3, [SP, #120] |
0x44bf30 STR X6, [SP, #136] |
0x44bf34 STR X7, [SP, #152] |
0x44bf38 STR X4, [SP, #232] |
0x44bf3c STR X8, [SP, #144] |
0x44bf40 STR X1, [SP, #240] |
0x44bf44 LDR X20, [X0, #120] |
0x44bf48 LDP X25, X19, [X0, #136] |
0x44bf4c LDR X24, [X0, #160] |
0x44bf50 LDR X2, [X0, #272] |
0x44bf54 LDP X11, X12, [X0, #168] |
0x44bf58 LDP X23, X22, [X0, #280] |
0x44bf5c STR X11, [SP, #336] |
0x44bf60 LDR X13, [X0, #184] |
0x44bf64 LDP X10, X9, [X0, #296] |
0x44bf68 LDR X14, [X0, #192] |
0x44bf6c STR X13, [SP, #160] |
0x44bf70 LDR X15, [X0, #200] |
0x44bf74 LDR X16, [X0, #208] |
0x44bf78 STR X14, [SP, #360] |
0x44bf7c LDR X17, [X0, #216] |
0x44bf80 STR X15, [SP, #176] |
0x44bf84 LDR X18, [X0, #224] |
0x44bf88 STR X16, [SP, #224] |
0x44bf8c LDR X21, [X0, #232] |
0x44bf90 STR X17, [SP, #216] |
0x44bf94 LDR X26, [X0, #240] |
0x44bf98 STR X18, [SP, #296] |
0x44bf9c LDR X27, [X0, #248] |
0x44bfa0 STR X21, [SP, #288] |
0x44bfa4 LDR X28, [X0, #256] |
0x44bfa8 STR X26, [SP, #344] |
0x44bfac LDR X30, [X0, #264] |
0x44bfb0 STR X27, [SP, #328] |
0x44bfb4 LDR X1, [X0, #312] |
0x44bfb8 STR X28, [SP, #280] |
0x44bfbc LDR X3, [X0, #320] |
0x44bfc0 STR X30, [SP, #184] |
0x44bfc4 STR X1, [SP, #272] |
0x44bfc8 LDR X4, [X0, #328] |
0x44bfcc LDR X13, [X0] |
0x44bfd0 LDR X6, [X0, #8] |
0x44bfd4 STR X4, [SP, #168] |
0x44bfd8 LDR X28, [X0, #16] |
0x44bfdc LDR X7, [X0, #24] |
0x44bfe0 STR X6, [SP, #192] |
0x44bfe4 LDR X21, [X0, #32] |
0x44bfe8 LDR X8, [X0, #40] |
0x44bfec STR X7, [SP, #320] |
0x44bff0 LDR X11, [X0, #48] |
0x44bff4 LDR X27, [X0, #56] |
0x44bff8 STR X8, [SP, #248] |
0x44bffc LDR X5, [X0, #72] |
0x44c000 STR X11, [SP, #312] |
0x44c004 LDR X0, [X0, #64] |
0x44c008 STR X5, [SP, #304] |
0x44c00c STR X0, [SP, #256] |
0x44c010 CBNZ X2, 44d014 |
0x44c014 MOVZ X26, #0 |
0x44c018 LDR X0, [SP, #136] |
0x44c01c CBNZ X0, 44cfe4 |
0x44c020 STR XZR, [SP, #128] |
0x44c024 CBNZ X23, 44cfb0 |
0x44c028 CMP X3, X22 |
0x44c02c B.LE 44cf98 |
0x44c030 ORR X0, XZR, X3 |
0x44c034 STP X9, X10, [SP, #200] |
0x44c038 STR X2, [SP, #264] |
0x44c03c STR X12, [SP, #352] |
0x44c040 STR X13, [SP, #368] |
0x44c044 MOVZ X1, #8 |
0x44c048 BL 5037ec |
0x44c04c LDR X18, [SP, #264] |
0x44c050 ORR X22, XZR, X0 |
0x44c054 LDP X14, X15, [SP, #200] |
0x44c058 LDR X4, [SP, #352] |
0x44c05c LDR X5, [SP, #368] |
0x44c060 CMP X18, #0 |
0x44c064 B.LE 44c090 |
0x44c068 UBFM X2, X18, #61, #60 |
0x44c06c MOVZ W1, #255 |
0x44c070 STP X14, X15, [SP, #200] |
0x44c074 ORR X0, XZR, X26 |
0x44c078 STR X4, [SP, #264] |
0x44c07c STR X5, [SP, #352] |
0x44c080 BL 40f5d0 |
0x44c084 LDP X14, X15, [SP, #200] |
0x44c088 LDR X4, [SP, #264] |
0x44c08c LDR X5, [SP, #352] |
0x44c090 LDR X16, [SP, #136] |
0x44c094 CMP X16, #0 |
0x44c098 B.LE 44c0c4 |
0x44c09c UBFM X2, X16, #61, #60 |
0x44c0a0 MOVZ W1, #255 |
0x44c0a4 LDR X0, [SP, #128] |
0x44c0a8 STP X14, X15, [SP, #200] |
0x44c0ac STR X4, [SP, #264] |
0x44c0b0 STR X5, [SP, #352] |
0x44c0b4 BL 40f5d0 |
0x44c0b8 LDP X14, X15, [SP, #200] |
0x44c0bc LDR X4, [SP, #264] |
0x44c0c0 LDR X5, [SP, #352] |
0x44c0c4 STP X14, X15, [SP, #200] |
0x44c0c8 STR X4, [SP, #264] |
0x44c0cc STR X5, [SP, #352] |
0x44c0d0 BL 506400 |
0x44c0d4 STR X0, [SP, #136] |
0x44c0d8 BL 5063e0 |
0x44c0dc LDP X6, X7, [SP, #168] |
0x44c0e0 SUB X2, X0, #1 |
0x44c0e4 LDP X9, X10, [SP, #200] |
0x44c0e8 SDIV X0, X6, X0 |
0x44c0ec LDR X8, [SP, #184] |
0x44c0f0 LDR X14, [SP, #136] |
0x44c0f4 LDR X12, [SP, #264] |
0x44c0f8 UBFM X3, X8, #61, #60 |
0x44c0fc LDR X11, [X7, X8,LSL #3] |
0x44c100 CMP X14, X2 |
0x44c104 STR X3, [SP, #176] |
0x44c108 MADD X18, X14, X0, XZR |
0x44c10c LDR X13, [SP, #352] |
0x44c110 ADD X4, X0, X18 |
0x44c114 ADD X5, X11, X18 |
0x44c118 ADD X15, X6, X11 |
0x44c11c ADD X1, X4, X11 |
0x44c120 CSEL X6, X15, X1, #0 |
0x44c124 CMP X6, X5 |
0x44c128 B.LE 44c994 |
0x44c12c LDR X17, [SP, #360] |
0x44c130 SUB X16, X25, #8 |
0x44c134 SUB X18, X24, #8 |
0x44c138 STR D8, [SP, #96] |
0x44c13c LDR X8, [SP, #184] |
0x44c140 STR X16, [SP, #136] |
0x44c144 ADD X30, X17, X5,LSL #3 |
0x44c148 ADD X7, X17, X6,LSL #3 |
0x44c14c SUB X0, X8, #1 |
0x44c150 STR X30, [SP, #168] |
0x44c154 STR X7, [SP, #264] |
0x44c158 HINT #0 |
0x44c15c HINT #0 |
(816) 0x44c160 LDR X11, [SP, #168] |
(816) 0x44c164 LDR X15, [SP, #152] |
(816) 0x44c168 LDR X2, [SP, #224] |
(816) 0x44c16c LDR X3, [X11] |
(816) 0x44c170 UBFM X11, X3, #61, #60 |
(816) 0x44c174 LDR X14, [X2, X3,LSL #3] |
(816) 0x44c178 ADD X6, X11, #8 |
(816) 0x44c17c LDR X4, [X15, X6] |
(816) 0x44c180 LDR X1, [X15, X3,LSL #3] |
(816) 0x44c184 ADD X5, X14, X4 |
(816) 0x44c188 SUB X17, X5, X1 |
(816) 0x44c18c CMP X14, X17 |
(816) 0x44c190 B.GE 44c348 |
(816) 0x44c194 LDR X30, [SP, #176] |
(816) 0x44c198 SUB X8, X1, X14 |
(816) 0x44c19c UBFM X2, X14, #61, #60 |
(816) 0x44c1a0 ADD X5, X8, X17 |
(816) 0x44c1a4 SUB X14, X2, X1,LSL #3 |
(816) 0x44c1a8 LDR X16, [SP, #296] |
(816) 0x44c1ac SUB X15, X5, X1 |
(816) 0x44c1b0 ANDS X4, X15, #4224 |
(816) 0x44c1b4 LDR X7, [X16, X30] |
(816) 0x44c1b8 ADD X2, X7, X14 |
(816) 0x44c1bc B.EQ 44cf60 |
(816) 0x44c1c0 CMP X4, #1 |
(816) 0x44c1c4 B.EQ 44c280 |
(816) 0x44c1c8 CMP X4, #2 |
(816) 0x44c1cc B.EQ 44c268 |
(816) 0x44c1d0 CMP X4, #3 |
(816) 0x44c1d4 B.EQ 44c250 |
(816) 0x44c1d8 CMP X4, #4 |
(816) 0x44c1dc B.EQ 44c238 |
(816) 0x44c1e0 CMP X4, #5 |
(816) 0x44c1e4 B.EQ 44c220 |
(816) 0x44c1e8 CMP X4, #6 |
(816) 0x44c1ec B.EQ 44c208 |
(816) 0x44c1f0 LDR X17, [X2, X1,LSL #3] |
(816) 0x44c1f4 LDR X30, [SP, #136] |
(816) 0x44c1f8 STR X1, [X23, X17,LSL #3] |
(816) 0x44c1fc STR XZR, [X20, X1,LSL #3] |
(816) 0x44c200 ADD X1, X1, #1 |
(816) 0x44c204 STR X17, [X30, X1,LSL #3] |
(816) 0x44c208 LDR X16, [X2, X1,LSL #3] |
(816) 0x44c20c LDR X7, [SP, #136] |
(816) 0x44c210 STR X1, [X23, X16,LSL #3] |
(816) 0x44c214 STR XZR, [X20, X1,LSL #3] |
(816) 0x44c218 ADD X1, X1, #1 |
(816) 0x44c21c STR X16, [X7, X1,LSL #3] |
(816) 0x44c220 LDR X8, [X2, X1,LSL #3] |
(816) 0x44c224 LDR X14, [SP, #136] |
(816) 0x44c228 STR X1, [X23, X8,LSL #3] |
(816) 0x44c22c STR XZR, [X20, X1,LSL #3] |
(816) 0x44c230 ADD X1, X1, #1 |
(816) 0x44c234 STR X8, [X14, X1,LSL #3] |
(816) 0x44c238 LDR X15, [X2, X1,LSL #3] |
(816) 0x44c23c LDR X4, [SP, #136] |
(816) 0x44c240 STR X1, [X23, X15,LSL #3] |
(816) 0x44c244 STR XZR, [X20, X1,LSL #3] |
(816) 0x44c248 ADD X1, X1, #1 |
(816) 0x44c24c STR X15, [X4, X1,LSL #3] |
(816) 0x44c250 LDR X17, [X2, X1,LSL #3] |
(816) 0x44c254 LDR X30, [SP, #136] |
(816) 0x44c258 STR X1, [X23, X17,LSL #3] |
(816) 0x44c25c STR XZR, [X20, X1,LSL #3] |
(816) 0x44c260 ADD X1, X1, #1 |
(816) 0x44c264 STR X17, [X30, X1,LSL #3] |
(816) 0x44c268 LDR X16, [X2, X1,LSL #3] |
(816) 0x44c26c LDR X7, [SP, #136] |
(816) 0x44c270 STR X1, [X23, X16,LSL #3] |
(816) 0x44c274 STR XZR, [X20, X1,LSL #3] |
(816) 0x44c278 ADD X1, X1, #1 |
(816) 0x44c27c STR X16, [X7, X1,LSL #3] |
(816) 0x44c280 LDR X8, [X2, X1,LSL #3] |
(816) 0x44c284 LDR X4, [SP, #136] |
(816) 0x44c288 STR X1, [X23, X8,LSL #3] |
(816) 0x44c28c STR XZR, [X20, X1,LSL #3] |
(816) 0x44c290 ADD X1, X1, #1 |
(816) 0x44c294 STR X8, [X4, X1,LSL #3] |
(816) 0x44c298 CMP X5, X1 |
(816) 0x44c29c B.EQ 44c348 |
(824) 0x44c2a0 LDR X14, [X2, X1,LSL #3] |
(824) 0x44c2a4 ADD X7, X1, #1 |
(824) 0x44c2a8 ADD X17, X1, #2 |
(824) 0x44c2ac ADD X16, X1, #3 |
(824) 0x44c2b0 ADD X15, X1, #4 |
(824) 0x44c2b4 ADD X8, X1, #6 |
(824) 0x44c2b8 STR X1, [X23, X14,LSL #3] |
(824) 0x44c2bc STR XZR, [X20, X1,LSL #3] |
(824) 0x44c2c0 STR X14, [X4, X7,LSL #3] |
(824) 0x44c2c4 ADD X14, X1, #5 |
(824) 0x44c2c8 LDR X30, [X2, X7,LSL #3] |
(824) 0x44c2cc STR X7, [X23, X30,LSL #3] |
(824) 0x44c2d0 STR XZR, [X20, X7,LSL #3] |
(824) 0x44c2d4 ADD X7, X1, #7 |
(824) 0x44c2d8 ADD X1, X1, #8 |
(824) 0x44c2dc STR X30, [X4, X17,LSL #3] |
(824) 0x44c2e0 LDR X30, [X2, X17,LSL #3] |
(824) 0x44c2e4 STR X17, [X23, X30,LSL #3] |
(824) 0x44c2e8 STR XZR, [X20, X17,LSL #3] |
(824) 0x44c2ec STR X30, [X4, X16,LSL #3] |
(824) 0x44c2f0 LDR X17, [X2, X16,LSL #3] |
(824) 0x44c2f4 STR X16, [X23, X17,LSL #3] |
(824) 0x44c2f8 STR XZR, [X20, X16,LSL #3] |
(824) 0x44c2fc STR X17, [X4, X15,LSL #3] |
(824) 0x44c300 LDR X16, [X2, X15,LSL #3] |
(824) 0x44c304 STR X15, [X23, X16,LSL #3] |
(824) 0x44c308 STR XZR, [X20, X15,LSL #3] |
(824) 0x44c30c STR X16, [X4, X14,LSL #3] |
(824) 0x44c310 LDR X15, [X2, X14,LSL #3] |
(824) 0x44c314 STR X14, [X23, X15,LSL #3] |
(824) 0x44c318 STR XZR, [X20, X14,LSL #3] |
(824) 0x44c31c STR X15, [X4, X8,LSL #3] |
(824) 0x44c320 LDR X14, [X2, X8,LSL #3] |
(824) 0x44c324 STR X8, [X23, X14,LSL #3] |
(824) 0x44c328 STR XZR, [X20, X8,LSL #3] |
(824) 0x44c32c STR X14, [X4, X7,LSL #3] |
(824) 0x44c330 LDR X8, [X2, X7,LSL #3] |
(824) 0x44c334 STR X7, [X23, X8,LSL #3] |
(824) 0x44c338 STR XZR, [X20, X7,LSL #3] |
(824) 0x44c33c STR X8, [X4, X1,LSL #3] |
(824) 0x44c340 CMP X5, X1 |
(824) 0x44c344 B.NE 44c2a0 |
(816) 0x44c348 LDR X1, [SP, #144] |
(816) 0x44c34c LDR X5, [SP, #216] |
(816) 0x44c350 LDR X4, [X1, X6] |
(816) 0x44c354 LDR X2, [X5, X3,LSL #3] |
(816) 0x44c358 LDR X1, [X1, X3,LSL #3] |
(816) 0x44c35c ADD X30, X2, X4 |
(816) 0x44c360 SUB X17, X30, X1 |
(816) 0x44c364 CMP X2, X17 |
(816) 0x44c368 B.GE 44c504 |
(816) 0x44c36c LDR X7, [SP, #176] |
(816) 0x44c370 SUB X14, X1, X2 |
(816) 0x44c374 UBFM X8, X2, #61, #60 |
(816) 0x44c378 ADD X5, X14, X17 |
(816) 0x44c37c SUB X2, X8, X1,LSL #3 |
(816) 0x44c380 LDR X16, [SP, #288] |
(816) 0x44c384 SUB X4, X5, X1 |
(816) 0x44c388 ANDS X30, X4, #4224 |
(816) 0x44c38c LDR X15, [X16, X7] |
(816) 0x44c390 ADD X2, X15, X2 |
(816) 0x44c394 B.EQ 44c45c |
(816) 0x44c398 CMP X30, #1 |
(816) 0x44c39c B.EQ 44c440 |
(816) 0x44c3a0 CMP X30, #2 |
(816) 0x44c3a4 B.EQ 44c42c |
(816) 0x44c3a8 CMP X30, #3 |
(816) 0x44c3ac B.EQ 44c418 |
(816) 0x44c3b0 CMP X30, #4 |
(816) 0x44c3b4 B.EQ 44c404 |
(816) 0x44c3b8 CMP X30, #5 |
(816) 0x44c3bc B.EQ 44c3f0 |
(816) 0x44c3c0 CMP X30, #6 |
(816) 0x44c3c4 B.EQ 44c3dc |
(816) 0x44c3c8 LDR X17, [X2, X1,LSL #3] |
(816) 0x44c3cc STR X1, [X22, X17,LSL #3] |
(816) 0x44c3d0 STR XZR, [X19, X1,LSL #3] |
(816) 0x44c3d4 ADD X1, X1, #1 |
(816) 0x44c3d8 STR X17, [X18, X1,LSL #3] |
(816) 0x44c3dc LDR X7, [X2, X1,LSL #3] |
(816) 0x44c3e0 STR X1, [X22, X7,LSL #3] |
(816) 0x44c3e4 STR XZR, [X19, X1,LSL #3] |
(816) 0x44c3e8 ADD X1, X1, #1 |
(816) 0x44c3ec STR X7, [X18, X1,LSL #3] |
(816) 0x44c3f0 LDR X16, [X2, X1,LSL #3] |
(816) 0x44c3f4 STR X1, [X22, X16,LSL #3] |
(816) 0x44c3f8 STR XZR, [X19, X1,LSL #3] |
(816) 0x44c3fc ADD X1, X1, #1 |
(816) 0x44c400 STR X16, [X18, X1,LSL #3] |
(816) 0x44c404 LDR X15, [X2, X1,LSL #3] |
(816) 0x44c408 STR X1, [X22, X15,LSL #3] |
(816) 0x44c40c STR XZR, [X19, X1,LSL #3] |
(816) 0x44c410 ADD X1, X1, #1 |
(816) 0x44c414 STR X15, [X18, X1,LSL #3] |
(816) 0x44c418 LDR X14, [X2, X1,LSL #3] |
(816) 0x44c41c STR X1, [X22, X14,LSL #3] |
(816) 0x44c420 STR XZR, [X19, X1,LSL #3] |
(816) 0x44c424 ADD X1, X1, #1 |
(816) 0x44c428 STR X14, [X18, X1,LSL #3] |
(816) 0x44c42c LDR X8, [X2, X1,LSL #3] |
(816) 0x44c430 STR X1, [X22, X8,LSL #3] |
(816) 0x44c434 STR XZR, [X19, X1,LSL #3] |
(816) 0x44c438 ADD X1, X1, #1 |
(816) 0x44c43c STR X8, [X18, X1,LSL #3] |
(816) 0x44c440 LDR X4, [X2, X1,LSL #3] |
(816) 0x44c444 STR X1, [X22, X4,LSL #3] |
(816) 0x44c448 STR XZR, [X19, X1,LSL #3] |
(816) 0x44c44c ADD X1, X1, #1 |
(816) 0x44c450 STR X4, [X18, X1,LSL #3] |
(816) 0x44c454 CMP X5, X1 |
(816) 0x44c458 B.EQ 44c504 |
(823) 0x44c45c LDR X30, [X2, X1,LSL #3] |
(823) 0x44c460 ADD X4, X1, #1 |
(823) 0x44c464 ADD X16, X1, #2 |
(823) 0x44c468 ADD X15, X1, #3 |
(823) 0x44c46c ADD X14, X1, #4 |
(823) 0x44c470 ADD X8, X1, #5 |
(823) 0x44c474 ADD X7, X1, #6 |
(823) 0x44c478 STR X1, [X22, X30,LSL #3] |
(823) 0x44c47c STR XZR, [X19, X1,LSL #3] |
(823) 0x44c480 STR X30, [X18, X4,LSL #3] |
(823) 0x44c484 LDR X17, [X2, X4,LSL #3] |
(823) 0x44c488 STR X4, [X22, X17,LSL #3] |
(823) 0x44c48c STR XZR, [X19, X4,LSL #3] |
(823) 0x44c490 ADD X4, X1, #7 |
(823) 0x44c494 ADD X1, X1, #8 |
(823) 0x44c498 STR X17, [X18, X16,LSL #3] |
(823) 0x44c49c LDR X30, [X2, X16,LSL #3] |
(823) 0x44c4a0 STR X16, [X22, X30,LSL #3] |
(823) 0x44c4a4 STR XZR, [X19, X16,LSL #3] |
(823) 0x44c4a8 STR X30, [X18, X15,LSL #3] |
(823) 0x44c4ac LDR X16, [X2, X15,LSL #3] |
(823) 0x44c4b0 STR X15, [X22, X16,LSL #3] |
(823) 0x44c4b4 STR XZR, [X19, X15,LSL #3] |
(823) 0x44c4b8 STR X16, [X18, X14,LSL #3] |
(823) 0x44c4bc LDR X15, [X2, X14,LSL #3] |
(823) 0x44c4c0 STR X14, [X22, X15,LSL #3] |
(823) 0x44c4c4 STR XZR, [X19, X14,LSL #3] |
(823) 0x44c4c8 STR X15, [X18, X8,LSL #3] |
(823) 0x44c4cc LDR X14, [X2, X8,LSL #3] |
(823) 0x44c4d0 STR X8, [X22, X14,LSL #3] |
(823) 0x44c4d4 STR XZR, [X19, X8,LSL #3] |
(823) 0x44c4d8 STR X14, [X18, X7,LSL #3] |
(823) 0x44c4dc LDR X17, [X2, X7,LSL #3] |
(823) 0x44c4e0 STR X7, [X22, X17,LSL #3] |
(823) 0x44c4e4 STR XZR, [X19, X7,LSL #3] |
(823) 0x44c4e8 STR X17, [X18, X4,LSL #3] |
(823) 0x44c4ec LDR X8, [X2, X4,LSL #3] |
(823) 0x44c4f0 STR X4, [X22, X8,LSL #3] |
(823) 0x44c4f4 STR XZR, [X19, X4,LSL #3] |
(823) 0x44c4f8 STR X8, [X18, X1,LSL #3] |
(823) 0x44c4fc CMP X5, X1 |
(823) 0x44c500 B.NE 44c45c |
(816) 0x44c504 LDR X5, [SP, #240] |
(816) 0x44c508 LDR X1, [X5, X3,LSL #3] |
(816) 0x44c50c ADD X7, X5, X6 |
(816) 0x44c510 LDR X16, [X5, X6] |
(816) 0x44c514 CMP X1, X16 |
(816) 0x44c518 B.GE 44c540 |
(816) 0x44c51c HINT #0 |
(822) 0x44c520 LDR X2, [SP, #120] |
(822) 0x44c524 LDR X30, [X2, X1,LSL #3] |
(822) 0x44c528 LDR X4, [X10, X30,LSL #3] |
(822) 0x44c52c CMP X0, X4 |
(822) 0x44c530 B.EQ 44c9e8 |
(822) 0x44c534 ADD X1, X1, #1 |
(822) 0x44c538 CMP X1, X16 |
(822) 0x44c53c B.LT 44c520 |
(816) 0x44c540 LDR X15, [SP, #232] |
(816) 0x44c544 LDR X2, [X15, X3,LSL #3] |
(816) 0x44c548 ADD X14, X15, X6 |
(816) 0x44c54c LDR X30, [X15, X6] |
(816) 0x44c550 CMP X2, X30 |
(816) 0x44c554 B.GE 44c580 |
(816) 0x44c558 HINT #0 |
(816) 0x44c55c HINT #0 |
(821) 0x44c560 LDR X17, [SP, #112] |
(821) 0x44c564 LDR X8, [X17, X2,LSL #3] |
(821) 0x44c568 LDR X7, [X9, X8,LSL #3] |
(821) 0x44c56c CMP X0, X7 |
(821) 0x44c570 B.EQ 44c9cc |
(821) 0x44c574 ADD X2, X2, #1 |
(821) 0x44c578 CMP X2, X30 |
(821) 0x44c57c B.LT 44c560 |
(816) 0x44c580 LDR X4, [SP, #248] |
(816) 0x44c584 MOVI D0, #0 |
(816) 0x44c588 FMOV D1, D0 |
(816) 0x44c58c LDR X16, [X4, X3,LSL #3] |
(816) 0x44c590 LDR X7, [X4, X6] |
(816) 0x44c594 ADD X1, X16, #1 |
(816) 0x44c598 STR X16, [SP, #184] |
(816) 0x44c59c CMP X1, X7 |
(816) 0x44c5a0 B.GE 44cf68 |
(817) 0x44c5a4 STP X9, X0, [SP, #200] |
(817) 0x44c5a8 LDR X0, [SP, #192] |
(817) 0x44c5ac LDR X9, [SP, #312] |
(817) 0x44c5b0 B 44c5d0 |
(818) 0x44c5b4 LDR X5, [X28, X2,LSL #3] |
(818) 0x44c5b8 LDR X30, [X28, X11] |
(818) 0x44c5bc CMP X30, X5 |
(818) 0x44c5c0 B.EQ 44c5f8 |
(818) 0x44c5c4 ADD X1, X1, #1 |
(818) 0x44c5c8 CMP X1, X7 |
(818) 0x44c5cc B.EQ 44c60c |
(818) 0x44c5d0 LDR X2, [X9, X1,LSL #3] |
(818) 0x44c5d4 LDR X14, [X26, X2,LSL #3] |
(818) 0x44c5d8 UBFM X17, X2, #61, #60 |
(818) 0x44c5dc CMP X3, X14 |
(818) 0x44c5e0 B.EQ 44ca00 |
(818) 0x44c5e4 LDR X8, [X13, X2,LSL #3] |
(818) 0x44c5e8 CMN X8, #3 |
(818) 0x44c5ec B.EQ 44c5c4 |
(818) 0x44c5f0 CMP X0, #1 |
(818) 0x44c5f4 B.NE 44c5b4 |
(818) 0x44c5f8 LDR D2, [X21, X1,LSL #3] |
(818) 0x44c5fc ADD X1, X1, #1 |
(818) 0x44c600 FADD D0, D0, D2 |
(818) 0x44c604 CMP X1, X7 |
(818) 0x44c608 B.NE 44c5d0 |
(817) 0x44c60c LDR X15, [SP, #256] |
(817) 0x44c610 LDP X9, X0, [SP, #200] |
(817) 0x44c614 LDR X1, [X15, X3,LSL #3] |
(817) 0x44c618 LDR X4, [X15, X6] |
(817) 0x44c61c CMP X1, X4 |
(817) 0x44c620 B.GE 44c6ac |
(813) 0x44c624 STR X0, [SP, #200] |
(813) 0x44c628 LDR X0, [SP, #128] |
(813) 0x44c62c LDP X14, X15, [SP, #272] |
(813) 0x44c630 LDR X17, [SP, #192] |
(813) 0x44c634 LDR X5, [SP, #304] |
(813) 0x44c638 LDR X7, [SP, #320] |
(813) 0x44c63c B 44c660 |
(814) 0x44c640 LDR X30, [SP, #160] |
(814) 0x44c644 LDR X8, [X30, X2] |
(814) 0x44c648 LDR X2, [X28, X11] |
(814) 0x44c64c CMP X8, X2 |
(814) 0x44c650 B.EQ 44c694 |
(813) 0x44c654 ADD X1, X1, #1 |
(813) 0x44c658 CMP X4, X1 |
(813) 0x44c65c B.EQ 44c6a8 |
(814) 0x44c660 LDR X30, [X5, X1,LSL #3] |
(814) 0x44c664 CBZ X7, 44c66c |
0x44c668 LDR X30, [X15, X30,LSL #3] |
(814) 0x44c66c UBFM X2, X30, #61, #60 |
(814) 0x44c670 TBNZ X30, #63, 44c680 |
0x44c674 LDR X8, [X0, X30,LSL #3] |
0x44c678 CMP X3, X8 |
0x44c67c B.EQ 44ccf0 |
(814) 0x44c680 LDR X16, [X12, X2] |
(814) 0x44c684 CMN X16, #3 |
(814) 0x44c688 B.EQ 44c654 |
(814) 0x44c68c CMP X17, #1 |
(814) 0x44c690 B.NE 44c640 |
(814) 0x44c694 LDR D16, [X27, X1,LSL #3] |
(814) 0x44c698 ADD X1, X1, #1 |
(814) 0x44c69c FADD D0, D0, D16 |
(814) 0x44c6a0 CMP X4, X1 |
(814) 0x44c6a4 B.NE 44c660 |
(815) 0x44c6a8 LDR X0, [SP, #200] |
(817) 0x44c6ac LDR X4, [SP, #184] |
(817) 0x44c6b0 LDR D21, [X21, X4,LSL #3] |
(817) 0x44c6b4 FMUL D22, D1, D21 |
(817) 0x44c6b8 FCMP D22, #0 |
(817) 0x44c6bc B.EQ 44c6c8 |
(813) 0x44c6c0 FNEG D8, D0 |
(813) 0x44c6c4 FDIV D8, D8, D22 |
(816) 0x44c6c8 LDR X11, [SP, #152] |
(816) 0x44c6cc LDR X2, [X11, X3,LSL #3] |
(816) 0x44c6d0 LDR X1, [X11, X6] |
(816) 0x44c6d4 CMP X1, X2 |
(816) 0x44c6d8 B.LE 44c820 |
(816) 0x44c6dc SUB X16, X1, X2 |
(816) 0x44c6e0 CMP X16, #1 |
(816) 0x44c6e4 B.EQ 44c814 |
(816) 0x44c6e8 UBFM X30, X16, #1, #63 |
(816) 0x44c6ec UBFM X8, X2, #61, #60 |
(816) 0x44c6f0 DUP V0.2D, V8.D[0] |
(816) 0x44c6f4 UBFM X5, X30, #60, #59 |
(816) 0x44c6f8 ADD X11, X20, X8 |
(816) 0x44c6fc SUB X14, X5, #16 |
(816) 0x44c700 ADD X7, X11, X30,LSL #4 |
(816) 0x44c704 UBFM X15, X14, #4, #63 |
(816) 0x44c708 ADD X17, X15, #1 |
(816) 0x44c70c ANDS X4, X17, #4224 |
(816) 0x44c710 B.EQ 44c7a4 |
(816) 0x44c714 CMP X4, #1 |
(816) 0x44c718 B.EQ 44c790 |
(816) 0x44c71c CMP X4, #2 |
(816) 0x44c720 B.EQ 44c784 |
(816) 0x44c724 CMP X4, #3 |
(816) 0x44c728 B.EQ 44c778 |
(816) 0x44c72c CMP X4, #4 |
(816) 0x44c730 B.EQ 44c76c |
(816) 0x44c734 CMP X4, #5 |
(816) 0x44c738 B.EQ 44c760 |
(816) 0x44c73c CMP X4, #6 |
(816) 0x44c740 B.EQ 44c754 |
(816) 0x44c744 LDR Q23, [X20, X8] |
(816) 0x44c748 ADD X11, X11, #16 |
(816) 0x44c74c FMUL V24.2D, V23.2D, V0.2D |
(816) 0x44c750 STR Q24, [X20, X8] |
(816) 0x44c754 LDR Q25, [X11] |
(816) 0x44c758 FMUL V26.2D, V25.2D, V0.2D |
(816) 0x44c75c STR Q26, [X11], #16 |
(816) 0x44c760 LDR Q27, [X11] |
(816) 0x44c764 FMUL V28.2D, V27.2D, V0.2D |
(816) 0x44c768 STR Q28, [X11], #16 |
(816) 0x44c76c LDR Q29, [X11] |
(816) 0x44c770 FMUL V30.2D, V29.2D, V0.2D |
(816) 0x44c774 STR Q30, [X11], #16 |
(816) 0x44c778 LDR Q31, [X11] |
(816) 0x44c77c FMUL V4.2D, V31.2D, V0.2D |
(816) 0x44c780 STR Q4, [X11], #16 |
(816) 0x44c784 LDR Q5, [X11] |
(816) 0x44c788 FMUL V6.2D, V5.2D, V0.2D |
(816) 0x44c78c STR Q6, [X11], #16 |
(816) 0x44c790 LDR Q3, [X11] |
(816) 0x44c794 FMUL V7.2D, V3.2D, V0.2D |
(816) 0x44c798 STR Q7, [X11], #16 |
(816) 0x44c79c CMP X11, X7 |
(816) 0x44c7a0 B.EQ 44c804 |
(826) 0x44c7a4 LDR Q16, [X11] |
(826) 0x44c7a8 ORR X1, XZR, X11 |
(826) 0x44c7ac FMUL V17.2D, V16.2D, V0.2D |
(826) 0x44c7b0 STR Q17, [X1], #16 |
(826) 0x44c7b4 LDR Q2, [X11, #16] |
(826) 0x44c7b8 FMUL V18.2D, V2.2D, V0.2D |
(826) 0x44c7bc STR Q18, [X11, #16] |
(826) 0x44c7c0 LDR Q19, [X1, #16] |
(826) 0x44c7c4 FMUL V20.2D, V19.2D, V0.2D |
(826) 0x44c7c8 STR Q20, [X1, #16] |
(826) 0x44c7cc LDP Q21, Q22, [X11, #48] |
(826) 0x44c7d0 LDP Q23, Q24, [X11, #80] |
(826) 0x44c7d4 LDR Q1, [X11, #112] |
(826) 0x44c7d8 FMUL V25.2D, V21.2D, V0.2D |
(826) 0x44c7dc FMUL V26.2D, V22.2D, V0.2D |
(826) 0x44c7e0 FMUL V27.2D, V23.2D, V0.2D |
(826) 0x44c7e4 FMUL V28.2D, V24.2D, V0.2D |
(826) 0x44c7e8 FMUL V29.2D, V1.2D, V0.2D |
(826) 0x44c7ec STP Q25, Q26, [X11, #48] |
(826) 0x44c7f0 STP Q27, Q28, [X11, #80] |
(826) 0x44c7f4 ADD X11, X11, #128 |
(826) 0x44c7f8 STUR Q29, [X11, #496] |
(826) 0x44c7fc CMP X11, X7 |
(826) 0x44c800 B.NE 44c7a4 |
(816) 0x44c804 AND X30, X16, #8127 |
(816) 0x44c808 ADD X2, X2, X30 |
(816) 0x44c80c CMP X30, X16 |
(816) 0x44c810 B.EQ 44c820 |
(816) 0x44c814 LDR D0, [X20, X2,LSL #3] |
(816) 0x44c818 FMUL D30, D0, D8 |
(816) 0x44c81c STR D30, [X20, X2,LSL #3] |
(816) 0x44c820 LDR X16, [SP, #144] |
(816) 0x44c824 LDR X2, [X16, X3,LSL #3] |
(816) 0x44c828 LDR X3, [X16, X6] |
(816) 0x44c82c CMP X3, X2 |
(816) 0x44c830 B.LE 44c978 |
(816) 0x44c834 SUB X8, X3, X2 |
(816) 0x44c838 CMP X8, #1 |
(816) 0x44c83c B.EQ 44c96c |
(816) 0x44c840 UBFM X5, X8, #1, #63 |
(816) 0x44c844 UBFM X6, X2, #61, #60 |
(816) 0x44c848 DUP V31.2D, V8.D[0] |
(816) 0x44c84c UBFM X14, X5, #60, #59 |
(816) 0x44c850 ADD X1, X19, X6 |
(816) 0x44c854 SUB X7, X14, #16 |
(816) 0x44c858 ADD X15, X1, X5,LSL #4 |
(816) 0x44c85c UBFM X17, X7, #4, #63 |
(816) 0x44c860 ADD X4, X17, #1 |
(816) 0x44c864 ANDS X11, X4, #4224 |
(816) 0x44c868 B.EQ 44c8fc |
(816) 0x44c86c CMP X11, #1 |
(816) 0x44c870 B.EQ 44c8e8 |
(816) 0x44c874 CMP X11, #2 |
(816) 0x44c878 B.EQ 44c8dc |
(816) 0x44c87c CMP X11, #3 |
(816) 0x44c880 B.EQ 44c8d0 |
(816) 0x44c884 CMP X11, #4 |
(816) 0x44c888 B.EQ 44c8c4 |
(816) 0x44c88c CMP X11, #5 |
(816) 0x44c890 B.EQ 44c8b8 |
(816) 0x44c894 CMP X11, #6 |
(816) 0x44c898 B.EQ 44c8ac |
(816) 0x44c89c LDR Q4, [X19, X6] |
(816) 0x44c8a0 ADD X1, X1, #16 |
(816) 0x44c8a4 FMUL V5.2D, V4.2D, V31.2D |
(816) 0x44c8a8 STR Q5, [X19, X6] |
(816) 0x44c8ac LDR Q6, [X1] |
(816) 0x44c8b0 FMUL V3.2D, V6.2D, V31.2D |
(816) 0x44c8b4 STR Q3, [X1], #16 |
(816) 0x44c8b8 LDR Q7, [X1] |
(816) 0x44c8bc FMUL V16.2D, V7.2D, V31.2D |
(816) 0x44c8c0 STR Q16, [X1], #16 |
(816) 0x44c8c4 LDR Q17, [X1] |
(816) 0x44c8c8 FMUL V2.2D, V17.2D, V31.2D |
(816) 0x44c8cc STR Q2, [X1], #16 |
(816) 0x44c8d0 LDR Q18, [X1] |
(816) 0x44c8d4 FMUL V19.2D, V18.2D, V31.2D |
(816) 0x44c8d8 STR Q19, [X1], #16 |
(816) 0x44c8dc LDR Q20, [X1] |
(816) 0x44c8e0 FMUL V21.2D, V20.2D, V31.2D |
(816) 0x44c8e4 STR Q21, [X1], #16 |
(816) 0x44c8e8 LDR Q22, [X1] |
(816) 0x44c8ec FMUL V23.2D, V22.2D, V31.2D |
(816) 0x44c8f0 STR Q23, [X1], #16 |
(816) 0x44c8f4 CMP X15, X1 |
(816) 0x44c8f8 B.EQ 44c95c |
(825) 0x44c8fc LDR Q24, [X1] |
(825) 0x44c900 ORR X30, XZR, X1 |
(825) 0x44c904 FMUL V1.2D, V24.2D, V31.2D |
(825) 0x44c908 STR Q1, [X30], #16 |
(825) 0x44c90c LDR Q25, [X1, #16] |
(825) 0x44c910 FMUL V26.2D, V25.2D, V31.2D |
(825) 0x44c914 STR Q26, [X1, #16] |
(825) 0x44c918 LDR Q27, [X30, #16] |
(825) 0x44c91c FMUL V28.2D, V27.2D, V31.2D |
(825) 0x44c920 STR Q28, [X30, #16] |
(825) 0x44c924 LDP Q29, Q0, [X1, #48] |
(825) 0x44c928 LDP Q30, Q6, [X1, #80] |
(825) 0x44c92c LDR Q7, [X1, #112] |
(825) 0x44c930 FMUL V5.2D, V29.2D, V31.2D |
(825) 0x44c934 FMUL V4.2D, V0.2D, V31.2D |
(825) 0x44c938 FMUL V3.2D, V30.2D, V31.2D |
(825) 0x44c93c FMUL V16.2D, V6.2D, V31.2D |
(825) 0x44c940 FMUL V17.2D, V7.2D, V31.2D |
(825) 0x44c944 STP Q5, Q4, [X1, #48] |
(825) 0x44c948 STP Q3, Q16, [X1, #80] |
(825) 0x44c94c ADD X1, X1, #128 |
(825) 0x44c950 STUR Q17, [X1, #496] |
(825) 0x44c954 CMP X15, X1 |
(825) 0x44c958 B.NE 44c8fc |
(816) 0x44c95c AND X16, X8, #8127 |
(816) 0x44c960 ADD X2, X2, X16 |
(816) 0x44c964 CMP X16, X8 |
(816) 0x44c968 B.EQ 44c978 |
(816) 0x44c96c LDR D31, [X19, X2,LSL #3] |
(816) 0x44c970 FMUL D2, D31, D8 |
(816) 0x44c974 STR D2, [X19, X2,LSL #3] |
(816) 0x44c978 LDR X3, [SP, #168] |
(816) 0x44c97c LDR X8, [SP, #264] |
(816) 0x44c980 ADD X5, X3, #8 |
(816) 0x44c984 STR X5, [SP, #168] |
(816) 0x44c988 CMP X5, X8 |
(816) 0x44c98c B.NE 44c160 |
0x44c990 LDR D8, [SP, #96] |
0x44c994 ORR X0, XZR, X26 |
0x44c998 BL 5038c0 |
0x44c99c LDR X0, [SP, #128] |
0x44c9a0 BL 5038c0 |
0x44c9a4 ORR X0, XZR, X23 |
0x44c9a8 BL 5038c0 |
0x44c9ac ORR X0, XZR, X22 |
0x44c9b0 LDP X19, X20, [SP, #16] |
0x44c9b4 LDP X21, X22, [SP, #32] |
0x44c9b8 LDP X23, X24, [SP, #48] |
0x44c9bc LDP X25, X26, [SP, #64] |
0x44c9c0 LDP X27, X28, [SP, #80] |
0x44c9c4 LDP X29, X30, [SP], #384 |
0x44c9c8 B 5038c0 |
(821) 0x44c9cc LDR X5, [SP, #128] |
(821) 0x44c9d0 ADD X2, X2, #1 |
(821) 0x44c9d4 STR X3, [X5, X8,LSL #3] |
(821) 0x44c9d8 LDR X30, [X14] |
(821) 0x44c9dc CMP X30, X2 |
(821) 0x44c9e0 B.GT 44c560 |
(816) 0x44c9e4 B 44c580 |
(822) 0x44c9e8 STR X3, [X26, X30,LSL #3] |
(822) 0x44c9ec ADD X1, X1, #1 |
(822) 0x44c9f0 LDR X16, [X7] |
(822) 0x44c9f4 CMP X1, X16 |
(822) 0x44c9f8 B.LT 44c520 |
(816) 0x44c9fc B 44c540 |
(818) 0x44ca00 LDR X16, [SP, #152] |
(818) 0x44ca04 ADD X5, X17, #8 |
(818) 0x44ca08 LDR X4, [X16, X2,LSL #3] |
(818) 0x44ca0c LDR X17, [X16, X5] |
(818) 0x44ca10 CMP X4, X17 |
(818) 0x44ca14 B.GE 44cb78 |
(818) 0x44ca18 SUB X15, X17, X4 |
(818) 0x44ca1c ANDS X14, X15, #4160 |
(818) 0x44ca20 B.EQ 44cac0 |
(818) 0x44ca24 CMP X14, #1 |
(818) 0x44ca28 B.EQ 44ca8c |
(818) 0x44ca2c CMP X14, #2 |
(818) 0x44ca30 B.EQ 44ca60 |
(818) 0x44ca34 LDR X8, [X25, X4,LSL #3] |
(818) 0x44ca38 LDR D3, [X20, X4,LSL #3] |
(818) 0x44ca3c ADD X4, X4, #1 |
(818) 0x44ca40 LDR D4, [X21, X1,LSL #3] |
(818) 0x44ca44 LDR X30, [X23, X8,LSL #3] |
(818) 0x44ca48 FMUL D5, D4, D3 |
(818) 0x44ca4c LDR D6, [X20, X30,LSL #3] |
(818) 0x44ca50 FADD D1, D1, D5 |
(818) 0x44ca54 FADD D0, D0, D5 |
(818) 0x44ca58 FADD D7, D6, D5 |
(818) 0x44ca5c STR D7, [X20, X30,LSL #3] |
(818) 0x44ca60 LDR X16, [X25, X4,LSL #3] |
(818) 0x44ca64 LDR D16, [X20, X4,LSL #3] |
(818) 0x44ca68 ADD X4, X4, #1 |
(818) 0x44ca6c LDR D8, [X21, X1,LSL #3] |
(818) 0x44ca70 LDR X15, [X23, X16,LSL #3] |
(818) 0x44ca74 FMUL D17, D8, D16 |
(818) 0x44ca78 LDR D18, [X20, X15,LSL #3] |
(818) 0x44ca7c FADD D1, D1, D17 |
(818) 0x44ca80 FADD D0, D0, D17 |
(818) 0x44ca84 FADD D19, D18, D17 |
(818) 0x44ca88 STR D19, [X20, X15,LSL #3] |
(818) 0x44ca8c LDR X14, [X25, X4,LSL #3] |
(818) 0x44ca90 LDR D21, [X20, X4,LSL #3] |
(818) 0x44ca94 ADD X4, X4, #1 |
(818) 0x44ca98 LDR D20, [X21, X1,LSL #3] |
(818) 0x44ca9c LDR X8, [X23, X14,LSL #3] |
(818) 0x44caa0 FMUL D8, D20, D21 |
(818) 0x44caa4 LDR D22, [X20, X8,LSL #3] |
(818) 0x44caa8 FADD D1, D1, D8 |
(818) 0x44caac FADD D0, D0, D8 |
(818) 0x44cab0 FADD D23, D22, D8 |
(818) 0x44cab4 STR D23, [X20, X8,LSL #3] |
(818) 0x44cab8 CMP X4, X17 |
(818) 0x44cabc B.EQ 44cb78 |
(820) 0x44cac0 LDR X30, [X25, X4,LSL #3] |
(820) 0x44cac4 ADD X8, X4, #1 |
(820) 0x44cac8 ADD X14, X4, #3 |
(820) 0x44cacc ADD X15, X8, #1 |
(820) 0x44cad0 LDR D25, [X20, X4,LSL #3] |
(820) 0x44cad4 ADD X4, X4, #4 |
(820) 0x44cad8 LDR D24, [X21, X1,LSL #3] |
(820) 0x44cadc LDR X30, [X23, X30,LSL #3] |
(820) 0x44cae0 LDR X16, [X25, X8,LSL #3] |
(820) 0x44cae4 FMUL D26, D24, D25 |
(820) 0x44cae8 LDR D27, [X20, X30,LSL #3] |
(820) 0x44caec LDR X16, [X23, X16,LSL #3] |
(820) 0x44caf0 FADD D28, D1, D26 |
(820) 0x44caf4 FADD D29, D0, D26 |
(820) 0x44caf8 FADD D30, D27, D26 |
(820) 0x44cafc STR D30, [X20, X30,LSL #3] |
(820) 0x44cb00 LDR D2, [X20, X8,LSL #3] |
(820) 0x44cb04 LDR D31, [X21, X1,LSL #3] |
(820) 0x44cb08 LDR D4, [X20, X16,LSL #3] |
(820) 0x44cb0c LDR X30, [X25, X15,LSL #3] |
(820) 0x44cb10 FMUL D5, D31, D2 |
(820) 0x44cb14 LDR X8, [X25, X14,LSL #3] |
(820) 0x44cb18 LDR X30, [X23, X30,LSL #3] |
(820) 0x44cb1c LDR X8, [X23, X8,LSL #3] |
(820) 0x44cb20 FADD D3, D4, D5 |
(820) 0x44cb24 FADD D6, D28, D5 |
(820) 0x44cb28 FADD D7, D29, D5 |
(820) 0x44cb2c STR D3, [X20, X16,LSL #3] |
(820) 0x44cb30 LDR D8, [X21, X1,LSL #3] |
(820) 0x44cb34 LDR D16, [X20, X15,LSL #3] |
(820) 0x44cb38 LDR D17, [X20, X30,LSL #3] |
(820) 0x44cb3c FMUL D18, D8, D16 |
(820) 0x44cb40 FADD D19, D17, D18 |
(820) 0x44cb44 FADD D20, D6, D18 |
(820) 0x44cb48 FADD D21, D7, D18 |
(820) 0x44cb4c STR D19, [X20, X30,LSL #3] |
(820) 0x44cb50 LDR D1, [X20, X14,LSL #3] |
(820) 0x44cb54 LDR D22, [X21, X1,LSL #3] |
(820) 0x44cb58 LDR D0, [X20, X8,LSL #3] |
(820) 0x44cb5c FMUL D8, D22, D1 |
(820) 0x44cb60 FADD D23, D0, D8 |
(820) 0x44cb64 FADD D1, D20, D8 |
(820) 0x44cb68 FADD D0, D21, D8 |
(820) 0x44cb6c STR D23, [X20, X8,LSL #3] |
(820) 0x44cb70 CMP X4, X17 |
(820) 0x44cb74 B.NE 44cac0 |
(818) 0x44cb78 LDR X17, [SP, #144] |
(818) 0x44cb7c LDR X2, [X17, X2,LSL #3] |
(818) 0x44cb80 LDR X15, [X17, X5] |
(818) 0x44cb84 CMP X2, X15 |
(818) 0x44cb88 B.GE 44c5c4 |
(818) 0x44cb8c SUB X5, X15, X2 |
(818) 0x44cb90 ANDS X4, X5, #4160 |
(818) 0x44cb94 B.EQ 44cc34 |
(818) 0x44cb98 CMP X4, #1 |
(818) 0x44cb9c B.EQ 44cc00 |
(818) 0x44cba0 CMP X4, #2 |
(818) 0x44cba4 B.EQ 44cbd4 |
(818) 0x44cba8 LDR X14, [X24, X2,LSL #3] |
(818) 0x44cbac LDR D25, [X19, X2,LSL #3] |
(818) 0x44cbb0 ADD X2, X2, #1 |
(818) 0x44cbb4 LDR D24, [X21, X1,LSL #3] |
(818) 0x44cbb8 LDR X16, [X22, X14,LSL #3] |
(818) 0x44cbbc FMUL D26, D24, D25 |
(818) 0x44cbc0 LDR D27, [X19, X16,LSL #3] |
(818) 0x44cbc4 FADD D1, D1, D26 |
(818) 0x44cbc8 FADD D0, D0, D26 |
(818) 0x44cbcc FADD D28, D27, D26 |
(818) 0x44cbd0 STR D28, [X19, X16,LSL #3] |
(818) 0x44cbd4 LDR X30, [X24, X2,LSL #3] |
(818) 0x44cbd8 LDR D30, [X19, X2,LSL #3] |
(818) 0x44cbdc ADD X2, X2, #1 |
(818) 0x44cbe0 LDR D29, [X21, X1,LSL #3] |
(818) 0x44cbe4 LDR X8, [X22, X30,LSL #3] |
(818) 0x44cbe8 FMUL D31, D29, D30 |
(818) 0x44cbec LDR D2, [X19, X8,LSL #3] |
(818) 0x44cbf0 FADD D1, D1, D31 |
(818) 0x44cbf4 FADD D0, D0, D31 |
(818) 0x44cbf8 FADD D4, D2, D31 |
(818) 0x44cbfc STR D4, [X19, X8,LSL #3] |
(818) 0x44cc00 LDR X17, [X24, X2,LSL #3] |
(818) 0x44cc04 LDR D3, [X19, X2,LSL #3] |
(818) 0x44cc08 ADD X2, X2, #1 |
(818) 0x44cc0c LDR D5, [X21, X1,LSL #3] |
(818) 0x44cc10 LDR X5, [X22, X17,LSL #3] |
(818) 0x44cc14 FMUL D8, D5, D3 |
(818) 0x44cc18 LDR D6, [X19, X5,LSL #3] |
(818) 0x44cc1c FADD D1, D1, D8 |
(818) 0x44cc20 FADD D0, D0, D8 |
(818) 0x44cc24 FADD D7, D6, D8 |
(818) 0x44cc28 STR D7, [X19, X5,LSL #3] |
(818) 0x44cc2c CMP X2, X15 |
(818) 0x44cc30 B.EQ 44c5c4 |
(819) 0x44cc34 LDR X14, [X24, X2,LSL #3] |
(819) 0x44cc38 ADD X4, X2, #1 |
(819) 0x44cc3c ADD X30, X2, #3 |
(819) 0x44cc40 ADD X17, X4, #1 |
(819) 0x44cc44 LDR D8, [X21, X1,LSL #3] |
(819) 0x44cc48 LDR D16, [X19, X2,LSL #3] |
(819) 0x44cc4c ADD X2, X2, #4 |
(819) 0x44cc50 LDR X8, [X22, X14,LSL #3] |
(819) 0x44cc54 LDR X16, [X24, X4,LSL #3] |
(819) 0x44cc58 FMUL D17, D8, D16 |
(819) 0x44cc5c LDR X14, [X24, X17,LSL #3] |
(819) 0x44cc60 LDR D18, [X19, X8,LSL #3] |
(819) 0x44cc64 LDR X5, [X22, X16,LSL #3] |
(819) 0x44cc68 FADD D19, D1, D17 |
(819) 0x44cc6c FADD D20, D0, D17 |
(819) 0x44cc70 FADD D21, D18, D17 |
(819) 0x44cc74 STR D21, [X19, X8,LSL #3] |
(819) 0x44cc78 LDR D1, [X19, X4,LSL #3] |
(819) 0x44cc7c LDR D22, [X21, X1,LSL #3] |
(819) 0x44cc80 LDR D0, [X19, X5,LSL #3] |
(819) 0x44cc84 LDR X4, [X24, X30,LSL #3] |
(819) 0x44cc88 FMUL D23, D22, D1 |
(819) 0x44cc8c LDR X8, [X22, X14,LSL #3] |
(819) 0x44cc90 LDR X16, [X22, X4,LSL #3] |
(819) 0x44cc94 FADD D24, D0, D23 |
(819) 0x44cc98 FADD D25, D19, D23 |
(819) 0x44cc9c FADD D26, D20, D23 |
(819) 0x44cca0 STR D24, [X19, X5,LSL #3] |
(819) 0x44cca4 LDR D27, [X21, X1,LSL #3] |
(819) 0x44cca8 LDR D28, [X19, X17,LSL #3] |
(819) 0x44ccac LDR D29, [X19, X8,LSL #3] |
(819) 0x44ccb0 FMUL D30, D27, D28 |
(819) 0x44ccb4 FADD D31, D29, D30 |
(819) 0x44ccb8 FADD D4, D25, D30 |
(819) 0x44ccbc FADD D5, D26, D30 |
(819) 0x44ccc0 STR D31, [X19, X8,LSL #3] |
(819) 0x44ccc4 LDR D6, [X21, X1,LSL #3] |
(819) 0x44ccc8 LDR D3, [X19, X30,LSL #3] |
(819) 0x44cccc LDR D2, [X19, X16,LSL #3] |
(819) 0x44ccd0 FMUL D8, D6, D3 |
(819) 0x44ccd4 FADD D7, D2, D8 |
(819) 0x44ccd8 FADD D1, D4, D8 |
(819) 0x44ccdc FADD D0, D5, D8 |
(819) 0x44cce0 STR D7, [X19, X16,LSL #3] |
(819) 0x44cce4 CMP X2, X15 |
(819) 0x44cce8 B.NE 44cc34 |
(818) 0x44ccec B 44c5c4 |
0x44ccf0 LDP X30, X16, [SP, #328] |
0x44ccf4 ADD X8, X30, X2 |
0x44ccf8 LDR X2, [X16, X2] |
0x44ccfc LDR X30, [X8, #8] |
0x44cd00 ADD X16, X2, X30 |
0x44cd04 CMP X2, X16 |
0x44cd08 B.GE 44c654 |
0x44cd0c LDR X30, [SP, #176] |
0x44cd10 LDR X8, [SP, #344] |
0x44cd14 LDR X8, [X8, X30] |
0x44cd18 SUB X30, X16, X2 |
0x44cd1c ANDS X30, X30, #4160 |
0x44cd20 B.EQ 44ce54 |
0x44cd24 CMP X30, #1 |
0x44cd28 B.EQ 44cd94 |
0x44cd2c CMP X30, #2 |
0x44cd30 B.EQ 44cd64 |
0x44cd34 LDR D8, [X27, X1,LSL #3] |
0x44cd38 LDR D17, [X14, X2,LSL #3] |
0x44cd3c LDR X30, [X8, X2,LSL #3] |
0x44cd40 FMUL D18, D8, D17 |
0x44cd44 TBNZ X30, #63, 44cf80 |
0x44cd48 LDR X30, [X22, X30,LSL #3] |
0x44cd4c LDR D19, [X19, X30,LSL #3] |
0x44cd50 FADD D20, D19, D18 |
0x44cd54 STR D20, [X19, X30,LSL #3] |
0x44cd58 FADD D1, D1, D18 |
0x44cd5c FADD D0, D0, D18 |
0x44cd60 ADD X2, X2, #1 |
0x44cd64 LDR D23, [X27, X1,LSL #3] |
0x44cd68 LDR D24, [X14, X2,LSL #3] |
0x44cd6c LDR X30, [X8, X2,LSL #3] |
0x44cd70 FMUL D25, D23, D24 |
0x44cd74 TBNZ X30, #63, 44cf48 |
0x44cd78 LDR X30, [X22, X30,LSL #3] |
0x44cd7c LDR D26, [X19, X30,LSL #3] |
0x44cd80 FADD D27, D26, D25 |
0x44cd84 STR D27, [X19, X30,LSL #3] |
0x44cd88 FADD D1, D1, D25 |
0x44cd8c FADD D0, D0, D25 |
0x44cd90 ADD X2, X2, #1 |
0x44cd94 LDR D30, [X27, X1,LSL #3] |
0x44cd98 LDR D31, [X14, X2,LSL #3] |
0x44cd9c LDR X30, [X8, X2,LSL #3] |
0x44cda0 FMUL D8, D30, D31 |
0x44cda4 TBNZ X30, #63, 44cf30 |
0x44cda8 LDR X30, [X22, X30,LSL #3] |
0x44cdac LDR D4, [X19, X30,LSL #3] |
0x44cdb0 FADD D5, D4, D8 |
0x44cdb4 STR D5, [X19, X30,LSL #3] |
0x44cdb8 ADD X2, X2, #1 |
0x44cdbc FADD D1, D1, D8 |
0x44cdc0 FADD D0, D0, D8 |
0x44cdc4 CMP X16, X2 |
0x44cdc8 B.NE 44ce54 |
0x44cdcc B 44c654 |
(827) 0x44cdd0 LDR X30, [X22, X30,LSL #3] |
(827) 0x44cdd4 FADD D28, D1, D22 |
(827) 0x44cdd8 FADD D29, D0, D22 |
(827) 0x44cddc LDR D23, [X19, X30,LSL #3] |
(827) 0x44cde0 FADD D24, D23, D22 |
(827) 0x44cde4 STR D24, [X19, X30,LSL #3] |
(827) 0x44cde8 ADD X30, X2, #1 |
(827) 0x44cdec LDR D27, [X27, X1,LSL #3] |
(827) 0x44cdf0 LDR D30, [X14, X30,LSL #3] |
(827) 0x44cdf4 LDR X30, [X8, X30,LSL #3] |
(827) 0x44cdf8 FMUL D31, D27, D30 |
(827) 0x44cdfc TBNZ X30, #63, 44cecc |
0x44ce00 LDR X30, [X22, X30,LSL #3] |
0x44ce04 FADD D16, D28, D31 |
0x44ce08 FADD D17, D29, D31 |
0x44ce0c LDR D4, [X19, X30,LSL #3] |
0x44ce10 FADD D5, D4, D31 |
0x44ce14 STR D5, [X19, X30,LSL #3] |
0x44ce18 ADD X30, X2, #2 |
0x44ce1c LDR D7, [X27, X1,LSL #3] |
0x44ce20 LDR D2, [X14, X30,LSL #3] |
0x44ce24 LDR X30, [X8, X30,LSL #3] |
0x44ce28 FMUL D8, D7, D2 |
0x44ce2c TBNZ X30, #63, 44cf00 |
(827) 0x44ce30 LDR X30, [X22, X30,LSL #3] |
(827) 0x44ce34 LDR D18, [X19, X30,LSL #3] |
(827) 0x44ce38 FADD D19, D18, D8 |
(827) 0x44ce3c STR D19, [X19, X30,LSL #3] |
(827) 0x44ce40 ADD X2, X2, #3 |
(827) 0x44ce44 FADD D1, D16, D8 |
(827) 0x44ce48 FADD D0, D17, D8 |
(827) 0x44ce4c CMP X16, X2 |
(827) 0x44ce50 B.EQ 44c654 |
(827) 0x44ce54 LDR D2, [X27, X1,LSL #3] |
(827) 0x44ce58 LDR D7, [X14, X2,LSL #3] |
(827) 0x44ce5c LDR X30, [X8, X2,LSL #3] |
(827) 0x44ce60 FMUL D16, D2, D7 |
(827) 0x44ce64 TBNZ X30, #63, 44cf18 |
0x44ce68 LDR X30, [X22, X30,LSL #3] |
0x44ce6c LDR D8, [X19, X30,LSL #3] |
0x44ce70 FADD D17, D8, D16 |
0x44ce74 STR D17, [X19, X30,LSL #3] |
(827) 0x44ce78 ADD X2, X2, #1 |
(827) 0x44ce7c LDR D20, [X27, X1,LSL #3] |
(827) 0x44ce80 FADD D1, D1, D16 |
(827) 0x44ce84 FADD D0, D0, D16 |
(827) 0x44ce88 LDR D21, [X14, X2,LSL #3] |
(827) 0x44ce8c LDR X30, [X8, X2,LSL #3] |
(827) 0x44ce90 FMUL D22, D20, D21 |
(827) 0x44ce94 TBZ X30, #63, 44cdd0 |
0x44ce98 ORN X30, XZR, X30 |
0x44ce9c FADD D28, D1, D22 |
0x44cea0 FADD D29, D0, D22 |
0x44cea4 LDR X30, [X23, X30,LSL #3] |
0x44cea8 LDR D25, [X20, X30,LSL #3] |
0x44ceac FADD D26, D25, D22 |
0x44ceb0 STR D26, [X20, X30,LSL #3] |
0x44ceb4 ADD X30, X2, #1 |
0x44ceb8 LDR D27, [X27, X1,LSL #3] |
0x44cebc LDR D30, [X14, X30,LSL #3] |
0x44cec0 LDR X30, [X8, X30,LSL #3] |
0x44cec4 FMUL D31, D27, D30 |
0x44cec8 TBZ X30, #63, 44ce00 |
(827) 0x44cecc ORN X30, XZR, X30 |
(827) 0x44ced0 FADD D16, D28, D31 |
(827) 0x44ced4 FADD D17, D29, D31 |
(827) 0x44ced8 LDR X30, [X23, X30,LSL #3] |
(827) 0x44cedc LDR D6, [X20, X30,LSL #3] |
(827) 0x44cee0 FADD D3, D6, D31 |
(827) 0x44cee4 STR D3, [X20, X30,LSL #3] |
(827) 0x44cee8 ADD X30, X2, #2 |
(827) 0x44ceec LDR D7, [X27, X1,LSL #3] |
(827) 0x44cef0 LDR D2, [X14, X30,LSL #3] |
(827) 0x44cef4 LDR X30, [X8, X30,LSL #3] |
(827) 0x44cef8 FMUL D8, D7, D2 |
(827) 0x44cefc TBZ X30, #63, 44ce30 |
0x44cf00 ORN X30, XZR, X30 |
0x44cf04 LDR X30, [X23, X30,LSL #3] |
0x44cf08 LDR D20, [X20, X30,LSL #3] |
0x44cf0c FADD D1, D20, D8 |
0x44cf10 STR D1, [X20, X30,LSL #3] |
0x44cf14 B 44ce40 |
(827) 0x44cf18 ORN X30, XZR, X30 |
(827) 0x44cf1c LDR X30, [X23, X30,LSL #3] |
(827) 0x44cf20 LDR D18, [X20, X30,LSL #3] |
(827) 0x44cf24 FADD D19, D18, D16 |
(827) 0x44cf28 STR D19, [X20, X30,LSL #3] |
(827) 0x44cf2c B 44ce78 |
0x44cf30 ORN X30, XZR, X30 |
0x44cf34 LDR X30, [X23, X30,LSL #3] |
0x44cf38 LDR D6, [X20, X30,LSL #3] |
0x44cf3c FADD D3, D6, D8 |
0x44cf40 STR D3, [X20, X30,LSL #3] |
0x44cf44 B 44cdb8 |
0x44cf48 ORN X30, XZR, X30 |
0x44cf4c LDR X30, [X23, X30,LSL #3] |
0x44cf50 LDR D28, [X20, X30,LSL #3] |
0x44cf54 FADD D29, D28, D25 |
0x44cf58 STR D29, [X20, X30,LSL #3] |
0x44cf5c B 44cd88 |
(816) 0x44cf60 LDR X4, [SP, #136] |
(816) 0x44cf64 B 44c2a0 |
(816) 0x44cf68 LDR X15, [SP, #256] |
(816) 0x44cf6c LDR X1, [X15, X3,LSL #3] |
(816) 0x44cf70 LDR X4, [X15, X6] |
(816) 0x44cf74 CMP X1, X4 |
(816) 0x44cf78 B.LT 44c624 |
(816) 0x44cf7c B 44c6c8 |
0x44cf80 ORN X30, XZR, X30 |
0x44cf84 LDR X30, [X23, X30,LSL #3] |
0x44cf88 LDR D21, [X20, X30,LSL #3] |
0x44cf8c FADD D22, D21, D18 |
0x44cf90 STR D22, [X20, X30,LSL #3] |
0x44cf94 B 44cd58 |
0x44cf98 ORR X0, XZR, X22 |
0x44cf9c STP X9, X10, [SP, #200] |
0x44cfa0 STR X2, [SP, #264] |
0x44cfa4 STR X12, [SP, #352] |
0x44cfa8 STR X13, [SP, #368] |
0x44cfac B 44c044 |
0x44cfb0 ORR X0, XZR, X23 |
0x44cfb4 MOVZ X1, #8 |
0x44cfb8 STP X3, X9, [SP, #200] |
0x44cfbc STR X10, [SP, #264] |
0x44cfc0 STR X2, [SP, #352] |
0x44cfc4 STP X12, X13, [SP, #368] |
0x44cfc8 BL 5037ec |
0x44cfcc ORR X23, XZR, X0 |
0x44cfd0 LDP X3, X9, [SP, #200] |
0x44cfd4 LDP X12, X13, [SP, #368] |
0x44cfd8 LDR X10, [SP, #264] |
0x44cfdc LDR X2, [SP, #352] |
0x44cfe0 B 44c028 |
0x44cfe4 MOVZ X1, #8 |
0x44cfe8 STP X3, X9, [SP, #200] |
0x44cfec STR X10, [SP, #264] |
0x44cff0 STR X2, [SP, #352] |
0x44cff4 STP X12, X13, [SP, #368] |
0x44cff8 BL 5037ec |
0x44cffc STR X0, [SP, #128] |
0x44d000 LDP X3, X9, [SP, #200] |
0x44d004 LDP X12, X13, [SP, #368] |
0x44d008 LDR X10, [SP, #264] |
0x44d00c LDR X2, [SP, #352] |
0x44d010 B 44c024 |
0x44d014 ORR X0, XZR, X2 |
0x44d018 MOVZ X1, #8 |
0x44d01c STR X2, [SP, #128] |
0x44d020 STP X3, X9, [SP, #200] |
0x44d024 STR X10, [SP, #264] |
0x44d028 STR X12, [SP, #352] |
0x44d02c STR X13, [SP, #368] |
0x44d030 BL 5037ec |
0x44d034 ORR X26, XZR, X0 |
0x44d038 LDR X2, [SP, #128] |
0x44d03c LDP X3, X9, [SP, #200] |
0x44d040 LDR X10, [SP, #264] |
0x44d044 LDR X12, [SP, #352] |
0x44d048 LDR X13, [SP, #368] |
0x44d04c B 44c018 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | GOMP_parallel | libomp.so | |
○ | hypre_BoomerAMGBuildMultipass | par_multi_interp.c:1884 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:737 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | amg.c:599 | exec |
Path / |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | exec |
nb instructions | 330 |
loop length | 1320 |
nb stack references | 0 |
front end | 41.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 19.50 | 19.50 | 17.75 | 17.75 | 17.75 | 17.75 | 9.00 | 9.00 | 9.00 | 9.00 | 68.50 | 68.17 | 68.33 | 35.00 | 35.00 |
cycles | 19.50 | 19.50 | 17.75 | 17.75 | 17.75 | 17.75 | 9.00 | 9.00 | 9.00 | 9.00 | 68.50 | 68.17 | 68.33 | 35.00 | 35.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Front-end | 41.00 |
Overall L1 | 68.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #640]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X1, [X0, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X4, [X0, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X5, [X0, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X6, [X0, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X7, [X0, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X5, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X0, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X3, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X6, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X7, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X8, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X1, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X20, [X0, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X25, X19, [X0, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X24, [X0, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [X0, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X11, X12, [X0, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X23, X22, [X0, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X11, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X13, [X0, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X10, X9, [X0, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X14, [X0, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X13, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X15, [X0, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X16, [X0, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X14, [SP, #360] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X17, [X0, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X15, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X18, [X0, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X16, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X21, [X0, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X17, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X26, [X0, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X18, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X27, [X0, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X21, [SP, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X28, [X0, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X26, [SP, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X30, [X0, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X27, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X1, [X0, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X28, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X30, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X1, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X4, [X0, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X6, [X0, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X4, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X28, [X0, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X7, [X0, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X6, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X21, [X0, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X0, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X7, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X11, [X0, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X27, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X5, [X0, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X0, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X5, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X0, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X2, 44d014 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1124> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBNZ X0, 44cfe4 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10f4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR XZR, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X23, 44cfb0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X3, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44cf98 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X10, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X18, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X22, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X18, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44c090 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UBFM X2, X18, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #255 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X0, XZR, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f5d0 <@plt_start@+0x5d0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X16, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X16, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44c0c4 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UBFM X2, X16, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #255 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f5d0 <@plt_start@+0x5d0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 506400 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5063e0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X6, X7, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
SUB X2, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X9, X10, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
SDIV X0, X6, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
LDR X8, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X14, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X12, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X3, X8, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [X7, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X14, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X3, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MADD X18, X14, X0, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDR X13, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X4, X0, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X11, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X6, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, X4, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CSEL X6, X15, X1, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X6, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44c994 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xaa4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X17, [SP, #360] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X16, X25, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X18, X24, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR D8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
LDR X8, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X16, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X30, X17, X5,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, X17, X6,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X30, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X7, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X30, [X15, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X0, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X3, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44ccf0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe00> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR D8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
ORR X0, XZR, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X0, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X29, X30, [SP], #384 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
B 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X30, X16, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
ADD X8, X30, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [X16, X2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X30, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X2, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X2, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 44c654 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x764> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X8, X30] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X30, X16, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X30, X30, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44ce54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf64> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X30, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44cd94 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xea4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X30, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44cd64 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe74> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR D8, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D17, [X14, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D18, D8, D17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf80 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1090> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D19, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D20, D19, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D20, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
FADD D1, D1, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D0, D0, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
ADD X2, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D23, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D24, [X14, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D25, D23, D24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf48 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1058> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D26, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D27, D26, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D27, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
FADD D1, D1, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D0, D0, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
ADD X2, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D30, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D31, [X14, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D8, D30, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf30 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1040> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D4, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D5, D4, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D5, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X2, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FADD D1, D1, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D0, D0, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
CMP X16, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 44ce54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf64> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 44c654 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x764> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FADD D16, D28, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D17, D29, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
LDR D4, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D5, D4, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D5, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X30, X2, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D7, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D2, [X14, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D8, D7, D2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf00 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1010> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D8, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D17, D8, D16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D17, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FADD D28, D1, D22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D29, D0, D22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D25, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D26, D25, D22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D26, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X30, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D27, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D30, [X14, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D31, D27, D30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBZ X30, #63, 44ce00 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf10> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D20, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D1, D20, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D1, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44ce40 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D6, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D3, D6, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D3, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44cdb8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xec8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D28, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D29, D28, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D29, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44cd88 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe98> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D21, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D22, D21, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D22, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44cd58 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe68> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X10, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 44c044 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x154> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X23, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 44c028 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x138> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 44c024 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x134> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X26, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 44c018 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x128> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | exec |
nb instructions | 330 |
loop length | 1320 |
nb stack references | 0 |
front end | 41.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 19.50 | 19.50 | 17.75 | 17.75 | 17.75 | 17.75 | 9.00 | 9.00 | 9.00 | 9.00 | 68.50 | 68.17 | 68.33 | 35.00 | 35.00 |
cycles | 19.50 | 19.50 | 17.75 | 17.75 | 17.75 | 17.75 | 9.00 | 9.00 | 9.00 | 9.00 | 68.50 | 68.17 | 68.33 | 35.00 | 35.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Front-end | 41.00 |
Overall L1 | 68.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #640]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X1, [X0, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X4, [X0, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X5, [X0, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X6, [X0, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X7, [X0, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X5, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X0, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X3, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X6, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X7, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X8, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X1, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X20, [X0, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X25, X19, [X0, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X24, [X0, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [X0, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X11, X12, [X0, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X23, X22, [X0, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X11, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X13, [X0, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X10, X9, [X0, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X14, [X0, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X13, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X15, [X0, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X16, [X0, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X14, [SP, #360] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X17, [X0, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X15, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X18, [X0, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X16, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X21, [X0, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X17, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X26, [X0, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X18, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X27, [X0, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X21, [SP, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X28, [X0, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X26, [SP, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X30, [X0, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X27, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X1, [X0, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X28, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X0, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X30, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X1, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X4, [X0, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X6, [X0, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X4, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X28, [X0, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X7, [X0, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X6, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X21, [X0, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X0, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X7, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X11, [X0, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X27, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X5, [X0, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X0, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X5, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X0, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X2, 44d014 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1124> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBNZ X0, 44cfe4 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10f4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR XZR, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X23, 44cfb0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X3, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44cf98 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X10, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X18, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X22, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X18, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44c090 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UBFM X2, X18, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #255 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X0, XZR, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f5d0 <@plt_start@+0x5d0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X16, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X16, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44c0c4 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UBFM X2, X16, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #255 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f5d0 <@plt_start@+0x5d0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X14, X15, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X5, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 506400 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5063e0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X6, X7, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
SUB X2, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X9, X10, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
SDIV X0, X6, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
LDR X8, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X14, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X12, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X3, X8, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [X7, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X14, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X3, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MADD X18, X14, X0, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDR X13, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X4, X0, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, X11, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X6, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, X4, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CSEL X6, X15, X1, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X6, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 44c994 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xaa4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X17, [SP, #360] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X16, X25, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X18, X24, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR D8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
LDR X8, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X16, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X30, X17, X5,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, X17, X6,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X30, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X7, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X30, [X15, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X0, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X3, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44ccf0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe00> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR D8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
ORR X0, XZR, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X0, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X29, X30, [SP], #384 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
B 5038c0 <hypre_Free> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X30, X16, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
ADD X8, X30, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [X16, X2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X30, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X16, X2, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X2, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 44c654 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x764> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X8, X30] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X30, X16, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X30, X30, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44ce54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf64> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X30, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44cd94 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xea4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X30, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 44cd64 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe74> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR D8, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D17, [X14, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D18, D8, D17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf80 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1090> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D19, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D20, D19, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D20, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
FADD D1, D1, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D0, D0, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
ADD X2, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D23, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D24, [X14, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D25, D23, D24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf48 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1058> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D26, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D27, D26, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D27, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
FADD D1, D1, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D0, D0, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
ADD X2, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D30, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D31, [X14, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D8, D30, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf30 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1040> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D4, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D5, D4, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D5, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X2, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FADD D1, D1, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D0, D0, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
CMP X16, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 44ce54 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf64> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 44c654 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x764> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FADD D16, D28, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D17, D29, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
LDR D4, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D5, D4, D31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D5, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X30, X2, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D7, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D2, [X14, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D8, D7, D2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBNZ X30, #63, 44cf00 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1010> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X30, [X22, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D8, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D17, D8, D16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D17, [X19, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FADD D28, D1, D22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
FADD D29, D0, D22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D25, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D26, D25, D22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D26, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
ADD X30, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D27, [X27, X1,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D30, [X14, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR X30, [X8, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D31, D27, D30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
TBZ X30, #63, 44ce00 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf10> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D20, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D1, D20, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D1, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44ce40 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D6, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D3, D6, D8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D3, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44cdb8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xec8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D28, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D29, D28, D25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D29, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44cd88 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe98> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORN X30, XZR, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X23, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR D21, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FADD D22, D21, D18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
STR D22, [X20, X30,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B 44cd58 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xe68> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X10, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 44c044 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x154> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X23, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 44c028 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x138> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X12, X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 44c024 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x134> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 5037ec <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X26, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X3, X9, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X12, [SP, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 44c018 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x128> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass._omp_fn.10– | 4.93 | 0.76 |
○Loop 827 - par_multi_interp.c:1851-1860 - exec | 0 | 0 |
▼Loop 813 - par_multi_interp.c:1774-1876 - exec– | 0 | 0 |
▼Loop 816 - par_multi_interp.c:1774-1876 - exec– | 1.23 | 0.19 |
○Loop 822 - par_multi_interp.c:1799-1803 - exec | 1.49 | 0.23 |
○Loop 823 - par_multi_interp.c:1792-1797 - exec | 0 | 0 |
○Loop 826 - par_multi_interp.c:1873-1874 - exec | 0 | 0 |
○Loop 824 - par_multi_interp.c:1782-1787 - exec | 0 | 0 |
○Loop 821 - par_multi_interp.c:1805-1809 - exec | 0 | 0 |
○Loop 825 - par_multi_interp.c:1875-1876 - exec | 0 | 0 |
▼Loop 817 - par_multi_interp.c:1811-1871 - exec– | 0.1 | 0.01 |
▼Loop 818 - par_multi_interp.c:1811-1837 - exec– | 2.11 | 0.32 |
○Loop 819 - par_multi_interp.c:1824-1830 - exec | 0 | 0 |
○Loop 820 - par_multi_interp.c:1816-1822 - exec | 0 | 0 |
○Loop 815 - par_multi_interp.c:1840-1840 - exec | 0 | 0 |
○Loop 814 - par_multi_interp.c:1840-1867 - exec | 0 | 0 |