Loop Id: 2302 | Module: exec | Source: par_strength.c:2011-2048 | Coverage: 0.71% |
---|
Loop Id: 2302 | Module: exec | Source: par_strength.c:2011-2048 | Coverage: 0.71% |
---|
0x49a304 LDR X10, [X26, X11,LSL #3] |
0x49a308 LDR X15, [X23, X10,LSL #3] |
0x49a30c UBFM X6, X10, #61, #60 |
0x49a310 CMP X15, #0 |
0x49a314 B.LE 49a340 |
0x49a318 LDR X4, [X8, X10,LSL #3] |
0x49a31c LDR X0, [X21, X4,LSL #3] |
0x49a320 CMP X0, X3 |
0x49a324 B.GE 49a340 |
0x49a328 LDR X9, [SP, #296] |
0x49a32c STR X9, [X21, X4,LSL #3] |
0x49a330 STR X4, [X30, X9,LSL #3] |
0x49a334 LDR X2, [SP, #296] |
0x49a338 ADD X15, X2, #1 |
0x49a33c STR X15, [SP, #296] |
0x49a340 ADD X9, X6, #8 |
0x49a344 LDR X0, [X18, X10,LSL #3] |
0x49a348 ADD X15, X18, X9 |
0x49a34c LDR X6, [X18, X9] |
0x49a350 CMP X0, X6 |
0x49a354 B.GE 49a3b0 |
0x49a358 HINT #0 |
0x49a35c HINT #0 |
(2304) 0x49a360 LDR X2, [X26, X0,LSL #3] |
(2304) 0x49a364 LDR X4, [X23, X2,LSL #3] |
(2304) 0x49a368 CMP X4, #0 |
(2304) 0x49a36c B.LE 49a3a4 |
(2304) 0x49a370 LDR X2, [X8, X2,LSL #3] |
(2304) 0x49a374 CMP X5, X2 |
(2304) 0x49a378 B.EQ 49a3a4 |
(2304) 0x49a37c LDR X4, [X21, X2,LSL #3] |
(2304) 0x49a380 CMP X4, X3 |
(2304) 0x49a384 B.GE 49a3a4 |
(2304) 0x49a388 LDR X6, [SP, #296] |
(2304) 0x49a38c STR X6, [X21, X2,LSL #3] |
(2304) 0x49a390 STR X2, [X30, X6,LSL #3] |
(2304) 0x49a394 LDR X2, [SP, #296] |
(2304) 0x49a398 LDR X6, [X15] |
(2304) 0x49a39c ADD X4, X2, #1 |
(2304) 0x49a3a0 STR X4, [SP, #296] |
(2304) 0x49a3a4 ADD X0, X0, #1 |
(2304) 0x49a3a8 CMP X0, X6 |
(2304) 0x49a3ac B.LT 49a360 |
0x49a3b0 LDR X0, [X12, X10,LSL #3] |
0x49a3b4 ADD X10, X12, X9 |
0x49a3b8 LDR X6, [X12, X9] |
0x49a3bc CMP X6, X0 |
0x49a3c0 B.LE 49a40c |
(2303) 0x49a3c4 LDR X9, [X25, X0,LSL #3] |
(2303) 0x49a3c8 LDR X15, [X24, X9,LSL #3] |
(2303) 0x49a3cc CMP X15, #0 |
(2303) 0x49a3d0 B.LE 49a400 |
(2303) 0x49a3d4 LDR X2, [X7, X9,LSL #3] |
(2303) 0x49a3d8 LDR X4, [X19, X2,LSL #3] |
(2303) 0x49a3dc CMP X1, X4 |
(2303) 0x49a3e0 B.LE 49a400 |
(2303) 0x49a3e4 LDR X6, [SP, #304] |
(2303) 0x49a3e8 STR X6, [X19, X2,LSL #3] |
(2303) 0x49a3ec STR X2, [X16, X6,LSL #3] |
(2303) 0x49a3f0 LDR X9, [SP, #304] |
(2303) 0x49a3f4 LDR X6, [X10] |
(2303) 0x49a3f8 ADD X15, X9, #1 |
(2303) 0x49a3fc STR X15, [SP, #304] |
(2303) 0x49a400 ADD X0, X0, #1 |
(2303) 0x49a404 CMP X0, X6 |
(2303) 0x49a408 B.LT 49a3c4 |
0x49a40c LDR X10, [X17] |
0x49a410 ADD X11, X11, #1 |
0x49a414 CMP X10, X11 |
0x49a418 B.GT 49a304 |
/home/hbollore/qaas/qaas-runs/169-817-3176/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 2011 - 2048 |
-------------------------------------------------------------------------------- |
2011: for (jj1 = S_diag_i[i1]; jj1 < S_diag_i[i1+1]; jj1++) |
2012: { |
2013: i2 = S_diag_j[jj1]; |
2014: if (CF_marker[i2] > 0) |
2015: { |
2016: index = fine_to_coarse[i2]; |
2017: if (S_marker[index] < jj_row_begin_diag) |
2018: { |
2019: S_marker[index] = num_nonzeros_diag; |
2020: C_diag_j[num_nonzeros_diag] = index; |
2021: num_nonzeros_diag++; |
2022: } |
2023: } |
2024: for (jj2 = S_diag_i[i2]; jj2 < S_diag_i[i2+1]; jj2++) |
2025: { |
2026: i3 = S_diag_j[jj2]; |
2027: if (CF_marker[i3] > 0) |
2028: { |
2029: index = fine_to_coarse[i3]; |
2030: if (index != ic && S_marker[index] < jj_row_begin_diag) |
2031: { |
2032: S_marker[index] = num_nonzeros_diag; |
2033: C_diag_j[num_nonzeros_diag] = index; |
2034: num_nonzeros_diag++; |
2035: } |
2036: } |
2037: } |
2038: for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++) |
2039: { |
2040: i3 = S_offd_j[jj2]; |
2041: if (CF_marker_offd[i3] > 0) |
2042: { |
2043: index = map_S_to_C[i3]; |
2044: if (S_marker_offd[index] < jj_row_begin_offd) |
2045: { |
2046: S_marker_offd[index] = num_nonzeros_offd; |
2047: C_offd_j[num_nonzeros_offd] = index; |
2048: num_nonzeros_offd++; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | GOMP_parallel | libomp.so | |
○ | hypre_BoomerAMGCreate2ndS | par_strength.c:1668 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:623 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | amg.c:599 | exec |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.04 |
Bottlenecks | P10, |
Function | hypre_BoomerAMGCreate2ndS._omp_fn.7 |
Source | par_strength.c:2011-2011,par_strength.c:2014-2021,par_strength.c:2024-2024,par_strength.c:2038-2038 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.83 |
CQA cycles if no scalar integer | 4.83 |
CQA cycles if FP arith vectorized | 4.83 |
CQA cycles if fully vectorized | 1.21 |
Front-end cycles | 3.75 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 2.50 |
P1 cycles | 2.75 |
P2 cycles | 2.75 |
P3 cycles | 2.75 |
P4 cycles | 2.75 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 4.83 |
P10 cycles | 4.50 |
P11 cycles | 4.67 |
P12 cycles | 1.50 |
P13 cycles | 1.50 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 32.00 |
Nb uops | 30.00 |
Nb loads | NA |
Nb stores | 3.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 23.17 |
Bytes prefetched | 0.00 |
Bytes loaded | 88.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 25.00 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 25.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.04 |
Bottlenecks | P10, |
Function | hypre_BoomerAMGCreate2ndS._omp_fn.7 |
Source | par_strength.c:2011-2011,par_strength.c:2014-2021,par_strength.c:2024-2024,par_strength.c:2038-2038 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.83 |
CQA cycles if no scalar integer | 4.83 |
CQA cycles if FP arith vectorized | 4.83 |
CQA cycles if fully vectorized | 1.21 |
Front-end cycles | 3.75 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 2.50 |
P1 cycles | 2.75 |
P2 cycles | 2.75 |
P3 cycles | 2.75 |
P4 cycles | 2.75 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 4.83 |
P10 cycles | 4.50 |
P11 cycles | 4.67 |
P12 cycles | 1.50 |
P13 cycles | 1.50 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 32.00 |
Nb uops | 30.00 |
Nb loads | NA |
Nb stores | 3.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 23.17 |
Bytes prefetched | 0.00 |
Bytes loaded | 88.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 25.00 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 25.00 |
Path / |
Function | hypre_BoomerAMGCreate2ndS._omp_fn.7 |
Source file and lines | par_strength.c:2011-2048 |
Module | exec |
nb instructions | 32 |
loop length | 128 |
nb stack references | 0 |
front end | 3.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 2.50 | 2.75 | 2.75 | 2.75 | 2.75 | 0.00 | 0.00 | 0.00 | 0.00 | 4.83 | 4.50 | 4.67 | 1.50 | 1.50 |
cycles | 2.50 | 2.50 | 2.75 | 2.75 | 2.75 | 2.75 | 0.00 | 0.00 | 0.00 | 0.00 | 4.83 | 4.50 | 4.67 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.75 |
Overall L1 | 4.83 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LDR X10, [X26, X11,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X15, [X23, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X6, X10, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X15, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 49a340 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x17a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X4, [X8, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X0, [X21, X4,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 49a340 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x17a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X9, [X21, X4,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [X30, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X2, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X15, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X15, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X9, X6, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [X18, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X15, X18, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [X18, X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X0, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 49a3b0 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x1810> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X0, [X12, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X10, X12, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [X12, X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X6, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 49a40c <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x186c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X10, [X17] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X11, X11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X10, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 49a304 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x1764> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | hypre_BoomerAMGCreate2ndS._omp_fn.7 |
Source file and lines | par_strength.c:2011-2048 |
Module | exec |
nb instructions | 32 |
loop length | 128 |
nb stack references | 0 |
front end | 3.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 2.50 | 2.75 | 2.75 | 2.75 | 2.75 | 0.00 | 0.00 | 0.00 | 0.00 | 4.83 | 4.50 | 4.67 | 1.50 | 1.50 |
cycles | 2.50 | 2.50 | 2.75 | 2.75 | 2.75 | 2.75 | 0.00 | 0.00 | 0.00 | 0.00 | 4.83 | 4.50 | 4.67 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.75 |
Overall L1 | 4.83 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LDR X10, [X26, X11,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X15, [X23, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM X6, X10, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X15, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 49a340 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x17a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X4, [X8, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X0, [X21, X4,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 49a340 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x17a0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X9, [X21, X4,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X4, [X30, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X2, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X15, X2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X15, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X9, X6, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [X18, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X15, X18, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [X18, X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X0, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 49a3b0 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x1810> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X0, [X12, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X10, X12, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [X12, X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X6, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 49a40c <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x186c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X10, [X17] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X11, X11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X10, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 49a304 <hypre_BoomerAMGCreate2ndS._omp_fn.7+0x1764> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |