Function: hypre_BoomerAMGBuildMultipass | Module: exec | Source: par_multi_interp.c:41-2060 [...] | Coverage: 1.51% |
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Function: hypre_BoomerAMGBuildMultipass | Module: exec | Source: par_multi_interp.c:41-2060 [...] | Coverage: 1.51% |
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/home/hbollore/qaas/qaas-runs/169-817-3176/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 41 - 2060 |
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41: { |
42: #ifdef HYPRE_PROFILE |
43: hypre_profile_times[HYPRE_TIMER_ID_MULTIPASS_INTERP] -= hypre_MPI_Wtime(); |
44: #endif |
45: |
46: MPI_Comm comm = hypre_ParCSRMatrixComm(A); |
47: hypre_ParCSRCommPkg *comm_pkg = hypre_ParCSRMatrixCommPkg(S); |
48: hypre_ParCSRCommHandle *comm_handle; |
49: hypre_ParCSRCommPkg *tmp_comm_pkg; |
50: |
51: hypre_CSRMatrix *A_diag = hypre_ParCSRMatrixDiag(A); |
52: HYPRE_Real *A_diag_data = hypre_CSRMatrixData(A_diag); |
53: HYPRE_Int *A_diag_i = hypre_CSRMatrixI(A_diag); |
54: HYPRE_Int *A_diag_j = hypre_CSRMatrixJ(A_diag); |
55: |
56: hypre_CSRMatrix *A_offd = hypre_ParCSRMatrixOffd(A); |
57: HYPRE_Real *A_offd_data = NULL; |
58: HYPRE_Int *A_offd_i = hypre_CSRMatrixI(A_offd); |
59: HYPRE_Int *A_offd_j = NULL; |
60: HYPRE_Int *col_map_offd_A = hypre_ParCSRMatrixColMapOffd(A); |
61: HYPRE_Int num_cols_offd_A = hypre_CSRMatrixNumCols(A_offd); |
62: |
63: hypre_CSRMatrix *S_diag = hypre_ParCSRMatrixDiag(S); |
64: HYPRE_Int *S_diag_i = hypre_CSRMatrixI(S_diag); |
65: HYPRE_Int *S_diag_j = hypre_CSRMatrixJ(S_diag); |
66: |
67: hypre_CSRMatrix *S_offd = hypre_ParCSRMatrixOffd(S); |
68: HYPRE_Int *S_offd_i = hypre_CSRMatrixI(S_offd); |
69: HYPRE_Int *S_offd_j = NULL; |
70: HYPRE_Int *col_map_offd_S = hypre_ParCSRMatrixColMapOffd(S); |
71: HYPRE_Int num_cols_offd_S = hypre_CSRMatrixNumCols(S_offd); |
[...] |
83: HYPRE_Real *P_offd_data = NULL; |
84: HYPRE_Int *P_offd_i; /*at first counter of nonzero cols for each row, |
85: finally will be pointer to start of row */ |
86: HYPRE_Int *P_offd_j = NULL; |
[...] |
99: HYPRE_Int *Pext_start = NULL; |
100: HYPRE_Int *P_ncols = NULL; |
101: |
102: HYPRE_Int *CF_marker_offd = NULL; |
103: HYPRE_Int *dof_func_offd = NULL; |
104: HYPRE_Int *P_marker; |
105: HYPRE_Int *P_marker_offd = NULL; |
106: HYPRE_Int *C_array; |
107: HYPRE_Int *C_array_offd = NULL; |
108: HYPRE_Int *pass_array = NULL; /* contains points ordered according to pass */ |
109: HYPRE_Int *pass_pointer = NULL; /* pass_pointer[j] contains pointer to first |
110: point of pass j contained in pass_array */ |
111: HYPRE_Int *P_diag_start; |
112: HYPRE_Int *P_offd_start = NULL; |
113: HYPRE_Int **P_diag_pass; |
114: HYPRE_Int **P_offd_pass = NULL; |
115: HYPRE_Int **Pext_pass = NULL; |
116: HYPRE_Int **new_elmts = NULL; /* new neighbors generated in each pass */ |
117: HYPRE_Int *new_counter = NULL; /* contains no. of new neighbors for |
118: each pass */ |
119: HYPRE_Int *loc = NULL; /* contains locations for new neighbor |
120: connections in int_o_buffer to avoid searching */ |
121: HYPRE_Int *Pext_i = NULL; /*contains P_diag_i and P_offd_i info for nonzero |
122: cols of off proc neighbors */ |
123: HYPRE_Int *Pext_send_buffer = NULL; /* used to collect global nonzero |
124: col ids in P_diag for send_map_elmts */ |
125: |
126: HYPRE_Int *map_S_to_new = NULL; |
127: /*HYPRE_Int *map_A_to_new = NULL;*/ |
128: HYPRE_Int *map_A_to_S = NULL; |
129: HYPRE_Int *new_col_map_offd = NULL; |
130: HYPRE_Int *col_map_offd_P = NULL; |
131: HYPRE_Int *permute = NULL; |
[...] |
141: HYPRE_Int n_coarse = 0; |
142: HYPRE_Int n_coarse_offd = 0; |
143: HYPRE_Int n_SF = 0; |
144: HYPRE_Int n_SF_offd = 0; |
145: |
146: HYPRE_Int *fine_to_coarse = NULL; |
147: HYPRE_Int *fine_to_coarse_offd = NULL; |
148: |
149: HYPRE_Int *assigned = NULL; |
150: HYPRE_Int *assigned_offd = NULL; |
151: |
152: HYPRE_Real *Pext_send_data = NULL; |
153: HYPRE_Real *Pext_data = NULL; |
[...] |
184: HYPRE_Int P_offd_size = 0; |
185: HYPRE_Int local_index = -1; |
186: HYPRE_Int new_num_cols_offd = 0; |
[...] |
194: HYPRE_Int * max_num_threads = hypre_CTAlloc(HYPRE_Int, 1); |
[...] |
202: max_num_threads[0] = hypre_NumThreads(); |
203: cnt_nz_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]); |
204: cnt_nz_offd_per_thread = hypre_CTAlloc(HYPRE_Int, max_num_threads[0]); |
205: for(i=0; i < max_num_threads[0]; i++) |
206: { |
207: cnt_nz_offd_per_thread[i] = 0; |
208: cnt_nz_per_thread[i] = 0; |
[...] |
216: hypre_MPI_Comm_size(comm,&num_procs); |
217: hypre_MPI_Comm_rank(comm,&my_id); |
218: |
219: #ifdef HYPRE_NO_GLOBAL_PARTITION |
220: my_first_cpt = num_cpts_global[0]; |
221: /* total_global_cpts = 0; */ |
222: if (my_id == (num_procs -1)) total_global_cpts = num_cpts_global[1]; |
223: hypre_MPI_Bcast(&total_global_cpts, 1, HYPRE_MPI_INT, num_procs-1, comm); |
[...] |
229: if (!comm_pkg) |
230: { |
231: comm_pkg = hypre_ParCSRMatrixCommPkg(A); |
232: if (!comm_pkg) |
233: { |
234: hypre_MatvecCommPkgCreate(A); |
235: |
236: comm_pkg = hypre_ParCSRMatrixCommPkg(A); |
237: } |
238: col_offd_S_to_A = NULL; |
239: } |
240: |
241: if (col_offd_S_to_A) |
[...] |
252: if (num_cols_offd_A) |
253: { |
254: A_offd_data = hypre_CSRMatrixData(A_offd); |
255: A_offd_j = hypre_CSRMatrixJ(A_offd); |
256: } |
257: |
258: if (num_cols_offd) |
259: S_offd_j = hypre_CSRMatrixJ(S_offd); |
260: |
261: n_fine = hypre_CSRMatrixNumRows(A_diag); |
[...] |
267: if (n_fine) fine_to_coarse = hypre_CTAlloc(HYPRE_Int, n_fine); |
268: |
269: n_coarse = 0; |
270: n_SF = 0; |
271: #ifdef HYPRE_USING_OPENMP |
272: #pragma omp parallel for private(i) reduction(+:n_coarse,n_SF ) HYPRE_SMP_SCHEDULE |
[...] |
278: pass_array_size = n_fine-n_coarse-n_SF; |
279: if (pass_array_size) pass_array = hypre_CTAlloc(HYPRE_Int, pass_array_size); |
280: pass_pointer = hypre_CTAlloc(HYPRE_Int, max_num_passes+1); |
281: if (n_fine) assigned = hypre_CTAlloc(HYPRE_Int, n_fine); |
282: P_diag_i = hypre_CTAlloc(HYPRE_Int, n_fine+1); |
283: P_offd_i = hypre_CTAlloc(HYPRE_Int, n_fine+1); |
284: if (n_coarse) C_array = hypre_CTAlloc(HYPRE_Int, n_coarse); |
285: |
286: if (num_cols_offd) |
287: { |
288: CF_marker_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
289: if (num_functions > 1) dof_func_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
290: } |
291: |
292: if (num_procs > 1) |
293: { |
294: num_sends = hypre_ParCSRCommPkgNumSends(comm_pkg); |
295: send_procs = hypre_ParCSRCommPkgSendProcs(comm_pkg); |
296: send_map_start = hypre_ParCSRCommPkgSendMapStarts(comm_pkg); |
297: send_map_elmt = hypre_ParCSRCommPkgSendMapElmts(comm_pkg); |
298: num_recvs = hypre_ParCSRCommPkgNumRecvs(comm_pkg); |
299: recv_procs = hypre_ParCSRCommPkgRecvProcs(comm_pkg); |
300: recv_vec_start = hypre_ParCSRCommPkgRecvVecStarts(comm_pkg); |
301: if (send_map_start[num_sends]) |
302: int_buf_data = hypre_CTAlloc(HYPRE_Int, send_map_start[num_sends]); |
303: } |
304: |
305: |
306: index = 0; |
307: for (i=0; i < num_sends; i++) |
308: { |
309: start = send_map_start[i]; |
310: for (j = start; j < send_map_start[i+1]; j++) |
311: int_buf_data[index++] = CF_marker[send_map_elmt[j]]; |
312: } |
313: if (num_procs > 1) |
314: { |
315: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
316: CF_marker_offd); |
317: hypre_ParCSRCommHandleDestroy(comm_handle); |
318: } |
319: |
320: if (num_functions > 1) |
321: { |
322: index = 0; |
323: for (i=0; i < num_sends; i++) |
324: { |
325: start = send_map_start[i]; |
326: for (j = start; j < send_map_start[i+1]; j++) |
327: int_buf_data[index++] = dof_func[send_map_elmt[j]]; |
328: } |
329: if (num_procs > 1) |
330: { |
331: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
332: dof_func_offd); |
333: hypre_ParCSRCommHandleDestroy(comm_handle); |
334: } |
335: } |
336: |
337: n_coarse_offd = 0; |
338: n_SF_offd = 0; |
339: #ifdef HYPRE_USING_OPENMP |
340: #pragma omp parallel for private(i) reduction(+:n_coarse_offd,n_SF_offd) HYPRE_SMP_SCHEDULE |
[...] |
346: if (num_cols_offd) |
347: { |
348: assigned_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
349: map_S_to_new = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
350: fine_to_coarse_offd = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
351: new_col_map_offd = hypre_CTAlloc(HYPRE_Int, n_coarse_offd); |
[...] |
382: p_cnt = pass_array_size-1; |
383: P_diag_i[0] = 0; |
384: P_offd_i[0] = 0; |
385: for (i = 0; i < n_fine; i++) |
386: { |
387: if (CF_marker[i] == 1) |
388: { |
389: fine_to_coarse[i] = cnt; /* this C point is assigned index |
390: coarse_counter on coarse grid, |
391: and in column of P */ |
392: C_array[cnt++] = i; |
393: assigned[i] = 0; |
394: P_diag_i[i+1] = 1; /* one element in row i1 of P */ |
395: P_offd_i[i+1] = 0; |
396: } |
397: else if (CF_marker[i] == -1) |
398: { |
399: pass_array[p_cnt--] = i; |
400: P_diag_i[i+1] = 0; |
[...] |
415: for (i=0; i < num_sends; i++) |
416: { |
417: start = send_map_start[i]; |
418: for (j = start; j < send_map_start[i+1]; j++) |
419: { |
420: int_buf_data[index] = fine_to_coarse[send_map_elmt[j]]; |
421: if (int_buf_data[index] > -1) |
422: int_buf_data[index] += my_first_cpt; |
423: index++; |
424: } |
425: } |
426: if (num_procs > 1) |
427: { |
428: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
429: fine_to_coarse_offd); |
430: hypre_ParCSRCommHandleDestroy(comm_handle); |
431: } |
432: |
433: new_recv_vec_start = hypre_CTAlloc(HYPRE_Int,num_recvs+1); |
434: |
435: if (n_coarse_offd) |
436: C_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd); |
437: |
438: cnt = 0; |
439: new_recv_vec_start[0] = 0; |
440: for (j = 0; j < num_recvs; j++) |
441: { |
442: for (i = recv_vec_start[j]; i < recv_vec_start[j+1]; i++) |
443: { |
444: if (CF_marker_offd[i] == 1) |
445: { |
446: map_S_to_new[i] = cnt; |
447: C_array_offd[cnt] = i; |
448: new_col_map_offd[cnt++] = fine_to_coarse_offd[i]; |
449: assigned_offd[i] = 0; |
450: } |
451: else |
452: { |
453: assigned_offd[i] = -1; |
454: map_S_to_new[i] = -1; |
455: } |
456: } |
457: new_recv_vec_start[j+1] = cnt; |
458: } |
459: |
460: cnt = 0; |
461: hypre_TFree(fine_to_coarse_offd); |
462: |
463: if (col_offd_S_to_A) |
464: { |
465: map_A_to_S = hypre_CTAlloc(HYPRE_Int,num_cols_offd_A); |
466: for (i=0; i < num_cols_offd_A; i++) |
467: { |
468: if (cnt < num_cols_offd && col_map_offd_A[i] == col_map_offd[cnt]) |
[...] |
479: pass_pointer[0] = 0; |
480: pass_pointer[1] = 0; |
481: total_nz = n_coarse; /* accumulates total number of nonzeros in P_diag */ |
482: total_nz_offd = 0; /* accumulates total number of nonzeros in P_offd */ |
[...] |
488: for (i = pass_array_size-1; i > cnt-1; i--) |
489: { |
490: i1 = pass_array[i]; |
491: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
492: { |
493: j1 = S_diag_j[j]; |
494: if (CF_marker[j1] == 1) |
495: { |
496: P_diag_i[i1+1]++; |
497: cnt_nz++; |
498: assigned[i1] = 1; |
499: } |
500: } |
501: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
502: { |
503: j1 = S_offd_j[j]; |
504: if (CF_marker_offd[j1] == 1) |
505: { |
506: P_offd_i[i1+1]++; |
507: cnt_nz_offd++; |
508: assigned[i1] = 1; |
509: } |
510: } |
511: if (assigned[i1] == 1) |
512: { |
513: pass_array[i++] = pass_array[cnt]; |
514: pass_array[cnt++] = i1; |
515: } |
516: } |
517: |
518: pass_pointer[2] = cnt; |
[...] |
526: for (i=0; i < num_sends; i++) |
527: { |
528: start = send_map_start[i]; |
529: for (j = start; j < send_map_start[i+1]; j++) |
530: { int_buf_data[index++] = assigned[send_map_elmt[j]]; } |
531: } |
532: if (num_procs > 1) |
533: { |
534: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
535: assigned_offd); |
536: hypre_ParCSRCommHandleDestroy(comm_handle); |
[...] |
544: pass = 2; |
545: local_pass_array_size = pass_array_size - cnt; |
546: hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT, |
547: hypre_MPI_SUM, comm); |
548: while (global_pass_array_size && pass < max_num_passes) |
549: { |
550: for (i = pass_array_size-1; i > cnt-1; i--) |
551: { |
552: i1 = pass_array[i]; |
553: no_break = 1; |
554: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
555: { |
556: j1 = S_diag_j[j]; |
557: if (assigned[j1] == pass-1) |
[...] |
568: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
569: { |
570: j1 = S_offd_j[j]; |
571: if (assigned_offd[j1] == pass-1) |
[...] |
583: pass++; |
584: pass_pointer[pass] = cnt; |
585: |
586: local_pass_array_size = pass_array_size - cnt; |
587: hypre_MPI_Allreduce(&local_pass_array_size, &global_pass_array_size, 1, HYPRE_MPI_INT, |
588: hypre_MPI_SUM, comm); |
589: index = 0; |
590: for (i=0; i < num_sends; i++) |
591: { |
592: start = send_map_start[i]; |
593: for (j = start; j < send_map_start[i+1]; j++) |
594: { int_buf_data[index++] = assigned[send_map_elmt[j]]; } |
595: } |
596: if (num_procs > 1) |
597: { |
598: comm_handle = hypre_ParCSRCommHandleCreate(11, comm_pkg, int_buf_data, |
599: assigned_offd); |
600: hypre_ParCSRCommHandleDestroy(comm_handle); |
601: } |
602: } |
603: |
604: hypre_TFree(int_buf_data); |
605: |
606: num_passes = pass; |
607: |
608: P_diag_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); /* P_diag_pass[i] will contain |
609: all column numbers for points of pass i */ |
610: |
611: P_diag_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz); |
612: |
613: P_diag_start = hypre_CTAlloc(HYPRE_Int, n_fine); /* P_diag_start[i] contains |
614: pointer to begin of column numbers in P_pass for point i, |
615: P_diag_i[i+1] contains number of columns for point i */ |
616: |
617: P_offd_start = hypre_CTAlloc(HYPRE_Int, n_fine); |
618: |
619: if (num_procs > 1) |
620: { |
621: P_offd_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); |
622: |
623: if (cnt_nz_offd) |
624: P_offd_pass[1] = hypre_CTAlloc(HYPRE_Int,cnt_nz_offd); |
625: else |
626: P_offd_pass[1] = NULL; |
627: |
628: new_elmts = hypre_CTAlloc(HYPRE_Int*,num_passes); |
629: |
630: new_counter = hypre_CTAlloc(HYPRE_Int, num_passes+1); |
631: |
632: new_counter[0] = 0; |
633: new_counter[1] = n_coarse_offd; |
634: new_num_cols_offd = n_coarse_offd; |
635: |
636: new_elmts[0] = new_col_map_offd; |
[...] |
646: for (i=pass_pointer[1]; i < pass_pointer[2]; i++) |
647: { |
648: i1 = pass_array[i]; |
649: P_diag_start[i1] = cnt_nz; |
650: P_offd_start[i1] = cnt_nz_offd; |
651: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
652: { |
653: j1 = S_diag_j[j]; |
654: if (CF_marker[j1] == 1) |
655: { P_diag_pass[1][cnt_nz++] = fine_to_coarse[j1]; } |
656: } |
657: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
658: { |
659: j1 = S_offd_j[j]; |
660: if (CF_marker_offd[j1] == 1) |
661: { P_offd_pass[1][cnt_nz_offd++] = map_S_to_new[j1]; } |
662: } |
663: } |
664: |
665: |
666: total_nz += cnt_nz; |
667: total_nz_offd += cnt_nz_offd; |
668: |
669: if (num_procs > 1) |
670: { |
671: tmp_comm_pkg = hypre_CTAlloc(hypre_ParCSRCommPkg,1); |
672: Pext_send_map_start = hypre_CTAlloc(HYPRE_Int*,num_passes); |
673: Pext_recv_vec_start = hypre_CTAlloc(HYPRE_Int*,num_passes); |
674: Pext_pass = hypre_CTAlloc(HYPRE_Int*,num_passes); |
675: Pext_i = hypre_CTAlloc(HYPRE_Int, num_cols_offd+1); |
676: if (num_cols_offd) Pext_start = hypre_CTAlloc(HYPRE_Int, num_cols_offd); |
677: if (send_map_start[num_sends]) |
678: P_ncols = hypre_CTAlloc(HYPRE_Int,send_map_start[num_sends]); |
679: #ifdef HYPRE_USING_OPENMP |
680: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
681: #endif |
682: for (i=0; i < num_cols_offd+1; i++) |
683: { Pext_i[i] = 0; } |
684: #ifdef HYPRE_USING_OPENMP |
685: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
[...] |
693: for (pass=2; pass < num_passes; pass++) |
694: { |
695: |
696: if (num_procs > 1) |
697: { |
698: Pext_send_map_start[pass] = hypre_CTAlloc(HYPRE_Int, num_sends+1); |
699: Pext_recv_vec_start[pass] = hypre_CTAlloc(HYPRE_Int, num_recvs+1); |
700: Pext_send_size = 0; |
701: Pext_send_map_start[pass][0] = 0; |
702: |
703: for (i=0; i < num_sends; i++) |
704: { |
705: #ifdef HYPRE_USING_OPENMP |
706: #pragma omp parallel for private(j,j1) reduction(+:Pext_send_size) HYPRE_SMP_SCHEDULE |
[...] |
717: Pext_send_map_start[pass][i+1] = Pext_send_size; |
718: } |
719: |
720: comm_handle = hypre_ParCSRCommHandleCreate (11, comm_pkg, |
721: P_ncols, &Pext_i[1]); |
722: hypre_ParCSRCommHandleDestroy(comm_handle); |
723: |
724: if (Pext_send_size > old_Pext_send_size) |
725: { |
726: hypre_TFree(Pext_send_buffer); |
727: Pext_send_buffer = hypre_CTAlloc(HYPRE_Int, Pext_send_size); |
728: } |
729: old_Pext_send_size = Pext_send_size; |
730: } |
731: |
732: cnt_offd = 0; |
733: for (i=0; i < num_sends; i++) |
734: { |
735: for (j=send_map_start[i]; j < send_map_start[i+1]; j++) |
736: { |
737: j1 = send_map_elmt[j]; |
738: if (assigned[j1] == pass-1) |
739: { |
740: j_start = P_diag_start[j1]; |
741: j_end = j_start+P_diag_i[j1+1]; |
742: for (k=j_start; k < j_end; k++) |
743: { |
744: Pext_send_buffer[cnt_offd++] = my_first_cpt |
745: +P_diag_pass[pass-1][k]; |
746: } |
747: j_start = P_offd_start[j1]; |
748: j_end = j_start+P_offd_i[j1+1]; |
749: for (k=j_start; k < j_end; k++) |
750: { |
751: k1 = P_offd_pass[pass-1][k]; |
752: k3 = 0; |
753: while (k3 < pass-1) |
754: { |
755: if (k1 < new_counter[k3+1]) |
756: { |
757: k2 = k1-new_counter[k3]; |
758: Pext_send_buffer[cnt_offd++] = new_elmts[k3][k2]; |
[...] |
768: if (num_procs > 1) |
769: { |
770: Pext_recv_size = 0; |
771: Pext_recv_vec_start[pass][0] = 0; |
772: cnt_offd = 0; |
773: for (i=0; i < num_recvs; i++) |
774: { |
775: for (j=recv_vec_start[i]; j<recv_vec_start[i+1]; j++) |
776: { |
777: if (assigned_offd[j] == pass-1) |
778: { |
779: Pext_start[j] = cnt_offd; |
780: cnt_offd += Pext_i[j+1]; |
781: } |
782: } |
783: Pext_recv_size = cnt_offd; |
784: Pext_recv_vec_start[pass][i+1] = Pext_recv_size; |
785: } |
786: |
787: hypre_ParCSRCommPkgComm(tmp_comm_pkg) = comm; |
788: hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends; |
789: hypre_ParCSRCommPkgSendProcs(tmp_comm_pkg) = send_procs; |
790: hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) = |
791: Pext_send_map_start[pass]; |
792: hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs; |
793: hypre_ParCSRCommPkgRecvProcs(tmp_comm_pkg) = recv_procs; |
794: hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) = |
795: Pext_recv_vec_start[pass]; |
796: |
797: if (Pext_recv_size) |
798: { |
799: Pext_pass[pass] = hypre_CTAlloc(HYPRE_Int, Pext_recv_size); |
800: new_elmts[pass-1] = hypre_CTAlloc(HYPRE_Int,Pext_recv_size); |
801: } |
802: else |
803: { |
804: Pext_pass[pass] = NULL; |
805: new_elmts[pass-1] = NULL; |
806: } |
807: |
808: comm_handle = hypre_ParCSRCommHandleCreate (11, tmp_comm_pkg, |
809: Pext_send_buffer, Pext_pass[pass]); |
810: hypre_ParCSRCommHandleDestroy(comm_handle); |
811: |
812: if (Pext_recv_size > old_Pext_recv_size) |
813: { |
814: hypre_TFree(loc); |
815: loc = hypre_CTAlloc(HYPRE_Int,Pext_recv_size); |
[...] |
823: for (i=0; i < num_recvs; i++) |
824: { |
825: for (j=recv_vec_start[i]; j < recv_vec_start[i+1]; j++) |
826: { |
827: if (assigned_offd[j] == pass-1) |
828: { |
829: for (j1 = cnt_offd; j1 < cnt_offd+Pext_i[j+1]; j1++) |
830: { |
831: k1 = Pext_pass[pass][j1]; |
832: k2 = k1 - my_first_cpt; |
833: if (k2 > -1 && k2 < n_coarse) |
834: { Pext_pass[pass][j1] = -k2-1; } |
835: else |
836: { |
837: not_found = 1; |
838: k3 = 0; |
839: while (k3 < pass-1 && not_found) |
840: { |
841: k2 = hypre_BinarySearch(new_elmts[k3], k1, |
842: (new_counter[k3+1]-new_counter[k3])); |
843: if (k2 > -1) |
844: { |
845: Pext_pass[pass][j1] = k2 + new_counter[k3]; |
[...] |
855: new_elmts[pass-1][cnt_new] = Pext_pass[pass][j1]; |
856: loc[cnt_new++] = j1; |
[...] |
865: if (cnt_new) |
866: { |
867: hypre_qsort2i(new_elmts[pass-1],loc,0,cnt_new-1); |
868: cnt = 0; |
869: local_index = new_counter[pass-1]; |
870: Pext_pass[pass][loc[0]] = local_index; |
871: |
872: for (i=1; i < cnt_new; i++) |
873: { |
874: if (new_elmts[pass-1][i] > new_elmts[pass-1][cnt]) |
875: { |
876: new_elmts[pass-1][++cnt] = new_elmts[pass-1][i]; |
877: local_index++; |
878: } |
879: Pext_pass[pass][loc[i]] = local_index; |
880: } |
881: new_counter[pass] = local_index+1; |
882: } |
883: else if (num_procs > 1) |
884: new_counter[pass] = new_counter[pass-1]; |
885: |
886: if (new_num_cols_offd < local_index+1) |
887: { new_num_cols_offd = local_index+1; } |
888: |
889: pass_length = pass_pointer[pass+1] - pass_pointer[pass]; |
890: #ifdef HYPRE_USING_OPENMP |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
1140: hypre_TFree(loc); |
1141: hypre_TFree(P_ncols); |
1142: hypre_TFree(Pext_send_buffer); |
1143: hypre_TFree(new_recv_vec_start); |
1144: hypre_TFree(cnt_nz_per_thread); |
1145: hypre_TFree(cnt_nz_offd_per_thread); |
1146: hypre_TFree(max_num_threads); |
1147: |
1148: P_diag_j = hypre_CTAlloc(HYPRE_Int,total_nz); |
1149: P_diag_data = hypre_CTAlloc(HYPRE_Real,total_nz); |
1150: |
1151: |
1152: if (total_nz_offd) |
1153: { |
1154: P_offd_j = hypre_CTAlloc(HYPRE_Int,total_nz_offd); |
1155: P_offd_data = hypre_CTAlloc(HYPRE_Real,total_nz_offd); |
1156: } |
1157: |
1158: for (i=0; i < n_fine; i++) |
1159: { |
1160: P_diag_i[i+1] += P_diag_i[i]; |
1161: P_offd_i[i+1] += P_offd_i[i]; |
[...] |
1167: #pragma omp parallel for private(i,i1) HYPRE_SMP_SCHEDULE |
[...] |
1177: if (weight_option) /*if this is set, weights are separated into |
[...] |
1184: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_pos,sum_C_neg,sum_N_pos,sum_N_neg,j_start,j_end,j,k1,cnt,j1,cnt_offd,diagonal,alfa,beta) |
[...] |
1304: if (n_coarse) hypre_TFree(C_array); |
1305: hypre_TFree(C_array_offd); |
1306: hypre_TFree(P_diag_pass[1]); |
1307: if (num_procs > 1) hypre_TFree(P_offd_pass[1]); |
1308: |
1309: |
1310: for (pass = 2; pass < num_passes; pass++) |
1311: { |
1312: |
1313: if (num_procs > 1) |
1314: { |
1315: Pext_send_size = Pext_send_map_start[pass][num_sends]; |
1316: if (Pext_send_size > old_Pext_send_size) |
1317: { |
1318: hypre_TFree(Pext_send_data); |
1319: Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size); |
1320: } |
1321: old_Pext_send_size = Pext_send_size; |
1322: |
1323: cnt_offd = 0; |
1324: for (i=0; i < num_sends; i++) |
1325: { |
1326: for (j=send_map_start[i]; j < send_map_start[i+1]; j++) |
1327: { |
1328: j1 = send_map_elmt[j]; |
1329: if (assigned[j1] == pass-1) |
1330: { |
1331: j_start = P_diag_i[j1]; |
1332: j_end = P_diag_i[j1+1]; |
1333: for (k=j_start; k < j_end; k++) |
1334: { Pext_send_data[cnt_offd++] = P_diag_data[k]; } |
1335: j_start = P_offd_i[j1]; |
1336: j_end = P_offd_i[j1+1]; |
1337: for (k=j_start; k < j_end; k++) |
1338: { Pext_send_data[cnt_offd++] = P_offd_data[k]; } |
1339: } |
1340: } |
1341: } |
1342: |
1343: hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends; |
1344: hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) = |
1345: Pext_send_map_start[pass]; |
1346: hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs; |
1347: hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) = |
1348: Pext_recv_vec_start[pass]; |
1349: |
1350: Pext_recv_size = Pext_recv_vec_start[pass][num_recvs]; |
1351: |
1352: if (Pext_recv_size > old_Pext_recv_size) |
1353: { |
1354: hypre_TFree(Pext_data); |
1355: Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size); |
1356: } |
1357: old_Pext_recv_size = Pext_recv_size; |
1358: |
1359: comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg, |
1360: Pext_send_data, Pext_data); |
1361: hypre_ParCSRCommHandleDestroy(comm_handle); |
1362: |
1363: hypre_TFree(Pext_send_map_start[pass]); |
1364: hypre_TFree(Pext_recv_vec_start[pass]); |
1365: } |
1366: |
1367: pass_length = pass_pointer[pass+1]-pass_pointer[pass]; |
1368: #ifdef HYPRE_USING_OPENMP |
1369: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,P_marker,P_marker_offd,i,i1,sum_C_neg,sum_C_pos,sum_N_neg,sum_N_pos,j_start,j_end,cnt,j,k1,cnt_offd,j1,k,alfa,beta,diagonal,C_array,C_array_offd) |
[...] |
1562: hypre_TFree(P_diag_pass[pass]); |
1563: if (num_procs > 1) |
1564: { |
1565: hypre_TFree(P_offd_pass[pass]); |
1566: hypre_TFree(Pext_pass[pass]); |
[...] |
1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa) |
[...] |
1669: if (n_coarse) hypre_TFree(C_array); |
1670: hypre_TFree(C_array_offd); |
1671: hypre_TFree(P_diag_pass[1]); |
1672: if (num_procs > 1) hypre_TFree(P_offd_pass[1]); |
1673: |
1674: for (pass = 2; pass < num_passes; pass++) |
1675: { |
1676: |
1677: if (num_procs > 1) |
1678: { |
1679: Pext_send_size = Pext_send_map_start[pass][num_sends]; |
1680: if (Pext_send_size > old_Pext_send_size) |
1681: { |
1682: hypre_TFree(Pext_send_data); |
1683: Pext_send_data = hypre_CTAlloc(HYPRE_Real, Pext_send_size); |
1684: } |
1685: old_Pext_send_size = Pext_send_size; |
1686: |
1687: cnt_offd = 0; |
1688: for (i=0; i < num_sends; i++) |
1689: { |
1690: for (j=send_map_start[i]; j < send_map_start[i+1]; j++) |
1691: { |
1692: j1 = send_map_elmt[j]; |
1693: if (assigned[j1] == pass-1) |
1694: { |
1695: j_start = P_diag_i[j1]; |
1696: j_end = P_diag_i[j1+1]; |
1697: for (k=j_start; k < j_end; k++) |
1698: { |
1699: Pext_send_data[cnt_offd++] = P_diag_data[k]; |
1700: } |
1701: j_start = P_offd_i[j1]; |
1702: j_end = P_offd_i[j1+1]; |
1703: for (k=j_start; k < j_end; k++) |
1704: { |
1705: Pext_send_data[cnt_offd++] = P_offd_data[k]; |
[...] |
1711: hypre_ParCSRCommPkgNumSends(tmp_comm_pkg) = num_sends; |
1712: hypre_ParCSRCommPkgSendMapStarts(tmp_comm_pkg) = |
1713: Pext_send_map_start[pass]; |
1714: hypre_ParCSRCommPkgNumRecvs(tmp_comm_pkg) = num_recvs; |
1715: hypre_ParCSRCommPkgRecvVecStarts(tmp_comm_pkg) = |
1716: Pext_recv_vec_start[pass]; |
1717: |
1718: Pext_recv_size = Pext_recv_vec_start[pass][num_recvs]; |
1719: |
1720: if (Pext_recv_size > old_Pext_recv_size) |
1721: { |
1722: hypre_TFree(Pext_data); |
1723: Pext_data = hypre_CTAlloc(HYPRE_Real, Pext_recv_size); |
1724: } |
1725: old_Pext_recv_size = Pext_recv_size; |
1726: |
1727: comm_handle = hypre_ParCSRCommHandleCreate (1, tmp_comm_pkg, |
1728: Pext_send_data, Pext_data); |
1729: hypre_ParCSRCommHandleDestroy(comm_handle); |
1730: |
1731: hypre_TFree(Pext_send_map_start[pass]); |
1732: hypre_TFree(Pext_recv_vec_start[pass]); |
1733: } |
1734: |
1735: pass_length = pass_pointer[pass+1]-pass_pointer[pass]; |
1736: #ifdef HYPRE_USING_OPENMP |
1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd) |
[...] |
1884: hypre_TFree(P_diag_pass[pass]); |
1885: if (num_procs > 1) |
1886: { |
1887: hypre_TFree(P_offd_pass[pass]); |
1888: hypre_TFree(Pext_pass[pass]); |
1889: } |
1890: } |
1891: } |
1892: |
1893: hypre_TFree(CF_marker_offd); |
1894: hypre_TFree(Pext_send_map_start); |
1895: hypre_TFree(Pext_recv_vec_start); |
1896: hypre_TFree(dof_func_offd); |
1897: hypre_TFree(Pext_send_data); |
1898: hypre_TFree(Pext_data); |
1899: hypre_TFree(P_diag_pass); |
1900: hypre_TFree(P_offd_pass); |
1901: hypre_TFree(Pext_pass); |
1902: hypre_TFree(P_diag_start); |
1903: hypre_TFree(P_offd_start); |
1904: hypre_TFree(Pext_start); |
1905: hypre_TFree(Pext_i); |
1906: hypre_TFree(fine_to_coarse); |
1907: hypre_TFree(assigned); |
1908: hypre_TFree(assigned_offd); |
1909: hypre_TFree(pass_pointer); |
1910: hypre_TFree(pass_array); |
1911: hypre_TFree(map_S_to_new); |
1912: hypre_TFree(map_A_to_S); |
1913: if (num_procs > 1) hypre_TFree(tmp_comm_pkg); |
1914: |
1915: P = hypre_ParCSRMatrixCreate(comm, |
1916: hypre_ParCSRMatrixGlobalNumRows(A), |
1917: total_global_cpts, |
1918: hypre_ParCSRMatrixColStarts(A), |
1919: num_cpts_global, |
1920: 0, |
1921: P_diag_i[n_fine], |
1922: P_offd_i[n_fine]); |
1923: P_diag = hypre_ParCSRMatrixDiag(P); |
1924: hypre_CSRMatrixData(P_diag) = P_diag_data; |
1925: hypre_CSRMatrixI(P_diag) = P_diag_i; |
1926: hypre_CSRMatrixJ(P_diag) = P_diag_j; |
1927: P_offd = hypre_ParCSRMatrixOffd(P); |
1928: hypre_CSRMatrixData(P_offd) = P_offd_data; |
1929: hypre_CSRMatrixI(P_offd) = P_offd_i; |
1930: hypre_CSRMatrixJ(P_offd) = P_offd_j; |
1931: hypre_ParCSRMatrixOwnsRowStarts(P) = 0; |
1932: |
1933: /* Compress P, removing coefficients smaller than trunc_factor * Max |
1934: and/or keep yat most <P_max_elmts> per row absolutely maximal coefficients */ |
1935: |
1936: if (trunc_factor != 0.0 || P_max_elmts != 0) |
1937: { |
1938: hypre_BoomerAMGInterpTruncation(P, trunc_factor, P_max_elmts); |
1939: P_diag_data = hypre_CSRMatrixData(P_diag); |
1940: P_diag_i = hypre_CSRMatrixI(P_diag); |
1941: P_diag_j = hypre_CSRMatrixJ(P_diag); |
1942: P_offd_data = hypre_CSRMatrixData(P_offd); |
1943: P_offd_i = hypre_CSRMatrixI(P_offd); |
1944: P_offd_j = hypre_CSRMatrixJ(P_offd); |
1945: } |
1946: P_offd_size = P_offd_i[n_fine]; |
1947: |
1948: num_cols_offd_P = 0; |
1949: if (P_offd_size) |
1950: { |
1951: if (new_num_cols_offd > num_cols_offd) |
1952: { P_marker_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); } |
1953: else |
1954: { P_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1955: #ifdef HYPRE_USING_OPENMP |
1956: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
1957: #endif |
1958: for (i=0; i < new_num_cols_offd; i++) |
1959: { P_marker_offd[i] = 0; } |
1960: |
1961: num_cols_offd_P = 0; |
1962: for (i=0; i < P_offd_size; i++) |
1963: { |
1964: index = P_offd_j[i]; |
1965: if (!P_marker_offd[index]) |
1966: { |
1967: num_cols_offd_P++; |
1968: P_marker_offd[index] = 1; |
1969: } |
1970: } |
1971: |
1972: col_map_offd_P = hypre_CTAlloc(HYPRE_Int,num_cols_offd_P); |
1973: permute = hypre_CTAlloc(HYPRE_Int, new_counter[num_passes-1]); |
1974: |
1975: #ifdef HYPRE_USING_OPENMP |
1976: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
[...] |
1982: for (i=0; i < num_passes-1; i++) |
1983: { |
1984: for (j=new_counter[i]; j < new_counter[i+1]; j++) |
1985: { |
1986: if (P_marker_offd[j]) |
1987: { |
1988: col_map_offd_P[cnt] = new_elmts[i][j-new_counter[i]]; |
1989: permute[j] = col_map_offd_P[cnt++]; |
1990: } |
1991: } |
1992: } |
1993: |
1994: hypre_qsort0(col_map_offd_P,0,num_cols_offd_P-1); |
1995: |
1996: #ifdef HYPRE_USING_OPENMP |
1997: #pragma omp parallel for private(i,k1) HYPRE_SMP_SCHEDULE |
[...] |
2007: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
2008: #endif |
2009: for (i=0; i < P_offd_size; i++) |
2010: { P_offd_j[i] = permute[P_offd_j[i]]; } |
2011: |
2012: hypre_TFree(P_marker_offd); |
2013: } |
2014: if (num_procs > 1) |
2015: { |
2016: for (i=0; i < num_passes-1; i++) |
2017: hypre_TFree(new_elmts[i]); |
2018: } |
2019: hypre_TFree(permute); |
2020: hypre_TFree(new_elmts); |
2021: hypre_TFree(new_counter); |
2022: |
2023: if (num_cols_offd_P) |
2024: { |
2025: hypre_ParCSRMatrixColMapOffd(P) = col_map_offd_P; |
2026: hypre_CSRMatrixNumCols(P_offd) = num_cols_offd_P; |
2027: } |
2028: |
2029: if (n_SF) |
2030: { |
2031: #ifdef HYPRE_USING_OPENMP |
2032: #pragma omp parallel for private(i) HYPRE_SMP_SCHEDULE |
[...] |
2038: if (num_procs > 1) |
2039: { |
2040: hypre_MatvecCommPkgCreate(P); |
2041: } |
2042: |
2043: *P_ptr = P; |
[...] |
2060: return(0); |
0x432060 STR D8, [SP, #400]! |
0x432064 STP X29, X30, [SP, #16] |
0x432068 STP X28, X27, [SP, #32] |
0x43206c STP X26, X25, [SP, #48] |
0x432070 STP X24, X23, [SP, #64] |
0x432074 STP X22, X21, [SP, #80] |
0x432078 STP X20, X19, [SP, #96] |
0x43207c ADD X29, SP, #16 |
0x432080 SUB SP, SP, #1008 |
0x432084 LDP X22, X23, [X0, #56] |
0x432088 STUR X1, [X29, #504] |
0x43208c STP X5, X4, [X29, #984] |
0x432090 LDR X10, [X0] |
0x432094 MOVZ W1, #8 |
0x432098 FMOV D8, D0 |
0x43209c LDR X24, [X0, #88] |
0x4320a0 LDR X26, [X2, #88] |
0x4320a4 STP X7, X0, [SP, #304] |
0x4320a8 MOVZ W0, #1 |
0x4320ac STR X3, [SP, #320] |
0x4320b0 LDR X8, [X22, #48] |
0x4320b4 LDR X21, [X23, #24] |
0x4320b8 STUR X8, [X29, #464] |
0x4320bc LDP X8, X9, [X22] |
0x4320c0 STP XZR, X9, [X29, #952] |
0x4320c4 STUR X8, [X29, #456] |
0x4320c8 LDR X8, [X23] |
0x4320cc STP XZR, X8, [X29, #936] |
0x4320d0 LDP X8, X25, [X2, #56] |
0x4320d4 LDP X9, X8, [X8] |
0x4320d8 LDR X28, [X25, #24] |
0x4320dc STP X8, X9, [X29, #920] |
0x4320e0 LDR X9, [X2, #112] |
0x4320e4 LDR X8, [X25] |
0x4320e8 STUR XZR, [X29, #392] |
0x4320ec STUR XZR, [X29, #352] |
0x4320f0 STP XZR, XZR, [X29, #840] |
0x4320f4 STP XZR, XZR, [X29, #808] |
0x4320f8 STP XZR, XZR, [X29, #792] |
0x4320fc STUR XZR, [X29, #272] |
0x432100 STUR XZR, [X29, #256] |
0x432104 STR XZR, [SP, #760] |
0x432108 STR XZR, [SP, #752] |
0x43210c STR XZR, [SP, #736] |
0x432110 STR XZR, [SP, #720] |
0x432114 STR XZR, [SP, #712] |
0x432118 STR XZR, [SP, #704] |
0x43211c STR XZR, [SP, #696] |
0x432120 STR XZR, [SP, #688] |
0x432124 STR XZR, [SP, #680] |
0x432128 STR XZR, [SP, #672] |
0x43212c STR XZR, [SP, #664] |
0x432130 STR XZR, [SP, #624] |
0x432134 STR XZR, [SP, #616] |
0x432138 STR XZR, [SP, #608] |
0x43213c STR XZR, [SP, #600] |
0x432140 STR XZR, [SP, #592] |
0x432144 STR XZR, [SP, #584] |
0x432148 STR XZR, [SP, #576] |
0x43214c STR XZR, [SP, #568] |
0x432150 STR XZR, [SP, #480] |
0x432154 STP X9, X10, [SP, #376] |
0x432158 STUR X8, [X29, #400] |
0x43215c MOVN X8, #0 |
0x432160 STP X8, XZR, [SP, #488] |
0x432164 BL 4b2370 |
0x432168 ORR X19, XZR, X0 |
0x43216c STR X0, [SP, #456] |
0x432170 BL 4b44e0 |
0x432174 MOVZ W1, #8 |
0x432178 STR X0, [X19] |
0x43217c BL 4b2370 |
0x432180 STR X0, [SP, #448] |
0x432184 ORR X20, XZR, X0 |
0x432188 MOVZ W1, #8 |
0x43218c LDR X0, [X19] |
0x432190 BL 4b2370 |
0x432194 STR X0, [SP, #440] |
0x432198 STR XZR, [SP, #560] |
0x43219c LDR X8, [X19] |
0x4321a0 CMP X8, #1 |
0x4321a4 B.LT 4321d0 |
0x4321a8 ORR X8, XZR, XZR |
(1730) 0x4321ac STR XZR, [X0, X8,LSL #3] |
(1730) 0x4321b0 LDR X8, [SP, #560] |
(1730) 0x4321b4 STR XZR, [X20, X8,LSL #3] |
(1730) 0x4321b8 LDR X8, [SP, #560] |
(1730) 0x4321bc ADD X8, X8, #1 |
(1730) 0x4321c0 STR X8, [SP, #560] |
(1730) 0x4321c4 LDR X9, [X19] |
(1730) 0x4321c8 CMP X8, X9 |
(1730) 0x4321cc B.LT 4321ac |
0x4321d0 LDR X19, [SP, #384] |
0x4321d4 ADD X1, SP, #528 |
0x4321d8 ORR X0, XZR, X19 |
0x4321dc BL 4b3970 |
0x4321e0 ORR X0, XZR, X19 |
0x4321e4 ADD X1, SP, #536 |
0x4321e8 BL 4b39a0 |
0x4321ec LDR X9, [SP, #528] |
0x4321f0 LDR X8, [SP, #536] |
0x4321f4 SUB X3, X9, #1 |
0x4321f8 CMP X8, X3 |
0x4321fc B.NE 43220c |
0x432200 LDR X8, [SP, #320] |
0x432204 LDR X8, [X8, #8] |
0x432208 STR X8, [SP, #520] |
0x43220c LDR X8, [SP, #320] |
0x432210 ADRP X2, |
0x432214 ADD X0, SP, #520 |
0x432218 MOVZ W1, #1 |
0x43221c LDR X27, [X8] |
0x432220 LDR X2, [X2, #4008] |
0x432224 LDR X4, [SP, #384] |
0x432228 BL 4b3f70 |
0x43222c LDR X8, [SP, #376] |
0x432230 CBZ X8, 432304 |
0x432234 LDR X8, [X29, #104] |
0x432238 CMP X8, #0 |
0x43223c CSEL X8, X21, X28, #0 |
0x432240 CSEL X20, X24, X26, #0 |
0x432244 STUR X8, [X29, #384] |
0x432248 CBZ X21, 43225c |
0x43224c LDR X9, [X23, #48] |
0x432250 STUR X9, [X29, #440] |
0x432254 LDR X9, [X23, #8] |
0x432258 STUR X9, [X29, #424] |
0x43225c CBZ X8, 432268 |
0x432260 LDR X8, [X25, #8] |
0x432264 STUR X8, [X29, #392] |
0x432268 LDR X0, [X22, #16] |
0x43226c STR X0, [SP, #632] |
0x432270 CBZ X0, 432280 |
0x432274 MOVZ W1, #8 |
0x432278 BL 4b2370 |
0x43227c STR X0, [SP, #592] |
0x432280 ADRP X0, |
0x432284 ADD X0, X0, #176 |
0x432288 ADRP X2, 434288 |
0x43228c ADD X2, X2, #3536 |
0x432290 STR XZR, [SP, #624] |
0x432294 STR XZR, [SP, #608] |
0x432298 ADD X3, SP, #632 |
0x43229c SUB X4, X29, #8 |
0x4322a0 ADD X5, SP, #624 |
0x4322a4 ADD X6, SP, #608 |
0x4322a8 MOVZ W1, #4 |
0x4322ac BL 40f460 |
0x4322b0 LDR X9, [SP, #624] |
0x4322b4 LDR X10, [SP, #608] |
0x4322b8 LDR X8, [SP, #632] |
0x4322bc ADD X9, X10, X9 |
0x4322c0 SUBS X28, X8, X9 |
0x4322c4 B.EQ 4322d8 |
0x4322c8 ORR X0, XZR, X28 |
0x4322cc MOVZ W1, #8 |
0x4322d0 BL 4b2370 |
0x4322d4 STR X0, [SP, #760] |
0x4322d8 MOVZ W0, #11 |
0x4322dc MOVZ W1, #8 |
0x4322e0 BL 4b2370 |
0x4322e4 STR X0, [SP, #752] |
0x4322e8 LDR X0, [SP, #632] |
0x4322ec CBZ X0, 432348 |
0x4322f0 MOVZ W1, #8 |
0x4322f4 BL 4b2370 |
0x4322f8 LDR X8, [SP, #632] |
0x4322fc STR X0, [SP, #584] |
0x432300 B 43234c |
0x432304 LDR X8, [SP, #312] |
0x432308 LDR X8, [X8, #112] |
0x43230c STR X8, [SP, #376] |
0x432310 CBNZ X8, 432328 |
0x432314 LDR X19, [SP, #312] |
0x432318 ORR X0, XZR, X19 |
0x43231c BL 48a2f0 |
0x432320 LDR X8, [X19, #112] |
0x432324 STR X8, [SP, #376] |
0x432328 ORR X8, XZR, XZR |
0x43232c STR XZR, [X29, #104] |
0x432330 CMP X8, #0 |
0x432334 CSEL X8, X21, X28, #0 |
0x432338 CSEL X20, X24, X26, #0 |
0x43233c STUR X8, [X29, #384] |
0x432340 CBNZ X21, 43224c |
0x432344 B 43225c |
0x432348 ORR X8, XZR, XZR |
0x43234c ADD X0, X8, #1 |
0x432350 MOVZ W1, #8 |
0x432354 BL 4b2370 |
0x432358 LDR X8, [SP, #632] |
0x43235c STUR X0, [X29, #368] |
0x432360 MOVZ W1, #8 |
0x432364 ADD X0, X8, #1 |
0x432368 BL 4b2370 |
0x43236c STUR X0, [X29, #344] |
0x432370 LDR X0, [SP, #624] |
0x432374 CBZ X0, 432384 |
0x432378 MOVZ W1, #8 |
0x43237c BL 4b2370 |
0x432380 STUR X0, [X29, #264] |
0x432384 LDUR X0, [X29, #384] |
0x432388 CBZ X0, 4323b4 |
0x43238c MOVZ W1, #8 |
0x432390 BL 4b2370 |
0x432394 LDUR X8, [X29, #480] |
0x432398 STUR X0, [X29, #288] |
0x43239c CMP X8, #2 |
0x4323a0 B.LT 4323b4 |
0x4323a4 LDUR X0, [X29, #384] |
0x4323a8 MOVZ W1, #8 |
0x4323ac BL 4b2370 |
0x4323b0 STUR X0, [X29, #280] |
0x4323b4 LDR X8, [SP, #528] |
0x4323b8 CMP X8, #1 |
0x4323bc B.LE 432410 |
0x4323c0 LDR X11, [SP, #376] |
0x4323c4 LDP X8, X9, [X11, #8] |
0x4323c8 STR X9, [SP, #336] |
0x4323cc LDP X9, X10, [X11, #24] |
0x4323d0 STUR X10, [X29, #312] |
0x4323d4 LDR X10, [X11, #40] |
0x4323d8 STP X9, X8, [X29, #832] |
0x4323dc LDR X0, [X9, X8,LSL #3] |
0x4323e0 STR X10, [SP, #416] |
0x4323e4 LDP X10, X19, [X11, #48] |
0x4323e8 STR X10, [SP, #328] |
0x4323ec CBZ X0, 43242c |
0x4323f0 MOVZ W1, #8 |
0x4323f4 BL 4b2370 |
0x4323f8 ORR X25, XZR, X0 |
0x4323fc LDUR X13, [X29, #328] |
0x432400 STR XZR, [SP, #560] |
0x432404 CMP X13, #1 |
0x432408 B.GE 432440 |
0x43240c B 4324b0 |
0x432410 STR XZR, [SP, #416] |
0x432414 ORR X25, XZR, XZR |
0x432418 LDUR X13, [X29, #328] |
0x43241c STR XZR, [SP, #560] |
0x432420 CMP X13, #1 |
0x432424 B.GE 432440 |
0x432428 B 4324b0 |
0x43242c ORR X25, XZR, XZR |
0x432430 LDUR X13, [X29, #328] |
0x432434 STR XZR, [SP, #560] |
0x432438 CMP X13, #1 |
0x43243c B.LT 4324b0 |
0x432440 LDP X11, X8, [X29, #824] |
0x432444 LDUR X9, [X29, #504] |
0x432448 ORR X10, XZR, XZR |
0x43244c ORR X12, XZR, XZR |
0x432450 B 43246c |
0x432454 HINT #0 |
0x432458 HINT #0 |
0x43245c HINT #0 |
(1728) 0x432460 CMP X12, X13 |
(1728) 0x432464 STR X12, [SP, #560] |
(1728) 0x432468 B.GE 4324b0 |
(1728) 0x43246c LDR X14, [X8, X12,LSL #3] |
(1728) 0x432470 ADD X12, X12, #1 |
(1728) 0x432474 LDR X15, [X8, X12,LSL #3] |
(1728) 0x432478 CMP X14, X15 |
(1728) 0x43247c B.GE 432460 |
(1729) 0x432480 LDR X12, [X11, X14,LSL #3] |
(1729) 0x432484 ADD X14, X14, #1 |
(1729) 0x432488 LDR X12, [X9, X12,LSL #3] |
(1729) 0x43248c STR X12, [X25, X10,LSL #3] |
(1729) 0x432490 ADD X10, X10, #1 |
(1729) 0x432494 LDR X12, [SP, #560] |
(1729) 0x432498 ADD X12, X12, #1 |
(1729) 0x43249c LDR X13, [X8, X12,LSL #3] |
(1729) 0x4324a0 CMP X14, X13 |
(1729) 0x4324a4 B.LT 432480 |
(1728) 0x4324a8 LDUR X13, [X29, #328] |
(1728) 0x4324ac B 432460 |
0x4324b0 LDR X8, [SP, #528] |
0x4324b4 CMP X8, #1 |
0x4324b8 B.LE 4324d4 |
0x4324bc LDUR X3, [X29, #288] |
0x4324c0 LDR X1, [SP, #376] |
0x4324c4 ORR X2, XZR, X25 |
0x4324c8 MOVZ W0, #11 |
0x4324cc BL 4896c0 |
0x4324d0 BL 489aa0 |
0x4324d4 LDUR X8, [X29, #480] |
0x4324d8 CMP X8, #2 |
0x4324dc B.LT 432578 |
0x4324e0 LDUR X13, [X29, #328] |
0x4324e4 STR XZR, [SP, #560] |
0x4324e8 CMP X13, #1 |
0x4324ec B.LT 432554 |
0x4324f0 LDP X11, X8, [X29, #824] |
0x4324f4 LDUR X9, [X29, #472] |
0x4324f8 ORR X10, XZR, XZR |
0x4324fc ORR X12, XZR, XZR |
0x432500 B 432510 |
(1726) 0x432504 CMP X12, X13 |
(1726) 0x432508 STR X12, [SP, #560] |
(1726) 0x43250c B.GE 432554 |
(1726) 0x432510 LDR X14, [X8, X12,LSL #3] |
(1726) 0x432514 ADD X12, X12, #1 |
(1726) 0x432518 LDR X15, [X8, X12,LSL #3] |
(1726) 0x43251c CMP X14, X15 |
(1726) 0x432520 B.GE 432504 |
(1727) 0x432524 LDR X12, [X11, X14,LSL #3] |
(1727) 0x432528 ADD X14, X14, #1 |
(1727) 0x43252c LDR X12, [X9, X12,LSL #3] |
(1727) 0x432530 STR X12, [X25, X10,LSL #3] |
(1727) 0x432534 ADD X10, X10, #1 |
(1727) 0x432538 LDR X12, [SP, #560] |
(1727) 0x43253c ADD X12, X12, #1 |
(1727) 0x432540 LDR X13, [X8, X12,LSL #3] |
(1727) 0x432544 CMP X14, X13 |
(1727) 0x432548 B.LT 432524 |
(1726) 0x43254c LDUR X13, [X29, #328] |
(1726) 0x432550 B 432504 |
0x432554 LDR X8, [SP, #528] |
0x432558 CMP X8, #1 |
0x43255c B.LE 432578 |
0x432560 LDUR X3, [X29, #280] |
0x432564 LDR X1, [SP, #376] |
0x432568 ORR X2, XZR, X25 |
0x43256c MOVZ W0, #11 |
0x432570 BL 4896c0 |
0x432574 BL 489aa0 |
0x432578 ADRP X0, |
0x43257c ADD X0, X0, #272 |
0x432580 ADRP X2, 434580 |
0x432584 ADD X2, X2, #4048 |
0x432588 STR X19, [SP, #424] |
0x43258c STR XZR, [SP, #616] |
0x432590 STR XZR, [SP, #600] |
0x432594 SUB X3, X29, #128 |
0x432598 SUB X4, X29, #224 |
0x43259c ADD X5, SP, #616 |
0x4325a0 ADD X6, SP, #600 |
0x4325a4 MOVZ W1, #4 |
0x4325a8 BL 40f460 |
0x4325ac LDUR X0, [X29, #384] |
0x4325b0 CBZ X0, 4325f4 |
0x4325b4 MOVZ W1, #8 |
0x4325b8 BL 4b2370 |
0x4325bc STR X0, [SP, #576] |
0x4325c0 LDUR X0, [X29, #384] |
0x4325c4 MOVZ W1, #8 |
0x4325c8 BL 4b2370 |
0x4325cc STR X0, [SP, #688] |
0x4325d0 LDUR X0, [X29, #384] |
0x4325d4 MOVZ W1, #8 |
0x4325d8 BL 4b2370 |
0x4325dc ORR X19, XZR, X0 |
0x4325e0 LDR X0, [SP, #616] |
0x4325e4 MOVZ W1, #8 |
0x4325e8 BL 4b2370 |
0x4325ec ORR X26, XZR, X0 |
0x4325f0 B 4325fc |
0x4325f4 ORR X19, XZR, XZR |
0x4325f8 ORR X26, XZR, XZR |
0x4325fc LDUR X12, [X29, #368] |
0x432600 SUB X23, X28, #1 |
0x432604 STR XZR, [X12] |
0x432608 LDUR X13, [X29, #344] |
0x43260c STR XZR, [X13] |
0x432610 STR XZR, [SP, #560] |
0x432614 LDR X8, [SP, #632] |
0x432618 CMP X8, #1 |
0x43261c B.LT 4326f4 |
0x432620 LDUR X8, [X29, #504] |
0x432624 LDR X9, [SP, #760] |
0x432628 LDR X10, [SP, #584] |
0x43262c ORR X11, XZR, XZR |
0x432630 ORR X0, XZR, XZR |
0x432634 ORR X18, XZR, X23 |
0x432638 LDR X15, [SP, #592] |
0x43263c LDUR X17, [X29, #264] |
0x432640 ADD X12, X12, #8 |
0x432644 ADD X13, X13, #8 |
0x432648 MOVN X14, #0 |
0x43264c MOVZ W16, #1 |
0x432650 B 4326a0 |
0x432654 HINT #0 |
0x432658 HINT #0 |
0x43265c HINT #0 |
(1723) 0x432660 STR X0, [X9, X18,LSL #3] |
(1723) 0x432664 SUB X18, X18, #1 |
(1723) 0x432668 LDR X0, [SP, #560] |
(1724) 0x43266c STR XZR, [X12, X0,LSL #3] |
(1724) 0x432670 LDR X0, [SP, #560] |
(1724) 0x432674 STR XZR, [X13, X0,LSL #3] |
(1724) 0x432678 LDR X0, [SP, #560] |
(1724) 0x43267c STR X14, [X10, X0,LSL #3] |
(1724) 0x432680 LDR X0, [SP, #560] |
(1724) 0x432684 STR X14, [X15, X0,LSL #3] |
(1724) 0x432688 LDR X0, [SP, #560] |
(1724) 0x43268c LDR X1, [SP, #632] |
(1724) 0x432690 ADD X0, X0, #1 |
(1724) 0x432694 CMP X0, X1 |
(1724) 0x432698 STR X0, [SP, #560] |
(1724) 0x43269c B.GE 4326f4 |
(1725) 0x4326a0 LDR X1, [X8, X0,LSL #3] |
(1725) 0x4326a4 CMN X1, #1 |
(1725) 0x4326a8 B.EQ 432660 |
(1725) 0x4326ac CMP X1, #1 |
(1725) 0x4326b0 B.NE 43266c |
(1725) 0x4326b4 STR X11, [X15, X0,LSL #3] |
(1725) 0x4326b8 LDR X0, [SP, #560] |
(1725) 0x4326bc STR X0, [X17, X11,LSL #3] |
(1725) 0x4326c0 ADD X11, X11, #1 |
(1725) 0x4326c4 LDR X0, [SP, #560] |
(1725) 0x4326c8 STR XZR, [X10, X0,LSL #3] |
(1725) 0x4326cc LDR X0, [SP, #560] |
(1725) 0x4326d0 STR X16, [X12, X0,LSL #3] |
(1725) 0x4326d4 LDR X0, [SP, #560] |
(1725) 0x4326d8 STR XZR, [X13, X0,LSL #3] |
(1725) 0x4326dc LDR X0, [SP, #560] |
(1725) 0x4326e0 LDR X1, [SP, #632] |
(1725) 0x4326e4 ADD X0, X0, #1 |
(1725) 0x4326e8 CMP X0, X1 |
(1725) 0x4326ec STR X0, [SP, #560] |
(1725) 0x4326f0 B.LT 4326a0 |
0x4326f4 LDUR X13, [X29, #328] |
0x4326f8 STR XZR, [SP, #560] |
0x4326fc CMP X13, #1 |
0x432700 B.LT 43277c |
0x432704 LDP X11, X9, [X29, #824] |
0x432708 LDR X10, [SP, #592] |
0x43270c ORR X8, XZR, XZR |
0x432710 ORR X12, XZR, XZR |
0x432714 B 43272c |
0x432718 HINT #0 |
0x43271c HINT #0 |
(1721) 0x432720 CMP X12, X13 |
(1721) 0x432724 STR X12, [SP, #560] |
(1721) 0x432728 B.GE 43277c |
(1721) 0x43272c LDR X14, [X9, X12,LSL #3] |
(1721) 0x432730 ADD X12, X12, #1 |
(1721) 0x432734 LDR X15, [X9, X12,LSL #3] |
(1721) 0x432738 CMP X14, X15 |
(1721) 0x43273c B.GE 432720 |
(1722) 0x432740 LDR X12, [X11, X14,LSL #3] |
(1722) 0x432744 ADD X14, X14, #1 |
(1722) 0x432748 LDR X12, [X10, X12,LSL #3] |
(1722) 0x43274c CMP X12, #0 |
(1722) 0x432750 CSEL X13, XZR, X27, #11 |
(1722) 0x432754 ADD X12, X13, X12 |
(1722) 0x432758 STR X12, [X25, X8,LSL #3] |
(1722) 0x43275c ADD X8, X8, #1 |
(1722) 0x432760 LDR X12, [SP, #560] |
(1722) 0x432764 ADD X12, X12, #1 |
(1722) 0x432768 LDR X13, [X9, X12,LSL #3] |
(1722) 0x43276c CMP X14, X13 |
(1722) 0x432770 B.LT 432740 |
(1721) 0x432774 LDUR X13, [X29, #328] |
(1721) 0x432778 B 432720 |
0x43277c LDR X8, [SP, #528] |
0x432780 CMP X8, #1 |
0x432784 B.LE 4327a0 |
0x432788 LDR X1, [SP, #376] |
0x43278c ORR X2, XZR, X25 |
0x432790 ORR X3, XZR, X19 |
0x432794 MOVZ W0, #11 |
0x432798 BL 4896c0 |
0x43279c BL 489aa0 |
0x4327a0 LDR X8, [SP, #416] |
0x4327a4 MOVZ W1, #8 |
0x4327a8 ADD X0, X8, #1 |
0x4327ac STR X0, [SP, #344] |
0x4327b0 BL 4b2370 |
0x4327b4 ORR X22, XZR, X0 |
0x4327b8 LDR X0, [SP, #616] |
0x4327bc CBZ X0, 4327cc |
0x4327c0 MOVZ W1, #8 |
0x4327c4 BL 4b2370 |
0x4327c8 STUR X0, [X29, #256] |
0x4327cc LDR X8, [SP, #416] |
0x4327d0 STR XZR, [X22] |
0x4327d4 CMP X8, #1 |
0x4327d8 B.LT 43289c |
0x4327dc LDUR X9, [X29, #288] |
0x4327e0 ORR X8, XZR, XZR |
0x4327e4 ORR X10, XZR, XZR |
0x4327e8 MOVN X11, #0 |
0x4327ec B 432810 |
0x4327f0 HINT #0 |
0x4327f4 HINT #0 |
0x4327f8 HINT #0 |
0x4327fc HINT #0 |
(1718) 0x432800 LDR X12, [SP, #416] |
(1718) 0x432804 STR X10, [X22, X8,LSL #3] |
(1718) 0x432808 CMP X8, X12 |
(1718) 0x43280c B.EQ 43289c |
(1718) 0x432810 LDR X12, [SP, #424] |
(1718) 0x432814 LDR X15, [X12, X8,LSL #3] |
(1718) 0x432818 ADD X8, X8, #1 |
(1718) 0x43281c STR X15, [SP, #560] |
(1718) 0x432820 LDR X12, [X12, X8,LSL #3] |
(1718) 0x432824 CMP X15, X12 |
(1718) 0x432828 B.GE 432800 |
(1720) 0x43282c LDR X12, [SP, #576] |
(1720) 0x432830 LDR X13, [SP, #688] |
(1720) 0x432834 LDUR X14, [X29, #256] |
(1720) 0x432838 B 432868 |
0x43283c HINT #0 |
(1719) 0x432840 STR X11, [X12, X15,LSL #3] |
(1719) 0x432844 LDR X15, [SP, #560] |
(1719) 0x432848 STR X11, [X13, X15,LSL #3] |
(1720) 0x43284c LDR X15, [SP, #560] |
(1720) 0x432850 LDR X16, [SP, #424] |
(1720) 0x432854 ADD X15, X15, #1 |
(1720) 0x432858 STR X15, [SP, #560] |
(1720) 0x43285c LDR X16, [X16, X8,LSL #3] |
(1720) 0x432860 CMP X15, X16 |
(1720) 0x432864 B.GE 432800 |
(1720) 0x432868 LDR X16, [X9, X15,LSL #3] |
(1720) 0x43286c CMP X16, #1 |
(1720) 0x432870 B.NE 432840 |
(1720) 0x432874 STR X10, [X13, X15,LSL #3] |
(1720) 0x432878 LDR X15, [SP, #560] |
(1720) 0x43287c STR X15, [X14, X10,LSL #3] |
(1720) 0x432880 LDR X15, [SP, #560] |
(1720) 0x432884 LDR X15, [X19, X15,LSL #3] |
(1720) 0x432888 STR X15, [X26, X10,LSL #3] |
(1720) 0x43288c ADD X10, X10, #1 |
(1720) 0x432890 LDR X15, [SP, #560] |
(1720) 0x432894 STR XZR, [X12, X15,LSL #3] |
(1720) 0x432898 B 43284c |
0x43289c ORR X0, XZR, X19 |
0x4328a0 BL 4b2470 |
0x4328a4 LDR X8, [X29, #104] |
0x4328a8 CBZ X8, 432934 |
0x4328ac ORR X0, XZR, X21 |
0x4328b0 MOVZ W1, #8 |
0x4328b4 BL 4b2370 |
0x4328b8 CMP X21, #1 |
0x4328bc STR X0, [SP, #680] |
0x4328c0 STR XZR, [SP, #560] |
0x4328c4 B.LT 432934 |
0x4328c8 ORR X8, XZR, XZR |
0x4328cc ORR X9, XZR, XZR |
0x4328d0 B 43290c |
0x4328d4 HINT #0 |
0x4328d8 HINT #0 |
0x4328dc HINT #0 |
(1716) 0x4328e0 LDR X10, [X24, X9,LSL #3] |
(1716) 0x4328e4 LDR X11, [X20, X8,LSL #3] |
(1716) 0x4328e8 CMP X10, X11 |
(1716) 0x4328ec CSINV X10, X8, XZR, #0 |
(1716) 0x4328f0 CSINC X8, X8, X8, #1 |
(1716) 0x4328f4 STR X10, [X0, X9,LSL #3] |
(1716) 0x4328f8 LDR X9, [SP, #560] |
(1716) 0x4328fc ADD X9, X9, #1 |
(1716) 0x432900 CMP X9, X21 |
(1716) 0x432904 STR X9, [SP, #560] |
(1716) 0x432908 B.GE 432934 |
(1717) 0x43290c LDUR X10, [X29, #384] |
(1717) 0x432910 CMP X8, X10 |
(1717) 0x432914 B.LT 4328e0 |
(1717) 0x432918 MOVN X10, #0 |
(1717) 0x43291c STR X10, [X0, X9,LSL #3] |
(1717) 0x432920 LDR X9, [SP, #560] |
(1717) 0x432924 ADD X9, X9, #1 |
(1717) 0x432928 CMP X9, X21 |
(1717) 0x43292c STR X9, [SP, #560] |
(1717) 0x432930 B.LT 43290c |
0x432934 LDR X8, [SP, #752] |
0x432938 STR X22, [SP, #296] |
0x43293c ORR X22, XZR, X23 |
0x432940 CMP X28, #1 |
0x432944 STP XZR, XZR, [X8] |
0x432948 STR XZR, [SP, #512] |
0x43294c LDR X9, [SP, #624] |
0x432950 STR X23, [SP, #560] |
0x432954 STR X9, [SP, #656] |
0x432958 B.LT 432a8c |
0x43295c LDR X9, [SP, #760] |
0x432960 LDP X11, X10, [X29, #920] |
0x432964 LDUR X12, [X29, #504] |
0x432968 ORR X19, XZR, XZR |
0x43296c ORR X23, XZR, XZR |
0x432970 ORR X20, XZR, XZR |
0x432974 LDP X14, X13, [X29, #904] |
0x432978 LDUR X15, [X29, #288] |
0x43297c LDR X17, [SP, #584] |
0x432980 ORR X18, XZR, X22 |
0x432984 MOVZ W16, #1 |
0x432988 B 4329a0 |
(1713) 0x43298c LDR X0, [SP, #560] |
(1713) 0x432990 SUB X18, X0, #1 |
(1713) 0x432994 CMP X0, X23 |
(1713) 0x432998 STR X18, [SP, #560] |
(1713) 0x43299c B.LE 432a98 |
(1713) 0x4329a0 LDR X18, [X9, X18,LSL #3] |
(1713) 0x4329a4 ADD X0, X18, #1 |
(1713) 0x4329a8 LDR X1, [X10, X18,LSL #3] |
(1713) 0x4329ac LDR X3, [X10, X0,LSL #3] |
(1713) 0x4329b0 CMP X1, X3 |
(1713) 0x4329b4 B.GE 432a00 |
(1713) 0x4329b8 LDUR X2, [X29, #368] |
(1713) 0x4329bc LDR X4, [SP, #584] |
(1713) 0x4329c0 B 4329d0 |
(1715) 0x4329c4 ADD X1, X1, #1 |
(1715) 0x4329c8 CMP X1, X3 |
(1715) 0x4329cc B.GE 432a00 |
(1715) 0x4329d0 LDR X5, [X11, X1,LSL #3] |
(1715) 0x4329d4 LDR X5, [X12, X5,LSL #3] |
(1715) 0x4329d8 CMP X5, #1 |
(1715) 0x4329dc B.NE 4329c4 |
(1715) 0x4329e0 LDR X3, [X2, X0,LSL #3] |
(1715) 0x4329e4 ADD X20, X20, #1 |
(1715) 0x4329e8 ADD X3, X3, #1 |
(1715) 0x4329ec STR X3, [X2, X0,LSL #3] |
(1715) 0x4329f0 STR X16, [X4, X18,LSL #3] |
(1715) 0x4329f4 LDR X3, [X10, X0,LSL #3] |
(1715) 0x4329f8 B 4329c4 |
0x4329fc HINT #0 |
(1713) 0x432a00 LDR X1, [X13, X18,LSL #3] |
(1713) 0x432a04 LDR X4, [X13, X0,LSL #3] |
(1713) 0x432a08 CMP X1, X4 |
(1713) 0x432a0c B.GE 432a60 |
(1713) 0x432a10 LDUR X2, [X29, #344] |
(1713) 0x432a14 LDR X3, [SP, #584] |
(1713) 0x432a18 B 432a2c |
0x432a1c HINT #0 |
(1714) 0x432a20 ADD X1, X1, #1 |
(1714) 0x432a24 CMP X1, X4 |
(1714) 0x432a28 B.GE 432a60 |
(1714) 0x432a2c LDR X5, [X14, X1,LSL #3] |
(1714) 0x432a30 LDR X5, [X15, X5,LSL #3] |
(1714) 0x432a34 CMP X5, #1 |
(1714) 0x432a38 B.NE 432a20 |
(1714) 0x432a3c LDR X4, [X2, X0,LSL #3] |
(1714) 0x432a40 ADD X19, X19, #1 |
(1714) 0x432a44 ADD X4, X4, #1 |
(1714) 0x432a48 STR X4, [X2, X0,LSL #3] |
(1714) 0x432a4c STR X16, [X3, X18,LSL #3] |
(1714) 0x432a50 LDR X4, [X13, X0,LSL #3] |
(1714) 0x432a54 B 432a20 |
0x432a58 HINT #0 |
0x432a5c HINT #0 |
(1713) 0x432a60 LDR X0, [X17, X18,LSL #3] |
(1713) 0x432a64 CMP X0, #1 |
(1713) 0x432a68 B.NE 43298c |
(1713) 0x432a6c LDR X1, [SP, #560] |
(1713) 0x432a70 LDR X0, [X9, X23,LSL #3] |
(1713) 0x432a74 ADD X2, X1, #1 |
(1713) 0x432a78 STR X2, [SP, #560] |
(1713) 0x432a7c STR X0, [X9, X1,LSL #3] |
(1713) 0x432a80 STR X18, [X9, X23,LSL #3] |
(1713) 0x432a84 ADD X23, X23, #1 |
(1713) 0x432a88 B 43298c |
0x432a8c ORR X20, XZR, XZR |
0x432a90 ORR X23, XZR, XZR |
0x432a94 ORR X19, XZR, XZR |
0x432a98 LDUR X13, [X29, #328] |
0x432a9c STR X23, [X8, #16] |
0x432aa0 STR XZR, [SP, #560] |
0x432aa4 CMP X13, #1 |
0x432aa8 B.LT 432b10 |
0x432aac LDP X11, X8, [X29, #824] |
0x432ab0 LDR X9, [SP, #584] |
0x432ab4 ORR X10, XZR, XZR |
0x432ab8 ORR X12, XZR, XZR |
0x432abc B 432acc |
(1711) 0x432ac0 CMP X12, X13 |
(1711) 0x432ac4 STR X12, [SP, #560] |
(1711) 0x432ac8 B.GE 432b10 |
(1711) 0x432acc LDR X14, [X8, X12,LSL #3] |
(1711) 0x432ad0 ADD X12, X12, #1 |
(1711) 0x432ad4 LDR X15, [X8, X12,LSL #3] |
(1711) 0x432ad8 CMP X14, X15 |
(1711) 0x432adc B.GE 432ac0 |
(1712) 0x432ae0 LDR X12, [X11, X14,LSL #3] |
(1712) 0x432ae4 ADD X14, X14, #1 |
(1712) 0x432ae8 LDR X12, [X9, X12,LSL #3] |
(1712) 0x432aec STR X12, [X25, X10,LSL #3] |
(1712) 0x432af0 ADD X10, X10, #1 |
(1712) 0x432af4 LDR X12, [SP, #560] |
(1712) 0x432af8 ADD X12, X12, #1 |
(1712) 0x432afc LDR X13, [X8, X12,LSL #3] |
(1712) 0x432b00 CMP X14, X13 |
(1712) 0x432b04 B.LT 432ae0 |
(1711) 0x432b08 LDUR X13, [X29, #328] |
(1711) 0x432b0c B 432ac0 |
0x432b10 LDR X8, [SP, #528] |
0x432b14 CMP X8, #1 |
0x432b18 B.LE 432b34 |
0x432b1c LDR X3, [SP, #576] |
0x432b20 LDR X1, [SP, #376] |
0x432b24 ORR X2, XZR, X25 |
0x432b28 MOVZ W0, #11 |
0x432b2c BL 4896c0 |
0x432b30 BL 489aa0 |
0x432b34 MOVZ W8, #2 |
0x432b38 ADRP X3, |
0x432b3c ADRP X4, |
0x432b40 ADD X0, SP, #544 |
0x432b44 STR X8, [SP, #648] |
0x432b48 SUB X8, X28, X23 |
0x432b4c ADD X1, SP, #552 |
0x432b50 MOVZ W2, #1 |
0x432b54 STR X8, [SP, #544] |
0x432b58 LDR X3, [X3, #4008] |
0x432b5c LDR X4, [X4, #4032] |
0x432b60 LDR X5, [SP, #384] |
0x432b64 BL 4b41b0 |
0x432b68 LDR X8, [SP, #552] |
0x432b6c CBZ X8, 432d78 |
0x432b70 LDR X8, [SP, #648] |
0x432b74 CMP X8, #9 |
0x432b78 B.GT 432d78 |
0x432b7c ADRP X21, |
0x432b80 ADRP X24, |
0x432b84 LDR X21, [X21, #4008] |
0x432b88 LDR X24, [X24, #4032] |
0x432b8c CMP X28, X23 |
0x432b90 STR X22, [SP, #560] |
0x432b94 B.LE 432c84 |
0x432b98 LDR X8, [SP, #760] |
0x432b9c LDP X10, X9, [X29, #920] |
0x432ba0 LDR X11, [SP, #584] |
0x432ba4 ORR X15, XZR, X22 |
0x432ba8 LDP X13, X12, [X29, #904] |
0x432bac LDR X14, [SP, #576] |
0x432bb0 B 432bf4 |
0x432bb4 HINT #0 |
0x432bb8 HINT #0 |
0x432bbc HINT #0 |
(1708) 0x432bc0 LDR X17, [X8, X23,LSL #3] |
(1708) 0x432bc4 ADD X18, X15, #1 |
(1708) 0x432bc8 STR X18, [SP, #560] |
(1708) 0x432bcc STR X17, [X8, X15,LSL #3] |
(1708) 0x432bd0 STR X16, [X8, X23,LSL #3] |
(1708) 0x432bd4 ADD X23, X23, #1 |
(1708) 0x432bd8 LDR X15, [SP, #648] |
(1708) 0x432bdc STR X15, [X11, X16,LSL #3] |
(1708) 0x432be0 LDR X15, [SP, #560] |
(1708) 0x432be4 CMP X15, X23 |
(1708) 0x432be8 SUB X15, X15, #1 |
(1708) 0x432bec STR X15, [SP, #560] |
(1708) 0x432bf0 B.LE 432c80 |
(1708) 0x432bf4 LDR X16, [X8, X15,LSL #3] |
(1708) 0x432bf8 ADD X17, X16, #1 |
(1708) 0x432bfc LDR X1, [X9, X16,LSL #3] |
(1708) 0x432c00 LDR X0, [X9, X17,LSL #3] |
(1708) 0x432c04 CMP X1, X0 |
(1708) 0x432c08 B.GE 432c3c |
(1708) 0x432c0c LDR X18, [SP, #648] |
(1708) 0x432c10 SUB X0, X0, X1 |
(1708) 0x432c14 ADD X1, X10, X1,LSL #3 |
(1708) 0x432c18 SUB X18, X18, #1 |
(1708) 0x432c1c HINT #0 |
(1710) 0x432c20 LDR X2, [X1] |
(1710) 0x432c24 LDR X2, [X11, X2,LSL #3] |
(1710) 0x432c28 CMP X2, X18 |
(1710) 0x432c2c B.EQ 432bc0 |
(1710) 0x432c30 SUBS X0, X0, #1 |
(1710) 0x432c34 ADD X1, X1, #8 |
(1710) 0x432c38 B.NE 432c20 |
(1708) 0x432c3c LDR X0, [X12, X16,LSL #3] |
(1708) 0x432c40 LDR X18, [X12, X17,LSL #3] |
(1708) 0x432c44 CMP X0, X18 |
(1708) 0x432c48 B.GE 432be4 |
(1708) 0x432c4c LDR X17, [SP, #648] |
(1708) 0x432c50 SUB X18, X18, X0 |
(1708) 0x432c54 ADD X0, X13, X0,LSL #3 |
(1708) 0x432c58 SUB X17, X17, #1 |
(1708) 0x432c5c HINT #0 |
(1709) 0x432c60 LDR X1, [X0] |
(1709) 0x432c64 LDR X1, [X14, X1,LSL #3] |
(1709) 0x432c68 CMP X1, X17 |
(1709) 0x432c6c B.EQ 432bc0 |
(1709) 0x432c70 SUBS X18, X18, #1 |
(1709) 0x432c74 ADD X0, X0, #8 |
(1709) 0x432c78 B.NE 432c60 |
(1708) 0x432c7c B 432be4 |
0x432c80 LDR X8, [SP, #648] |
0x432c84 LDR X9, [SP, #752] |
0x432c88 LDR X5, [SP, #384] |
0x432c8c ADD X8, X8, #1 |
0x432c90 ORR X3, XZR, X21 |
0x432c94 ORR X4, XZR, X24 |
0x432c98 ADD X0, SP, #544 |
0x432c9c ADD X1, SP, #552 |
0x432ca0 STR X8, [SP, #648] |
0x432ca4 MOVZ W2, #1 |
0x432ca8 STR X23, [X9, X8,LSL #3] |
0x432cac SUB X8, X28, X23 |
0x432cb0 STR X8, [SP, #544] |
0x432cb4 BL 4b41b0 |
0x432cb8 LDUR X13, [X29, #328] |
0x432cbc STR XZR, [SP, #560] |
0x432cc0 CMP X13, #1 |
0x432cc4 B.LT 432d40 |
0x432cc8 LDP X11, X8, [X29, #824] |
0x432ccc LDR X9, [SP, #584] |
0x432cd0 ORR X10, XZR, XZR |
0x432cd4 ORR X12, XZR, XZR |
0x432cd8 B 432cec |
0x432cdc HINT #0 |
(1706) 0x432ce0 CMP X12, X13 |
(1706) 0x432ce4 STR X12, [SP, #560] |
(1706) 0x432ce8 B.GE 432d40 |
(1706) 0x432cec LDR X14, [X8, X12,LSL #3] |
(1706) 0x432cf0 ADD X12, X12, #1 |
(1706) 0x432cf4 LDR X15, [X8, X12,LSL #3] |
(1706) 0x432cf8 CMP X14, X15 |
(1706) 0x432cfc B.GE 432ce0 |
(1707) 0x432d00 LDR X12, [X11, X14,LSL #3] |
(1707) 0x432d04 ADD X14, X14, #1 |
(1707) 0x432d08 LDR X12, [X9, X12,LSL #3] |
(1707) 0x432d0c STR X12, [X25, X10,LSL #3] |
(1707) 0x432d10 ADD X10, X10, #1 |
(1707) 0x432d14 LDR X12, [SP, #560] |
(1707) 0x432d18 ADD X12, X12, #1 |
(1707) 0x432d1c LDR X13, [X8, X12,LSL #3] |
(1707) 0x432d20 CMP X14, X13 |
(1707) 0x432d24 B.LT 432d00 |
(1706) 0x432d28 LDUR X13, [X29, #328] |
(1706) 0x432d2c B 432ce0 |
0x432d30 HINT #0 |
0x432d34 HINT #0 |
0x432d38 HINT #0 |
0x432d3c HINT #0 |
0x432d40 LDR X8, [SP, #528] |
0x432d44 CMP X8, #1 |
0x432d48 B.LE 432d64 |
0x432d4c LDR X3, [SP, #576] |
0x432d50 LDR X1, [SP, #376] |
0x432d54 ORR X2, XZR, X25 |
0x432d58 MOVZ W0, #11 |
0x432d5c BL 4896c0 |
0x432d60 BL 489aa0 |
0x432d64 LDR X8, [SP, #552] |
0x432d68 CBZ X8, 432d78 |
0x432d6c LDR X8, [SP, #648] |
0x432d70 CMP X8, #10 |
0x432d74 B.LT 432b8c |
0x432d78 ORR X0, XZR, X25 |
0x432d7c BL 4b2470 |
0x432d80 LDR X21, [SP, #648] |
0x432d84 MOVZ W1, #8 |
0x432d88 ORR X0, XZR, X21 |
0x432d8c STR X21, [SP, #640] |
0x432d90 BL 4b2370 |
0x432d94 STR X0, [SP, #728] |
0x432d98 ORR X0, XZR, X20 |
0x432d9c MOVZ W1, #8 |
0x432da0 BL 4b2370 |
0x432da4 LDR X8, [SP, #728] |
0x432da8 MOVZ W1, #8 |
0x432dac STR X0, [X8, #8] |
0x432db0 LDR X0, [SP, #632] |
0x432db4 BL 4b2370 |
0x432db8 STR X0, [SP, #744] |
0x432dbc LDR X0, [SP, #632] |
0x432dc0 MOVZ W1, #8 |
0x432dc4 BL 4b2370 |
0x432dc8 LDR X8, [SP, #528] |
0x432dcc STR X0, [SP, #736] |
0x432dd0 CMP X8, #2 |
0x432dd4 B.LT 432e04 |
0x432dd8 ORR X0, XZR, X21 |
0x432ddc MOVZ W1, #8 |
0x432de0 BL 4b2370 |
0x432de4 STR X0, [SP, #720] |
0x432de8 CBZ X19, 434c2c |
0x432dec ORR X0, XZR, X19 |
0x432df0 MOVZ W1, #8 |
0x432df4 BL 4b2370 |
0x432df8 ORR X8, XZR, X0 |
0x432dfc LDR X0, [SP, #720] |
0x432e00 B 434c30 |
0x432e04 ORR X30, XZR, XZR |
0x432e08 LDR X9, [SP, #752] |
0x432e0c LDR X21, [SP, #424] |
0x432e10 LDP X1, X8, [X9, #8] |
0x432e14 CMP X1, X8 |
0x432e18 STR X1, [SP, #560] |
0x432e1c B.LT 434c84 |
(1666) 0x432e20 ORR X10, XZR, XZR |
(1666) 0x432e24 ORR X8, XZR, XZR |
(1666) 0x432e28 LDR X9, [SP, #656] |
(1666) 0x432e2c STR X30, [SP, #432] |
(1666) 0x432e30 ADD X9, X9, X10 |
(1666) 0x432e34 STR X9, [SP, #656] |
(1666) 0x432e38 LDR X9, [SP, #512] |
(1666) 0x432e3c ADD X8, X9, X8 |
(1666) 0x432e40 STR X8, [SP, #512] |
(1666) 0x432e44 LDR X8, [SP, #528] |
(1666) 0x432e48 CMP X8, #1 |
(1666) 0x432e4c B.LE 4337a0 |
(1666) 0x432e50 MOVZ W0, #1 |
(1666) 0x432e54 MOVZ W1, #112 |
(1666) 0x432e58 BL 4b2370 |
(1666) 0x432e5c LDR X19, [SP, #640] |
(1666) 0x432e60 STR X0, [SP, #392] |
(1666) 0x432e64 MOVZ W1, #8 |
(1666) 0x432e68 ORR X0, XZR, X19 |
(1666) 0x432e6c BL 4b2370 |
(1666) 0x432e70 STR X0, [SP, #400] |
(1666) 0x432e74 ORR X0, XZR, X19 |
(1666) 0x432e78 MOVZ W1, #8 |
(1666) 0x432e7c BL 4b2370 |
(1666) 0x432e80 STR X0, [SP, #408] |
(1666) 0x432e84 ORR X0, XZR, X19 |
(1666) 0x432e88 MOVZ W1, #8 |
(1666) 0x432e8c BL 4b2370 |
(1666) 0x432e90 LDUR X8, [X29, #384] |
(1666) 0x432e94 STR X0, [SP, #712] |
(1666) 0x432e98 MOVZ W1, #8 |
(1666) 0x432e9c ADD X0, X8, #1 |
(1666) 0x432ea0 BL 4b2370 |
(1666) 0x432ea4 STR X0, [SP, #696] |
(1666) 0x432ea8 LDUR X0, [X29, #384] |
(1666) 0x432eac CBZ X0, 432ebc |
0x432eb0 MOVZ W1, #8 |
0x432eb4 BL 4b2370 |
0x432eb8 STUR X0, [X29, #304] |
(1666) 0x432ebc LDP X8, X9, [X29, #832] |
(1666) 0x432ec0 LDR X0, [X8, X9,LSL #3] |
(1666) 0x432ec4 CBZ X0, 432ed4 |
0x432ec8 MOVZ W1, #8 |
0x432ecc BL 4b2370 |
0x432ed0 STUR X0, [X29, #296] |
(1666) 0x432ed4 ADRP X0, |
(1666) 0x432ed8 ADD X0, X0, #344 |
(1666) 0x432edc ADRP X2, 435edc |
(1666) 0x432ee0 ADD X2, X2, #416 |
(1666) 0x432ee4 SUB X3, X29, #128 |
(1666) 0x432ee8 ADD X4, SP, #696 |
(1666) 0x432eec MOVZ W1, #2 |
(1666) 0x432ef0 BL 40f460 |
(1666) 0x432ef4 ADRP X0, |
(1666) 0x432ef8 ADD X0, X0, #416 |
(1666) 0x432efc ADRP X2, 435efc |
(1666) 0x432f00 ADD X2, X2, #672 |
(1666) 0x432f04 SUB X3, X29, #192 |
(1666) 0x432f08 SUB X4, X29, #184 |
(1666) 0x432f0c SUB X5, X29, #216 |
(1666) 0x432f10 MOVZ W1, #3 |
(1666) 0x432f14 BL 40f460 |
(1666) 0x432f18 LDR X30, [SP, #432] |
(1666) 0x432f1c MOVZ W8, #2 |
(1666) 0x432f20 CMP X19, #3 |
(1666) 0x432f24 STR X8, [SP, #648] |
(1666) 0x432f28 B.GE 4337b8 |
(1666) 0x432f2c ORR X20, XZR, XZR |
(1666) 0x432f30 ORR X25, XZR, XZR |
(1666) 0x432f34 ORR X0, XZR, X25 |
(1666) 0x432f38 BL 4b2470 |
(1666) 0x432f3c LDUR X0, [X29, #296] |
(1666) 0x432f40 BL 4b2470 |
(1666) 0x432f44 ORR X0, XZR, X20 |
(1666) 0x432f48 STUR XZR, [X29, #296] |
(1666) 0x432f4c BL 4b2470 |
(1666) 0x432f50 LDR X0, [SP, #296] |
(1666) 0x432f54 BL 4b2470 |
(1666) 0x432f58 LDR X0, [SP, #448] |
(1666) 0x432f5c BL 4b2470 |
(1666) 0x432f60 LDR X0, [SP, #440] |
(1666) 0x432f64 STR XZR, [SP, #448] |
(1666) 0x432f68 BL 4b2470 |
(1666) 0x432f6c LDR X0, [SP, #456] |
(1666) 0x432f70 STR XZR, [SP, #440] |
(1666) 0x432f74 BL 4b2470 |
(1666) 0x432f78 LDR X0, [SP, #656] |
(1666) 0x432f7c MOVZ W1, #8 |
(1666) 0x432f80 STR XZR, [SP, #456] |
(1666) 0x432f84 BL 4b2370 |
(1666) 0x432f88 STUR X0, [X29, #360] |
(1666) 0x432f8c LDR X0, [SP, #656] |
(1666) 0x432f90 MOVZ W1, #8 |
(1666) 0x432f94 BL 4b2370 |
(1666) 0x432f98 STUR X0, [X29, #376] |
(1666) 0x432f9c LDR X0, [SP, #512] |
(1666) 0x432fa0 CBZ X0, 432fc0 |
0x432fa4 MOVZ W1, #8 |
0x432fa8 BL 4b2370 |
0x432fac STUR X0, [X29, #336] |
0x432fb0 LDR X0, [SP, #512] |
0x432fb4 MOVZ W1, #8 |
0x432fb8 BL 4b2370 |
0x432fbc STUR X0, [X29, #352] |
(1666) 0x432fc0 LDR X8, [SP, #632] |
(1666) 0x432fc4 LDR X25, [X29, #96] |
(1666) 0x432fc8 STR XZR, [SP, #560] |
(1666) 0x432fcc CMP X8, #1 |
(1666) 0x432fd0 B.LT 433024 |
(1666) 0x432fd4 LDUR X8, [X29, #368] |
(1666) 0x432fd8 LDUR X9, [X29, #344] |
(1666) 0x432fdc ORR X12, XZR, XZR |
(1666) 0x432fe0 ADD X10, X8, #8 |
(1666) 0x432fe4 ADD X11, X9, #8 |
(1680) 0x432fe8 LDR X13, [X8, X12,LSL #3] |
(1680) 0x432fec LDR X14, [X10, X12,LSL #3] |
(1680) 0x432ff0 ADD X13, X14, X13 |
(1680) 0x432ff4 STR X13, [X10, X12,LSL #3] |
(1680) 0x432ff8 LDR X12, [SP, #560] |
(1680) 0x432ffc LDR X13, [X9, X12,LSL #3] |
(1680) 0x433000 LDR X14, [X11, X12,LSL #3] |
(1680) 0x433004 ADD X13, X14, X13 |
(1680) 0x433008 STR X13, [X11, X12,LSL #3] |
(1680) 0x43300c LDR X12, [SP, #560] |
(1680) 0x433010 LDR X13, [SP, #632] |
(1680) 0x433014 ADD X12, X12, #1 |
(1680) 0x433018 CMP X12, X13 |
(1680) 0x43301c STR X12, [SP, #560] |
(1680) 0x433020 B.LT 432fe8 |
(1666) 0x433024 SUB X21, X29, #136 |
(1666) 0x433028 ADRP X0, |
(1666) 0x43302c ADD X0, X0, #680 |
(1666) 0x433030 ADRP X2, 435030 |
(1666) 0x433034 ADD X2, X2, #4000 |
(1666) 0x433038 STR X21, [SP] |
(1666) 0x43303c ADD X3, SP, #624 |
(1666) 0x433040 SUB X4, X29, #248 |
(1666) 0x433044 SUB X5, X29, #152 |
(1666) 0x433048 SUB X6, X29, #144 |
(1666) 0x43304c ADD X7, SP, #592 |
(1666) 0x433050 MOVZ W1, #6 |
(1666) 0x433054 SUB X20, X29, #248 |
(1666) 0x433058 SUB X22, X29, #152 |
(1666) 0x43305c SUB X19, X29, #144 |
(1666) 0x433060 ADD X24, SP, #592 |
(1666) 0x433064 BL 40f460 |
(1666) 0x433068 LDR X8, [SP, #752] |
(1666) 0x43306c LDP X8, X9, [X8, #8] |
(1666) 0x433070 SUB X8, X9, X8 |
(1666) 0x433074 SUB X9, X29, #176 |
(1666) 0x433078 STR X8, [SP, #464] |
(1666) 0x43307c ADD X8, SP, #688 |
(1666) 0x433080 CBZ X25, 43400c |
0x433084 STP X9, X8, [SP, #200] |
0x433088 SUB X8, X29, #160 |
0x43308c SUB X10, X29, #72 |
0x433090 SUB X11, X29, #232 |
0x433094 SUB X9, X29, #88 |
0x433098 STP X21, X22, [SP, #80] |
0x43309c STP X10, X8, [SP, #184] |
0x4330a0 SUB X8, X29, #224 |
0x4330a4 STR X9, [SP, #160] |
0x4330a8 ADD X9, X29, #104 |
0x4330ac SUB X10, X29, #32 |
0x4330b0 ADD X12, SP, #728 |
0x4330b4 ADRP X0, |
0x4330b8 ADD X0, X0, #704 |
0x4330bc STP X12, X20, [SP, #16] |
0x4330c0 STP X8, X11, [SP, #168] |
0x4330c4 ADD X8, SP, #680 |
0x4330c8 SUB X11, X29, #56 |
0x4330cc ADRP X2, 4360cc |
0x4330d0 ADD X2, X2, #272 |
0x4330d4 STP X9, X8, [SP, #144] |
0x4330d8 SUB X8, X29, #80 |
0x4330dc SUB X9, X29, #256 |
0x4330e0 STP X9, X8, [SP, #128] |
0x4330e4 ADD X8, SP, #720 |
0x4330e8 SUB X9, X29, #168 |
0x4330ec ADD X3, SP, #632 |
0x4330f0 SUB X4, X29, #128 |
0x4330f4 STP X9, X8, [SP, #112] |
0x4330f8 ADD X8, SP, #736 |
0x4330fc SUB X9, X29, #40 |
0x433100 ADD X5, SP, #752 |
0x433104 ADD X6, SP, #464 |
0x433108 STP X24, X8, [SP, #96] |
0x43310c SUB X8, X29, #48 |
0x433110 ADD X7, SP, #760 |
0x433114 MOVZ W1, #32 |
0x433118 STP X9, X8, [SP, #64] |
0x43311c SUB X8, X29, #8 |
0x433120 SUB X9, X29, #64 |
0x433124 STP X8, X10, [SP, #48] |
0x433128 ADD X8, SP, #744 |
0x43312c STP X11, X9, [SP, #32] |
0x433130 STP X8, X19, [SP] |
0x433134 BL 40f460 |
0x433138 LDR X8, [SP, #624] |
0x43313c CBZ X8, 43314c |
0x433140 LDUR X0, [X29, #264] |
0x433144 BL 4b2470 |
0x433148 STUR XZR, [X29, #264] |
0x43314c LDUR X0, [X29, #256] |
0x433150 BL 4b2470 |
0x433154 LDR X8, [SP, #728] |
0x433158 STUR XZR, [X29, #256] |
0x43315c LDR X0, [X8, #8] |
0x433160 BL 4b2470 |
0x433164 LDR X8, [SP, #728] |
0x433168 STR XZR, [X8, #8] |
0x43316c LDR X8, [SP, #528] |
0x433170 CMP X8, #2 |
0x433174 B.LT 43318c |
0x433178 LDR X8, [SP, #720] |
0x43317c LDR X0, [X8, #8] |
0x433180 BL 4b2470 |
0x433184 LDR X8, [SP, #720] |
0x433188 STR XZR, [X8, #8] |
0x43318c LDR X24, [SP, #640] |
0x433190 MOVZ W8, #2 |
0x433194 STR X8, [SP, #648] |
0x433198 CMP X24, #2 |
0x43319c B.LE 434748 |
0x4331a0 RDVL X9, #1 |
0x4331a4 ORR X22, XZR, XZR |
0x4331a8 MOVZ W8, #2 |
0x4331ac MOVZ W26, #16 |
0x4331b0 SUB X21, X29, #232 |
0x4331b4 STP XZR, X24, [SP, #368] |
0x4331b8 ORR X19, XZR, XZR |
0x4331bc CNTW X25, ALL |
0x4331c0 UBFM X27, X9, #4, #63 |
0x4331c4 PTRUE P0.D, ALL |
0x4331c8 B 4331e4 |
(1696) 0x4331cc LDR X9, [SP, #376] |
(1696) 0x4331d0 PTRUE P0.D, ALL |
(1696) 0x4331d4 ADD X8, X8, #1 |
(1696) 0x4331d8 STR X8, [SP, #648] |
(1696) 0x4331dc CMP X8, X9 |
(1696) 0x4331e0 B.GE 434740 |
(1696) 0x4331e4 LDR X9, [SP, #528] |
(1696) 0x4331e8 CMP X9, #2 |
(1696) 0x4331ec B.LT 4335e4 |
(1697) 0x4331f0 LDR X9, [SP, #400] |
(1697) 0x4331f4 LDUR X23, [X29, #328] |
(1697) 0x4331f8 LDR X8, [X9, X8,LSL #3] |
(1697) 0x4331fc LDR X9, [SP, #368] |
(1697) 0x433200 LDR X8, [X8, X23,LSL #3] |
(1697) 0x433204 CMP X8, X9 |
(1697) 0x433208 STR X8, [SP, #504] |
(1697) 0x43320c B.LE 433234 |
(1697) 0x433210 ORR X0, XZR, X19 |
(1697) 0x433214 BL 4b2470 |
(1697) 0x433218 LDR X0, [SP, #504] |
(1697) 0x43321c MOVZ W1, #8 |
(1697) 0x433220 BL 4b2370 |
(1697) 0x433224 LDR X8, [SP, #504] |
(1697) 0x433228 LDUR X23, [X29, #328] |
(1697) 0x43322c PTRUE P0.D, ALL |
(1697) 0x433230 ORR X19, XZR, X0 |
(1697) 0x433234 STP X22, X8, [SP, #360] |
(1697) 0x433238 CMP X23, #1 |
(1697) 0x43323c STR XZR, [SP, #560] |
(1697) 0x433240 B.LT 433544 |
(1698) 0x433244 LDP X11, X10, [X29, #824] |
(1698) 0x433248 LDR X8, [SP, #648] |
(1698) 0x43324c LDR X12, [SP, #584] |
(1698) 0x433250 ORR X4, XZR, XZR |
(1698) 0x433254 ORR X9, XZR, XZR |
(1698) 0x433258 ADD X14, X19, #16 |
(1698) 0x43325c SUB X13, X8, #1 |
(1698) 0x433260 STR X10, [SP, #424] |
(1698) 0x433264 B 433278 |
(1699) 0x433268 LDR X10, [SP, #424] |
(1698) 0x43326c CMP X9, X23 |
(1698) 0x433270 STR X9, [SP, #560] |
(1698) 0x433274 B.EQ 433544 |
(1698) 0x433278 LDR X15, [X10, X9,LSL #3] |
(1698) 0x43327c ADD X9, X9, #1 |
(1698) 0x433280 LDR X16, [X10, X9,LSL #3] |
(1698) 0x433284 CMP X15, X16 |
(1698) 0x433288 B.GE 43326c |
(1699) 0x43328c LDP X17, X18, [X29, #880] |
(1699) 0x433290 LDP X0, X1, [X29, #856] |
(1699) 0x433294 ADD X2, X18, #16 |
(1699) 0x433298 ADD X3, X1, #16 |
(1699) 0x43329c B 4332b0 |
(1699) 0x4332a0 ORR X4, XZR, X6 |
(1699) 0x4332a4 ADD X15, X15, #1 |
(1699) 0x4332a8 CMP X15, X16 |
(1699) 0x4332ac B.EQ 433268 |
(1699) 0x4332b0 LDR X5, [X11, X15,LSL #3] |
(1699) 0x4332b4 LDR X8, [X12, X5,LSL #3] |
(1699) 0x4332b8 CMP X8, X13 |
(1699) 0x4332bc B.NE 4332a4 |
(1699) 0x4332c0 ADD X7, X5, #1 |
(1699) 0x4332c4 LDR X28, [X17, X5,LSL #3] |
(1699) 0x4332c8 LDR X22, [X17, X7,LSL #3] |
(1699) 0x4332cc SUBS X8, X22, X28 |
(1699) 0x4332d0 B.LE 4333a0 |
(1699) 0x4332d4 CMP X25, #16 |
(1699) 0x4332d8 CSEL X10, X25, X26, #8 |
(1699) 0x4332dc CMP X8, X10 |
(1699) 0x4332e0 B.CC 4332f8 |
(1699) 0x4332e4 ADD X10, X19, X4,LSL #3 |
(1699) 0x4332e8 ADD X6, X18, X28,LSL #3 |
(1699) 0x4332ec SUB X10, X10, X6 |
(1699) 0x4332f0 CMP X10, X27,LSL #5 |
(1699) 0x4332f4 B.CS 433478 |
(1699) 0x4332f8 ORR X6, XZR, X4 |
(1699) 0x4332fc ORR X21, XZR, X28 |
(1699) 0x433300 SUB W8, W22, W21 |
(1699) 0x433304 ORR X4, XZR, X21 |
(1699) 0x433308 ANDS X20, X8, #4160 |
(1699) 0x43330c B.EQ 433338 |
(1699) 0x433310 HINT #0 |
(1699) 0x433314 HINT #0 |
(1699) 0x433318 HINT #0 |
(1699) 0x43331c HINT #0 |
(1704) 0x433320 LDR D0, [X18, X4,LSL #3] |
(1704) 0x433324 ADD X4, X4, #1 |
(1704) 0x433328 SUBS X20, X20, #1 |
(1704) 0x43332c STR D0, [X19, X6,LSL #3] |
(1704) 0x433330 ADD X6, X6, #1 |
(1704) 0x433334 B.NE 433320 |
(1699) 0x433338 ORN X8, XZR, X21 |
(1699) 0x43333c ADD X8, X22, X8 |
(1699) 0x433340 CMP X8, #3 |
(1699) 0x433344 B.CC 4333a4 |
(1699) 0x433348 SUB X22, X22, X4 |
(1699) 0x43334c ADD X4, X2, X4,LSL #3 |
(1699) 0x433350 ADD X20, X14, X6,LSL #3 |
(1699) 0x433354 HINT #0 |
(1699) 0x433358 HINT #0 |
(1699) 0x43335c HINT #0 |
(1703) 0x433360 LDUR D0, [X4, #496] |
(1703) 0x433364 ADD X6, X6, #4 |
(1703) 0x433368 SUBS X22, X22, #4 |
(1703) 0x43336c STUR D0, [X20, #496] |
(1703) 0x433370 LDUR D0, [X4, #504] |
(1703) 0x433374 STUR D0, [X20, #504] |
(1703) 0x433378 LDR D0, [X4] |
(1703) 0x43337c STR D0, [X20] |
(1703) 0x433380 LDR D0, [X4, #8] |
(1703) 0x433384 ADD X4, X4, #32 |
(1703) 0x433388 STR D0, [X20, #8] |
(1703) 0x43338c ADD X20, X20, #32 |
(1703) 0x433390 B.NE 433360 |
(1699) 0x433394 B 4333a4 |
0x433398 HINT #0 |
0x43339c HINT #0 |
(1699) 0x4333a0 ORR X6, XZR, X4 |
(1699) 0x4333a4 LDR X21, [X0, X5,LSL #3] |
(1699) 0x4333a8 LDR X5, [X0, X7,LSL #3] |
(1699) 0x4333ac SUBS X8, X5, X21 |
(1699) 0x4333b0 B.LE 4332a0 |
(1699) 0x4333b4 CMP X25, #16 |
(1699) 0x4333b8 CSEL X10, X25, X26, #8 |
(1699) 0x4333bc CMP X8, X10 |
(1699) 0x4333c0 B.CC 4333d8 |
(1699) 0x4333c4 ADD X10, X19, X6,LSL #3 |
(1699) 0x4333c8 ADD X4, X1, X21,LSL #3 |
(1699) 0x4333cc SUB X10, X10, X4 |
(1699) 0x4333d0 CMP X10, X27,LSL #5 |
(1699) 0x4333d4 B.CS 4334e4 |
(1699) 0x4333d8 ORR X4, XZR, X6 |
(1699) 0x4333dc ORR X7, XZR, X21 |
(1699) 0x4333e0 SUB W8, W5, W7 |
(1699) 0x4333e4 ORR X6, XZR, X7 |
(1699) 0x4333e8 ANDS X20, X8, #4160 |
(1699) 0x4333ec B.EQ 433418 |
(1699) 0x4333f0 HINT #0 |
(1699) 0x4333f4 HINT #0 |
(1699) 0x4333f8 HINT #0 |
(1699) 0x4333fc HINT #0 |
(1701) 0x433400 LDR D0, [X1, X6,LSL #3] |
(1701) 0x433404 ADD X6, X6, #1 |
(1701) 0x433408 SUBS X20, X20, #1 |
(1701) 0x43340c STR D0, [X19, X4,LSL #3] |
(1701) 0x433410 ADD X4, X4, #1 |
(1701) 0x433414 B.NE 433400 |
(1699) 0x433418 ORN X8, XZR, X7 |
(1699) 0x43341c ADD X8, X5, X8 |
(1699) 0x433420 CMP X8, #3 |
(1699) 0x433424 B.CC 4332a4 |
(1699) 0x433428 SUB X5, X5, X6 |
(1699) 0x43342c ADD X6, X3, X6,LSL #3 |
(1699) 0x433430 ADD X7, X14, X4,LSL #3 |
(1699) 0x433434 HINT #0 |
(1699) 0x433438 HINT #0 |
(1699) 0x43343c HINT #0 |
(1700) 0x433440 LDUR D0, [X6, #496] |
(1700) 0x433444 ADD X4, X4, #4 |
(1700) 0x433448 SUBS X5, X5, #4 |
(1700) 0x43344c STUR D0, [X7, #496] |
(1700) 0x433450 LDUR D0, [X6, #504] |
(1700) 0x433454 STUR D0, [X7, #504] |
(1700) 0x433458 LDR D0, [X6] |
(1700) 0x43345c STR D0, [X7] |
(1700) 0x433460 LDR D0, [X6, #8] |
(1700) 0x433464 ADD X6, X6, #32 |
(1700) 0x433468 STR D0, [X7, #8] |
(1700) 0x43346c ADD X7, X7, #32 |
(1700) 0x433470 B.NE 433440 |
(1699) 0x433474 B 4332a4 |
(1699) 0x433478 UDIV X10, X8, X25 |
(1699) 0x43347c ORR X24, XZR, XZR |
(1699) 0x433480 MADD X20, X10, X25, XZR |
(1699) 0x433484 UBFM X10, X28, #61, #60 |
(1699) 0x433488 SUB X30, X8, X20 |
(1699) 0x43348c UBFM X8, X4, #61, #60 |
(1699) 0x433490 ADD X6, X4, X20 |
(1699) 0x433494 ADD X21, X28, X20 |
(1699) 0x433498 ADD X28, X18, X10 |
(1699) 0x43349c ADDVL X10, X10, #1 |
(1699) 0x4334a0 ADD X4, X19, X8 |
(1699) 0x4334a4 ADDVL X8, X8, #1 |
(1699) 0x4334a8 ADD X10, X18, X10 |
(1699) 0x4334ac ADD X8, X19, X8 |
(1699) 0x4334b0 HINT #0 |
(1699) 0x4334b4 HINT #0 |
(1699) 0x4334b8 HINT #0 |
(1699) 0x4334bc HINT #0 |
(1705) 0x4334c0 LD1D {Z0.D}, P0/Z, [X28, X24,LSL #3] |
(1705) 0x4334c4 LD1D {Z1.D}, P0/Z, [X10, X24,LSL #3] |
(1705) 0x4334c8 ST1D {Z0.D}, P0, [X4, X24,LSL #3] |
(1705) 0x4334cc ST1D {Z1.D}, P0, [X8, X24,LSL #3] |
(1705) 0x4334d0 ADD X24, X24, X25 |
(1705) 0x4334d4 CMP X20, X24 |
(1705) 0x4334d8 B.NE 4334c0 |
(1699) 0x4334dc CBNZ X30, 433300 |
0x4334e0 B 4333a4 |
(1699) 0x4334e4 UDIV X10, X8, X25 |
(1699) 0x4334e8 ORR X24, XZR, XZR |
(1699) 0x4334ec MADD X20, X10, X25, XZR |
(1699) 0x4334f0 UBFM X10, X21, #61, #60 |
(1699) 0x4334f4 SUB X22, X8, X20 |
(1699) 0x4334f8 UBFM X8, X6, #61, #60 |
(1699) 0x4334fc ADD X4, X6, X20 |
(1699) 0x433500 ADD X7, X21, X20 |
(1699) 0x433504 ADD X21, X1, X10 |
(1699) 0x433508 ADDVL X10, X10, #1 |
(1699) 0x43350c ADD X6, X19, X8 |
(1699) 0x433510 ADDVL X8, X8, #1 |
(1699) 0x433514 ADD X10, X1, X10 |
(1699) 0x433518 ADD X8, X19, X8 |
(1699) 0x43351c HINT #0 |
(1702) 0x433520 LD1D {Z0.D}, P0/Z, [X21, X24,LSL #3] |
(1702) 0x433524 LD1D {Z1.D}, P0/Z, [X10, X24,LSL #3] |
(1702) 0x433528 ST1D {Z0.D}, P0, [X6, X24,LSL #3] |
(1702) 0x43352c ST1D {Z1.D}, P0, [X8, X24,LSL #3] |
(1702) 0x433530 ADD X24, X24, X25 |
(1702) 0x433534 CMP X20, X24 |
(1702) 0x433538 B.NE 433520 |
(1699) 0x43353c CBNZ X22, 4333e0 |
0x433540 B 4332a4 |
(1697) 0x433544 LDP X11, X9, [SP, #392] |
(1697) 0x433548 LDR X8, [SP, #648] |
(1697) 0x43354c LDP X12, X10, [SP, #408] |
(1697) 0x433550 LDR X3, [SP, #568] |
(1697) 0x433554 STR X23, [X11, #8] |
(1697) 0x433558 LDR X9, [X9, X8,LSL #3] |
(1697) 0x43355c STR X10, [X11, #40] |
(1697) 0x433560 STR X9, [X11, #24] |
(1697) 0x433564 LDR X9, [X12, X8,LSL #3] |
(1697) 0x433568 STR X9, [X11, #56] |
(1697) 0x43356c LDR X8, [X12, X8,LSL #3] |
(1697) 0x433570 LDR X22, [X8, X10,LSL #3] |
(1697) 0x433574 LDR X8, [SP, #360] |
(1697) 0x433578 CMP X22, X8 |
(1697) 0x43357c B.LE 4335a0 |
(1697) 0x433580 ORR X0, XZR, X3 |
(1697) 0x433584 BL 4b2470 |
(1697) 0x433588 ORR X0, XZR, X22 |
(1697) 0x43358c MOVZ W1, #8 |
(1697) 0x433590 STR XZR, [SP, #568] |
(1697) 0x433594 BL 4b2370 |
(1697) 0x433598 ORR X3, XZR, X0 |
(1697) 0x43359c STR X0, [SP, #568] |
(1697) 0x4335a0 LDR X1, [SP, #392] |
(1697) 0x4335a4 ORR X2, XZR, X19 |
(1697) 0x4335a8 MOVZ W0, #1 |
(1697) 0x4335ac SUB X21, X29, #232 |
(1697) 0x4335b0 BL 4896c0 |
(1697) 0x4335b4 BL 489aa0 |
(1697) 0x4335b8 LDR X8, [SP, #648] |
(1697) 0x4335bc LDR X20, [SP, #400] |
(1697) 0x4335c0 LDR X0, [X20, X8,LSL #3] |
(1697) 0x4335c4 BL 4b2470 |
(1697) 0x4335c8 LDR X8, [SP, #648] |
(1697) 0x4335cc STR XZR, [X20, X8,LSL #3] |
(1697) 0x4335d0 LDR X20, [SP, #408] |
(1697) 0x4335d4 LDR X0, [X20, X8,LSL #3] |
(1697) 0x4335d8 BL 4b2470 |
(1697) 0x4335dc LDR X8, [SP, #648] |
(1697) 0x4335e0 STR XZR, [X20, X8,LSL #3] |
(1696) 0x4335e4 LDR X9, [SP, #752] |
(1696) 0x4335e8 ADD X3, SP, #632 |
(1696) 0x4335ec SUB X4, X29, #128 |
(1696) 0x4335f0 ADD X5, SP, #624 |
(1696) 0x4335f4 ADD X6, SP, #480 |
(1696) 0x4335f8 ADD X7, SP, #616 |
(1696) 0x4335fc ADRP X0, |
(1696) 0x433600 ADD X0, X0, #728 |
(1696) 0x433604 MOVZ W1, #42 |
(1696) 0x433608 ADRP X2, 436608 |
(1696) 0x43360c ADD X2, X2, #2416 |
(1696) 0x433610 ADD X8, X9, X8,LSL #3 |
(1696) 0x433614 LDP X8, X9, [X8] |
(1696) 0x433618 SUB X8, X9, X8 |
(1696) 0x43361c STR X8, [SP, #464] |
(1696) 0x433620 SUB X8, X29, #224 |
(1696) 0x433624 STP X8, X21, [SP, #280] |
(1696) 0x433628 ADD X8, SP, #568 |
(1696) 0x43362c STR X8, [SP, #272] |
(1696) 0x433630 SUB X8, X29, #72 |
(1696) 0x433634 STR X8, [SP, #264] |
(1696) 0x433638 ADD X8, SP, #712 |
(1696) 0x43363c STR X8, [SP, #256] |
(1696) 0x433640 ADD X8, SP, #696 |
(1696) 0x433644 STR X8, [SP, #248] |
(1696) 0x433648 SUB X8, X29, #208 |
(1696) 0x43364c STR X8, [SP, #240] |
(1696) 0x433650 SUB X8, X29, #88 |
(1696) 0x433654 STR X8, [SP, #232] |
(1696) 0x433658 ADD X8, SP, #680 |
(1696) 0x43365c STR X8, [SP, #224] |
(1696) 0x433660 ADD X8, X29, #104 |
(1696) 0x433664 STR X8, [SP, #216] |
(1696) 0x433668 SUB X8, X29, #80 |
(1696) 0x43366c STR X8, [SP, #208] |
(1696) 0x433670 SUB X8, X29, #40 |
(1696) 0x433674 STR X8, [SP, #200] |
(1696) 0x433678 SUB X8, X29, #32 |
(1696) 0x43367c STR X8, [SP, #192] |
(1696) 0x433680 SUB X8, X29, #8 |
(1696) 0x433684 STR X8, [SP, #184] |
(1696) 0x433688 SUB X8, X29, #48 |
(1696) 0x43368c STR X8, [SP, #176] |
(1696) 0x433690 SUB X8, X29, #64 |
(1696) 0x433694 STR X8, [SP, #168] |
(1696) 0x433698 SUB X8, X29, #56 |
(1696) 0x43369c STR X8, [SP, #160] |
(1696) 0x4336a0 ADD X8, SP, #576 |
(1696) 0x4336a4 STR X8, [SP, #152] |
(1696) 0x4336a8 SUB X8, X29, #120 |
(1696) 0x4336ac STR X8, [SP, #144] |
(1696) 0x4336b0 SUB X8, X29, #112 |
(1696) 0x4336b4 STR X8, [SP, #136] |
(1696) 0x4336b8 ADD X8, SP, #584 |
(1696) 0x4336bc STR X8, [SP, #128] |
(1696) 0x4336c0 SUB X8, X29, #104 |
(1696) 0x4336c4 STR X8, [SP, #120] |
(1696) 0x4336c8 SUB X8, X29, #96 |
(1696) 0x4336cc STR X8, [SP, #112] |
(1696) 0x4336d0 SUB X8, X29, #176 |
(1696) 0x4336d4 STR X8, [SP, #104] |
(1696) 0x4336d8 SUB X8, X29, #160 |
(1696) 0x4336dc STR X8, [SP, #96] |
(1696) 0x4336e0 ADD X8, SP, #720 |
(1696) 0x4336e4 STR X8, [SP, #88] |
(1696) 0x4336e8 SUB X8, X29, #168 |
(1696) 0x4336ec STR X8, [SP, #80] |
(1696) 0x4336f0 ADD X8, SP, #736 |
(1696) 0x4336f4 STR X8, [SP, #72] |
(1696) 0x4336f8 SUB X8, X29, #152 |
(1696) 0x4336fc STR X8, [SP, #64] |
(1696) 0x433700 SUB X8, X29, #136 |
(1696) 0x433704 STR X8, [SP, #56] |
(1696) 0x433708 ADD X8, SP, #728 |
(1696) 0x43370c STR X8, [SP, #48] |
(1696) 0x433710 SUB X8, X29, #144 |
(1696) 0x433714 STR X8, [SP, #40] |
(1696) 0x433718 ADD X8, SP, #744 |
(1696) 0x43371c STR X8, [SP, #32] |
(1696) 0x433720 ADD X8, SP, #760 |
(1696) 0x433724 STR X8, [SP, #24] |
(1696) 0x433728 ADD X8, SP, #464 |
(1696) 0x43372c STR X8, [SP, #16] |
(1696) 0x433730 ADD X8, SP, #648 |
(1696) 0x433734 STR X8, [SP, #8] |
(1696) 0x433738 ADD X8, SP, #752 |
(1696) 0x43373c STR X8, [SP] |
(1696) 0x433740 BL 40f460 |
(1696) 0x433744 LDR X8, [SP, #728] |
(1696) 0x433748 LDR X9, [SP, #648] |
(1696) 0x43374c LDR X0, [X8, X9,LSL #3] |
(1696) 0x433750 BL 4b2470 |
(1696) 0x433754 LDR X9, [SP, #728] |
(1696) 0x433758 LDR X8, [SP, #648] |
(1696) 0x43375c STR XZR, [X9, X8,LSL #3] |
(1696) 0x433760 LDR X9, [SP, #528] |
(1696) 0x433764 CMP X9, #2 |
(1696) 0x433768 B.LT 4331cc |
(1696) 0x43376c LDR X9, [SP, #720] |
(1696) 0x433770 LDR X0, [X9, X8,LSL #3] |
(1696) 0x433774 BL 4b2470 |
(1696) 0x433778 LDR X8, [SP, #720] |
(1696) 0x43377c LDR X9, [SP, #648] |
(1696) 0x433780 STR XZR, [X8, X9,LSL #3] |
(1696) 0x433784 LDR X8, [SP, #712] |
(1696) 0x433788 LDR X0, [X8, X9,LSL #3] |
(1696) 0x43378c BL 4b2470 |
(1696) 0x433790 LDR X9, [SP, #712] |
(1696) 0x433794 LDR X8, [SP, #648] |
(1696) 0x433798 STR XZR, [X9, X8,LSL #3] |
(1696) 0x43379c B 4331cc |
(1666) 0x4337a0 LDR X19, [SP, #640] |
(1666) 0x4337a4 STP XZR, XZR, [SP, #400] |
(1666) 0x4337a8 MOVZ W8, #2 |
(1666) 0x4337ac CMP X19, #3 |
(1666) 0x4337b0 STR X8, [SP, #648] |
(1666) 0x4337b4 B.LT 432f2c |
(1666) 0x4337b8 LDR X19, [SP, #400] |
(1666) 0x4337bc ORR X25, XZR, XZR |
(1666) 0x4337c0 ORR X20, XZR, XZR |
(1666) 0x4337c4 SUB X22, X30, #8 |
(1666) 0x4337c8 SUB X23, X29, #168 |
(1666) 0x4337cc SUB X26, X29, #144 |
(1666) 0x4337d0 STP XZR, XZR, [SP, #360] |
(1666) 0x4337d4 STR X22, [SP, #352] |
(1666) 0x4337d8 B 4338f0 |
0x4337dc HINT #0 |
(1681) 0x4337e0 LDR X8, [SP, #752] |
(1681) 0x4337e4 LDR X9, [SP, #648] |
(1681) 0x4337e8 ADD X3, SP, #464 |
(1681) 0x4337ec ADD X4, SP, #752 |
(1681) 0x4337f0 ADD X5, SP, #648 |
(1681) 0x4337f4 ADD X6, SP, #624 |
(1681) 0x4337f8 ADD X7, SP, #480 |
(1681) 0x4337fc ADRP X0, |
(1681) 0x433800 ADD X0, X0, #608 |
(1681) 0x433804 MOVZ W1, #29 |
(1681) 0x433808 ADRP X2, 435808 |
(1681) 0x43380c ADD X2, X2, #1424 |
(1681) 0x433810 ADD X8, X8, X9,LSL #3 |
(1681) 0x433814 LDP X8, X9, [X8] |
(1681) 0x433818 SUB X8, X9, X8 |
(1681) 0x43381c STR X8, [SP, #464] |
(1681) 0x433820 ADD X8, SP, #528 |
(1681) 0x433824 STR X8, [SP, #184] |
(1681) 0x433828 ADD X8, SP, #512 |
(1681) 0x43382c STR X8, [SP, #176] |
(1681) 0x433830 ADD X8, SP, #656 |
(1681) 0x433834 STR X8, [SP, #168] |
(1681) 0x433838 ADD X8, SP, #448 |
(1681) 0x43383c STR X8, [SP, #160] |
(1681) 0x433840 ADD X8, SP, #440 |
(1681) 0x433844 STR X8, [SP, #152] |
(1681) 0x433848 ADD X8, SP, #456 |
(1681) 0x43384c STR X8, [SP, #144] |
(1681) 0x433850 ADD X8, SP, #712 |
(1681) 0x433854 STR X8, [SP, #136] |
(1681) 0x433858 ADD X8, SP, #696 |
(1681) 0x43385c STR X8, [SP, #128] |
(1681) 0x433860 SUB X8, X29, #208 |
(1681) 0x433864 STR X8, [SP, #120] |
(1681) 0x433868 ADD X8, SP, #576 |
(1681) 0x43386c STR X8, [SP, #112] |
(1681) 0x433870 SUB X8, X29, #120 |
(1681) 0x433874 STR X8, [SP, #104] |
(1681) 0x433878 SUB X8, X29, #112 |
(1681) 0x43387c STR X8, [SP, #96] |
(1681) 0x433880 ADD X8, SP, #720 |
(1681) 0x433884 STP X23, X8, [SP, #80] |
(1681) 0x433888 ADD X8, SP, #728 |
(1681) 0x43388c STP X26, X8, [SP, #64] |
(1681) 0x433890 ADD X8, SP, #584 |
(1681) 0x433894 STR X8, [SP, #56] |
(1681) 0x433898 SUB X8, X29, #104 |
(1681) 0x43389c STR X8, [SP, #48] |
(1681) 0x4338a0 SUB X8, X29, #96 |
(1681) 0x4338a4 STR X8, [SP, #40] |
(1681) 0x4338a8 ADD X8, SP, #736 |
(1681) 0x4338ac STR X8, [SP, #32] |
(1681) 0x4338b0 ADD X8, SP, #744 |
(1681) 0x4338b4 STR X8, [SP, #24] |
(1681) 0x4338b8 ADD X8, SP, #760 |
(1681) 0x4338bc STR X8, [SP, #16] |
(1681) 0x4338c0 ADD X8, SP, #616 |
(1681) 0x4338c4 STR X8, [SP, #8] |
(1681) 0x4338c8 ADD X8, SP, #488 |
(1681) 0x4338cc STR X8, [SP] |
(1681) 0x4338d0 BL 40f460 |
(1681) 0x4338d4 LDR X8, [SP, #648] |
(1681) 0x4338d8 LDR X9, [SP, #640] |
(1681) 0x4338dc LDR X30, [SP, #432] |
(1681) 0x4338e0 ADD X8, X8, #1 |
(1681) 0x4338e4 CMP X8, X9 |
(1681) 0x4338e8 STR X8, [SP, #648] |
(1681) 0x4338ec B.GE 432f34 |
(1681) 0x4338f0 LDR X8, [SP, #528] |
(1681) 0x4338f4 CMP X8, #1 |
(1681) 0x4338f8 B.LE 433a1c |
(1681) 0x4338fc LDUR X8, [X29, #328] |
(1681) 0x433900 MOVZ W1, #8 |
(1681) 0x433904 ADD X0, X8, #1 |
(1681) 0x433908 BL 4b2370 |
(1681) 0x43390c LDR X8, [SP, #648] |
(1681) 0x433910 MOVZ W1, #8 |
(1681) 0x433914 STR X0, [X19, X8,LSL #3] |
(1681) 0x433918 LDR X0, [SP, #344] |
(1681) 0x43391c BL 4b2370 |
(1681) 0x433920 LDR X8, [SP, #648] |
(1681) 0x433924 LDR X9, [SP, #408] |
(1681) 0x433928 STR X0, [X9, X8,LSL #3] |
(1681) 0x43392c STR XZR, [SP, #504] |
(1681) 0x433930 LDR X8, [X19, X8,LSL #3] |
(1681) 0x433934 STR XZR, [X8] |
(1681) 0x433938 STR XZR, [SP, #560] |
(1681) 0x43393c LDUR X8, [X29, #328] |
(1681) 0x433940 CMP X8, #1 |
(1681) 0x433944 B.LT 4339c4 |
(1681) 0x433948 ADRP X26, 435948 |
(1681) 0x43394c ADD X26, X26, #960 |
(1681) 0x433950 ADD X28, SP, #504 |
(1681) 0x433954 SUB X24, X29, #168 |
(1681) 0x433958 SUB X23, X29, #144 |
(1681) 0x43395c HINT #0 |
(1690) 0x433960 ORR X2, XZR, X26 |
(1690) 0x433964 SUB X3, X29, #192 |
(1690) 0x433968 ADD X4, SP, #560 |
(1690) 0x43396c SUB X5, X29, #200 |
(1690) 0x433970 STP X24, X28, [SP, #16] |
(1690) 0x433974 ADD X6, SP, #584 |
(1690) 0x433978 ADD X7, SP, #648 |
(1690) 0x43397c SUB X8, X29, #216 |
(1690) 0x433980 ADRP X0, |
(1690) 0x433984 ADD X0, X0, #512 |
(1690) 0x433988 STP X8, X23, [SP] |
(1690) 0x43398c MOVZ W1, #9 |
(1690) 0x433990 BL 40f460 |
(1690) 0x433994 LDR X9, [SP, #648] |
(1690) 0x433998 LDR X10, [SP, #560] |
(1690) 0x43399c LDR X8, [SP, #504] |
(1690) 0x4339a0 LDR X9, [X19, X9,LSL #3] |
(1690) 0x4339a4 ADD X9, X9, X10,LSL #3 |
(1690) 0x4339a8 STR X8, [X9, #8] |
(1690) 0x4339ac LDR X8, [SP, #560] |
(1690) 0x4339b0 LDUR X9, [X29, #328] |
(1690) 0x4339b4 ADD X8, X8, #1 |
(1690) 0x4339b8 CMP X8, X9 |
(1690) 0x4339bc STR X8, [SP, #560] |
(1690) 0x4339c0 B.LT 433960 |
(1681) 0x4339c4 LDR X8, [SP, #696] |
(1681) 0x4339c8 LDUR X2, [X29, #296] |
(1681) 0x4339cc LDR X1, [SP, #376] |
(1681) 0x4339d0 MOVZ W0, #11 |
(1681) 0x4339d4 ADD X3, X8, #8 |
(1681) 0x4339d8 BL 4896c0 |
(1681) 0x4339dc BL 489aa0 |
(1681) 0x4339e0 LDR X8, [SP, #504] |
(1681) 0x4339e4 LDR X9, [SP, #368] |
(1681) 0x4339e8 CMP X8, X9 |
(1681) 0x4339ec B.LE 433a0c |
(1681) 0x4339f0 ORR X0, XZR, X20 |
(1681) 0x4339f4 BL 4b2470 |
(1681) 0x4339f8 LDR X0, [SP, #504] |
(1681) 0x4339fc MOVZ W1, #8 |
(1681) 0x433a00 BL 4b2370 |
(1681) 0x433a04 LDR X8, [SP, #504] |
(1681) 0x433a08 ORR X20, XZR, X0 |
(1681) 0x433a0c LDR X30, [SP, #432] |
(1681) 0x433a10 SUB X23, X29, #168 |
(1681) 0x433a14 SUB X26, X29, #144 |
(1681) 0x433a18 STR X8, [SP, #368] |
(1681) 0x433a1c LDUR X13, [X29, #328] |
(1681) 0x433a20 STR XZR, [SP, #560] |
(1681) 0x433a24 CMP X13, #1 |
(1681) 0x433a28 B.LT 433b80 |
(1681) 0x433a2c LDP X9, X8, [X29, #824] |
(1681) 0x433a30 LDR X11, [SP, #584] |
(1681) 0x433a34 ORR X10, XZR, XZR |
(1681) 0x433a38 ORR X0, XZR, XZR |
(1681) 0x433a3c B 433a50 |
(1686) 0x433a40 LDUR X13, [X29, #328] |
(1686) 0x433a44 CMP X0, X13 |
(1686) 0x433a48 STR X0, [SP, #560] |
(1686) 0x433a4c B.GE 433b80 |
(1686) 0x433a50 LDR X12, [X8, X0,LSL #3] |
(1686) 0x433a54 ADD X0, X0, #1 |
(1686) 0x433a58 LDR X14, [X8, X0,LSL #3] |
(1686) 0x433a5c CMP X12, X14 |
(1686) 0x433a60 B.GE 433a44 |
(1686) 0x433a64 LDR X18, [SP, #728] |
(1686) 0x433a68 LDR X13, [SP, #744] |
(1686) 0x433a6c LDUR X14, [X29, #368] |
(1686) 0x433a70 SUB X18, X18, #8 |
(1686) 0x433a74 LDR X15, [SP, #736] |
(1686) 0x433a78 LDUR X16, [X29, #344] |
(1686) 0x433a7c LDR X17, [SP, #720] |
(1686) 0x433a80 B 433a9c |
(1687) 0x433a84 LDR X0, [SP, #560] |
(1687) 0x433a88 ADD X12, X12, #1 |
(1687) 0x433a8c ADD X0, X0, #1 |
(1687) 0x433a90 LDR X1, [X8, X0,LSL #3] |
(1687) 0x433a94 CMP X12, X1 |
(1687) 0x433a98 B.GE 433a40 |
(1687) 0x433a9c LDR X0, [X9, X12,LSL #3] |
(1687) 0x433aa0 LDR X2, [SP, #648] |
(1687) 0x433aa4 LDR X1, [X11, X0,LSL #3] |
(1687) 0x433aa8 SUB X2, X2, #1 |
(1687) 0x433aac CMP X1, X2 |
(1687) 0x433ab0 B.NE 433a84 |
(1687) 0x433ab4 ADD X1, X0, #1 |
(1687) 0x433ab8 LDR X3, [X14, X1,LSL #3] |
(1687) 0x433abc CMP X3, #1 |
(1687) 0x433ac0 B.LT 433af0 |
(1687) 0x433ac4 LDR X2, [X13, X0,LSL #3] |
(1687) 0x433ac8 ADD X3, X3, X2 |
(1689) 0x433acc LDR X4, [SP, #648] |
(1689) 0x433ad0 LDR X4, [X18, X4,LSL #3] |
(1689) 0x433ad4 LDR X4, [X4, X2,LSL #3] |
(1689) 0x433ad8 ADD X2, X2, #1 |
(1689) 0x433adc CMP X2, X3 |
(1689) 0x433ae0 ADD X4, X4, X27 |
(1689) 0x433ae4 STR X4, [X20, X10,LSL #3] |
(1689) 0x433ae8 ADD X10, X10, #1 |
(1689) 0x433aec B.LT 433acc |
(1687) 0x433af0 LDR X1, [X16, X1,LSL #3] |
(1687) 0x433af4 CMP X1, #1 |
(1687) 0x433af8 B.LT 433a84 |
(1687) 0x433afc LDR X0, [X15, X0,LSL #3] |
(1687) 0x433b00 ADD X1, X1, X0 |
(1687) 0x433b04 B 433b14 |
(1688) 0x433b08 ADD X0, X0, #1 |
(1688) 0x433b0c CMP X0, X1 |
(1688) 0x433b10 B.GE 433a84 |
(1688) 0x433b14 LDR X2, [SP, #648] |
(1688) 0x433b18 LDR X4, [SP, #704] |
(1688) 0x433b1c ORR X5, XZR, X22 |
(1688) 0x433b20 SUB X3, X2, #1 |
(1688) 0x433b24 ADD X4, X4, #8 |
(1688) 0x433b28 LDR X2, [X17, X3,LSL #3] |
(1688) 0x433b2c CMP X3, #0 |
(1688) 0x433b30 CSEL X3, X3, XZR, #12 |
(1688) 0x433b34 LDR X2, [X2, X0,LSL #3] |
(1688) 0x433b38 HINT #0 |
(1688) 0x433b3c HINT #0 |
(1688) 0x433b40 CBZ X3, 433b08 |
0x433b44 LDR X6, [X4], #8 |
0x433b48 ADD X5, X5, #8 |
0x433b4c SUB X3, X3, #1 |
0x433b50 CMP X2, X6 |
0x433b54 B.GE 433b40 |
0x433b58 LDUR X3, [X4, #496] |
0x433b5c SUB X2, X2, X3 |
0x433b60 LDR X3, [X5] |
0x433b64 LDR X2, [X3, X2,LSL #3] |
0x433b68 STR X2, [X20, X10,LSL #3] |
0x433b6c ADD X10, X10, #1 |
0x433b70 B 433b08 |
0x433b74 HINT #0 |
0x433b78 HINT #0 |
0x433b7c HINT #0 |
(1681) 0x433b80 LDR X8, [SP, #528] |
(1681) 0x433b84 CMP X8, #1 |
(1681) 0x433b88 B.LE 433d0c |
(1681) 0x433b8c LDR X8, [SP, #648] |
(1681) 0x433b90 LDR X9, [SP, #408] |
(1681) 0x433b94 LDR X8, [X9, X8,LSL #3] |
(1681) 0x433b98 STR XZR, [X8] |
(1681) 0x433b9c LDR X8, [SP, #416] |
(1681) 0x433ba0 STR XZR, [SP, #560] |
(1681) 0x433ba4 CMP X8, #1 |
(1681) 0x433ba8 B.LT 433c48 |
(1681) 0x433bac LDR X8, [SP, #576] |
(1681) 0x433bb0 ORR X24, XZR, XZR |
(1681) 0x433bb4 ORR X9, XZR, XZR |
(1681) 0x433bb8 B 433be8 |
0x433bbc HINT #0 |
(1684) 0x433bc0 LDR X9, [SP, #648] |
(1684) 0x433bc4 LDR X10, [SP, #408] |
(1684) 0x433bc8 LDR X9, [X10, X9,LSL #3] |
(1684) 0x433bcc LDR X10, [SP, #416] |
(1684) 0x433bd0 STR X24, [X9, X13,LSL #3] |
(1684) 0x433bd4 LDR X9, [SP, #560] |
(1684) 0x433bd8 ADD X9, X9, #1 |
(1684) 0x433bdc CMP X9, X10 |
(1684) 0x433be0 STR X9, [SP, #560] |
(1684) 0x433be4 B.GE 433c4c |
(1684) 0x433be8 ADD X13, X9, #1 |
(1684) 0x433bec LDR X10, [X21, X9,LSL #3] |
(1684) 0x433bf0 LDR X11, [X21, X13,LSL #3] |
(1684) 0x433bf4 CMP X10, X11 |
(1684) 0x433bf8 B.GE 433bc0 |
(1684) 0x433bfc LDR X12, [SP, #696] |
(1684) 0x433c00 LDUR X11, [X29, #304] |
(1684) 0x433c04 ADD X12, X12, #8 |
(1684) 0x433c08 B 433c20 |
(1685) 0x433c0c ADD X13, X9, #1 |
(1685) 0x433c10 ADD X10, X10, #1 |
(1685) 0x433c14 LDR X14, [X21, X13,LSL #3] |
(1685) 0x433c18 CMP X10, X14 |
(1685) 0x433c1c B.GE 433bc0 |
(1685) 0x433c20 LDR X14, [SP, #648] |
(1685) 0x433c24 LDR X13, [X8, X10,LSL #3] |
(1685) 0x433c28 SUB X14, X14, #1 |
(1685) 0x433c2c CMP X13, X14 |
(1685) 0x433c30 B.NE 433c0c |
(1685) 0x433c34 STR X24, [X11, X10,LSL #3] |
(1685) 0x433c38 LDR X9, [X12, X10,LSL #3] |
(1685) 0x433c3c ADD X24, X9, X24 |
(1685) 0x433c40 LDR X9, [SP, #560] |
(1685) 0x433c44 B 433c0c |
(1681) 0x433c48 ORR X24, XZR, XZR |
(1681) 0x433c4c LDP X8, X10, [SP, #384] |
(1681) 0x433c50 LDR X11, [SP, #416] |
(1681) 0x433c54 STR X8, [X10] |
(1681) 0x433c58 LDR X8, [SP, #336] |
(1681) 0x433c5c LDUR X9, [X29, #328] |
(1681) 0x433c60 STP X9, X8, [X10, #8] |
(1681) 0x433c64 LDR X8, [SP, #648] |
(1681) 0x433c68 LDR X9, [X19, X8,LSL #3] |
(1681) 0x433c6c STR X9, [X10, #24] |
(1681) 0x433c70 LDR X9, [SP, #328] |
(1681) 0x433c74 STP X11, X9, [X10, #40] |
(1681) 0x433c78 LDR X9, [SP, #408] |
(1681) 0x433c7c LDR X9, [X9, X8,LSL #3] |
(1681) 0x433c80 STR X9, [X10, #56] |
(1681) 0x433c84 CBZ X24, 433cb4 |
0x433c88 ORR X0, XZR, X24 |
0x433c8c MOVZ W1, #8 |
0x433c90 BL 4b2370 |
0x433c94 LDR X8, [SP, #712] |
0x433c98 LDR X9, [SP, #648] |
0x433c9c MOVZ W1, #8 |
0x433ca0 STR X0, [X8, X9,LSL #3] |
0x433ca4 ORR X0, XZR, X24 |
0x433ca8 BL 4b2370 |
0x433cac LDR X8, [SP, #648] |
0x433cb0 B 433cc0 |
(1681) 0x433cb4 LDR X9, [SP, #712] |
(1681) 0x433cb8 ORR X0, XZR, XZR |
(1681) 0x433cbc STR XZR, [X9, X8,LSL #3] |
(1681) 0x433cc0 STR X0, [X22, X8,LSL #3] |
(1681) 0x433cc4 LDR X1, [SP, #392] |
(1681) 0x433cc8 LDR X19, [SP, #360] |
(1681) 0x433ccc ORR X2, XZR, X20 |
(1681) 0x433cd0 MOVZ W0, #11 |
(1681) 0x433cd4 LDR X9, [SP, #712] |
(1681) 0x433cd8 LDR X3, [X9, X8,LSL #3] |
(1681) 0x433cdc BL 4896c0 |
(1681) 0x433ce0 BL 489aa0 |
(1681) 0x433ce4 CMP X24, X19 |
(1681) 0x433ce8 B.LE 433d04 |
(1681) 0x433cec ORR X0, XZR, X25 |
(1681) 0x433cf0 BL 4b2470 |
(1681) 0x433cf4 ORR X0, XZR, X24 |
(1681) 0x433cf8 MOVZ W1, #8 |
(1681) 0x433cfc BL 4b2370 |
(1681) 0x433d00 ORR X25, XZR, X0 |
(1681) 0x433d04 LDR X30, [SP, #432] |
(1681) 0x433d08 STR X24, [SP, #360] |
(1681) 0x433d0c LDR X8, [SP, #416] |
(1681) 0x433d10 STR XZR, [SP, #560] |
(1681) 0x433d14 CMP X8, #1 |
(1681) 0x433d18 B.LT 433fa0 |
(1681) 0x433d1c LDR X28, [X21, XZR,LSL #3] |
(1681) 0x433d20 ORR X19, XZR, XZR |
(1681) 0x433d24 ORR X22, XZR, XZR |
(1681) 0x433d28 ORR X8, XZR, XZR |
(1681) 0x433d2c B 433d4c |
0x433d30 HINT #0 |
0x433d34 HINT #0 |
0x433d38 HINT #0 |
0x433d3c HINT #0 |
(1682) 0x433d40 LDR X8, [SP, #560] |
(1682) 0x433d44 LDR X21, [SP, #424] |
(1682) 0x433d48 ORR X22, XZR, X9 |
(1682) 0x433d4c ADD X9, X8, #1 |
(1682) 0x433d50 LDR X10, [X21, X9,LSL #3] |
(1682) 0x433d54 CMP X28, X10 |
(1682) 0x433d58 B.GE 433eac |
(1682) 0x433d5c LDR X9, [SP, #576] |
(1682) 0x433d60 LDR X10, [SP, #648] |
(1682) 0x433d64 LDR X9, [X9, X28,LSL #3] |
(1682) 0x433d68 SUB X10, X10, #1 |
(1682) 0x433d6c ADD X28, X28, #1 |
(1682) 0x433d70 CMP X9, X10 |
(1682) 0x433d74 B.NE 433d4c |
(1682) 0x433d78 LDR X9, [SP, #696] |
(1682) 0x433d7c LDR X9, [X9, X28,LSL #3] |
(1682) 0x433d80 CMP X9, #1 |
(1682) 0x433d84 B.LT 433ea4 |
(1682) 0x433d88 LDR X8, [SP, #712] |
(1682) 0x433d8c ORR X26, XZR, X22 |
(1682) 0x433d90 B 433dc0 |
0x433d94 HINT #0 |
0x433d98 HINT #0 |
0x433d9c HINT #0 |
(1683) 0x433da0 ORN X9, XZR, X11 |
(1683) 0x433da4 STR X9, [X10, X26,LSL #3] |
(1683) 0x433da8 LDR X9, [SP, #696] |
(1683) 0x433dac ADD X26, X26, #1 |
(1683) 0x433db0 LDR X9, [X9, X28,LSL #3] |
(1683) 0x433db4 ADD X9, X9, X22 |
(1683) 0x433db8 CMP X26, X9 |
(1683) 0x433dbc B.GE 433d40 |
(1683) 0x433dc0 LDR X9, [SP, #648] |
(1683) 0x433dc4 LDR X10, [X8, X9,LSL #3] |
(1683) 0x433dc8 LDR X24, [X10, X26,LSL #3] |
(1683) 0x433dcc SUBS X11, X24, X27 |
(1683) 0x433dd0 B.MI 433de0 |
(1683) 0x433dd4 LDR X12, [SP, #624] |
(1683) 0x433dd8 CMP X11, X12 |
(1683) 0x433ddc B.LT 433da0 |
(1683) 0x433de0 CMP X9, #2 |
(1683) 0x433de4 B.LT 433e48 |
(1683) 0x433de8 ORR X23, XZR, X25 |
(1683) 0x433dec ORR X25, XZR, X27 |
(1683) 0x433df0 LDR X27, [SP, #704] |
(1683) 0x433df4 ORR X21, XZR, XZR |
(1683) 0x433df8 HINT #0 |
(1683) 0x433dfc HINT #0 |
(1683) 0x433e00 UBFM X8, X21, #61, #60 |
(1683) 0x433e04 ORR X1, XZR, X24 |
(1683) 0x433e08 LDR X0, [X30, X8] |
(1683) 0x433e0c ADD X8, X27, X8 |
(1683) 0x433e10 LDP X8, X9, [X8] |
(1683) 0x433e14 SUB X2, X9, X8 |
(1683) 0x433e18 BL 4b1520 |
(1683) 0x433e1c TBZ X0, #63, 433e80 |
0x433e20 LDR X9, [SP, #648] |
0x433e24 LDR X30, [SP, #432] |
0x433e28 ADD X21, X21, #1 |
0x433e2c SUB X10, X9, #1 |
0x433e30 CMP X21, X10 |
0x433e34 B.LT 433e00 |
0x433e38 LDR X8, [SP, #712] |
0x433e3c ORR X27, XZR, X25 |
0x433e40 ORR X25, XZR, X23 |
0x433e44 B 433e4c |
(1683) 0x433e48 SUB X10, X9, #1 |
(1683) 0x433e4c LDR X9, [X8, X9,LSL #3] |
(1683) 0x433e50 LDR X10, [X30, X10,LSL #3] |
(1683) 0x433e54 LDR X9, [X9, X26,LSL #3] |
(1683) 0x433e58 STR X9, [X10, X19,LSL #3] |
(1683) 0x433e5c STR X26, [X25, X19,LSL #3] |
(1683) 0x433e60 ADD X19, X19, #1 |
(1683) 0x433e64 LDR X9, [SP, #696] |
(1683) 0x433e68 ADD X26, X26, #1 |
(1683) 0x433e6c LDR X9, [X9, X28,LSL #3] |
(1683) 0x433e70 ADD X9, X9, X22 |
(1683) 0x433e74 CMP X26, X9 |
(1683) 0x433e78 B.LT 433dc0 |
(1682) 0x433e7c B 433d40 |
(1683) 0x433e80 LDR X8, [X27, X21,LSL #3] |
(1683) 0x433e84 LDR X10, [SP, #648] |
(1683) 0x433e88 LDR X30, [SP, #432] |
(1683) 0x433e8c ORR X27, XZR, X25 |
(1683) 0x433e90 ORR X25, XZR, X23 |
(1683) 0x433e94 ADD X9, X8, X0 |
(1683) 0x433e98 LDR X8, [SP, #712] |
(1683) 0x433e9c LDR X10, [X8, X10,LSL #3] |
(1683) 0x433ea0 B 433da4 |
(1682) 0x433ea4 ADD X22, X9, X22 |
(1682) 0x433ea8 B 433d4c |
(1682) 0x433eac LDR X8, [SP, #416] |
(1682) 0x433eb0 STR X9, [SP, #560] |
(1682) 0x433eb4 CMP X9, X8 |
(1682) 0x433eb8 ORR X8, XZR, X9 |
(1682) 0x433ebc B.GE 433ec8 |
(1682) 0x433ec0 LDR X28, [X21, X8,LSL #3] |
(1682) 0x433ec4 B 433d4c |
(1681) 0x433ec8 LDR X22, [SP, #352] |
(1681) 0x433ecc SUB X23, X29, #168 |
(1681) 0x433ed0 SUB X26, X29, #144 |
(1681) 0x433ed4 CBZ X19, 433fa0 |
0x433ed8 LDR X8, [SP, #648] |
0x433edc ORR X1, XZR, X25 |
0x433ee0 ORR X2, XZR, XZR |
0x433ee4 SUB X3, X19, #1 |
0x433ee8 LDR X0, [X22, X8,LSL #3] |
0x433eec BL 4b2e60 |
0x433ef0 LDR X9, [SP, #648] |
0x433ef4 LDR X8, [SP, #704] |
0x433ef8 CMP X19, #2 |
0x433efc UBFM X10, X9, #61, #60 |
0x433f00 ADD X9, X10, X8 |
0x433f04 LDUR X11, [X9, #504] |
0x433f08 LDR X9, [SP, #712] |
0x433f0c STR X11, [SP, #488] |
0x433f10 LDR X12, [X25] |
0x433f14 LDR X10, [X9, X10] |
0x433f18 STR X11, [X10, X12,LSL #3] |
0x433f1c MOVZ W10, #1 |
0x433f20 STR X10, [SP, #560] |
0x433f24 B.LT 433fe0 |
0x433f28 ORR X10, XZR, XZR |
0x433f2c MOVZ W11, #1 |
0x433f30 B 433f7c |
0x433f34 HINT #0 |
0x433f38 HINT #0 |
0x433f3c HINT #0 |
(1694) 0x433f40 ADD X10, X10, #1 |
(1694) 0x433f44 STR X14, [X13, X10,LSL #3] |
(1694) 0x433f48 LDR X11, [SP, #488] |
(1694) 0x433f4c LDR X12, [SP, #648] |
(1694) 0x433f50 ADD X13, X11, #1 |
(1694) 0x433f54 LDR X11, [SP, #560] |
(1694) 0x433f58 STR X13, [SP, #488] |
(1695) 0x433f5c LDR X12, [X9, X12,LSL #3] |
(1695) 0x433f60 LDR X11, [X25, X11,LSL #3] |
(1695) 0x433f64 STR X13, [X12, X11,LSL #3] |
(1695) 0x433f68 LDR X11, [SP, #560] |
(1695) 0x433f6c ADD X11, X11, #1 |
(1695) 0x433f70 CMP X11, X19 |
(1695) 0x433f74 STR X11, [SP, #560] |
(1695) 0x433f78 B.GE 433fe0 |
(1695) 0x433f7c LDR X12, [SP, #648] |
(1695) 0x433f80 LDR X13, [X22, X12,LSL #3] |
(1695) 0x433f84 LDR X14, [X13, X11,LSL #3] |
(1695) 0x433f88 LDR X15, [X13, X10,LSL #3] |
(1695) 0x433f8c CMP X14, X15 |
(1695) 0x433f90 B.GT 433f40 |
(1695) 0x433f94 LDR X13, [SP, #488] |
(1695) 0x433f98 B 433f5c |
0x433f9c HINT #0 |
(1681) 0x433fa0 LDR X8, [SP, #528] |
(1681) 0x433fa4 LDR X19, [SP, #400] |
(1681) 0x433fa8 CMP X8, #1 |
(1681) 0x433fac B.LE 433fc4 |
(1681) 0x433fb0 LDR X8, [SP, #704] |
(1681) 0x433fb4 LDR X9, [SP, #648] |
(1681) 0x433fb8 ADD X8, X8, X9,LSL #3 |
(1681) 0x433fbc LDUR X9, [X8, #504] |
(1681) 0x433fc0 STR X9, [X8] |
(1681) 0x433fc4 LDP X9, X8, [SP, #480] |
(1681) 0x433fc8 CMP X9, X8 |
(1681) 0x433fcc B.GT 4337e0 |
(1681) 0x433fd0 B 434000 |
0x433fd4 HINT #0 |
0x433fd8 HINT #0 |
0x433fdc HINT #0 |
0x433fe0 LDR X9, [SP, #488] |
0x433fe4 LDR X10, [SP, #648] |
0x433fe8 LDR X19, [SP, #400] |
0x433fec ADD X9, X9, #1 |
0x433ff0 STR X9, [X8, X10,LSL #3] |
0x433ff4 LDP X9, X8, [SP, #480] |
0x433ff8 CMP X9, X8 |
0x433ffc B.GT 4337e0 |
(1681) 0x434000 ADD X8, X8, #1 |
(1681) 0x434004 STR X8, [SP, #480] |
(1681) 0x434008 B 4337e0 |
(1666) 0x43400c STP X9, X8, [SP, #200] |
(1666) 0x434010 SUB X8, X29, #160 |
(1666) 0x434014 SUB X10, X29, #72 |
(1666) 0x434018 SUB X11, X29, #232 |
(1666) 0x43401c SUB X9, X29, #88 |
(1666) 0x434020 STP X21, X22, [SP, #80] |
(1666) 0x434024 STP X10, X8, [SP, #184] |
(1666) 0x434028 SUB X8, X29, #224 |
(1666) 0x43402c STR X9, [SP, #160] |
(1666) 0x434030 ADD X9, X29, #104 |
(1666) 0x434034 SUB X10, X29, #32 |
(1666) 0x434038 ADD X12, SP, #728 |
(1666) 0x43403c ADRP X0, |
(1666) 0x434040 ADD X0, X0, #752 |
(1666) 0x434044 STP X12, X20, [SP, #16] |
(1666) 0x434048 STP X8, X11, [SP, #168] |
(1666) 0x43404c ADD X8, SP, #680 |
(1666) 0x434050 SUB X11, X29, #56 |
(1666) 0x434054 ADRP X2, 437054 |
(1666) 0x434058 ADD X2, X2, #1200 |
(1666) 0x43405c STP X9, X8, [SP, #144] |
(1666) 0x434060 SUB X8, X29, #80 |
(1666) 0x434064 SUB X9, X29, #256 |
(1666) 0x434068 STP X9, X8, [SP, #128] |
(1666) 0x43406c ADD X8, SP, #720 |
(1666) 0x434070 SUB X9, X29, #168 |
(1666) 0x434074 ADD X3, SP, #632 |
(1666) 0x434078 SUB X4, X29, #128 |
(1666) 0x43407c STP X9, X8, [SP, #112] |
(1666) 0x434080 ADD X8, SP, #736 |
(1666) 0x434084 SUB X9, X29, #40 |
(1666) 0x434088 ADD X5, SP, #752 |
(1666) 0x43408c ADD X6, SP, #464 |
(1666) 0x434090 STP X24, X8, [SP, #96] |
(1666) 0x434094 SUB X8, X29, #48 |
(1666) 0x434098 ADD X7, SP, #760 |
(1666) 0x43409c MOVZ W1, #32 |
(1666) 0x4340a0 STP X9, X8, [SP, #64] |
(1666) 0x4340a4 SUB X8, X29, #8 |
(1666) 0x4340a8 SUB X9, X29, #64 |
(1666) 0x4340ac STP X8, X10, [SP, #48] |
(1666) 0x4340b0 ADD X8, SP, #744 |
(1666) 0x4340b4 STP X11, X9, [SP, #32] |
(1666) 0x4340b8 STP X8, X19, [SP] |
(1666) 0x4340bc BL 40f460 |
(1666) 0x4340c0 LDR X8, [SP, #624] |
(1666) 0x4340c4 CBZ X8, 4340d4 |
0x4340c8 LDUR X0, [X29, #264] |
0x4340cc BL 4b2470 |
0x4340d0 STUR XZR, [X29, #264] |
(1666) 0x4340d4 LDUR X0, [X29, #256] |
(1666) 0x4340d8 BL 4b2470 |
(1666) 0x4340dc LDR X8, [SP, #728] |
(1666) 0x4340e0 STUR XZR, [X29, #256] |
(1666) 0x4340e4 LDR X0, [X8, #8] |
(1666) 0x4340e8 BL 4b2470 |
(1666) 0x4340ec LDR X8, [SP, #728] |
(1666) 0x4340f0 STR XZR, [X8, #8] |
(1666) 0x4340f4 LDR X8, [SP, #528] |
(1666) 0x4340f8 CMP X8, #2 |
(1666) 0x4340fc B.LT 434114 |
(1666) 0x434100 LDR X8, [SP, #720] |
(1666) 0x434104 LDR X0, [X8, #8] |
(1666) 0x434108 BL 4b2470 |
(1666) 0x43410c LDR X8, [SP, #720] |
(1666) 0x434110 STR XZR, [X8, #8] |
(1666) 0x434114 LDR X24, [SP, #640] |
(1666) 0x434118 MOVZ W8, #2 |
(1666) 0x43411c STR X8, [SP, #648] |
(1666) 0x434120 CMP X24, #2 |
(1666) 0x434124 B.LE 434748 |
(1666) 0x434128 RDVL X9, #1 |
(1666) 0x43412c ORR X22, XZR, XZR |
(1666) 0x434130 MOVZ W8, #2 |
(1666) 0x434134 MOVZ W26, #16 |
(1666) 0x434138 SUB X21, X29, #232 |
(1666) 0x43413c STP XZR, X24, [SP, #368] |
(1666) 0x434140 ORR X19, XZR, XZR |
(1666) 0x434144 CNTW X25, ALL |
(1666) 0x434148 UBFM X27, X9, #4, #63 |
(1666) 0x43414c PTRUE P0.D, ALL |
(1666) 0x434150 B 434178 |
0x434154 HINT #0 |
0x434158 HINT #0 |
0x43415c HINT #0 |
(1671) 0x434160 LDR X9, [SP, #376] |
(1671) 0x434164 PTRUE P0.D, ALL |
(1671) 0x434168 ADD X8, X8, #1 |
(1671) 0x43416c STR X8, [SP, #648] |
(1671) 0x434170 CMP X8, X9 |
(1671) 0x434174 B.GE 434740 |
(1671) 0x434178 LDR X9, [SP, #528] |
(1671) 0x43417c CMP X9, #2 |
(1671) 0x434180 B.LT 434584 |
(1671) 0x434184 LDR X9, [SP, #400] |
(1671) 0x434188 LDUR X23, [X29, #328] |
(1671) 0x43418c LDR X8, [X9, X8,LSL #3] |
(1671) 0x434190 LDR X9, [SP, #368] |
(1671) 0x434194 LDR X8, [X8, X23,LSL #3] |
(1671) 0x434198 CMP X8, X9 |
(1671) 0x43419c STR X8, [SP, #504] |
(1671) 0x4341a0 B.LE 4341c8 |
(1671) 0x4341a4 ORR X0, XZR, X19 |
(1671) 0x4341a8 BL 4b2470 |
(1671) 0x4341ac LDR X0, [SP, #504] |
(1671) 0x4341b0 MOVZ W1, #8 |
(1671) 0x4341b4 BL 4b2370 |
(1671) 0x4341b8 LDR X8, [SP, #504] |
(1671) 0x4341bc LDUR X23, [X29, #328] |
(1671) 0x4341c0 PTRUE P0.D, ALL |
(1671) 0x4341c4 ORR X19, XZR, X0 |
(1671) 0x4341c8 STP X22, X8, [SP, #360] |
(1671) 0x4341cc CMP X23, #1 |
(1671) 0x4341d0 STR XZR, [SP, #560] |
(1671) 0x4341d4 B.LT 4344e4 |
(1671) 0x4341d8 LDP X11, X10, [X29, #824] |
(1671) 0x4341dc LDR X8, [SP, #648] |
(1671) 0x4341e0 LDR X12, [SP, #584] |
(1671) 0x4341e4 ORR X4, XZR, XZR |
(1671) 0x4341e8 ORR X9, XZR, XZR |
(1671) 0x4341ec ADD X14, X19, #16 |
(1671) 0x4341f0 SUB X13, X8, #1 |
(1671) 0x4341f4 STR X10, [SP, #424] |
(1671) 0x4341f8 B 434210 |
0x4341fc HINT #0 |
(1672) 0x434200 LDR X10, [SP, #424] |
(1672) 0x434204 CMP X9, X23 |
(1672) 0x434208 STR X9, [SP, #560] |
(1672) 0x43420c B.EQ 4344e4 |
(1672) 0x434210 LDR X15, [X10, X9,LSL #3] |
(1672) 0x434214 ADD X9, X9, #1 |
(1672) 0x434218 LDR X16, [X10, X9,LSL #3] |
(1672) 0x43421c CMP X15, X16 |
(1672) 0x434220 B.GE 434204 |
(1672) 0x434224 LDP X17, X18, [X29, #880] |
(1672) 0x434228 LDP X0, X1, [X29, #856] |
(1672) 0x43422c ADD X2, X18, #16 |
(1672) 0x434230 ADD X3, X1, #16 |
(1672) 0x434234 B 434250 |
0x434238 HINT #0 |
0x43423c HINT #0 |
(1673) 0x434240 ORR X4, XZR, X6 |
(1673) 0x434244 ADD X15, X15, #1 |
(1673) 0x434248 CMP X15, X16 |
(1673) 0x43424c B.EQ 434200 |
(1673) 0x434250 LDR X5, [X11, X15,LSL #3] |
(1673) 0x434254 LDR X8, [X12, X5,LSL #3] |
(1673) 0x434258 CMP X8, X13 |
(1673) 0x43425c B.NE 434244 |
(1673) 0x434260 ADD X7, X5, #1 |
(1673) 0x434264 LDR X28, [X17, X5,LSL #3] |
(1673) 0x434268 LDR X22, [X17, X7,LSL #3] |
(1673) 0x43426c SUBS X8, X22, X28 |
(1673) 0x434270 B.LE 434340 |
(1673) 0x434274 CMP X25, #16 |
(1673) 0x434278 CSEL X10, X25, X26, #8 |
(1673) 0x43427c CMP X8, X10 |
(1673) 0x434280 B.CC 434298 |
(1673) 0x434284 ADD X10, X19, X4,LSL #3 |
(1673) 0x434288 ADD X6, X18, X28,LSL #3 |
(1673) 0x43428c SUB X10, X10, X6 |
(1673) 0x434290 CMP X10, X27,LSL #5 |
(1673) 0x434294 B.CS 434418 |
(1673) 0x434298 ORR X6, XZR, X4 |
(1673) 0x43429c ORR X21, XZR, X28 |
(1673) 0x4342a0 SUB W8, W22, W21 |
(1673) 0x4342a4 ORR X4, XZR, X21 |
(1673) 0x4342a8 ANDS X20, X8, #4160 |
(1673) 0x4342ac B.EQ 4342d8 |
(1673) 0x4342b0 HINT #0 |
(1673) 0x4342b4 HINT #0 |
(1673) 0x4342b8 HINT #0 |
(1673) 0x4342bc HINT #0 |
(1678) 0x4342c0 LDR D0, [X18, X4,LSL #3] |
(1678) 0x4342c4 ADD X4, X4, #1 |
(1678) 0x4342c8 SUBS X20, X20, #1 |
(1678) 0x4342cc STR D0, [X19, X6,LSL #3] |
(1678) 0x4342d0 ADD X6, X6, #1 |
(1678) 0x4342d4 B.NE 4342c0 |
(1673) 0x4342d8 ORN X8, XZR, X21 |
(1673) 0x4342dc ADD X8, X22, X8 |
(1673) 0x4342e0 CMP X8, #3 |
(1673) 0x4342e4 B.CC 434344 |
(1673) 0x4342e8 SUB X22, X22, X4 |
(1673) 0x4342ec ADD X4, X2, X4,LSL #3 |
(1673) 0x4342f0 ADD X20, X14, X6,LSL #3 |
(1673) 0x4342f4 HINT #0 |
(1673) 0x4342f8 HINT #0 |
(1673) 0x4342fc HINT #0 |
(1677) 0x434300 LDUR D0, [X4, #496] |
(1677) 0x434304 ADD X6, X6, #4 |
(1677) 0x434308 SUBS X22, X22, #4 |
(1677) 0x43430c STUR D0, [X20, #496] |
(1677) 0x434310 LDUR D0, [X4, #504] |
(1677) 0x434314 STUR D0, [X20, #504] |
(1677) 0x434318 LDR D0, [X4] |
(1677) 0x43431c STR D0, [X20] |
(1677) 0x434320 LDR D0, [X4, #8] |
(1677) 0x434324 ADD X4, X4, #32 |
(1677) 0x434328 STR D0, [X20, #8] |
(1677) 0x43432c ADD X20, X20, #32 |
(1677) 0x434330 B.NE 434300 |
(1673) 0x434334 B 434344 |
0x434338 HINT #0 |
0x43433c HINT #0 |
(1673) 0x434340 ORR X6, XZR, X4 |
(1673) 0x434344 LDR X21, [X0, X5,LSL #3] |
(1673) 0x434348 LDR X5, [X0, X7,LSL #3] |
(1673) 0x43434c SUBS X8, X5, X21 |
(1673) 0x434350 B.LE 434240 |
(1673) 0x434354 CMP X25, #16 |
(1673) 0x434358 CSEL X10, X25, X26, #8 |
(1673) 0x43435c CMP X8, X10 |
(1673) 0x434360 B.CC 434378 |
(1673) 0x434364 ADD X10, X19, X6,LSL #3 |
(1673) 0x434368 ADD X4, X1, X21,LSL #3 |
(1673) 0x43436c SUB X10, X10, X4 |
(1673) 0x434370 CMP X10, X27,LSL #5 |
(1673) 0x434374 B.CS 434484 |
(1673) 0x434378 ORR X4, XZR, X6 |
(1673) 0x43437c ORR X7, XZR, X21 |
(1673) 0x434380 SUB W8, W5, W7 |
(1673) 0x434384 ORR X6, XZR, X7 |
(1673) 0x434388 ANDS X20, X8, #4160 |
(1673) 0x43438c B.EQ 4343b8 |
(1673) 0x434390 HINT #0 |
(1673) 0x434394 HINT #0 |
(1673) 0x434398 HINT #0 |
(1673) 0x43439c HINT #0 |
(1675) 0x4343a0 LDR D0, [X1, X6,LSL #3] |
(1675) 0x4343a4 ADD X6, X6, #1 |
(1675) 0x4343a8 SUBS X20, X20, #1 |
(1675) 0x4343ac STR D0, [X19, X4,LSL #3] |
(1675) 0x4343b0 ADD X4, X4, #1 |
(1675) 0x4343b4 B.NE 4343a0 |
(1673) 0x4343b8 ORN X8, XZR, X7 |
(1673) 0x4343bc ADD X8, X5, X8 |
(1673) 0x4343c0 CMP X8, #3 |
(1673) 0x4343c4 B.CC 434244 |
(1673) 0x4343c8 SUB X5, X5, X6 |
(1673) 0x4343cc ADD X6, X3, X6,LSL #3 |
(1673) 0x4343d0 ADD X7, X14, X4,LSL #3 |
(1673) 0x4343d4 HINT #0 |
(1673) 0x4343d8 HINT #0 |
(1673) 0x4343dc HINT #0 |
(1674) 0x4343e0 LDUR D0, [X6, #496] |
(1674) 0x4343e4 ADD X4, X4, #4 |
(1674) 0x4343e8 SUBS X5, X5, #4 |
(1674) 0x4343ec STUR D0, [X7, #496] |
(1674) 0x4343f0 LDUR D0, [X6, #504] |
(1674) 0x4343f4 STUR D0, [X7, #504] |
(1674) 0x4343f8 LDR D0, [X6] |
(1674) 0x4343fc STR D0, [X7] |
(1674) 0x434400 LDR D0, [X6, #8] |
(1674) 0x434404 ADD X6, X6, #32 |
(1674) 0x434408 STR D0, [X7, #8] |
(1674) 0x43440c ADD X7, X7, #32 |
(1674) 0x434410 B.NE 4343e0 |
(1673) 0x434414 B 434244 |
(1673) 0x434418 UDIV X10, X8, X25 |
(1673) 0x43441c ORR X24, XZR, XZR |
(1673) 0x434420 MADD X20, X10, X25, XZR |
(1673) 0x434424 UBFM X10, X28, #61, #60 |
(1673) 0x434428 SUB X30, X8, X20 |
(1673) 0x43442c UBFM X8, X4, #61, #60 |
(1673) 0x434430 ADD X6, X4, X20 |
(1673) 0x434434 ADD X21, X28, X20 |
(1673) 0x434438 ADD X28, X18, X10 |
(1673) 0x43443c ADDVL X10, X10, #1 |
(1673) 0x434440 ADD X4, X19, X8 |
(1673) 0x434444 ADDVL X8, X8, #1 |
(1673) 0x434448 ADD X10, X18, X10 |
(1673) 0x43444c ADD X8, X19, X8 |
(1673) 0x434450 HINT #0 |
(1673) 0x434454 HINT #0 |
(1673) 0x434458 HINT #0 |
(1673) 0x43445c HINT #0 |
(1679) 0x434460 LD1D {Z0.D}, P0/Z, [X28, X24,LSL #3] |
(1679) 0x434464 LD1D {Z1.D}, P0/Z, [X10, X24,LSL #3] |
(1679) 0x434468 ST1D {Z0.D}, P0, [X4, X24,LSL #3] |
(1679) 0x43446c ST1D {Z1.D}, P0, [X8, X24,LSL #3] |
(1679) 0x434470 ADD X24, X24, X25 |
(1679) 0x434474 CMP X20, X24 |
(1679) 0x434478 B.NE 434460 |
(1673) 0x43447c CBNZ X30, 4342a0 |
0x434480 B 434344 |
(1673) 0x434484 UDIV X10, X8, X25 |
(1673) 0x434488 ORR X24, XZR, XZR |
(1673) 0x43448c MADD X20, X10, X25, XZR |
(1673) 0x434490 UBFM X10, X21, #61, #60 |
(1673) 0x434494 SUB X22, X8, X20 |
(1673) 0x434498 UBFM X8, X6, #61, #60 |
(1673) 0x43449c ADD X4, X6, X20 |
(1673) 0x4344a0 ADD X7, X21, X20 |
(1673) 0x4344a4 ADD X21, X1, X10 |
(1673) 0x4344a8 ADDVL X10, X10, #1 |
(1673) 0x4344ac ADD X6, X19, X8 |
(1673) 0x4344b0 ADDVL X8, X8, #1 |
(1673) 0x4344b4 ADD X10, X1, X10 |
(1673) 0x4344b8 ADD X8, X19, X8 |
(1673) 0x4344bc HINT #0 |
(1676) 0x4344c0 LD1D {Z0.D}, P0/Z, [X21, X24,LSL #3] |
(1676) 0x4344c4 LD1D {Z1.D}, P0/Z, [X10, X24,LSL #3] |
(1676) 0x4344c8 ST1D {Z0.D}, P0, [X6, X24,LSL #3] |
(1676) 0x4344cc ST1D {Z1.D}, P0, [X8, X24,LSL #3] |
(1676) 0x4344d0 ADD X24, X24, X25 |
(1676) 0x4344d4 CMP X20, X24 |
(1676) 0x4344d8 B.NE 4344c0 |
(1673) 0x4344dc CBNZ X22, 434380 |
0x4344e0 B 434244 |
(1671) 0x4344e4 LDP X11, X9, [SP, #392] |
(1671) 0x4344e8 LDR X8, [SP, #648] |
(1671) 0x4344ec LDP X12, X10, [SP, #408] |
(1671) 0x4344f0 LDR X3, [SP, #568] |
(1671) 0x4344f4 STR X23, [X11, #8] |
(1671) 0x4344f8 LDR X9, [X9, X8,LSL #3] |
(1671) 0x4344fc STR X10, [X11, #40] |
(1671) 0x434500 STR X9, [X11, #24] |
(1671) 0x434504 LDR X9, [X12, X8,LSL #3] |
(1671) 0x434508 STR X9, [X11, #56] |
(1671) 0x43450c LDR X8, [X12, X8,LSL #3] |
(1671) 0x434510 LDR X22, [X8, X10,LSL #3] |
(1671) 0x434514 LDR X8, [SP, #360] |
(1671) 0x434518 CMP X22, X8 |
(1671) 0x43451c B.LE 434540 |
(1671) 0x434520 ORR X0, XZR, X3 |
(1671) 0x434524 BL 4b2470 |
(1671) 0x434528 ORR X0, XZR, X22 |
(1671) 0x43452c MOVZ W1, #8 |
(1671) 0x434530 STR XZR, [SP, #568] |
(1671) 0x434534 BL 4b2370 |
(1671) 0x434538 ORR X3, XZR, X0 |
(1671) 0x43453c STR X0, [SP, #568] |
(1671) 0x434540 LDR X1, [SP, #392] |
(1671) 0x434544 ORR X2, XZR, X19 |
(1671) 0x434548 MOVZ W0, #1 |
(1671) 0x43454c SUB X21, X29, #232 |
(1671) 0x434550 BL 4896c0 |
(1671) 0x434554 BL 489aa0 |
(1671) 0x434558 LDR X8, [SP, #648] |
(1671) 0x43455c LDR X20, [SP, #400] |
(1671) 0x434560 LDR X0, [X20, X8,LSL #3] |
(1671) 0x434564 BL 4b2470 |
(1671) 0x434568 LDR X8, [SP, #648] |
(1671) 0x43456c STR XZR, [X20, X8,LSL #3] |
(1671) 0x434570 LDR X20, [SP, #408] |
(1671) 0x434574 LDR X0, [X20, X8,LSL #3] |
(1671) 0x434578 BL 4b2470 |
(1671) 0x43457c LDR X8, [SP, #648] |
(1671) 0x434580 STR XZR, [X20, X8,LSL #3] |
(1671) 0x434584 LDR X9, [SP, #752] |
(1671) 0x434588 ADD X3, SP, #632 |
(1671) 0x43458c SUB X4, X29, #128 |
(1671) 0x434590 ADD X5, SP, #624 |
(1671) 0x434594 ADD X6, SP, #480 |
(1671) 0x434598 ADD X7, SP, #616 |
(1671) 0x43459c ADRP X0, |
(1671) 0x4345a0 ADD X0, X0, #776 |
(1671) 0x4345a4 MOVZ W1, #42 |
(1671) 0x4345a8 ADRP X2, 4375a8 |
(1671) 0x4345ac ADD X2, X2, #3168 |
(1671) 0x4345b0 ADD X8, X9, X8,LSL #3 |
(1671) 0x4345b4 LDP X8, X9, [X8] |
(1671) 0x4345b8 SUB X8, X9, X8 |
(1671) 0x4345bc STR X8, [SP, #464] |
(1671) 0x4345c0 SUB X8, X29, #224 |
(1671) 0x4345c4 STP X8, X21, [SP, #280] |
(1671) 0x4345c8 ADD X8, SP, #568 |
(1671) 0x4345cc STR X8, [SP, #272] |
(1671) 0x4345d0 SUB X8, X29, #72 |
(1671) 0x4345d4 STR X8, [SP, #264] |
(1671) 0x4345d8 ADD X8, SP, #712 |
(1671) 0x4345dc STR X8, [SP, #256] |
(1671) 0x4345e0 ADD X8, SP, #696 |
(1671) 0x4345e4 STR X8, [SP, #248] |
(1671) 0x4345e8 SUB X8, X29, #208 |
(1671) 0x4345ec STR X8, [SP, #240] |
(1671) 0x4345f0 SUB X8, X29, #88 |
(1671) 0x4345f4 STR X8, [SP, #232] |
(1671) 0x4345f8 ADD X8, SP, #680 |
(1671) 0x4345fc STR X8, [SP, #224] |
(1671) 0x434600 ADD X8, X29, #104 |
(1671) 0x434604 STR X8, [SP, #216] |
(1671) 0x434608 SUB X8, X29, #80 |
(1671) 0x43460c STR X8, [SP, #208] |
(1671) 0x434610 SUB X8, X29, #40 |
(1671) 0x434614 STR X8, [SP, #200] |
(1671) 0x434618 SUB X8, X29, #32 |
(1671) 0x43461c STR X8, [SP, #192] |
(1671) 0x434620 SUB X8, X29, #8 |
(1671) 0x434624 STR X8, [SP, #184] |
(1671) 0x434628 SUB X8, X29, #48 |
(1671) 0x43462c STR X8, [SP, #176] |
(1671) 0x434630 SUB X8, X29, #64 |
(1671) 0x434634 STR X8, [SP, #168] |
(1671) 0x434638 SUB X8, X29, #56 |
(1671) 0x43463c STR X8, [SP, #160] |
(1671) 0x434640 ADD X8, SP, #576 |
(1671) 0x434644 STR X8, [SP, #152] |
(1671) 0x434648 SUB X8, X29, #120 |
(1671) 0x43464c STR X8, [SP, #144] |
(1671) 0x434650 SUB X8, X29, #112 |
(1671) 0x434654 STR X8, [SP, #136] |
(1671) 0x434658 ADD X8, SP, #584 |
(1671) 0x43465c STR X8, [SP, #128] |
(1671) 0x434660 SUB X8, X29, #104 |
(1671) 0x434664 STR X8, [SP, #120] |
(1671) 0x434668 SUB X8, X29, #96 |
(1671) 0x43466c STR X8, [SP, #112] |
(1671) 0x434670 SUB X8, X29, #176 |
(1671) 0x434674 STR X8, [SP, #104] |
(1671) 0x434678 SUB X8, X29, #160 |
(1671) 0x43467c STR X8, [SP, #96] |
(1671) 0x434680 ADD X8, SP, #720 |
(1671) 0x434684 STR X8, [SP, #88] |
(1671) 0x434688 SUB X8, X29, #168 |
(1671) 0x43468c STR X8, [SP, #80] |
(1671) 0x434690 ADD X8, SP, #736 |
(1671) 0x434694 STR X8, [SP, #72] |
(1671) 0x434698 SUB X8, X29, #152 |
(1671) 0x43469c STR X8, [SP, #64] |
(1671) 0x4346a0 SUB X8, X29, #136 |
(1671) 0x4346a4 STR X8, [SP, #56] |
(1671) 0x4346a8 ADD X8, SP, #728 |
(1671) 0x4346ac STR X8, [SP, #48] |
(1671) 0x4346b0 SUB X8, X29, #144 |
(1671) 0x4346b4 STR X8, [SP, #40] |
(1671) 0x4346b8 ADD X8, SP, #744 |
(1671) 0x4346bc STR X8, [SP, #32] |
(1671) 0x4346c0 ADD X8, SP, #760 |
(1671) 0x4346c4 STR X8, [SP, #24] |
(1671) 0x4346c8 ADD X8, SP, #464 |
(1671) 0x4346cc STR X8, [SP, #16] |
(1671) 0x4346d0 ADD X8, SP, #648 |
(1671) 0x4346d4 STR X8, [SP, #8] |
(1671) 0x4346d8 ADD X8, SP, #752 |
(1671) 0x4346dc STR X8, [SP] |
(1671) 0x4346e0 BL 40f460 |
(1671) 0x4346e4 LDR X8, [SP, #728] |
(1671) 0x4346e8 LDR X9, [SP, #648] |
(1671) 0x4346ec LDR X0, [X8, X9,LSL #3] |
(1671) 0x4346f0 BL 4b2470 |
(1671) 0x4346f4 LDR X9, [SP, #728] |
(1671) 0x4346f8 LDR X8, [SP, #648] |
(1671) 0x4346fc STR XZR, [X9, X8,LSL #3] |
(1671) 0x434700 LDR X9, [SP, #528] |
(1671) 0x434704 CMP X9, #2 |
(1671) 0x434708 B.LT 434160 |
(1671) 0x43470c LDR X9, [SP, #720] |
(1671) 0x434710 LDR X0, [X9, X8,LSL #3] |
(1671) 0x434714 BL 4b2470 |
(1671) 0x434718 LDR X8, [SP, #720] |
(1671) 0x43471c LDR X9, [SP, #648] |
(1671) 0x434720 STR XZR, [X8, X9,LSL #3] |
(1671) 0x434724 LDR X8, [SP, #712] |
(1671) 0x434728 LDR X0, [X8, X9,LSL #3] |
(1671) 0x43472c BL 4b2470 |
(1671) 0x434730 LDR X9, [SP, #712] |
(1671) 0x434734 LDR X8, [SP, #648] |
(1671) 0x434738 STR XZR, [X9, X8,LSL #3] |
(1671) 0x43473c B 434160 |
(1666) 0x434740 LDR X24, [SP, #376] |
(1666) 0x434744 B 43474c |
(1666) 0x434748 ORR X19, XZR, XZR |
(1666) 0x43474c LDUR X0, [X29, #288] |
(1666) 0x434750 BL 4b2470 |
(1666) 0x434754 LDR X0, [SP, #400] |
(1666) 0x434758 STUR XZR, [X29, #288] |
(1666) 0x43475c BL 4b2470 |
(1666) 0x434760 LDR X0, [SP, #408] |
(1666) 0x434764 BL 4b2470 |
(1666) 0x434768 LDUR X0, [X29, #280] |
(1666) 0x43476c BL 4b2470 |
(1666) 0x434770 ORR X0, XZR, X19 |
(1666) 0x434774 STUR XZR, [X29, #280] |
(1666) 0x434778 BL 4b2470 |
(1666) 0x43477c LDR X0, [SP, #568] |
(1666) 0x434780 BL 4b2470 |
(1666) 0x434784 LDR X0, [SP, #728] |
(1666) 0x434788 STR XZR, [SP, #568] |
(1666) 0x43478c BL 4b2470 |
(1666) 0x434790 LDR X0, [SP, #720] |
(1666) 0x434794 STR XZR, [SP, #728] |
(1666) 0x434798 BL 4b2470 |
(1666) 0x43479c LDR X0, [SP, #712] |
(1666) 0x4347a0 STR XZR, [SP, #720] |
(1666) 0x4347a4 BL 4b2470 |
(1666) 0x4347a8 LDR X0, [SP, #744] |
(1666) 0x4347ac STR XZR, [SP, #712] |
(1666) 0x4347b0 BL 4b2470 |
(1666) 0x4347b4 LDR X0, [SP, #736] |
(1666) 0x4347b8 STR XZR, [SP, #744] |
(1666) 0x4347bc BL 4b2470 |
(1666) 0x4347c0 LDUR X0, [X29, #304] |
(1666) 0x4347c4 STR XZR, [SP, #736] |
(1666) 0x4347c8 BL 4b2470 |
(1666) 0x4347cc LDR X0, [SP, #696] |
(1666) 0x4347d0 STUR XZR, [X29, #304] |
(1666) 0x4347d4 BL 4b2470 |
(1666) 0x4347d8 LDR X0, [SP, #592] |
(1666) 0x4347dc STR XZR, [SP, #696] |
(1666) 0x4347e0 BL 4b2470 |
(1666) 0x4347e4 LDR X0, [SP, #584] |
(1666) 0x4347e8 STR XZR, [SP, #592] |
(1666) 0x4347ec BL 4b2470 |
(1666) 0x4347f0 LDR X0, [SP, #576] |
(1666) 0x4347f4 STR XZR, [SP, #584] |
(1666) 0x4347f8 BL 4b2470 |
(1666) 0x4347fc LDR X0, [SP, #752] |
(1666) 0x434800 STR XZR, [SP, #576] |
(1666) 0x434804 BL 4b2470 |
(1666) 0x434808 LDR X0, [SP, #760] |
(1666) 0x43480c STR XZR, [SP, #752] |
(1666) 0x434810 BL 4b2470 |
(1666) 0x434814 LDR X0, [SP, #688] |
(1666) 0x434818 STR XZR, [SP, #760] |
(1666) 0x43481c BL 4b2470 |
(1666) 0x434820 LDR X0, [SP, #680] |
(1666) 0x434824 STR XZR, [SP, #688] |
(1666) 0x434828 BL 4b2470 |
(1666) 0x43482c LDR X8, [SP, #528] |
(1666) 0x434830 STR XZR, [SP, #680] |
(1666) 0x434834 CMP X8, #2 |
(1666) 0x434838 B.LT 434844 |
(1666) 0x43483c LDR X0, [SP, #392] |
(1666) 0x434840 BL 4b2470 |
(1666) 0x434844 LDP X8, X4, [SP, #312] |
(1666) 0x434848 LDR X9, [SP, #632] |
(1666) 0x43484c LDR X2, [SP, #520] |
(1666) 0x434850 ORR X5, XZR, XZR |
(1666) 0x434854 LDR X0, [SP, #384] |
(1666) 0x434858 LDR X1, [X8, #8] |
(1666) 0x43485c LDR X3, [X8, #104] |
(1666) 0x434860 LDUR X8, [X29, #368] |
(1666) 0x434864 LDR X6, [X8, X9,LSL #3] |
(1666) 0x434868 LDUR X8, [X29, #344] |
(1666) 0x43486c LDR X7, [X8, X9,LSL #3] |
(1666) 0x434870 BL 4935a0 |
(1666) 0x434874 LDR X20, [X0, #56] |
(1666) 0x434878 LDUR X8, [X29, #376] |
(1666) 0x43487c LDR X1, [SP, #304] |
(1666) 0x434880 ORR X19, XZR, X0 |
(1666) 0x434884 FCMP D8, #0 |
(1666) 0x434888 STR X8, [X20, #48] |
(1666) 0x43488c LDUR X8, [X29, #368] |
(1666) 0x434890 STR X8, [X20] |
(1666) 0x434894 LDUR X8, [X29, #360] |
(1666) 0x434898 STR X8, [X20, #8] |
(1666) 0x43489c LDUR X8, [X29, #352] |
(1666) 0x4348a0 LDR X22, [X0, #64] |
(1666) 0x4348a4 STR X8, [X22, #48] |
(1666) 0x4348a8 LDUR X8, [X29, #344] |
(1666) 0x4348ac STR X8, [X22] |
(1666) 0x4348b0 LDUR X8, [X29, #336] |
(1666) 0x4348b4 STR X8, [X22, #8] |
(1666) 0x4348b8 STR XZR, [X0, #136] |
(1666) 0x4348bc B.NE 4348e0 |
(1666) 0x4348c0 CBNZ X1, 4348e0 |
0x4348c4 LDUR X8, [X29, #344] |
0x4348c8 LDR X9, [SP, #632] |
0x4348cc LDR X20, [X8, X9,LSL #3] |
0x4348d0 STR XZR, [SP, #472] |
0x4348d4 STR X20, [SP, #496] |
0x4348d8 CBNZ X20, 434920 |
0x4348dc B 434b34 |
(1666) 0x4348e0 ORR X0, XZR, X19 |
(1666) 0x4348e4 FMOV D0, D8 |
(1666) 0x4348e8 BL 429760 |
(1666) 0x4348ec LDR X8, [X20, #48] |
(1666) 0x4348f0 STUR X8, [X29, #376] |
(1666) 0x4348f4 LDP X8, X9, [X20] |
(1666) 0x4348f8 STP X9, X8, [X29, #872] |
(1666) 0x4348fc LDR X8, [X22, #48] |
(1666) 0x434900 STUR X8, [X29, #352] |
(1666) 0x434904 LDP X8, X9, [X22] |
(1666) 0x434908 STP X9, X8, [X29, #848] |
(1666) 0x43490c LDR X9, [SP, #632] |
(1666) 0x434910 LDR X20, [X8, X9,LSL #3] |
(1666) 0x434914 STR XZR, [SP, #472] |
(1666) 0x434918 STR X20, [SP, #496] |
(1666) 0x43491c CBZ X20, 434b34 |
0x434920 LDR X8, [SP, #480] |
0x434924 LDUR X9, [X29, #384] |
0x434928 MOVZ W1, #8 |
0x43492c CMP X8, X9 |
0x434930 CSEL X0, X8, X9, #12 |
0x434934 BL 4b2370 |
0x434938 STUR X0, [X29, #272] |
0x43493c ADRP X0, |
0x434940 ADD X0, X0, #848 |
0x434944 ADRP X2, 438944 |
0x434948 ADD X2, X2, #1952 |
0x43494c ADD X3, SP, #480 |
0x434950 SUB X4, X29, #240 |
0x434954 MOVZ W1, #2 |
0x434958 BL 40f460 |
0x43495c CMP X20, #1 |
0x434960 STR XZR, [SP, #472] |
0x434964 STR XZR, [SP, #560] |
0x434968 B.LT 4349c4 |
0x43496c LDUR X8, [X29, #336] |
0x434970 LDUR X9, [X29, #272] |
0x434974 ORR X10, XZR, XZR |
0x434978 MOVZ W11, #1 |
0x43497c B 434990 |
(1693) 0x434980 ADD X10, X10, #1 |
(1693) 0x434984 CMP X10, X20 |
(1693) 0x434988 STR X10, [SP, #560] |
(1693) 0x43498c B.GE 4349b8 |
(1693) 0x434990 LDR X12, [X8, X10,LSL #3] |
(1693) 0x434994 LDR X13, [X9, X12,LSL #3] |
(1693) 0x434998 CBNZ X13, 434980 |
0x43499c LDR X10, [SP, #472] |
0x4349a0 ADD X10, X10, #1 |
0x4349a4 STR X10, [SP, #472] |
0x4349a8 STR X11, [X9, X12,LSL #3] |
0x4349ac LDR X10, [SP, #560] |
0x4349b0 LDR X20, [SP, #496] |
0x4349b4 B 434980 |
0x4349b8 LDR X20, [SP, #472] |
0x4349bc LDR X24, [SP, #640] |
0x4349c0 B 4349c8 |
0x4349c4 ORR X20, XZR, XZR |
0x4349c8 ORR X0, XZR, X20 |
0x4349cc MOVZ W1, #8 |
0x4349d0 BL 4b2370 |
0x4349d4 LDR X8, [SP, #704] |
0x4349d8 STR X0, [SP, #672] |
0x4349dc ORR X21, XZR, X0 |
0x4349e0 MOVZ W1, #8 |
0x4349e4 ADD X8, X8, X24,LSL #3 |
0x4349e8 LDUR X0, [X8, #504] |
0x4349ec BL 4b2370 |
0x4349f0 STR X0, [SP, #664] |
0x4349f4 ADRP X0, |
0x4349f8 ADD X0, X0, #920 |
0x4349fc ADRP X2, 4389fc |
0x434a00 ADD X2, X2, #2208 |
0x434a04 ADD X3, SP, #704 |
0x434a08 ADD X4, SP, #640 |
0x434a0c ADD X5, SP, #664 |
0x434a10 MOVZ W1, #3 |
0x434a14 BL 40f460 |
0x434a18 LDR X13, [SP, #640] |
0x434a1c STR XZR, [SP, #560] |
0x434a20 CMP X13, #1 |
0x434a24 B.LE 434ac8 |
0x434a28 LDR X9, [SP, #704] |
0x434a2c LDUR X10, [X29, #272] |
0x434a30 LDR X17, [SP, #432] |
0x434a34 ORR X8, XZR, XZR |
0x434a38 ORR X11, XZR, XZR |
0x434a3c B 434a58 |
(1692) 0x434a40 LDR X13, [SP, #640] |
(1691) 0x434a44 SUB X11, X13, #1 |
(1691) 0x434a48 STR X15, [SP, #560] |
(1691) 0x434a4c CMP X15, X11 |
(1691) 0x434a50 ORR X11, XZR, X15 |
(1691) 0x434a54 B.GE 434ac0 |
(1691) 0x434a58 ADD X15, X11, #1 |
(1691) 0x434a5c LDR X12, [X9, X11,LSL #3] |
(1691) 0x434a60 LDR X14, [X9, X15,LSL #3] |
(1691) 0x434a64 CMP X12, X14 |
(1691) 0x434a68 B.GE 434a44 |
(1692) 0x434a6c LDR X13, [SP, #672] |
(1692) 0x434a70 LDR X14, [SP, #664] |
(1692) 0x434a74 B 434a94 |
0x434a78 HINT #0 |
0x434a7c HINT #0 |
(1692) 0x434a80 ADD X15, X11, #1 |
(1692) 0x434a84 ADD X12, X12, #1 |
(1692) 0x434a88 LDR X16, [X9, X15,LSL #3] |
(1692) 0x434a8c CMP X12, X16 |
(1692) 0x434a90 B.GE 434a40 |
(1692) 0x434a94 LDR X15, [X10, X12,LSL #3] |
(1692) 0x434a98 CBZ X15, 434a80 |
0x434a9c LDR X15, [X17, X11,LSL #3] |
0x434aa0 LDR X11, [X9, X11,LSL #3] |
0x434aa4 SUB X11, X15, X11,LSL #3 |
0x434aa8 LDR X11, [X11, X12,LSL #3] |
0x434aac STR X11, [X13, X8,LSL #3] |
0x434ab0 STR X11, [X14, X12,LSL #3] |
0x434ab4 ADD X8, X8, #1 |
0x434ab8 LDR X11, [SP, #560] |
0x434abc B 434a80 |
0x434ac0 LDR X21, [SP, #672] |
0x434ac4 LDR X20, [SP, #472] |
0x434ac8 ORR X0, XZR, X21 |
0x434acc ORR X1, XZR, XZR |
0x434ad0 SUB X2, X20, #1 |
0x434ad4 BL 4b2b10 |
0x434ad8 ADRP X0, |
0x434adc ADD X0, X0, #992 |
0x434ae0 ADRP X2, 438ae0 |
0x434ae4 ADD X2, X2, #2464 |
0x434ae8 ADD X3, SP, #704 |
0x434aec ADD X4, SP, #640 |
0x434af0 ADD X5, SP, #664 |
0x434af4 ADD X6, SP, #672 |
0x434af8 ADD X7, SP, #472 |
0x434afc MOVZ W1, #5 |
0x434b00 BL 40f460 |
0x434b04 ADRP X0, |
0x434b08 ADD X0, X0, #1064 |
0x434b0c ADRP X2, 438b0c |
0x434b10 ADD X2, X2, #2720 |
0x434b14 ADD X3, SP, #496 |
0x434b18 SUB X4, X29, #176 |
0x434b1c ADD X5, SP, #664 |
0x434b20 MOVZ W1, #3 |
0x434b24 BL 40f460 |
0x434b28 LDUR X0, [X29, #272] |
0x434b2c BL 4b2470 |
0x434b30 STUR XZR, [X29, #272] |
(1666) 0x434b34 LDR X8, [SP, #528] |
(1666) 0x434b38 CMP X8, #2 |
(1666) 0x434b3c B.LT 434b8c |
(1666) 0x434b40 LDR X8, [SP, #640] |
(1666) 0x434b44 STR XZR, [SP, #560] |
(1666) 0x434b48 CMP X8, #2 |
(1666) 0x434b4c B.LT 434b8c |
(1666) 0x434b50 LDR X10, [SP, #432] |
(1666) 0x434b54 ORR X8, XZR, XZR |
(1666) 0x434b58 HINT #0 |
(1666) 0x434b5c HINT #0 |
(1670) 0x434b60 LDR X0, [X10, X8,LSL #3] |
(1670) 0x434b64 BL 4b2470 |
(1670) 0x434b68 LDR X10, [SP, #432] |
(1670) 0x434b6c LDR X8, [SP, #560] |
(1670) 0x434b70 STR XZR, [X10, X8,LSL #3] |
(1670) 0x434b74 ADD X8, X8, #1 |
(1670) 0x434b78 LDR X9, [SP, #640] |
(1670) 0x434b7c STR X8, [SP, #560] |
(1670) 0x434b80 SUB X9, X9, #1 |
(1670) 0x434b84 CMP X8, X9 |
(1670) 0x434b88 B.LT 434b60 |
(1666) 0x434b8c LDR X0, [SP, #664] |
(1666) 0x434b90 BL 4b2470 |
(1666) 0x434b94 LDR X0, [SP, #432] |
(1666) 0x434b98 STR XZR, [SP, #664] |
(1666) 0x434b9c BL 4b2470 |
(1666) 0x434ba0 LDR X0, [SP, #704] |
(1666) 0x434ba4 BL 4b2470 |
(1666) 0x434ba8 LDR X8, [SP, #472] |
(1666) 0x434bac STR XZR, [SP, #704] |
(1666) 0x434bb0 CBZ X8, 434bc0 |
0x434bb4 LDR X9, [SP, #672] |
0x434bb8 STR X9, [X19, #88] |
0x434bbc STR X8, [X22, #24] |
(1666) 0x434bc0 LDR X20, [X29, #112] |
(1666) 0x434bc4 LDR X8, [SP, #608] |
(1666) 0x434bc8 CBZ X8, 434bec |
0x434bcc ADRP X0, |
0x434bd0 ADD X0, X0, #1136 |
0x434bd4 ADRP X2, 438bd4 |
0x434bd8 ADD X2, X2, #2992 |
0x434bdc ADD X3, SP, #632 |
0x434be0 SUB X4, X29, #8 |
0x434be4 MOVZ W1, #2 |
0x434be8 BL 40f460 |
(1666) 0x434bec LDR X8, [SP, #528] |
(1666) 0x434bf0 CMP X8, #2 |
(1666) 0x434bf4 B.LT 434c00 |
(1666) 0x434bf8 ORR X0, XZR, X19 |
(1666) 0x434bfc BL 48a2f0 |
(1666) 0x434c00 STR X19, [X20] |
(1666) 0x434c04 ORR X0, XZR, XZR |
(1666) 0x434c08 ADD SP, SP, #1008 |
(1666) 0x434c0c LDP X20, X19, [SP, #96] |
(1666) 0x434c10 LDP X22, X21, [SP, #80] |
(1666) 0x434c14 LDP X24, X23, [SP, #64] |
(1666) 0x434c18 LDP X26, X25, [SP, #48] |
(1666) 0x434c1c LDP X28, X27, [SP, #32] |
(1666) 0x434c20 LDP X29, X30, [SP, #16] |
(1666) 0x434c24 LDR D8, [SP], #112 |
(1666) 0x434c28 RET |
(1666) 0x434c2c ORR X8, XZR, XZR |
(1666) 0x434c30 STR X8, [X0, #8] |
(1666) 0x434c34 ORR X0, XZR, X21 |
(1666) 0x434c38 MOVZ W1, #8 |
(1666) 0x434c3c BL 4b2370 |
(1666) 0x434c40 ORR X19, XZR, X0 |
(1666) 0x434c44 ADD X0, X21, #1 |
(1666) 0x434c48 MOVZ W1, #8 |
(1666) 0x434c4c BL 4b2370 |
(1666) 0x434c50 STR X0, [SP, #704] |
(1666) 0x434c54 STR XZR, [X0] |
(1666) 0x434c58 ORR X30, XZR, X19 |
(1666) 0x434c5c LDR X8, [SP, #616] |
(1666) 0x434c60 STR X8, [X0, #8] |
(1666) 0x434c64 STR X8, [SP, #480] |
(1666) 0x434c68 STR X26, [X19] |
(1666) 0x434c6c LDR X9, [SP, #752] |
(1666) 0x434c70 LDR X21, [SP, #424] |
(1666) 0x434c74 LDP X1, X8, [X9, #8] |
(1666) 0x434c78 CMP X1, X8 |
(1666) 0x434c7c STR X1, [SP, #560] |
(1666) 0x434c80 B.GE 432e20 |
(1667) 0x434c84 LDR X11, [SP, #760] |
(1667) 0x434c88 LDR X12, [SP, #744] |
(1667) 0x434c8c LDR X13, [SP, #736] |
(1667) 0x434c90 ORR X8, XZR, XZR |
(1667) 0x434c94 ORR X10, XZR, XZR |
(1667) 0x434c98 LDP X15, X14, [X29, #920] |
(1667) 0x434c9c LDUR X16, [X29, #504] |
(1667) 0x434ca0 LDP X18, X17, [X29, #904] |
(1667) 0x434ca4 LDUR X0, [X29, #288] |
(1667) 0x434ca8 B 434cc4 |
(1667) 0x434cac LDR X1, [SP, #560] |
(1667) 0x434cb0 LDR X2, [X9, #16] |
(1667) 0x434cb4 ADD X1, X1, #1 |
(1667) 0x434cb8 CMP X1, X2 |
(1667) 0x434cbc STR X1, [SP, #560] |
(1667) 0x434cc0 B.GE 432e28 |
(1667) 0x434cc4 LDR X2, [X11, X1,LSL #3] |
(1667) 0x434cc8 STR X10, [X12, X2,LSL #3] |
(1667) 0x434ccc STR X8, [X13, X2,LSL #3] |
(1667) 0x434cd0 ADD X1, X2, #1 |
(1667) 0x434cd4 LDR X3, [X14, X2,LSL #3] |
(1667) 0x434cd8 LDR X5, [X14, X1,LSL #3] |
(1667) 0x434cdc CMP X3, X5 |
(1667) 0x434ce0 B.GE 434d40 |
(1667) 0x434ce4 LDR X4, [SP, #592] |
(1667) 0x434ce8 LDR X6, [SP, #728] |
(1667) 0x434cec B 434d0c |
0x434cf0 HINT #0 |
0x434cf4 HINT #0 |
0x434cf8 HINT #0 |
0x434cfc HINT #0 |
(1669) 0x434d00 ADD X3, X3, #1 |
(1669) 0x434d04 CMP X3, X5 |
(1669) 0x434d08 B.GE 434d40 |
(1669) 0x434d0c LDR X7, [X15, X3,LSL #3] |
(1669) 0x434d10 LDR X19, [X16, X7,LSL #3] |
(1669) 0x434d14 CMP X19, #1 |
(1669) 0x434d18 B.NE 434d00 |
(1669) 0x434d1c LDR X5, [X4, X7,LSL #3] |
(1669) 0x434d20 LDR X7, [X6, #8] |
(1669) 0x434d24 STR X5, [X7, X10,LSL #3] |
(1669) 0x434d28 ADD X10, X10, #1 |
(1669) 0x434d2c LDR X5, [X14, X1,LSL #3] |
(1669) 0x434d30 B 434d00 |
0x434d34 HINT #0 |
0x434d38 HINT #0 |
0x434d3c HINT #0 |
(1667) 0x434d40 LDR X2, [X17, X2,LSL #3] |
(1667) 0x434d44 LDR X4, [X17, X1,LSL #3] |
(1667) 0x434d48 CMP X2, X4 |
(1667) 0x434d4c B.GE 434cac |
(1668) 0x434d50 LDR X3, [SP, #688] |
(1668) 0x434d54 LDR X5, [SP, #720] |
(1668) 0x434d58 B 434d6c |
0x434d5c HINT #0 |
(1668) 0x434d60 ADD X2, X2, #1 |
(1668) 0x434d64 CMP X2, X4 |
(1668) 0x434d68 B.GE 434cac |
(1668) 0x434d6c LDR X6, [X18, X2,LSL #3] |
(1668) 0x434d70 LDR X7, [X0, X6,LSL #3] |
(1668) 0x434d74 CMP X7, #1 |
(1668) 0x434d78 B.NE 434d60 |
(1668) 0x434d7c LDR X4, [X3, X6,LSL #3] |
(1668) 0x434d80 LDR X6, [X5, #8] |
(1668) 0x434d84 STR X4, [X6, X8,LSL #3] |
(1668) 0x434d88 ADD X8, X8, #1 |
(1668) 0x434d8c LDR X4, [X17, X1,LSL #3] |
(1668) 0x434d90 B 434d60 |
0x434d94 HINT #0 |
0x434d98 HINT #0 |
0x434d9c HINT #0 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | hypre_BoomerAMGSetup | par_amg_setup.c:785 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | exec |
Path / |
Source file and lines | par_multi_interp.c:41-2060 |
Module | exec |
nb instructions | 893 |
loop length | 3572 |
nb stack references | 0 |
front end | 102.88 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 77.00 | 77.00 | 95.25 | 95.25 | 95.25 | 95.25 | 0.50 | 0.50 | 0.50 | 0.50 | 119.50 | 119.17 | 119.33 | 81.00 | 81.00 |
cycles | 77.00 | 77.00 | 95.25 | 95.25 | 95.25 | 95.25 | 0.50 | 0.50 | 0.50 | 0.50 | 119.50 | 119.17 | 119.33 | 81.00 | 81.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 102.88 |
Overall L1 | 119.50 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STR D8, [SP, #400]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
STP X29, X30, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X28, X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X26, X25, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X24, X23, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X22, X21, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X20, X19, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB SP, SP, #1008 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X22, X23, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STUR X1, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X5, X4, [X29, #984] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FMOV D8, D0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
LDR X24, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X26, [X2, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X7, X0, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X3, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X22, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X21, [X23, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X8, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X8, X9, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP XZR, X9, [X29, #952] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X23] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP XZR, X8, [X29, #936] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X8, X25, [X2, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X9, X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X28, [X25, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X8, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [X2, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X25] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR XZR, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR XZR, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP XZR, XZR, [X29, #840] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP XZR, XZR, [X29, #808] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP XZR, XZR, [X29, #792] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR XZR, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR XZR, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #696] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #664] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #568] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X9, X10, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVN X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X8, XZR, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [SP, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b44e0 <hypre_NumThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #448] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X20, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4321d0 <hypre_BoomerAMGBuildMultipass+0x170> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X19, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X1, SP, #528 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b3970 <hypre_MPI_Comm_size> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, SP, #536 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b39a0 <hypre_MPI_Comm_rank> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #536] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X3, X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X8, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 43220c <hypre_BoomerAMGBuildMultipass+0x1ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #520] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADRP X2, <4ef210> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, SP, #520 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X27, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [X2, #4008] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X4, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b3f70 <hypre_MPI_Bcast> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432304 <hypre_BoomerAMGBuildMultipass+0x2a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X8, X21, X28, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X21, 43225c <hypre_BoomerAMGBuildMultipass+0x1fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [X23, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X9, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [X23, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X8, 432268 <hypre_BoomerAMGBuildMultipass+0x208> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X25, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X8, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X22, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X0, 432280 <hypre_BoomerAMGBuildMultipass+0x220> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ec280> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #176 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 434288 <hypre_BoomerAMGBuildMultipass+0x2228> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #3536 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X3, SP, #632 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #624 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #608 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X9, X10, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUBS X28, X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4322d8 <hypre_BoomerAMGBuildMultipass+0x278> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 432348 <hypre_BoomerAMGBuildMultipass+0x2e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 43234c <hypre_BoomerAMGBuildMultipass+0x2ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X8, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X8, 432328 <hypre_BoomerAMGBuildMultipass+0x2c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X19, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 48a2f0 <hypre_MatvecCommPkgCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X19, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X8, X21, X28, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X21, 43224c <hypre_BoomerAMGBuildMultipass+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 43225c <hypre_BoomerAMGBuildMultipass+0x1fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X0, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 432384 <hypre_BoomerAMGBuildMultipass+0x324> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 4323b4 <hypre_BoomerAMGBuildMultipass+0x354> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X0, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4323b4 <hypre_BoomerAMGBuildMultipass+0x354> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432410 <hypre_BoomerAMGBuildMultipass+0x3b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X11, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X8, X9, [X11, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X9, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X9, X10, [X11, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STUR X10, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X11, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X9, X8, [X29, #832] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X9, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X10, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X10, X19, [X11, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X10, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X0, 43242c <hypre_BoomerAMGBuildMultipass+0x3cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X25, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 432440 <hypre_BoomerAMGBuildMultipass+0x3e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4324b0 <hypre_BoomerAMGBuildMultipass+0x450> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR XZR, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X25, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 432440 <hypre_BoomerAMGBuildMultipass+0x3e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4324b0 <hypre_BoomerAMGBuildMultipass+0x450> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X25, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4324b0 <hypre_BoomerAMGBuildMultipass+0x450> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X9, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 43246c <hypre_BoomerAMGBuildMultipass+0x40c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4324d4 <hypre_BoomerAMGBuildMultipass+0x474> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X3, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432578 <hypre_BoomerAMGBuildMultipass+0x518> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432554 <hypre_BoomerAMGBuildMultipass+0x4f4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432510 <hypre_BoomerAMGBuildMultipass+0x4b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432578 <hypre_BoomerAMGBuildMultipass+0x518> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X3, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X0, <4ec578> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #272 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 434580 <hypre_BoomerAMGBuildMultipass+0x2520> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #4048 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X19, [SP, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X3, X29, #128 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #616 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #600 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 4325f4 <hypre_BoomerAMGBuildMultipass+0x594> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X26, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4325fc <hypre_BoomerAMGBuildMultipass+0x59c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X26, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X12, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X23, X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X13, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4326f4 <hypre_BoomerAMGBuildMultipass+0x694> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X11, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X18, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X15, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X17, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X12, X12, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X13, X13, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVN X14, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W16, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4326a0 <hypre_BoomerAMGBuildMultipass+0x640> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 43277c <hypre_BoomerAMGBuildMultipass+0x71c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X9, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 43272c <hypre_BoomerAMGBuildMultipass+0x6cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4327a0 <hypre_BoomerAMGBuildMultipass+0x740> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X3, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [SP, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X22, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 4327cc <hypre_BoomerAMGBuildMultipass+0x76c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 43289c <hypre_BoomerAMGBuildMultipass+0x83c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X9, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVN X11, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432810 <hypre_BoomerAMGBuildMultipass+0x7b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432934 <hypre_BoomerAMGBuildMultipass+0x8d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X21, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X0, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 432934 <hypre_BoomerAMGBuildMultipass+0x8d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X9, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 43290c <hypre_BoomerAMGBuildMultipass+0x8ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X22, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X22, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STP XZR, XZR, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #512] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X23, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X9, [SP, #656] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 432a8c <hypre_BoomerAMGBuildMultipass+0xa2c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X11, X10, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X12, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X23, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X20, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X14, X13, [X29, #904] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X15, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X17, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X18, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W16, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4329a0 <hypre_BoomerAMGBuildMultipass+0x940> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORR X20, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X23, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X23, [X8, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432b10 <hypre_BoomerAMGBuildMultipass+0xab0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X9, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432acc <hypre_BoomerAMGBuildMultipass+0xa6c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432b34 <hypre_BoomerAMGBuildMultipass+0xad4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X3, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X3, <4efb38> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X4, <4efb3c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, SP, #544 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X28, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, SP, #552 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #544] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X3, #4008] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X4, [X4, #4032] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b41b0 <hypre_MPI_Allreduce> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #552] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432d78 <hypre_BoomerAMGBuildMultipass+0xd18> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 432d78 <hypre_BoomerAMGBuildMultipass+0xd18> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X21, <4efb7c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X24, <4efb80> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X21, [X21, #4008] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X24, [X24, #4032] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X28, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X22, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LE 432c84 <hypre_BoomerAMGBuildMultipass+0xc24> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X10, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X11, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X15, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X13, X12, [X29, #904] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X14, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 432bf4 <hypre_BoomerAMGBuildMultipass+0xb94> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X8, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X3, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X4, XZR, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, SP, #544 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, SP, #552 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X23, [X9, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X28, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #544] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b41b0 <hypre_MPI_Allreduce> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432d40 <hypre_BoomerAMGBuildMultipass+0xce0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X9, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432cec <hypre_BoomerAMGBuildMultipass+0xc8c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432d64 <hypre_BoomerAMGBuildMultipass+0xd04> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X3, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #552] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432d78 <hypre_BoomerAMGBuildMultipass+0xd18> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432b8c <hypre_BoomerAMGBuildMultipass+0xb2c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X21, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X21, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X0, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #744] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432e04 <hypre_BoomerAMGBuildMultipass+0xda4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X19, 434c2c <hypre_BoomerAMGBuildMultipass+0x2bcc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 434c30 <hypre_BoomerAMGBuildMultipass+0x2bd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X30, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X9, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X21, [SP, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X1, X8, [X9, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
CMP X1, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X1, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 434c84 <hypre_BoomerAMGBuildMultipass+0x2c24> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #512] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X9, X8, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X29, #72 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X11, X29, #232 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #88 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X21, X22, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X10, X8, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X9, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X9, X29, #104 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X29, #32 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X12, SP, #728 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X0, <4ec0b4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #704 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X12, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X11, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #680 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X11, X29, #56 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 4360cc <.omp_outlined..14+0x12c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #272 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #80 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #256 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #720 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #168 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #632 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #128 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #736 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #40 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #752 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #464 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X24, X8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #48 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, SP, #760 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #32 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #64 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X8, X10, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #744 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X11, X9, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X19, [SP] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 43314c <hypre_BoomerAMGBuildMultipass+0x10ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR XZR, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR XZR, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 43318c <hypre_BoomerAMGBuildMultipass+0x112c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X24, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X24, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 434748 <hypre_BoomerAMGBuildMultipass+0x26e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
RDVL X9, #1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ORR X22, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W26, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X21, X29, #232 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP XZR, X24, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CNTW X25, ALL | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
UBFM X27, X9, #4, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
PTRUE P0.D, ALL | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
B 4331e4 <hypre_BoomerAMGBuildMultipass+0x1184> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
B 4333a4 <hypre_BoomerAMGBuildMultipass+0x1344> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4332a4 <hypre_BoomerAMGBuildMultipass+0x1244> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
LDR X6, [X4], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X5, X5, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X3, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X2, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 433b40 <hypre_BoomerAMGBuildMultipass+0x1ae0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X3, [X4, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X2, X2, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X3, [X5] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [X3, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X2, [X20, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X10, X10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 433b08 <hypre_BoomerAMGBuildMultipass+0x1aa8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORR X0, XZR, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X0, XZR, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 433cc0 <hypre_BoomerAMGBuildMultipass+0x1c60> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X9, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X30, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X21, X21, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X21, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 433e00 <hypre_BoomerAMGBuildMultipass+0x1da0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X27, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X25, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 433e4c <hypre_BoomerAMGBuildMultipass+0x1dec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X1, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X2, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X19, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [X22, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2e60 <hypre_qsort2i> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X19, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
UBFM X10, X9, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X9, X10, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X11, [X9, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X25] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [X9, X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [X10, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 433fe0 <hypre_BoomerAMGBuildMultipass+0x1f80> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 433f7c <hypre_BoomerAMGBuildMultipass+0x1f1c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X9, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X19, [SP, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X9, X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X9, [X8, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X9, X8, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
CMP X9, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4337e0 <hypre_BoomerAMGBuildMultipass+0x1780> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR XZR, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
B 434344 <hypre_BoomerAMGBuildMultipass+0x22e4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 434244 <hypre_BoomerAMGBuildMultipass+0x21e4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X20, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X20, [SP, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X20, 434920 <hypre_BoomerAMGBuildMultipass+0x28c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 434b34 <hypre_BoomerAMGBuildMultipass+0x2ad4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X9, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X0, X8, X9, #12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ec93c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #848 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438944 <.omp_outlined..26+0xa4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #1952 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #480 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #240 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X20, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR XZR, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 4349c4 <hypre_BoomerAMGBuildMultipass+0x2964> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X9, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 434990 <hypre_BoomerAMGBuildMultipass+0x2930> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X10, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X10, X10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X11, [X9, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X20, [SP, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 434980 <hypre_BoomerAMGBuildMultipass+0x2920> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X20, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X24, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 4349c8 <hypre_BoomerAMGBuildMultipass+0x2968> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X20, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X21, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X8, X8, X24,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X0, [X8, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #664] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ec9f4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #920 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 4389fc <.omp_outlined..28+0x5c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2208 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #704 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, SP, #640 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #664 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X13, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 434ac8 <hypre_BoomerAMGBuildMultipass+0x2a68> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X10, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X17, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X11, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 434a58 <hypre_BoomerAMGBuildMultipass+0x29f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X15, [X17, X11,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X11, [X9, X11,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X11, X15, X11,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [X11, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [X13, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X11, [X14, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 434a80 <hypre_BoomerAMGBuildMultipass+0x2a20> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X21, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X20, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X1, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X2, X20, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2b10 <hypre_qsort0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X0, <4ecad8> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #992 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438ae0 <.omp_outlined..30+0x40> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2464 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #704 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, SP, #640 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #664 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #672 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, SP, #472 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X0, <4ecb04> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #1064 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438b0c <.omp_outlined..30+0x6c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2720 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #496 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #176 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #664 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR XZR, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X9, [X19, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X8, [X22, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ecbcc> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #1136 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438bd4 <.omp_outlined..32+0x24> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2992 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #632 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 |
Source file and lines | par_multi_interp.c:41-2060 |
Module | exec |
nb instructions | 893 |
loop length | 3572 |
nb stack references | 0 |
front end | 102.88 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 77.00 | 77.00 | 95.25 | 95.25 | 95.25 | 95.25 | 0.50 | 0.50 | 0.50 | 0.50 | 119.50 | 119.17 | 119.33 | 81.00 | 81.00 |
cycles | 77.00 | 77.00 | 95.25 | 95.25 | 95.25 | 95.25 | 0.50 | 0.50 | 0.50 | 0.50 | 119.50 | 119.17 | 119.33 | 81.00 | 81.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 102.88 |
Overall L1 | 119.50 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STR D8, [SP, #400]! | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
STP X29, X30, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X28, X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X26, X25, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X24, X23, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X22, X21, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X20, X19, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB SP, SP, #1008 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X22, X23, [X0, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STUR X1, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X5, X4, [X29, #984] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FMOV D8, D0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
LDR X24, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X26, [X2, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X7, X0, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X3, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X22, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X21, [X23, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X8, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X8, X9, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP XZR, X9, [X29, #952] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X23] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP XZR, X8, [X29, #936] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X8, X25, [X2, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X9, X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X28, [X25, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X8, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [X2, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X25] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR XZR, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR XZR, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP XZR, XZR, [X29, #840] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP XZR, XZR, [X29, #808] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP XZR, XZR, [X29, #792] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR XZR, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR XZR, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #696] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #664] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #568] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X9, X10, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVN X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X8, XZR, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [SP, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b44e0 <hypre_NumThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #448] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X20, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4321d0 <hypre_BoomerAMGBuildMultipass+0x170> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X19, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X1, SP, #528 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b3970 <hypre_MPI_Comm_size> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, SP, #536 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b39a0 <hypre_MPI_Comm_rank> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #536] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X3, X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X8, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 43220c <hypre_BoomerAMGBuildMultipass+0x1ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #520] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADRP X2, <4ef210> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, SP, #520 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X27, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [X2, #4008] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X4, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b3f70 <hypre_MPI_Bcast> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432304 <hypre_BoomerAMGBuildMultipass+0x2a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X8, X21, X28, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X21, 43225c <hypre_BoomerAMGBuildMultipass+0x1fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [X23, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X9, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [X23, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X8, 432268 <hypre_BoomerAMGBuildMultipass+0x208> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X25, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X8, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X22, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X0, 432280 <hypre_BoomerAMGBuildMultipass+0x220> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ec280> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #176 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 434288 <hypre_BoomerAMGBuildMultipass+0x2228> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #3536 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X3, SP, #632 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #624 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #608 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #608] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X9, X10, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUBS X28, X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4322d8 <hypre_BoomerAMGBuildMultipass+0x278> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 432348 <hypre_BoomerAMGBuildMultipass+0x2e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B 43234c <hypre_BoomerAMGBuildMultipass+0x2ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [X8, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X8, 432328 <hypre_BoomerAMGBuildMultipass+0x2c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X19, [SP, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 48a2f0 <hypre_MatvecCommPkgCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X19, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X8, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X8, X21, X28, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CSEL X20, X24, X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X21, 43224c <hypre_BoomerAMGBuildMultipass+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 43225c <hypre_BoomerAMGBuildMultipass+0x1fc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X0, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 432384 <hypre_BoomerAMGBuildMultipass+0x324> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 4323b4 <hypre_BoomerAMGBuildMultipass+0x354> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR X0, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4323b4 <hypre_BoomerAMGBuildMultipass+0x354> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432410 <hypre_BoomerAMGBuildMultipass+0x3b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X11, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X8, X9, [X11, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X9, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X9, X10, [X11, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STUR X10, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X11, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X9, X8, [X29, #832] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X9, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X10, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X10, X19, [X11, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X10, [SP, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X0, 43242c <hypre_BoomerAMGBuildMultipass+0x3cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X25, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 432440 <hypre_BoomerAMGBuildMultipass+0x3e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4324b0 <hypre_BoomerAMGBuildMultipass+0x450> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR XZR, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X25, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 432440 <hypre_BoomerAMGBuildMultipass+0x3e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4324b0 <hypre_BoomerAMGBuildMultipass+0x450> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X25, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4324b0 <hypre_BoomerAMGBuildMultipass+0x450> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X9, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 43246c <hypre_BoomerAMGBuildMultipass+0x40c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4324d4 <hypre_BoomerAMGBuildMultipass+0x474> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X3, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432578 <hypre_BoomerAMGBuildMultipass+0x518> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432554 <hypre_BoomerAMGBuildMultipass+0x4f4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432510 <hypre_BoomerAMGBuildMultipass+0x4b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432578 <hypre_BoomerAMGBuildMultipass+0x518> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X3, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X0, <4ec578> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #272 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 434580 <hypre_BoomerAMGBuildMultipass+0x2520> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #4048 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X19, [SP, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #600] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X3, X29, #128 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #616 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #600 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 4325f4 <hypre_BoomerAMGBuildMultipass+0x594> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #688] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X26, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4325fc <hypre_BoomerAMGBuildMultipass+0x59c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X26, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X12, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X23, X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR XZR, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X13, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 4326f4 <hypre_BoomerAMGBuildMultipass+0x694> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X11, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X18, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X15, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X17, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X12, X12, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X13, X13, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVN X14, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W16, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4326a0 <hypre_BoomerAMGBuildMultipass+0x640> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 43277c <hypre_BoomerAMGBuildMultipass+0x71c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X9, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X10, [SP, #592] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 43272c <hypre_BoomerAMGBuildMultipass+0x6cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4327a0 <hypre_BoomerAMGBuildMultipass+0x740> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X3, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [SP, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X22, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #616] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X0, 4327cc <hypre_BoomerAMGBuildMultipass+0x76c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 43289c <hypre_BoomerAMGBuildMultipass+0x83c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X9, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVN X11, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432810 <hypre_BoomerAMGBuildMultipass+0x7b0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432934 <hypre_BoomerAMGBuildMultipass+0x8d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X21, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X0, [SP, #680] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 432934 <hypre_BoomerAMGBuildMultipass+0x8d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X9, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 43290c <hypre_BoomerAMGBuildMultipass+0x8ac> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X22, [SP, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X22, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STP XZR, XZR, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #512] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X23, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X9, [SP, #656] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 432a8c <hypre_BoomerAMGBuildMultipass+0xa2c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X11, X10, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X12, [X29, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X23, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X20, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X14, X13, [X29, #904] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDUR X15, [X29, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X17, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X18, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W16, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 4329a0 <hypre_BoomerAMGBuildMultipass+0x940> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORR X20, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X23, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X23, [X8, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432b10 <hypre_BoomerAMGBuildMultipass+0xab0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X9, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432acc <hypre_BoomerAMGBuildMultipass+0xa6c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432b34 <hypre_BoomerAMGBuildMultipass+0xad4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X3, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X3, <4efb38> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X4, <4efb3c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, SP, #544 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X28, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, SP, #552 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #544] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X3, [X3, #4008] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X4, [X4, #4032] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b41b0 <hypre_MPI_Allreduce> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #552] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432d78 <hypre_BoomerAMGBuildMultipass+0xd18> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 432d78 <hypre_BoomerAMGBuildMultipass+0xd18> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X21, <4efb7c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X24, <4efb80> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X21, [X21, #4008] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X24, [X24, #4032] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X28, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X22, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LE 432c84 <hypre_BoomerAMGBuildMultipass+0xc24> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #760] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X10, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X11, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X15, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X13, X12, [X29, #904] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X14, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 432bf4 <hypre_BoomerAMGBuildMultipass+0xb94> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [SP, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X8, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X3, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X4, XZR, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, SP, #544 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, SP, #552 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W2, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X23, [X9, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X28, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #544] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b41b0 <hypre_MPI_Allreduce> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X13, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432d40 <hypre_BoomerAMGBuildMultipass+0xce0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X11, X8, [X29, #824] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X9, [SP, #584] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X12, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 432cec <hypre_BoomerAMGBuildMultipass+0xc8c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 432d64 <hypre_BoomerAMGBuildMultipass+0xd04> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X3, [SP, #576] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X1, [SP, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X2, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4896c0 <hypre_ParCSRCommHandleCreate> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
BL 489aa0 <hypre_ParCSRCommHandleDestroy> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #552] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 432d78 <hypre_BoomerAMGBuildMultipass+0xd18> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432b8c <hypre_BoomerAMGBuildMultipass+0xb2c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X21, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X21, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X0, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #744] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #736] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 432e04 <hypre_BoomerAMGBuildMultipass+0xda4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBZ X19, 434c2c <hypre_BoomerAMGBuildMultipass+0x2bcc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X8, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 434c30 <hypre_BoomerAMGBuildMultipass+0x2bd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X30, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X9, [SP, #752] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X21, [SP, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X1, X8, [X9, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
CMP X1, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR X1, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 434c84 <hypre_BoomerAMGBuildMultipass+0x2c24> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [SP, #512] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X9, X8, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X29, #72 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X11, X29, #232 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #88 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X21, X22, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X10, X8, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #224 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X9, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X9, X29, #104 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X29, #32 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X12, SP, #728 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X0, <4ec0b4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #704 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X12, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X11, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #680 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X11, X29, #56 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 4360cc <.omp_outlined..14+0x12c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #272 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #80 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #256 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #720 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #168 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #632 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #128 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #736 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #40 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #752 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #464 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X24, X8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #48 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, SP, #760 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #32 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X9, X8, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SUB X8, X29, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X9, X29, #64 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X8, X10, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, SP, #744 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X11, X9, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X19, [SP] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #624] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CBZ X8, 43314c <hypre_BoomerAMGBuildMultipass+0x10ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR XZR, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDUR X0, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR XZR, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #728] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X8, [SP, #528] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 43318c <hypre_BoomerAMGBuildMultipass+0x112c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X0, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #720] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [X8, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X24, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X24, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 434748 <hypre_BoomerAMGBuildMultipass+0x26e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
RDVL X9, #1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ORR X22, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W8, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W26, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X21, X29, #232 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP XZR, X24, [SP, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X19, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CNTW X25, ALL | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
UBFM X27, X9, #4, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
PTRUE P0.D, ALL | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
B 4331e4 <hypre_BoomerAMGBuildMultipass+0x1184> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
B 4333a4 <hypre_BoomerAMGBuildMultipass+0x1344> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4332a4 <hypre_BoomerAMGBuildMultipass+0x1244> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
LDR X6, [X4], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X5, X5, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X3, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X2, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 433b40 <hypre_BoomerAMGBuildMultipass+0x1ae0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X3, [X4, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X2, X2, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X3, [X5] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X2, [X3, X2,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X2, [X20, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X10, X10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 433b08 <hypre_BoomerAMGBuildMultipass+0x1aa8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORR X0, XZR, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X0, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X0, XZR, X24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 433cc0 <hypre_BoomerAMGBuildMultipass+0x1c60> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X9, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X30, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X21, X21, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X10, X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X21, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LT 433e00 <hypre_BoomerAMGBuildMultipass+0x1da0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X27, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X25, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 433e4c <hypre_BoomerAMGBuildMultipass+0x1dec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X1, XZR, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X2, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X19, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [X22, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2e60 <hypre_qsort2i> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X8, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X19, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
UBFM X10, X9, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X9, X10, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X11, [X9, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #712] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X25] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [X9, X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [X10, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVZ W10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 433fe0 <hypre_BoomerAMGBuildMultipass+0x1f80> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 433f7c <hypre_BoomerAMGBuildMultipass+0x1f1c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X9, [SP, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X10, [SP, #648] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X19, [SP, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X9, X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X9, [X8, X10,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X9, X8, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
CMP X9, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4337e0 <hypre_BoomerAMGBuildMultipass+0x1780> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR XZR, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
B 434344 <hypre_BoomerAMGBuildMultipass+0x22e4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 434244 <hypre_BoomerAMGBuildMultipass+0x21e4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X9, [SP, #632] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X20, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X20, [SP, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CBNZ X20, 434920 <hypre_BoomerAMGBuildMultipass+0x28c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 434b34 <hypre_BoomerAMGBuildMultipass+0x2ad4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X9, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X0, X8, X9, #12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR X0, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ec93c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #848 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438944 <.omp_outlined..26+0xa4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #1952 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #480 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #240 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X20, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STR XZR, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LT 4349c4 <hypre_BoomerAMGBuildMultipass+0x2964> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X8, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X9, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X10, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W11, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 434990 <hypre_BoomerAMGBuildMultipass+0x2930> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X10, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X10, X10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X11, [X9, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X20, [SP, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 434980 <hypre_BoomerAMGBuildMultipass+0x2920> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X20, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X24, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 4349c8 <hypre_BoomerAMGBuildMultipass+0x2968> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X20, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X8, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X0, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ORR X21, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X8, X8, X24,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDUR X0, [X8, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2370 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STR X0, [SP, #664] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ec9f4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #920 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 4389fc <.omp_outlined..28+0x5c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2208 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #704 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, SP, #640 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #664 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X13, [SP, #640] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR XZR, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 434ac8 <hypre_BoomerAMGBuildMultipass+0x2a68> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #704] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDUR X10, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X17, [SP, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X11, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 434a58 <hypre_BoomerAMGBuildMultipass+0x29f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
LDR X15, [X17, X11,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X11, [X9, X11,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X11, X15, X11,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [X11, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X11, [X13, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X11, [X14, X12,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X8, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [SP, #560] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
B 434a80 <hypre_BoomerAMGBuildMultipass+0x2a20> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X21, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X20, [SP, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X1, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X2, X20, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4b2b10 <hypre_qsort0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X0, <4ecad8> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #992 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438ae0 <.omp_outlined..30+0x40> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2464 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #704 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, SP, #640 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #664 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X6, SP, #672 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, SP, #472 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADRP X0, <4ecb04> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #1064 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438b0c <.omp_outlined..30+0x6c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2720 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #496 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #176 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X5, SP, #664 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDUR X0, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
BL 4b2470 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
STUR XZR, [X29, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X9, [SP, #672] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X9, [X19, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X8, [X22, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADRP X0, <4ecbcc> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #1136 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X2, 438bd4 <.omp_outlined..32+0x24> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X2, #2992 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, SP, #632 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X4, X29, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W1, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 40f460 <@plt_start@+0x210> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass– | 1.51 | 0.23 |
▼Loop 1708 - par_multi_interp.c:550-571 - exec– | 0.13 | 0.02 |
○Loop 1710 - par_multi_interp.c:554-557 - exec | 0.32 | 0.05 |
○Loop 1709 - par_multi_interp.c:568-571 - exec | 0 | 0 |
▼Loop 1713 - par_multi_interp.c:488-514 - exec– | 0.1 | 0.01 |
○Loop 1715 - par_multi_interp.c:491-498 - exec | 0.38 | 0.06 |
○Loop 1714 - par_multi_interp.c:501-508 - exec | 0 | 0 |
▼Loop 1724 - par_multi_interp.c:385-400 - exec– | 0.06 | 0.01 |
○Loop 1725 - par_multi_interp.c:385-395 - exec | 0 | 0 |
▼Loop 1706 - par_multi_interp.c:590-594 - exec– | 0 | 0 |
○Loop 1707 - par_multi_interp.c:593-594 - exec | 0 | 0 |
○Loop 1693 - par_multi_interp.c:1962-1965 - exec | 0 | 0 |
▼Loop 1699 - par_multi_interp.c:1310-1566 - exec– | 0 | 0 |
○Loop 1705 - par_multi_interp.c:1334-1334 - exec | 0 | 0 |
▼Loop 1698 - par_multi_interp.c:1310-1566 - exec– | 0 | 0 |
▼Loop 1697 - par_multi_interp.c:1310-1566 - exec– | 0 | 0 |
○Loop 1696 - par_multi_interp.c:1310-1566 - exec | 0 | 0 |
○Loop 1703 - par_multi_interp.c:1333-1334 - exec | 0 | 0 |
○Loop 1701 - par_multi_interp.c:1337-1338 - exec | 0 | 0 |
○Loop 1702 - par_multi_interp.c:1338-1338 - exec | 0 | 0 |
○Loop 1704 - par_multi_interp.c:1333-1334 - exec | 0 | 0 |
○Loop 1700 - par_multi_interp.c:1337-1338 - exec | 0 | 0 |
▼Loop 1692 - par_multi_interp.c:1982-1986 - exec– | 0 | 0 |
○Loop 1691 - par_multi_interp.c:1982-1984 - exec | 0 | 0 |
○Loop 1730 - par_multi_interp.c:205-208 - exec | 0 | 0 |
▼Loop 1716 - par_multi_interp.c:466-468 - exec– | 0 | 0 |
○Loop 1717 - par_multi_interp.c:466-468 - exec | 0 | 0 |
▼Loop 1711 - par_multi_interp.c:526-530 - exec– | 0 | 0 |
○Loop 1712 - par_multi_interp.c:529-530 - exec | 0 | 0 |
▼Loop 1721 - par_multi_interp.c:415-423 - exec– | 0 | 0 |
○Loop 1722 - par_multi_interp.c:418-423 - exec | 0 | 0 |
▼Loop 1719 - par_multi_interp.c:440-457 - exec– | 0 | 0 |
▼Loop 1720 - par_multi_interp.c:440-457 - exec– | 0 | 0 |
○Loop 1718 - par_multi_interp.c:440-457 - exec | 0 | 0 |
▼Loop 1694 - par_multi_interp.c:872-879 - exec– | 0 | 0 |
○Loop 1695 - par_multi_interp.c:872-879 - exec | 0 | 0 |
▼Loop 1668 - par_multi_interp.c:628-2060 - exec– | 0 | 0 |
▼Loop 1667 - par_multi_interp.c:628-2060 - exec– | 0 | 0 |
○Loop 1669 - par_multi_interp.c:651-655 - exec | 0.45 | 0.07 |
▼Loop 1666 - par_multi_interp.c:628-2060 - exec– | 0 | 0 |
○Loop 1680 - par_multi_interp.c:1158-1161 - exec | 0.06 | 0.01 |
▼Loop 1671 - par_multi_interp.c:1674-1888 - exec– | 0 | 0 |
▼Loop 1672 - par_multi_interp.c:1688-1705 - exec– | 0 | 0 |
▼Loop 1673 - par_multi_interp.c:1690-1705 - exec– | 0 | 0 |
○Loop 1674 - par_multi_interp.c:1703-1705 - exec | 0 | 0 |
○Loop 1679 - par_multi_interp.c:1699-1699 - exec | 0 | 0 |
○Loop 1676 - par_multi_interp.c:1705-1705 - exec | 0 | 0 |
○Loop 1675 - par_multi_interp.c:1703-1705 - exec | 0 | 0 |
○Loop 1678 - par_multi_interp.c:1697-1699 - exec | 0 | 0 |
○Loop 1677 - par_multi_interp.c:1697-1699 - exec | 0 | 0 |
○Loop 1670 - par_multi_interp.c:2016-2017 - exec | 0 | 0 |
▼Loop 1681 - par_multi_interp.c:693-891 - exec– | 0 | 0 |
▼Loop 1682 - par_multi_interp.c:823-856 - exec– | 0 | 0 |
○Loop 1683 - par_multi_interp.c:829-856 - exec | 0 | 0 |
▼Loop 1684 - par_multi_interp.c:773-784 - exec– | 0 | 0 |
○Loop 1685 - par_multi_interp.c:775-780 - exec | 0 | 0 |
▼Loop 1686 - par_multi_interp.c:733-753 - exec– | 0 | 0 |
▼Loop 1687 - par_multi_interp.c:735-753 - exec– | 0 | 0 |
○Loop 1689 - par_multi_interp.c:742-745 - exec | 0 | 0 |
○Loop 1688 - par_multi_interp.c:749-753 - exec | 0 | 0 |
○Loop 1690 - par_multi_interp.c:703-717 - exec | 0 | 0 |
▼Loop 1728 - par_multi_interp.c:307-311 - exec– | 0 | 0 |
○Loop 1729 - par_multi_interp.c:310-311 - exec | 0 | 0 |
▼Loop 1726 - par_multi_interp.c:323-327 - exec– | 0 | 0 |
○Loop 1727 - par_multi_interp.c:326-327 - exec | 0 | 0 |
○Loop 1723 - par_multi_interp.c:399-400 - exec | 0 | 0 |