Function: hypre_CSRMatrixTranspose._omp_fn.0 | Module: exec | Source: csr_matop.c:380-560 [...] | Coverage: 0.16% |
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Function: hypre_CSRMatrixTranspose._omp_fn.0 | Module: exec | Source: csr_matop.c:380-560 [...] | Coverage: 0.16% |
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/usr/include/aarch64-linux-gnu/bits/string_fortified.h: 71 - 71 |
-------------------------------------------------------------------------------- |
71: return __builtin___memset_chk (__dest, __ch, __len, __bos0 (__dest)); |
/home/hbollore/qaas/qaas-runs/169-817-3176/intel/AMG/build/AMG/AMG/seq_mv/csr_matop.c: 380 - 560 |
-------------------------------------------------------------------------------- |
380: return idx%dim1*dim2 + idx/dim1; |
[...] |
463: #pragma omp parallel |
464: #endif |
465: { |
466: HYPRE_Int num_threads = hypre_NumActiveThreads(); |
467: HYPRE_Int my_thread_num = hypre_GetThreadNum(); |
468: |
469: HYPRE_Int iBegin = hypre_CSRMatrixGetLoadBalancedPartitionBegin(A); |
470: HYPRE_Int iEnd = hypre_CSRMatrixGetLoadBalancedPartitionEnd(A); |
471: hypre_assert(iBegin <= iEnd); |
472: hypre_assert(iBegin >= 0 && iBegin <= num_rowsA); |
473: hypre_assert(iEnd >= 0 && iEnd <= num_rowsA); |
474: |
475: HYPRE_Int i, j; |
476: memset(bucket + my_thread_num*num_colsA, 0, sizeof(HYPRE_Int)*num_colsA); |
[...] |
483: for (j = A_i[iBegin]; j < A_i[iEnd]; ++j) { |
484: HYPRE_Int idx = A_j[j]; |
485: bucket[my_thread_num*num_colsA + idx]++; |
[...] |
493: #pragma omp barrier |
494: #endif |
495: |
496: for (i = my_thread_num*num_colsA + 1; i < (my_thread_num + 1)*num_colsA; ++i) { |
497: HYPRE_Int transpose_i = transpose_idx(i, num_threads, num_colsA); |
498: HYPRE_Int transpose_i_minus_1 = transpose_idx(i - 1, num_threads, num_colsA); |
499: |
500: bucket[transpose_i] += bucket[transpose_i_minus_1]; |
501: } |
502: |
503: #ifdef HYPRE_USING_OPENMP |
504: #pragma omp barrier |
505: #pragma omp master |
506: #endif |
507: { |
508: for (i = 1; i < num_threads; ++i) { |
509: HYPRE_Int j0 = num_colsA*i - 1, j1 = num_colsA*(i + 1) - 1; |
510: HYPRE_Int transpose_j0 = transpose_idx(j0, num_threads, num_colsA); |
511: HYPRE_Int transpose_j1 = transpose_idx(j1, num_threads, num_colsA); |
512: |
513: bucket[transpose_j1] += bucket[transpose_j0]; |
514: } |
515: } |
516: #ifdef HYPRE_USING_OPENMP |
517: #pragma omp barrier |
518: #endif |
519: |
520: if (my_thread_num > 0) { |
521: HYPRE_Int transpose_i0 = transpose_idx(num_colsA*my_thread_num - 1, num_threads, num_colsA); |
522: HYPRE_Int offset = bucket[transpose_i0]; |
523: |
524: for (i = my_thread_num*num_colsA; i < (my_thread_num + 1)*num_colsA - 1; ++i) { |
525: HYPRE_Int transpose_i = transpose_idx(i, num_threads, num_colsA); |
526: |
527: bucket[transpose_i] += offset; |
528: } |
529: } |
530: |
531: #ifdef HYPRE_USING_OPENMP |
532: #pragma omp barrier |
[...] |
539: if (data) { |
540: for (i = iEnd - 1; i >= iBegin; --i) { |
541: for (j = A_i[i + 1] - 1; j >= A_i[i]; --j) { |
542: HYPRE_Int idx = A_j[j]; |
543: --bucket[my_thread_num*num_colsA + idx]; |
544: |
545: HYPRE_Int offset = bucket[my_thread_num*num_colsA + idx]; |
546: |
547: AT_data[offset] = A_data[j]; |
548: AT_j[offset] = i; |
549: } |
550: } |
551: } |
552: else { |
553: for (i = iEnd - 1; i >= iBegin; --i) { |
554: for (j = A_i[i + 1] - 1; j >= A_i[i]; --j) { |
555: HYPRE_Int idx = A_j[j]; |
556: --bucket[my_thread_num*num_colsA + idx]; |
557: |
558: HYPRE_Int offset = bucket[my_thread_num*num_colsA + idx]; |
559: |
560: AT_j[offset] = i; |
0x4f35b0 STP X29, X30, [SP, #896]! |
0x4f35b4 ADD X29, SP, #0 |
0x4f35b8 STP X19, X20, [SP, #16] |
0x4f35bc LDP X19, X1, [X0] |
0x4f35c0 STP X21, X22, [SP, #32] |
0x4f35c4 STP X23, X24, [SP, #48] |
0x4f35c8 STP X25, X26, [SP, #64] |
0x4f35cc STP X27, X28, [SP, #80] |
0x4f35d0 STR X1, [SP, #120] |
0x4f35d4 LDP X28, X22, [X0, #16] |
0x4f35d8 LDP X23, X21, [X0, #32] |
0x4f35dc LDP X27, X26, [X0, #48] |
0x4f35e0 LDP X24, X20, [X0, #64] |
0x4f35e4 BL 5063e0 |
0x4f35e8 ORR X25, XZR, X0 |
0x4f35ec BL 506400 |
0x4f35f0 ORR X2, XZR, X0 |
0x4f35f4 ORR X0, XZR, X19 |
0x4f35f8 STR X2, [SP, #104] |
0x4f35fc BL 4f7f80 |
0x4f3600 ORR X3, XZR, X0 |
0x4f3604 ORR X0, XZR, X19 |
0x4f3608 STR X3, [SP, #96] |
0x4f360c BL 4f8024 |
0x4f3610 ORR X19, XZR, X0 |
0x4f3614 LDR X0, [SP, #96] |
0x4f3618 CMP X0, X19 |
0x4f361c B.GT 4f3b58 |
0x4f3620 LDR X9, [SP, #96] |
0x4f3624 CMP X9, #0 |
0x4f3628 CCMP X21, X9, #1, #10 |
0x4f362c B.LT 4f3ba0 |
(3641) 0x4f3630 CMP X19, #0 |
(3641) 0x4f3634 CCMP X21, X19, #1, #10 |
(3641) 0x4f3638 B.LT 4f3be4 |
(3641) 0x4f363c LDR X30, [SP, #104] |
(3641) 0x4f3640 UBFM X2, X27, #61, #60 |
(3641) 0x4f3644 MOVZ W1, #0 |
(3641) 0x4f3648 MADD X21, X27, X30, XZR |
(3641) 0x4f364c ADD X0, X20, X21,LSL #3 |
(3641) 0x4f3650 BL 40f5d0 |
(3641) 0x4f3654 LDR X2, [SP, #96] |
(3641) 0x4f3658 ADD X3, X22, X19,LSL #3 |
(3641) 0x4f365c LDR X0, [X22, X19,LSL #3] |
(3641) 0x4f3660 LDR X5, [X22, X2,LSL #3] |
(3641) 0x4f3664 CMP X5, X0 |
(3641) 0x4f3668 B.GE 4f3690 |
(3645) 0x4f366c LDR X4, [X23, X5,LSL #3] |
(3645) 0x4f3670 ADD X5, X5, #1 |
(3645) 0x4f3674 ADD X6, X21, X4 |
(3645) 0x4f3678 LDR X7, [X20, X6,LSL #3] |
(3645) 0x4f367c ADD X8, X7, #1 |
(3645) 0x4f3680 STR X8, [X20, X6,LSL #3] |
(3645) 0x4f3684 LDR X9, [X3] |
(3645) 0x4f3688 CMP X9, X5 |
(3645) 0x4f368c B.GT 4f366c |
(3641) 0x4f3690 BL 40f1c0 |
(3641) 0x4f3694 ADD X1, X27, X21 |
(3641) 0x4f3698 ADD X0, X21, #1 |
(3641) 0x4f369c STR X1, [SP, #112] |
(3641) 0x4f36a0 CMP X27, #1 |
(3641) 0x4f36a4 B.LE 4f37f8 |
(3641) 0x4f36a8 SUB X11, X1, X0 |
(3641) 0x4f36ac ANDS X12, X11, #4160 |
(3641) 0x4f36b0 B.EQ 4f3768 |
(3641) 0x4f36b4 CMP X12, #1 |
(3641) 0x4f36b8 B.EQ 4f3728 |
(3641) 0x4f36bc CMP X12, #2 |
(3641) 0x4f36c0 B.EQ 4f36f4 |
(3641) 0x4f36c4 SDIV X13, X0, X25 |
(3641) 0x4f36c8 SDIV X14, X21, X25 |
(3641) 0x4f36cc MSUB X15, X13, X25, X0 |
(3641) 0x4f36d0 ADD X0, X0, #1 |
(3641) 0x4f36d4 MADD X16, X15, X27, X13 |
(3641) 0x4f36d8 MSUB X17, X14, X25, X21 |
(3641) 0x4f36dc ADD X18, X20, X16,LSL #3 |
(3641) 0x4f36e0 MADD X30, X17, X27, X14 |
(3641) 0x4f36e4 LDR X2, [X18] |
(3641) 0x4f36e8 LDR X3, [X20, X30,LSL #3] |
(3641) 0x4f36ec ADD X4, X2, X3 |
(3641) 0x4f36f0 STR X4, [X18] |
(3641) 0x4f36f4 SDIV X6, X0, X25 |
(3641) 0x4f36f8 SUB X5, X0, #1 |
(3641) 0x4f36fc SDIV X7, X5, X25 |
(3641) 0x4f3700 MSUB X8, X6, X25, X0 |
(3641) 0x4f3704 ADD X0, X0, #1 |
(3641) 0x4f3708 MADD X9, X8, X27, X6 |
(3641) 0x4f370c MSUB X10, X7, X25, X5 |
(3641) 0x4f3710 ADD X1, X20, X9,LSL #3 |
(3641) 0x4f3714 MADD X11, X10, X27, X7 |
(3641) 0x4f3718 LDR X13, [X1] |
(3641) 0x4f371c LDR X12, [X20, X11,LSL #3] |
(3641) 0x4f3720 ADD X14, X13, X12 |
(3641) 0x4f3724 STR X14, [X1] |
(3641) 0x4f3728 SDIV X16, X0, X25 |
(3641) 0x4f372c SUB X15, X0, #1 |
(3641) 0x4f3730 LDR X8, [SP, #112] |
(3641) 0x4f3734 SDIV X17, X15, X25 |
(3641) 0x4f3738 MSUB X18, X16, X25, X0 |
(3641) 0x4f373c ADD X0, X0, #1 |
(3641) 0x4f3740 MADD X30, X18, X27, X16 |
(3641) 0x4f3744 MSUB X3, X17, X25, X15 |
(3641) 0x4f3748 ADD X4, X20, X30,LSL #3 |
(3641) 0x4f374c MADD X2, X3, X27, X17 |
(3641) 0x4f3750 LDR X6, [X4] |
(3641) 0x4f3754 LDR X5, [X20, X2,LSL #3] |
(3641) 0x4f3758 ADD X7, X6, X5 |
(3641) 0x4f375c STR X7, [X4] |
(3641) 0x4f3760 CMP X0, X8 |
(3641) 0x4f3764 B.EQ 4f37f8 |
(3644) 0x4f3768 SUB X12, X0, #1 |
(3644) 0x4f376c SDIV X13, X0, X25 |
(3644) 0x4f3770 ADD X9, X0, #1 |
(3644) 0x4f3774 ADD X11, X0, #2 |
(3644) 0x4f3778 ADD X10, X0, #3 |
(3644) 0x4f377c SDIV X14, X12, X25 |
(3644) 0x4f3780 SDIV X1, X9, X25 |
(3644) 0x4f3784 MSUB X15, X13, X25, X0 |
(3644) 0x4f3788 ADD X0, X0, #4 |
(3644) 0x4f378c SDIV X5, X11, X25 |
(3644) 0x4f3790 MSUB X16, X14, X25, X12 |
(3644) 0x4f3794 MADD X17, X15, X27, X13 |
(3644) 0x4f3798 MSUB X4, X1, X25, X9 |
(3644) 0x4f379c MADD X18, X16, X27, X14 |
(3644) 0x4f37a0 LDR X30, [X20, X17,LSL #3] |
(3644) 0x4f37a4 SDIV X7, X10, X25 |
(3644) 0x4f37a8 LDR X3, [X20, X18,LSL #3] |
(3644) 0x4f37ac MADD X6, X4, X27, X1 |
(3644) 0x4f37b0 LDR X18, [SP, #112] |
(3644) 0x4f37b4 MSUB X12, X5, X25, X11 |
(3644) 0x4f37b8 ADD X2, X30, X3 |
(3644) 0x4f37bc MADD X13, X12, X27, X5 |
(3644) 0x4f37c0 STR X2, [X20, X17,LSL #3] |
(3644) 0x4f37c4 LDR X8, [X20, X6,LSL #3] |
(3644) 0x4f37c8 MSUB X11, X7, X25, X10 |
(3644) 0x4f37cc MADD X14, X11, X27, X7 |
(3644) 0x4f37d0 ADD X9, X8, X2 |
(3644) 0x4f37d4 STR X9, [X20, X6,LSL #3] |
(3644) 0x4f37d8 LDR X1, [X20, X13,LSL #3] |
(3644) 0x4f37dc ADD X2, X1, X9 |
(3644) 0x4f37e0 STR X2, [X20, X13,LSL #3] |
(3644) 0x4f37e4 LDR X15, [X20, X14,LSL #3] |
(3644) 0x4f37e8 ADD X17, X15, X2 |
(3644) 0x4f37ec STR X17, [X20, X14,LSL #3] |
(3644) 0x4f37f0 CMP X0, X18 |
(3644) 0x4f37f4 B.NE 4f3768 |
(3641) 0x4f37f8 BL 40f1c0 |
(3641) 0x4f37fc BL 40f150 |
(3641) 0x4f3800 CBNZ W0, 4f3928 |
0x4f3804 CMP X25, #1 |
0x4f3808 B.LE 4f3928 |
0x4f380c SUB X30, X27, #1 |
0x4f3810 MOVZ X0, #1 |
0x4f3814 SDIV X4, X30, X25 |
0x4f3818 MSUB X5, X4, X25, X30 |
0x4f381c MADD X3, X5, X27, X4 |
0x4f3820 LDR X2, [X20, X3,LSL #3] |
0x4f3824 CMP X27, X0 |
0x4f3828 B.NE 4f3d20 |
0x4f382c SUB X4, X25, #1 |
0x4f3830 ANDS X12, X4, #4160 |
0x4f3834 B.EQ 4f38b0 |
0x4f3838 CMP X12, X0 |
0x4f383c B.EQ 4f3888 |
0x4f3840 CMP X12, #2 |
0x4f3844 B.EQ 4f3868 |
0x4f3848 SDIV X11, X27, X25 |
0x4f384c MOVZ X0, #2 |
0x4f3850 MSUB X14, X11, X25, X27 |
0x4f3854 ADD X10, X11, X14 |
0x4f3858 ADD X15, X20, X10,LSL #3 |
0x4f385c LDR X1, [X15] |
0x4f3860 ADD X2, X2, X1 |
0x4f3864 STR X2, [X15] |
0x4f3868 SDIV X16, X0, X25 |
0x4f386c MSUB X17, X16, X25, X0 |
0x4f3870 ADD X0, X0, #1 |
0x4f3874 ADD X18, X16, X17 |
0x4f3878 ADD X30, X20, X18,LSL #3 |
0x4f387c LDR X5, [X30] |
0x4f3880 ADD X2, X2, X5 |
0x4f3884 STR X2, [X30] |
0x4f3888 SDIV X6, X0, X25 |
0x4f388c MSUB X3, X6, X25, X0 |
0x4f3890 ADD X0, X0, #1 |
0x4f3894 ADD X7, X6, X3 |
0x4f3898 ADD X13, X20, X7,LSL #3 |
0x4f389c LDR X9, [X13] |
0x4f38a0 ADD X2, X2, X9 |
0x4f38a4 STR X2, [X13] |
0x4f38a8 CMP X0, X25 |
0x4f38ac B.EQ 4f3928 |
(3650) 0x4f38b0 SDIV X8, X0, X25 |
(3650) 0x4f38b4 ADD X4, X0, #1 |
(3650) 0x4f38b8 ADD X12, X0, #2 |
(3650) 0x4f38bc ADD X11, X0, #3 |
(3650) 0x4f38c0 SDIV X14, X4, X25 |
(3650) 0x4f38c4 SDIV X16, X12, X25 |
(3650) 0x4f38c8 MSUB X10, X8, X25, X0 |
(3650) 0x4f38cc ADD X0, X0, #4 |
(3650) 0x4f38d0 SDIV X5, X11, X25 |
(3650) 0x4f38d4 ADD X15, X8, X10 |
(3650) 0x4f38d8 LDR X1, [X20, X15,LSL #3] |
(3650) 0x4f38dc MSUB X17, X14, X25, X4 |
(3650) 0x4f38e0 MSUB X6, X16, X25, X12 |
(3650) 0x4f38e4 ADD X30, X14, X17 |
(3650) 0x4f38e8 ADD X18, X2, X1 |
(3650) 0x4f38ec ADD X13, X16, X6 |
(3650) 0x4f38f0 STR X18, [X20, X15,LSL #3] |
(3650) 0x4f38f4 MSUB X3, X5, X25, X11 |
(3650) 0x4f38f8 LDR X2, [X20, X30,LSL #3] |
(3650) 0x4f38fc ADD X8, X5, X3 |
(3650) 0x4f3900 ADD X7, X18, X2 |
(3650) 0x4f3904 STR X7, [X20, X30,LSL #3] |
(3650) 0x4f3908 LDR X9, [X20, X13,LSL #3] |
(3650) 0x4f390c ADD X4, X7, X9 |
(3650) 0x4f3910 STR X4, [X20, X13,LSL #3] |
(3650) 0x4f3914 LDR X11, [X20, X8,LSL #3] |
(3650) 0x4f3918 ADD X2, X4, X11 |
(3650) 0x4f391c STR X2, [X20, X8,LSL #3] |
(3650) 0x4f3920 CMP X0, X25 |
(3650) 0x4f3924 B.NE 4f38b0 |
(3641) 0x4f3928 BL 40f1c0 |
(3641) 0x4f392c LDR X0, [SP, #104] |
(3641) 0x4f3930 CMP X0, #0 |
(3641) 0x4f3934 B.LE 4f3a44 |
(3641) 0x4f3938 SUB X12, X21, #1 |
(3641) 0x4f393c LDR X14, [SP, #112] |
(3641) 0x4f3940 SDIV X10, X12, X25 |
(3641) 0x4f3944 SUB X15, X14, #1 |
(3641) 0x4f3948 MSUB X1, X10, X25, X12 |
(3641) 0x4f394c MADD X16, X1, X27, X10 |
(3641) 0x4f3950 LDR X17, [X20, X16,LSL #3] |
(3641) 0x4f3954 CMP X21, X15 |
(3641) 0x4f3958 B.GE 4f3a44 |
(3641) 0x4f395c ORR X0, XZR, X21 |
(3641) 0x4f3960 SUB X18, X15, X21 |
(3641) 0x4f3964 CMP X27, #1 |
(3641) 0x4f3968 B.NE 4f3c20 |
(3641) 0x4f396c ANDS X27, X18, #4160 |
(3641) 0x4f3970 B.EQ 4f39cc |
(3641) 0x4f3974 CMP X27, #1 |
(3641) 0x4f3978 B.EQ 4f39a4 |
(3641) 0x4f397c CMP X27, #2 |
(3641) 0x4f3980 B.NE 4f3cfc |
(3641) 0x4f3984 SDIV X16, X0, X25 |
(3641) 0x4f3988 MSUB X1, X16, X25, X0 |
(3641) 0x4f398c ADD X0, X0, #1 |
(3641) 0x4f3990 ADD X18, X1, X16 |
(3641) 0x4f3994 ADD X30, X20, X18,LSL #3 |
(3641) 0x4f3998 LDR X5, [X30] |
(3641) 0x4f399c ADD X6, X5, X17 |
(3641) 0x4f39a0 STR X6, [X30] |
(3641) 0x4f39a4 SDIV X7, X0, X25 |
(3641) 0x4f39a8 MSUB X2, X7, X25, X0 |
(3641) 0x4f39ac ADD X0, X0, #1 |
(3641) 0x4f39b0 ADD X13, X2, X7 |
(3641) 0x4f39b4 ADD X3, X20, X13,LSL #3 |
(3641) 0x4f39b8 LDR X8, [X3] |
(3641) 0x4f39bc ADD X27, X8, X17 |
(3641) 0x4f39c0 STR X27, [X3] |
(3641) 0x4f39c4 CMP X0, X15 |
(3641) 0x4f39c8 B.EQ 4f3a44 |
(3643) 0x4f39cc SDIV X9, X0, X25 |
(3643) 0x4f39d0 ADD X4, X0, #1 |
(3643) 0x4f39d4 ADD X14, X0, #2 |
(3643) 0x4f39d8 ADD X12, X0, #3 |
(3643) 0x4f39dc SDIV X10, X4, X25 |
(3643) 0x4f39e0 SDIV X11, X14, X25 |
(3643) 0x4f39e4 MSUB X16, X9, X25, X0 |
(3643) 0x4f39e8 ADD X0, X0, #4 |
(3643) 0x4f39ec SDIV X6, X12, X25 |
(3643) 0x4f39f0 ADD X18, X16, X9 |
(3643) 0x4f39f4 LDR X30, [X20, X18,LSL #3] |
(3643) 0x4f39f8 MSUB X1, X10, X25, X4 |
(3643) 0x4f39fc MSUB X2, X11, X25, X14 |
(3643) 0x4f3a00 ADD X5, X1, X10 |
(3643) 0x4f3a04 ADD X7, X30, X17 |
(3643) 0x4f3a08 ADD X3, X2, X11 |
(3643) 0x4f3a0c STR X7, [X20, X18,LSL #3] |
(3643) 0x4f3a10 MSUB X8, X6, X25, X12 |
(3643) 0x4f3a14 LDR X13, [X20, X5,LSL #3] |
(3643) 0x4f3a18 ADD X9, X8, X6 |
(3643) 0x4f3a1c ADD X27, X13, X17 |
(3643) 0x4f3a20 STR X27, [X20, X5,LSL #3] |
(3643) 0x4f3a24 LDR X4, [X20, X3,LSL #3] |
(3643) 0x4f3a28 ADD X12, X4, X17 |
(3643) 0x4f3a2c STR X12, [X20, X3,LSL #3] |
(3643) 0x4f3a30 LDR X14, [X20, X9,LSL #3] |
(3643) 0x4f3a34 ADD X10, X14, X17 |
(3643) 0x4f3a38 STR X10, [X20, X9,LSL #3] |
(3643) 0x4f3a3c CMP X0, X15 |
(3643) 0x4f3a40 B.NE 4f39cc |
(3641) 0x4f3a44 BL 40f1c0 |
(3641) 0x4f3a48 LDR X25, [SP, #120] |
(3641) 0x4f3a4c SUB X3, X19, #1 |
(3641) 0x4f3a50 CBNZ X25, 4f3ad0 |
0x4f3a54 LDR X28, [SP, #96] |
0x4f3a58 CMP X28, X3 |
0x4f3a5c B.GT 4f3ab4 |
0x4f3a60 SUB X26, X28, #1 |
0x4f3a64 ADD X19, X22, #8 |
(3647) 0x4f3a68 LDR X15, [X19, X3,LSL #3] |
(3647) 0x4f3a6c LDR X17, [X22, X3,LSL #3] |
(3647) 0x4f3a70 SUB X11, X15, #1 |
(3647) 0x4f3a74 CMP X11, X17 |
(3647) 0x4f3a78 B.LT 4f3aa8 |
(3647) 0x4f3a7c HINT #0 |
(3648) 0x4f3a80 LDR X0, [X23, X11,LSL #3] |
(3648) 0x4f3a84 SUB X11, X11, #1 |
(3648) 0x4f3a88 ADD X16, X21, X0 |
(3648) 0x4f3a8c LDR X1, [X20, X16,LSL #3] |
(3648) 0x4f3a90 SUB X18, X1, #1 |
(3648) 0x4f3a94 STR X18, [X20, X16,LSL #3] |
(3648) 0x4f3a98 STR X3, [X24, X18,LSL #3] |
(3648) 0x4f3a9c LDR X30, [X22, X3,LSL #3] |
(3648) 0x4f3aa0 CMP X30, X11 |
(3648) 0x4f3aa4 B.LE 4f3a80 |
(3647) 0x4f3aa8 SUB X3, X3, #1 |
(3647) 0x4f3aac CMP X3, X26 |
(3647) 0x4f3ab0 B.NE 4f3a68 |
(3639) 0x4f3ab4 LDP X19, X20, [SP, #16] |
(3639) 0x4f3ab8 LDP X21, X22, [SP, #32] |
(3639) 0x4f3abc LDP X23, X24, [SP, #48] |
(3639) 0x4f3ac0 LDP X25, X26, [SP, #64] |
(3639) 0x4f3ac4 LDP X27, X28, [SP, #80] |
(3639) 0x4f3ac8 LDP X29, X30, [SP], #128 |
(3639) 0x4f3acc RET |
(3641) 0x4f3ad0 LDR X5, [SP, #96] |
(3641) 0x4f3ad4 CMP X5, X3 |
(3641) 0x4f3ad8 B.GT 4f3ab4 |
(3641) 0x4f3adc SUB X6, X5, #1 |
(3641) 0x4f3ae0 ADD X7, X22, #8 |
(3640) 0x4f3ae4 LDR X2, [X7, X3,LSL #3] |
(3640) 0x4f3ae8 LDR X13, [X22, X3,LSL #3] |
(3640) 0x4f3aec SUB X27, X2, #1 |
(3640) 0x4f3af0 CMP X27, X13 |
(3640) 0x4f3af4 B.LT 4f3b30 |
(3640) 0x4f3af8 HINT #0 |
(3640) 0x4f3afc HINT #0 |
(3646) 0x4f3b00 LDR X8, [X23, X27,LSL #3] |
(3646) 0x4f3b04 LDR D0, [X28, X27,LSL #3] |
(3646) 0x4f3b08 SUB X27, X27, #1 |
(3646) 0x4f3b0c ADD X9, X21, X8 |
(3646) 0x4f3b10 LDR X4, [X20, X9,LSL #3] |
(3646) 0x4f3b14 SUB X12, X4, #1 |
(3646) 0x4f3b18 STR X12, [X20, X9,LSL #3] |
(3646) 0x4f3b1c STR D0, [X26, X12,LSL #3] |
(3646) 0x4f3b20 STR X3, [X24, X12,LSL #3] |
(3646) 0x4f3b24 LDR X14, [X22, X3,LSL #3] |
(3646) 0x4f3b28 CMP X14, X27 |
(3646) 0x4f3b2c B.LE 4f3b00 |
(3640) 0x4f3b30 SUB X3, X3, #1 |
(3640) 0x4f3b34 CMP X3, X6 |
(3640) 0x4f3b38 B.NE 4f3ae4 |
(3641) 0x4f3b3c LDP X19, X20, [SP, #16] |
(3641) 0x4f3b40 LDP X21, X22, [SP, #32] |
(3641) 0x4f3b44 LDP X23, X24, [SP, #48] |
(3641) 0x4f3b48 LDP X25, X26, [SP, #64] |
(3641) 0x4f3b4c LDP X27, X28, [SP, #80] |
(3641) 0x4f3b50 LDP X29, X30, [SP], #128 |
(3641) 0x4f3b54 RET |
(3641) 0x4f3b58 ADRP X4, |
(3641) 0x4f3b5c ADRP X5, |
(3641) 0x4f3b60 LDR X6, [X4, #3912] |
(3641) 0x4f3b64 ADRP X7, |
(3641) 0x4f3b68 ADD X2, X5, #3176 |
(3641) 0x4f3b6c ADD X1, X7, #424 |
(3641) 0x4f3b70 LDR X0, [X6] |
(3641) 0x4f3b74 BL 503b24 |
(3641) 0x4f3b78 ADRP X8, |
(3641) 0x4f3b7c MOVZ X3, #0 |
(3641) 0x4f3b80 ADD X0, X8, #3048 |
(3641) 0x4f3b84 MOVZ X2, #1 |
(3641) 0x4f3b88 MOVZ X1, #471 |
(3641) 0x4f3b8c BL 506500 |
(3641) 0x4f3b90 LDR X9, [SP, #96] |
(3641) 0x4f3b94 CMP X9, #0 |
(3641) 0x4f3b98 CCMP X21, X9, #1, #10 |
(3641) 0x4f3b9c B.GE 4f3630 |
(3641) 0x4f3ba0 ADRP X10, |
(3641) 0x4f3ba4 ADRP X11, |
(3641) 0x4f3ba8 LDR X12, [X10, #3912] |
(3641) 0x4f3bac ADRP X13, |
(3641) 0x4f3bb0 ADD X2, X11, #3136 |
(3641) 0x4f3bb4 ADD X1, X13, #424 |
(3641) 0x4f3bb8 LDR X0, [X12] |
(3641) 0x4f3bbc BL 503b24 |
(3641) 0x4f3bc0 ADRP X14, |
(3641) 0x4f3bc4 MOVZ X3, #0 |
(3641) 0x4f3bc8 ADD X0, X14, #3048 |
(3641) 0x4f3bcc MOVZ X2, #1 |
(3641) 0x4f3bd0 MOVZ X1, #472 |
(3641) 0x4f3bd4 BL 506500 |
(3641) 0x4f3bd8 CMP X19, #0 |
(3641) 0x4f3bdc CCMP X21, X19, #1, #10 |
(3641) 0x4f3be0 B.GE 4f363c |
(3641) 0x4f3be4 ADRP X15, |
(3641) 0x4f3be8 ADRP X16, |
(3641) 0x4f3bec LDR X17, [X15, #3912] |
(3641) 0x4f3bf0 ADRP X18, |
(3641) 0x4f3bf4 ADD X2, X16, #3016 |
(3641) 0x4f3bf8 ADD X1, X18, #424 |
(3641) 0x4f3bfc LDR X0, [X17] |
(3641) 0x4f3c00 BL 503b24 |
(3641) 0x4f3c04 ADRP X1, |
(3641) 0x4f3c08 MOVZ X3, #0 |
(3641) 0x4f3c0c ADD X0, X1, #3048 |
(3641) 0x4f3c10 MOVZ X2, #1 |
(3641) 0x4f3c14 MOVZ X1, #473 |
(3641) 0x4f3c18 BL 506500 |
(3641) 0x4f3c1c B 4f363c |
(3641) 0x4f3c20 ANDS X30, X18, #4160 |
(3641) 0x4f3c24 B.EQ 4f3c80 |
(3641) 0x4f3c28 CMP X30, #1 |
(3641) 0x4f3c2c B.EQ 4f3c58 |
(3641) 0x4f3c30 CMP X30, #2 |
(3641) 0x4f3c34 B.NE 4f3e38 |
(3641) 0x4f3c38 SDIV X3, X0, X25 |
(3641) 0x4f3c3c MSUB X8, X3, X25, X0 |
(3641) 0x4f3c40 ADD X0, X0, #1 |
(3641) 0x4f3c44 MADD X4, X8, X27, X3 |
(3641) 0x4f3c48 ADD X11, X20, X4,LSL #3 |
(3641) 0x4f3c4c LDR X12, [X11] |
(3641) 0x4f3c50 ADD X14, X12, X17 |
(3641) 0x4f3c54 STR X14, [X11] |
(3641) 0x4f3c58 SDIV X10, X0, X25 |
(3641) 0x4f3c5c MSUB X1, X10, X25, X0 |
(3641) 0x4f3c60 ADD X0, X0, #1 |
(3641) 0x4f3c64 MADD X16, X1, X27, X10 |
(3641) 0x4f3c68 ADD X18, X20, X16,LSL #3 |
(3641) 0x4f3c6c LDR X30, [X18] |
(3641) 0x4f3c70 ADD X5, X30, X17 |
(3641) 0x4f3c74 STR X5, [X18] |
(3641) 0x4f3c78 CMP X0, X15 |
(3641) 0x4f3c7c B.EQ 4f3a44 |
(3642) 0x4f3c80 SDIV X6, X0, X25 |
(3642) 0x4f3c84 ADD X7, X0, #1 |
(3642) 0x4f3c88 ADD X13, X0, #2 |
(3642) 0x4f3c8c ADD X2, X0, #3 |
(3642) 0x4f3c90 SDIV X3, X7, X25 |
(3642) 0x4f3c94 SDIV X8, X13, X25 |
(3642) 0x4f3c98 MSUB X9, X6, X25, X0 |
(3642) 0x4f3c9c ADD X0, X0, #4 |
(3642) 0x4f3ca0 SDIV X11, X2, X25 |
(3642) 0x4f3ca4 MADD X12, X9, X27, X6 |
(3642) 0x4f3ca8 MSUB X4, X3, X25, X7 |
(3642) 0x4f3cac MSUB X1, X8, X25, X13 |
(3642) 0x4f3cb0 LDR X10, [X20, X12,LSL #3] |
(3642) 0x4f3cb4 MADD X14, X4, X27, X3 |
(3642) 0x4f3cb8 MADD X18, X1, X27, X8 |
(3642) 0x4f3cbc MSUB X5, X11, X25, X2 |
(3642) 0x4f3cc0 ADD X16, X10, X17 |
(3642) 0x4f3cc4 MADD X7, X5, X27, X11 |
(3642) 0x4f3cc8 STR X16, [X20, X12,LSL #3] |
(3642) 0x4f3ccc LDR X30, [X20, X14,LSL #3] |
(3642) 0x4f3cd0 ADD X6, X30, X17 |
(3642) 0x4f3cd4 STR X6, [X20, X14,LSL #3] |
(3642) 0x4f3cd8 LDR X2, [X20, X18,LSL #3] |
(3642) 0x4f3cdc ADD X13, X2, X17 |
(3642) 0x4f3ce0 STR X13, [X20, X18,LSL #3] |
(3642) 0x4f3ce4 LDR X3, [X20, X7,LSL #3] |
(3642) 0x4f3ce8 ADD X8, X3, X17 |
(3642) 0x4f3cec STR X8, [X20, X7,LSL #3] |
(3642) 0x4f3cf0 CMP X0, X15 |
(3642) 0x4f3cf4 B.NE 4f3c80 |
(3641) 0x4f3cf8 B 4f3a44 |
(3641) 0x4f3cfc SDIV X9, X21, X25 |
(3641) 0x4f3d00 ADD X0, X21, #1 |
(3641) 0x4f3d04 MSUB X4, X9, X25, X21 |
(3641) 0x4f3d08 ADD X12, X4, X9 |
(3641) 0x4f3d0c ADD X14, X20, X12,LSL #3 |
(3641) 0x4f3d10 LDR X10, [X14] |
(3641) 0x4f3d14 ADD X11, X10, X17 |
(3641) 0x4f3d18 STR X11, [X14] |
(3641) 0x4f3d1c B 4f3984 |
0x4f3d20 SUB X7, X25, X0 |
0x4f3d24 UBFM X6, X27, #63, #62 |
0x4f3d28 ANDS X12, X7, #4160 |
0x4f3d2c SUB X4, X6, #1 |
0x4f3d30 B.EQ 4f3db8 |
0x4f3d34 CMP X12, #1 |
0x4f3d38 B.EQ 4f3d8c |
0x4f3d3c CMP X12, #2 |
0x4f3d40 B.EQ 4f3d68 |
0x4f3d44 SDIV X8, X4, X25 |
0x4f3d48 MOVZ X0, #2 |
0x4f3d4c MSUB X13, X8, X25, X4 |
0x4f3d50 ADD X4, X4, X27 |
0x4f3d54 MADD X9, X13, X27, X8 |
0x4f3d58 ADD X11, X20, X9,LSL #3 |
0x4f3d5c LDR X10, [X11] |
0x4f3d60 ADD X2, X2, X10 |
0x4f3d64 STR X2, [X11] |
0x4f3d68 SDIV X14, X4, X25 |
0x4f3d6c ADD X0, X0, #1 |
0x4f3d70 MSUB X1, X14, X25, X4 |
0x4f3d74 ADD X4, X4, X27 |
0x4f3d78 MADD X15, X1, X27, X14 |
0x4f3d7c ADD X16, X20, X15,LSL #3 |
0x4f3d80 LDR X17, [X16] |
0x4f3d84 ADD X2, X2, X17 |
0x4f3d88 STR X2, [X16] |
0x4f3d8c SDIV X18, X4, X25 |
0x4f3d90 ADD X0, X0, #1 |
0x4f3d94 MSUB X30, X18, X25, X4 |
0x4f3d98 ADD X4, X4, X27 |
0x4f3d9c MADD X5, X30, X27, X18 |
0x4f3da0 ADD X3, X20, X5,LSL #3 |
0x4f3da4 LDR X6, [X3] |
0x4f3da8 ADD X2, X2, X6 |
0x4f3dac STR X2, [X3] |
0x4f3db0 CMP X25, X0 |
0x4f3db4 B.EQ 4f3928 |
(3649) 0x4f3db8 SDIV X7, X4, X25 |
(3649) 0x4f3dbc ADD X13, X4, X27 |
(3649) 0x4f3dc0 ADD X0, X0, #4 |
(3649) 0x4f3dc4 ADD X9, X13, X27 |
(3649) 0x4f3dc8 ADD X8, X9, X27 |
(3649) 0x4f3dcc SDIV X12, X13, X25 |
(3649) 0x4f3dd0 SDIV X15, X9, X25 |
(3649) 0x4f3dd4 MSUB X11, X7, X25, X4 |
(3649) 0x4f3dd8 ADD X4, X8, X27 |
(3649) 0x4f3ddc SDIV X18, X8, X25 |
(3649) 0x4f3de0 MADD X14, X11, X27, X7 |
(3649) 0x4f3de4 MSUB X10, X12, X25, X13 |
(3649) 0x4f3de8 MSUB X5, X15, X25, X9 |
(3649) 0x4f3dec LDR X1, [X20, X14,LSL #3] |
(3649) 0x4f3df0 MADD X16, X10, X27, X12 |
(3649) 0x4f3df4 MADD X3, X5, X27, X15 |
(3649) 0x4f3df8 ADD X17, X2, X1 |
(3649) 0x4f3dfc MSUB X2, X18, X25, X8 |
(3649) 0x4f3e00 STR X17, [X20, X14,LSL #3] |
(3649) 0x4f3e04 LDR X30, [X20, X16,LSL #3] |
(3649) 0x4f3e08 MADD X13, X2, X27, X18 |
(3649) 0x4f3e0c ADD X6, X17, X30 |
(3649) 0x4f3e10 STR X6, [X20, X16,LSL #3] |
(3649) 0x4f3e14 LDR X7, [X20, X3,LSL #3] |
(3649) 0x4f3e18 ADD X9, X6, X7 |
(3649) 0x4f3e1c STR X9, [X20, X3,LSL #3] |
(3649) 0x4f3e20 LDR X8, [X20, X13,LSL #3] |
(3649) 0x4f3e24 ADD X2, X9, X8 |
(3649) 0x4f3e28 STR X2, [X20, X13,LSL #3] |
(3649) 0x4f3e2c CMP X25, X0 |
(3649) 0x4f3e30 B.NE 4f3db8 |
0x4f3e34 B 4f3928 |
(3641) 0x4f3e38 SDIV X5, X21, X25 |
(3641) 0x4f3e3c ADD X0, X21, #1 |
(3641) 0x4f3e40 MSUB X2, X5, X25, X21 |
(3641) 0x4f3e44 MADD X6, X2, X27, X5 |
(3641) 0x4f3e48 ADD X7, X20, X6,LSL #3 |
(3641) 0x4f3e4c LDR X13, [X7] |
(3641) 0x4f3e50 ADD X9, X13, X17 |
(3641) 0x4f3e54 STR X9, [X7] |
(3641) 0x4f3e58 B 4f3c38 |
0x4f3e5c HINT #0 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | GOMP_parallel | libomp.so | |
○ | hypre_CSRMatrixTranspose | csr_matop.c:463 | exec |
○ | hypre_ParTMatmul | par_csr_matop.c:3283 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:1227 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | amg.c:599 | exec |
Path / |
Source file and lines | csr_matop.c:380-560 |
Module | exec |
nb instructions | 120 |
loop length | 480 |
nb stack references | 0 |
front end | 14.88 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.00 | 9.00 | 19.00 | 19.00 | 19.00 | 19.00 | 0.00 | 0.00 | 0.00 | 0.00 | 10.17 | 9.83 | 10.00 | 7.50 | 7.50 |
cycles | 9.00 | 9.00 | 19.00 | 19.00 | 19.00 | 19.00 | 0.00 | 0.00 | 0.00 | 0.00 | 10.17 | 9.83 | 10.00 | 7.50 | 7.50 |
Cycles executing div or sqrt instructions | 7.00-3.50 |
Front-end | 14.88 |
Overall L1 | 19.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #896]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X19, X1, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X1, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X28, X22, [X0, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X23, X21, [X0, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X27, X26, [X0, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X24, X20, [X0, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
BL 5063e0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X25, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 506400 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X2, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4f7f80 <hypre_CSRMatrixGetLoadBalancedPartitionBegin> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X3, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X3, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4f8024 <hypre_CSRMatrixGetLoadBalancedPartitionEnd> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X0, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4f3b58 <hypre_CSRMatrixTranspose._omp_fn.0+0x5a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CCMP X21, X9, #1, #10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B.LT 4f3ba0 <hypre_CSRMatrixTranspose._omp_fn.0+0x5f0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X25, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X30, X27, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SDIV X4, X30, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MSUB X5, X4, X25, X30 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MADD X3, X5, X27, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDR X2, [X20, X3,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X27, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 4f3d20 <hypre_CSRMatrixTranspose._omp_fn.0+0x770> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X4, X25, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X12, X4, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f38b0 <hypre_CSRMatrixTranspose._omp_fn.0+0x300> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3888 <hypre_CSRMatrixTranspose._omp_fn.0+0x2d8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3868 <hypre_CSRMatrixTranspose._omp_fn.0+0x2b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SDIV X11, X27, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MOVZ X0, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X14, X11, X25, X27 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X10, X11, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X20, X10,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X1, [X15] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X15] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X16, X0, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MSUB X17, X16, X25, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X18, X16, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X30, X20, X18,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X5, [X30] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X30] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X6, X0, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MSUB X3, X6, X25, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, X6, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X13, X20, X7,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X9, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X0, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X28, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X28, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4f3ab4 <hypre_CSRMatrixTranspose._omp_fn.0+0x504> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X26, X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X19, X22, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X7, X25, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X6, X27, #63, #62 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X12, X7, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
SUB X4, X6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B.EQ 4f3db8 <hypre_CSRMatrixTranspose._omp_fn.0+0x808> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3d8c <hypre_CSRMatrixTranspose._omp_fn.0+0x7dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3d68 <hypre_CSRMatrixTranspose._omp_fn.0+0x7b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SDIV X8, X4, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MOVZ X0, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X13, X8, X25, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD X9, X13, X27, X8 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X11, X20, X9,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X10, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X14, X4, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X1, X14, X25, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD X15, X1, X27, X14 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X16, X20, X15,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X17, [X16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X18, X4, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X30, X18, X25, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD X5, X30, X27, X18 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X3, X20, X5,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X25, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 |
Source file and lines | csr_matop.c:380-560 |
Module | exec |
nb instructions | 120 |
loop length | 480 |
nb stack references | 0 |
front end | 14.88 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.00 | 9.00 | 19.00 | 19.00 | 19.00 | 19.00 | 0.00 | 0.00 | 0.00 | 0.00 | 10.17 | 9.83 | 10.00 | 7.50 | 7.50 |
cycles | 9.00 | 9.00 | 19.00 | 19.00 | 19.00 | 19.00 | 0.00 | 0.00 | 0.00 | 0.00 | 10.17 | 9.83 | 10.00 | 7.50 | 7.50 |
Cycles executing div or sqrt instructions | 7.00-3.50 |
Front-end | 14.88 |
Overall L1 | 19.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #896]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X19, X1, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X1, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X28, X22, [X0, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X23, X21, [X0, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X27, X26, [X0, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X24, X20, [X0, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
BL 5063e0 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X25, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 506400 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X2, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4f7f80 <hypre_CSRMatrixGetLoadBalancedPartitionBegin> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X3, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORR X0, XZR, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X3, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 4f8024 <hypre_CSRMatrixGetLoadBalancedPartitionEnd> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X0, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X0, X19 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4f3b58 <hypre_CSRMatrixTranspose._omp_fn.0+0x5a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CCMP X21, X9, #1, #10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B.LT 4f3ba0 <hypre_CSRMatrixTranspose._omp_fn.0+0x5f0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X25, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X30, X27, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SDIV X4, X30, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MSUB X5, X4, X25, X30 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MADD X3, X5, X27, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDR X2, [X20, X3,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X27, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 4f3d20 <hypre_CSRMatrixTranspose._omp_fn.0+0x770> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X4, X25, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X12, X4, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f38b0 <hypre_CSRMatrixTranspose._omp_fn.0+0x300> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3888 <hypre_CSRMatrixTranspose._omp_fn.0+0x2d8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3868 <hypre_CSRMatrixTranspose._omp_fn.0+0x2b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SDIV X11, X27, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MOVZ X0, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X14, X11, X25, X27 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X10, X11, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X20, X10,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X1, [X15] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X15] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X16, X0, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MSUB X17, X16, X25, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X18, X16, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X30, X20, X18,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X5, [X30] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X30] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X6, X0, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MSUB X3, X6, X25, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X7, X6, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X13, X20, X7,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X9, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X0, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X28, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X28, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 4f3ab4 <hypre_CSRMatrixTranspose._omp_fn.0+0x504> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X26, X28, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X19, X22, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X7, X25, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X6, X27, #63, #62 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X12, X7, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
SUB X4, X6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B.EQ 4f3db8 <hypre_CSRMatrixTranspose._omp_fn.0+0x808> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3d8c <hypre_CSRMatrixTranspose._omp_fn.0+0x7dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP X12, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3d68 <hypre_CSRMatrixTranspose._omp_fn.0+0x7b8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SDIV X8, X4, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
MOVZ X0, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X13, X8, X25, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD X9, X13, X27, X8 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X11, X20, X9,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X10, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X14, X4, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X1, X14, X25, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD X15, X1, X27, X14 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X16, X20, X15,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X17, [X16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
SDIV X18, X4, X25 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ADD X0, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB X30, X18, X25, X4 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X4, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD X5, X30, X27, X18 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X3, X20, X5,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X6, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X2, X2, X6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
CMP X25, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4f3928 <hypre_CSRMatrixTranspose._omp_fn.0+0x378> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_CSRMatrixTranspose._omp_fn.0– | 0.16 | 0.02 |
▼Loop 3639 - csr_matop.c:380-553 - exec– | 0 | 0 |
▼Loop 3641 - csr_matop.c:380-553 - exec– | 0 | 0 |
○Loop 3645 - csr_matop.c:483-485 - exec | 0.03 | 0 |
▼Loop 3640 - csr_matop.c:540-548 - exec– | 0 | 0 |
○Loop 3646 - csr_matop.c:541-548 - exec | 0.13 | 0.02 |
○Loop 3642 - csr_matop.c:380-527 - exec | 0 | 0 |
○Loop 3643 - csr_matop.c:380-527 - exec | 0 | 0 |
○Loop 3644 - csr_matop.c:380-500 - exec | 0 | 0 |
▼Loop 3647 - csr_matop.c:553-560 - exec– | 0 | 0 |
○Loop 3648 - csr_matop.c:554-560 - exec | 0 | 0 |
○Loop 3650 - csr_matop.c:380-513 - exec | 0 | 0 |
○Loop 3649 - csr_matop.c:380-513 - exec | 0 | 0 |