Loop Id: 3691 | Module: exec | Source: csr_matvec.c:608-615 | Coverage: 0.79% |
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Loop Id: 3691 | Module: exec | Source: csr_matvec.c:608-615 | Coverage: 0.79% |
---|
0x4a6fe8 ADD X8, X8, #1 |
0x4a6fec CMP X8, X22 |
0x4a6ff0 B.EQ 4a71e8 |
0x4a6ff4 LDR X14, [X26, X8,LSL #3] |
0x4a6ff8 LDR X13, [X10, X8,LSL #3] |
0x4a6ffc CMP X13, X14 |
0x4a7000 B.LE 4a6fe8 |
0x4a7004 SUB W15, W13, W14 |
0x4a7008 ANDS X16, X15, #4160 |
0x4a700c B.EQ 4a7058 |
0x4a7010 ORR X15, XZR, X14 |
0x4a7014 HINT #0 |
0x4a7018 HINT #0 |
0x4a701c HINT #0 |
(3693) 0x4a7020 LDR X17, [X25, X15,LSL #3] |
(3693) 0x4a7024 LDR D0, [X24, X15,LSL #3] |
(3693) 0x4a7028 LDR D1, [X21, X8,LSL #3] |
(3693) 0x4a702c ADD X15, X15, #1 |
(3693) 0x4a7030 SUBS X16, X16, #1 |
(3693) 0x4a7034 LDR D2, [X9, X17,LSL #3] |
(3693) 0x4a7038 FMADD D0, D0, D1, D2 |
(3693) 0x4a703c STR D0, [X9, X17,LSL #3] |
(3693) 0x4a7040 B.NE 4a7020 |
0x4a7044 ORN X14, XZR, X14 |
0x4a7048 ADD X14, X13, X14 |
0x4a704c CMP X14, #3 |
0x4a7050 B.CC 4a6fe8 |
0x4a7054 B 4a706c |
0x4a7058 ORR X15, XZR, X14 |
0x4a705c ORN X14, XZR, X14 |
0x4a7060 ADD X14, X13, X14 |
0x4a7064 CMP X14, #3 |
0x4a7068 B.CC 4a6fe8 |
0x4a706c SUB X13, X13, X15 |
0x4a7070 UBFM X15, X15, #61, #60 |
0x4a7074 ADD X14, X11, X15 |
0x4a7078 ADD X15, X12, X15 |
0x4a707c HINT #0 |
(3692) 0x4a7080 LDUR X16, [X14, #496] |
(3692) 0x4a7084 LDUR D0, [X15, #496] |
(3692) 0x4a7088 LDR D1, [X21, X8,LSL #3] |
(3692) 0x4a708c SUBS X13, X13, #4 |
(3692) 0x4a7090 LDR D2, [X9, X16,LSL #3] |
(3692) 0x4a7094 FMADD D0, D0, D1, D2 |
(3692) 0x4a7098 STR D0, [X9, X16,LSL #3] |
(3692) 0x4a709c LDUR X16, [X14, #504] |
(3692) 0x4a70a0 LDUR D0, [X15, #504] |
(3692) 0x4a70a4 LDR D1, [X21, X8,LSL #3] |
(3692) 0x4a70a8 LDR D2, [X9, X16,LSL #3] |
(3692) 0x4a70ac FMADD D0, D0, D1, D2 |
(3692) 0x4a70b0 STR D0, [X9, X16,LSL #3] |
(3692) 0x4a70b4 LDR X16, [X14] |
(3692) 0x4a70b8 LDR D0, [X15] |
(3692) 0x4a70bc LDR D1, [X21, X8,LSL #3] |
(3692) 0x4a70c0 LDR D2, [X9, X16,LSL #3] |
(3692) 0x4a70c4 FMADD D0, D0, D1, D2 |
(3692) 0x4a70c8 STR D0, [X9, X16,LSL #3] |
(3692) 0x4a70cc LDR X16, [X14, #8] |
(3692) 0x4a70d0 LDR D0, [X15, #8] |
(3692) 0x4a70d4 LDR D1, [X21, X8,LSL #3] |
(3692) 0x4a70d8 ADD X14, X14, #32 |
(3692) 0x4a70dc ADD X15, X15, #32 |
(3692) 0x4a70e0 LDR D2, [X9, X16,LSL #3] |
(3692) 0x4a70e4 FMADD D0, D0, D1, D2 |
(3692) 0x4a70e8 STR D0, [X9, X16,LSL #3] |
(3692) 0x4a70ec B.NE 4a7080 |
0x4a70f0 B 4a6fe8 |
/home/hbollore/qaas/qaas-runs/169-817-3176/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 608 - 615 |
-------------------------------------------------------------------------------- |
608: for (i = 0; i < num_rows; i++) |
609: { |
610: if ( num_vectors==1 ) |
611: { |
612: for (jj = A_i[i]; jj < A_i[i+1]; jj++) |
613: { |
614: j = A_j[jj]; |
615: y_data[j] += A_data[jj] * x_data[i]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►96.00+ | hypre_ParCSRMatrixMatvecT | par_csr_matvec.c:432 | exec |
○ | hypre_BoomerAMGCycle | par_cycle.c:431 | exec |
○ | hypre_BoomerAMGSolve | par_amg_solve.c:274 | exec |
○ | hypre_PCGSolve | pcg.c:545 | exec |
○ | main | amg.c:419 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | exec | |
►4.00+ | hypre_ParCSRMatrixMatvecT | par_csr_matvec.c:432 | exec |
○ | hypre_BoomerAMGCycle | par_cycle.c:431 | exec |
○ | hypre_BoomerAMGSolve | par_amg_solve.c:274 | exec |
○ | hypre_PCGSolve | pcg.c:424 | exec |
○ | main | amg.c:419 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | exec |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.21 |
Bottlenecks | P2, P3, P4, P5, |
Function | hypre_CSRMatrixMatvecT |
Source | csr_matvec.c:608-608,csr_matvec.c:612-612 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.25 |
CQA cycles if no scalar integer | 4.25 |
CQA cycles if FP arith vectorized | 4.25 |
CQA cycles if fully vectorized | 1.06 |
Front-end cycles | 3.25 |
DIV/SQRT cycles | 3.50 |
P0 cycles | 3.50 |
P1 cycles | 4.25 |
P2 cycles | 4.25 |
P3 cycles | 4.25 |
P4 cycles | 4.25 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.67 |
P10 cycles | 0.67 |
P11 cycles | 0.67 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 30.00 |
Nb uops | 26.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 3.76 |
Bytes prefetched | 0.00 |
Bytes loaded | 16.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 25.00 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 25.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.21 |
Bottlenecks | P2, P3, P4, P5, |
Function | hypre_CSRMatrixMatvecT |
Source | csr_matvec.c:608-608,csr_matvec.c:612-612 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.25 |
CQA cycles if no scalar integer | 4.25 |
CQA cycles if FP arith vectorized | 4.25 |
CQA cycles if fully vectorized | 1.06 |
Front-end cycles | 3.25 |
DIV/SQRT cycles | 3.50 |
P0 cycles | 3.50 |
P1 cycles | 4.25 |
P2 cycles | 4.25 |
P3 cycles | 4.25 |
P4 cycles | 4.25 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.67 |
P10 cycles | 0.67 |
P11 cycles | 0.67 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 30.00 |
Nb uops | 26.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 3.76 |
Bytes prefetched | 0.00 |
Bytes loaded | 16.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 25.00 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 25.00 |
Path / |
Function | hypre_CSRMatrixMatvecT |
Source file and lines | csr_matvec.c:608-615 |
Module | exec |
nb instructions | 30 |
loop length | 120 |
nb stack references | 0 |
front end | 3.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.50 | 3.50 | 4.25 | 4.25 | 4.25 | 4.25 | 0.00 | 0.00 | 0.00 | 0.00 | 0.67 | 0.67 | 0.67 | 0.00 | 0.00 |
cycles | 3.50 | 3.50 | 4.25 | 4.25 | 4.25 | 4.25 | 0.00 | 0.00 | 0.00 | 0.00 | 0.67 | 0.67 | 0.67 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.25 |
Overall L1 | 4.25 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD X8, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X8, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4a71e8 <hypre_CSRMatrixMatvecT+0x558> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X14, [X26, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [X10, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X13, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB W15, W13, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X16, X15, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4a7058 <hypre_CSRMatrixMatvecT+0x3c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X15, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORN X14, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X14, X13, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X14, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CC 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4a706c <hypre_CSRMatrixMatvecT+0x3dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X15, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORN X14, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X14, X13, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X14, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CC 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X13, X13, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X15, X15, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X14, X11, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X12, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
HINT #0 | ||||||||||||||||||
B 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | hypre_CSRMatrixMatvecT |
Source file and lines | csr_matvec.c:608-615 |
Module | exec |
nb instructions | 30 |
loop length | 120 |
nb stack references | 0 |
front end | 3.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.50 | 3.50 | 4.25 | 4.25 | 4.25 | 4.25 | 0.00 | 0.00 | 0.00 | 0.00 | 0.67 | 0.67 | 0.67 | 0.00 | 0.00 |
cycles | 3.50 | 3.50 | 4.25 | 4.25 | 4.25 | 4.25 | 0.00 | 0.00 | 0.00 | 0.00 | 0.67 | 0.67 | 0.67 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.25 |
Overall L1 | 4.25 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD X8, X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X8, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4a71e8 <hypre_CSRMatrixMatvecT+0x558> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X14, [X26, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X13, [X10, X8,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X13, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB W15, W13, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ANDS X16, X15, #4160 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.EQ 4a7058 <hypre_CSRMatrixMatvecT+0x3c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X15, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ORN X14, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X14, X13, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X14, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CC 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
B 4a706c <hypre_CSRMatrixMatvecT+0x3dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X15, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ORN X14, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X14, X13, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X14, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CC 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB X13, X13, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X15, X15, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X14, X11, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X12, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
HINT #0 | ||||||||||||||||||
B 4a6fe8 <hypre_CSRMatrixMatvecT+0x358> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |