Loop Id: 288 | Module: exec | Source: advec_mom.cpp:96-100 [...] | Coverage: 2.76% |
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Loop Id: 288 | Module: exec | Source: advec_mom.cpp:96-100 [...] | Coverage: 2.76% |
---|
0x41d2a0 MOVPRFX Z21, Z0 |
0x41d2a4 SDIV Z21.D, P0/M, Z21.D, Z2.D |
0x41d2a8 ADD Z22.D, Z3.D, Z21.D |
0x41d2ac MOVPRFX Z23, Z0 |
0x41d2b0 MLS Z23.D, P0/M, Z21.D, Z2.D |
0x41d2b4 ADD Z21.D, Z5.D, Z21.D |
0x41d2b8 SUBS X13, X13, X11 |
0x41d2bc ADD Z24.D, Z4.D, Z23.D |
0x41d2c0 ADD Z23.D, Z20.D, Z23.D |
0x41d2c4 ADD Z0.D, Z0.D, Z1.D |
0x41d2c8 SXTW Z21.D, P0/M, Z21.D |
0x41d2cc MOVPRFX Z25, Z6 |
0x41d2d0 MUL Z25.D, P0/M, Z25.D, Z21.D |
0x41d2d4 ADR Z26.D, [Z25, Z24.D,SXTW] [16] |
0x41d2d8 LD1D {Z26.D}, P0/Z, [X25, Z26.D,LSL #3] [10] |
0x41d2dc MUL Z21.D, P0/M, Z21.D, Z7.D |
0x41d2e0 SXTW Z22.D, P0/M, Z22.D |
0x41d2e4 MOVPRFX Z28, Z6 |
0x41d2e8 MUL Z28.D, P0/M, Z28.D, Z22.D |
0x41d2ec MOVPRFX Z30, Z7 |
0x41d2f0 MUL Z30.D, P0/M, Z30.D, Z22.D |
0x41d2f4 ADR Z29.D, [Z28, Z24.D,SXTW] [19] |
0x41d2f8 ADR Z31.D, [Z30, Z24.D,SXTW] [14] |
0x41d2fc ADR Z25.D, [Z25, Z23.D,SXTW] [6] |
0x41d300 ADR Z27.D, [Z21, Z24.D,SXTW] [5] |
0x41d304 ADR Z21.D, [Z21, Z23.D,SXTW] [4] |
0x41d308 LD1D {Z27.D}, P0/Z, [X27, Z27.D,LSL #3] [17] |
0x41d30c LD1D {Z29.D}, P0/Z, [X25, Z29.D,LSL #3] [9] |
0x41d310 FMUL Z26.D, Z27.D, Z26.D |
0x41d314 LD1D {Z27.D}, P0/Z, [X27, Z31.D,LSL #3] [15] |
0x41d318 LD1D {Z25.D}, P0/Z, [X25, Z25.D,LSL #3] [11] |
0x41d31c LD1D {Z21.D}, P0/Z, [X27, Z21.D,LSL #3] [7] |
0x41d320 FMLA Z26.D, P0/M, Z27.D, Z29.D |
0x41d324 ADR Z27.D, [Z30, Z23.D,SXTW] [21] |
0x41d328 FMAD Z21.D, P0/M, Z25.D, Z26.D |
0x41d32c ADR Z25.D, [Z28, Z23.D,SXTW] [12] |
0x41d330 MOVPRFX Z26, Z24 |
0x41d334 SXTW Z26.D, P0/M, Z24.D |
0x41d338 LD1D {Z25.D}, P0/Z, [X25, Z25.D,LSL #3] [18] |
0x41d33c LD1D {Z27.D}, P0/Z, [X27, Z27.D,LSL #3] [1] |
0x41d340 FMLA Z21.D, P0/M, Z27.D, Z25.D |
0x41d344 MOVPRFX Z27, Z17 |
0x41d348 MUL Z27.D, P0/M, Z27.D, Z22.D |
0x41d34c ADR Z23.D, [Z27, Z23.D,SXTW] [13] |
0x41d350 MOVPRFX Z25, Z26 |
0x41d354 MLA Z25.D, P0/M, Z16.D, Z22.D |
0x41d358 FMUL Z21.D, Z21.D, Z19.D |
0x41d35c MAD Z22.D, P0/M, Z18.D, Z26.D |
0x41d360 ST1D {Z21.D}, P0, [X23, Z25.D,LSL #3] [22] |
0x41d364 LD1D {Z23.D}, P0/Z, [X28, Z23.D,LSL #3] [3] |
0x41d368 FSUB Z21.D, Z21.D, Z23.D |
0x41d36c ADR Z23.D, [Z27, Z24.D,SXTW] [8] |
0x41d370 LD1D {Z23.D}, P0/Z, [X28, Z23.D,LSL #3] [2] |
0x41d374 FADD Z21.D, Z21.D, Z23.D |
0x41d378 ST1D {Z21.D}, P0, [X19, Z22.D,LSL #3] [20] |
0x41d37c B.NE 41d2a0 |
/home/hbollore/qaas-runs/170-290-5445/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_mom.cpp: 96 - 100 |
-------------------------------------------------------------------------------- |
96: for (int j = (y_min + 1); j < (y_max + 1 + 2); j++) { |
97: for (int i = (x_min - 1 + 1); i < (x_max + 2 + 2); i++) { |
98: node_mass_post(i, j) = 0.25 * (density1(i + 0, j - 1) * post_vol(i + 0, j - 1) + density1(i, j) * post_vol(i, j) + |
99: density1(i - 1, j - 1) * post_vol(i - 1, j - 1) + density1(i - 1, j + 0) * post_vol(i - 1, j + 0)); |
100: node_mass_pre(i, j) = node_mass_post(i, j) - node_flux(i - 1, j + 0) + node_flux(i, j); |
/home/hbollore/qaas-runs/170-290-5445/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | __kmp_invoke_microtask | libomp.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.22 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 3.00 |
Bottlenecks | P6, P7, |
Function | .omp_outlined..10#0x41d130 |
Source | advec_mom.cpp:96-100,context.h:69-69 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | 4 |
CQA cycles | 21.00 |
CQA cycles if no scalar integer | 21.00 |
CQA cycles if FP arith vectorized | 21.00 |
CQA cycles if fully vectorized | 17.25 |
Front-end cycles | 7.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.25 |
P4 cycles | 0.25 |
P5 cycles | 21.00 |
P6 cycles | 21.00 |
P7 cycles | 3.50 |
P8 cycles | 3.50 |
P9 cycles | 6.00 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 1.00 - 0.50 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 56.00 |
Nb uops | 56.00 |
Nb loads | NA |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 1.90 |
Nb FLOP add-sub | 8.00 |
Nb FLOP mul | 8.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.29 |
Bytes prefetched | 0.00 |
Bytes loaded | 320.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 65.45 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 45.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 27.27 |
Vector-efficiency ratio all | 85.00 |
Vector-efficiency ratio load | 62.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 58.75 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 100.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.22 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 3.00 |
Bottlenecks | P6, P7, |
Function | .omp_outlined..10#0x41d130 |
Source | advec_mom.cpp:96-100,context.h:69-69 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | 4 |
CQA cycles | 21.00 |
CQA cycles if no scalar integer | 21.00 |
CQA cycles if FP arith vectorized | 21.00 |
CQA cycles if fully vectorized | 17.25 |
Front-end cycles | 7.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.25 |
P4 cycles | 0.25 |
P5 cycles | 21.00 |
P6 cycles | 21.00 |
P7 cycles | 3.50 |
P8 cycles | 3.50 |
P9 cycles | 6.00 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 1.00 - 0.50 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 56.00 |
Nb uops | 56.00 |
Nb loads | NA |
Nb stores | 2.00 |
Nb stack references | 0.00 |
FLOP/cycle | 1.90 |
Nb FLOP add-sub | 8.00 |
Nb FLOP mul | 8.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.29 |
Bytes prefetched | 0.00 |
Bytes loaded | 320.00 |
Bytes stored | 64.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 65.45 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 45.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 27.27 |
Vector-efficiency ratio all | 85.00 |
Vector-efficiency ratio load | 62.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 58.75 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 100.00 |
Path / |
Function | .omp_outlined..10#0x41d130 |
Source file and lines | advec_mom.cpp:96-100 |
Module | exec |
nb instructions | 56 |
loop length | 224 |
nb stack references | 0 |
front end | 7.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.25 | 0.25 | 21.00 | 21.00 | 1.00 | 1.00 | 6.00 | 6.00 | 0.00 | 0.00 | 0.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.25 | 0.25 | 21.00 | 21.00 | 3.50 | 3.50 | 6.00 | 6.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Longest recurrence chain latency (RecMII) | 2.00 |
Front-end | 7.00 |
Data deps. | 2.00 |
Overall L1 | 21.00 |
all | 60% |
load | 50% |
store | 100% |
mul | 100% |
add-sub | 38% |
fma | 100% |
other | 33% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 65% |
load | 50% |
store | 100% |
mul | 100% |
add-sub | 45% |
fma | 100% |
div/sqrt | 100% |
other | 27% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOVPRFX Z21, Z0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SDIV Z21.D, P0/M, Z21.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-20 | 1-0.50 |
ADD Z22.D, Z3.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z23, Z0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MLS Z23.D, P0/M, Z21.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADD Z21.D, Z5.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SUBS X13, X13, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD Z24.D, Z4.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADD Z23.D, Z20.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADD Z0.D, Z0.D, Z1.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SXTW Z21.D, P0/M, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVPRFX Z25, Z6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z25.D, P0/M, Z25.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADR Z26.D, [Z25, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z26.D}, P0/Z, [X25, Z26.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
MUL Z21.D, P0/M, Z21.D, Z7.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
SXTW Z22.D, P0/M, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVPRFX Z28, Z6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z28.D, P0/M, Z28.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
MOVPRFX Z30, Z7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z30.D, P0/M, Z30.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADR Z29.D, [Z28, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z31.D, [Z30, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z25.D, [Z25, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z27.D, [Z21, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z21.D, [Z21, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z27.D}, P0/Z, [X27, Z27.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z29.D}, P0/Z, [X25, Z29.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMUL Z26.D, Z27.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
LD1D {Z27.D}, P0/Z, [X27, Z31.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z25.D}, P0/Z, [X25, Z25.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z21.D}, P0/Z, [X27, Z21.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMLA Z26.D, P0/M, Z27.D, Z29.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADR Z27.D, [Z30, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMAD Z21.D, P0/M, Z25.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADR Z25.D, [Z28, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z26, Z24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SXTW Z26.D, P0/M, Z24.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LD1D {Z25.D}, P0/Z, [X25, Z25.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z27.D}, P0/Z, [X27, Z27.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMLA Z21.D, P0/M, Z27.D, Z25.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVPRFX Z27, Z17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z27.D, P0/M, Z27.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADR Z23.D, [Z27, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z25, Z26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MLA Z25.D, P0/M, Z16.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
FMUL Z21.D, Z21.D, Z19.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MAD Z22.D, P0/M, Z18.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ST1D {Z21.D}, P0, [X23, Z25.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z23.D}, P0/Z, [X28, Z23.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FSUB Z21.D, Z21.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z23.D, [Z27, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z23.D}, P0/Z, [X28, Z23.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FADD Z21.D, Z21.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ST1D {Z21.D}, P0, [X19, Z22.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B.NE 41d2a0 <.omp_outlined..10+0x170> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | .omp_outlined..10#0x41d130 |
Source file and lines | advec_mom.cpp:96-100 |
Module | exec |
nb instructions | 56 |
loop length | 224 |
nb stack references | 0 |
front end | 7.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.25 | 0.25 | 21.00 | 21.00 | 1.00 | 1.00 | 6.00 | 6.00 | 0.00 | 0.00 | 0.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.25 | 0.25 | 21.00 | 21.00 | 3.50 | 3.50 | 6.00 | 6.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Longest recurrence chain latency (RecMII) | 2.00 |
Front-end | 7.00 |
Data deps. | 2.00 |
Overall L1 | 21.00 |
all | 60% |
load | 50% |
store | 100% |
mul | 100% |
add-sub | 38% |
fma | 100% |
other | 33% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 65% |
load | 50% |
store | 100% |
mul | 100% |
add-sub | 45% |
fma | 100% |
div/sqrt | 100% |
other | 27% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOVPRFX Z21, Z0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SDIV Z21.D, P0/M, Z21.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-20 | 1-0.50 |
ADD Z22.D, Z3.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z23, Z0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MLS Z23.D, P0/M, Z21.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADD Z21.D, Z5.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SUBS X13, X13, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD Z24.D, Z4.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADD Z23.D, Z20.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADD Z0.D, Z0.D, Z1.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SXTW Z21.D, P0/M, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVPRFX Z25, Z6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z25.D, P0/M, Z25.D, Z21.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADR Z26.D, [Z25, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z26.D}, P0/Z, [X25, Z26.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
MUL Z21.D, P0/M, Z21.D, Z7.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
SXTW Z22.D, P0/M, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVPRFX Z28, Z6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z28.D, P0/M, Z28.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
MOVPRFX Z30, Z7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z30.D, P0/M, Z30.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADR Z29.D, [Z28, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z31.D, [Z30, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z25.D, [Z25, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z27.D, [Z21, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z21.D, [Z21, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z27.D}, P0/Z, [X27, Z27.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z29.D}, P0/Z, [X25, Z29.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMUL Z26.D, Z27.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
LD1D {Z27.D}, P0/Z, [X27, Z31.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z25.D}, P0/Z, [X25, Z25.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z21.D}, P0/Z, [X27, Z21.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMLA Z26.D, P0/M, Z27.D, Z29.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADR Z27.D, [Z30, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMAD Z21.D, P0/M, Z25.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADR Z25.D, [Z28, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z26, Z24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
SXTW Z26.D, P0/M, Z24.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LD1D {Z25.D}, P0/Z, [X25, Z25.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1D {Z27.D}, P0/Z, [X27, Z27.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMLA Z21.D, P0/M, Z27.D, Z25.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVPRFX Z27, Z17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MUL Z27.D, P0/M, Z27.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ADR Z23.D, [Z27, Z23.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z25, Z26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MLA Z25.D, P0/M, Z16.D, Z22.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
FMUL Z21.D, Z21.D, Z19.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MAD Z22.D, P0/M, Z18.D, Z26.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 2 |
ST1D {Z21.D}, P0, [X23, Z25.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z23.D}, P0/Z, [X28, Z23.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FSUB Z21.D, Z21.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ADR Z23.D, [Z27, Z24.D,SXTW] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LD1D {Z23.D}, P0/Z, [X28, Z23.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FADD Z21.D, Z21.D, Z23.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ST1D {Z21.D}, P0, [X19, Z22.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 |
B.NE 41d2a0 <.omp_outlined..10+0x170> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |