Function: generate_chunk(int, global_variables&) [clone ._omp_fn.1] | Module: exec | Source: generate_chunk.cpp:85-123 [...] | Coverage: 0.01% |
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Function: generate_chunk(int, global_variables&) [clone ._omp_fn.1] | Module: exec | Source: generate_chunk.cpp:85-123 [...] | Coverage: 0.01% |
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/home/hbollore/qaas-runs/170-290-5445/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
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46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/hbollore/qaas-runs/170-290-5445/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/generate_chunk.cpp: 85 - 123 |
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85: #pragma omp parallel for simd collapse(2) |
86: for (int j = (0); j < (yrange); j++) { |
87: for (int i = (0); i < (xrange); i++) { |
88: double x_cent = state_xmin[state]; |
89: double y_cent = state_ymin[state]; |
90: if (state_geometry[state] == g_rect) { |
91: if (field.vertexx[i + 1] >= state_xmin[state] && field.vertexx[i] < state_xmax[state]) { |
92: if (field.vertexy[j + 1] >= state_ymin[state] && field.vertexy[j] < state_ymax[state]) { |
93: field.energy0(i, j) = state_energy[state]; |
94: field.density0(i, j) = state_density[state]; |
95: for (int kt = j; kt <= j + 1; ++kt) { |
96: for (int jt = i; jt <= i + 1; ++jt) { |
97: field.xvel0(jt, kt) = state_xvel[state]; |
98: field.yvel0(jt, kt) = state_yvel[state]; |
99: } |
100: } |
101: } |
102: } |
103: } else if (state_geometry[state] == g_circ) { |
104: double radius = |
105: std::sqrt((field.cellx[i] - x_cent) * (field.cellx[i] - x_cent) + (field.celly[j] - y_cent) * (field.celly[j] - y_cent)); |
106: if (radius <= state_radius[state]) { |
107: field.energy0(i, j) = state_energy[state]; |
108: field.density0(i, j) = state_density[state]; |
109: for (int kt = j; kt <= j + 1; ++kt) { |
110: for (int jt = i; jt <= i + 1; ++jt) { |
111: field.xvel0(jt, kt) = state_xvel[state]; |
112: field.yvel0(jt, kt) = state_yvel[state]; |
113: } |
114: } |
115: } |
116: } else if (state_geometry[state] == g_point) { |
117: if (field.vertexx[i] == x_cent && field.vertexy[j] == y_cent) { |
118: field.energy0(i, j) = state_energy[state]; |
119: field.density0(i, j) = state_density[state]; |
120: for (int kt = j; kt <= j + 1; ++kt) { |
121: for (int jt = i; jt <= i + 1; ++jt) { |
122: field.xvel0(jt, kt) = state_xvel[state]; |
123: field.yvel0(jt, kt) = state_yvel[state]; |
0x426e00 STP X29, X30, [SP, #864]! |
0x426e04 ADD X29, SP, #0 |
0x426e08 STP X19, X20, [SP, #16] |
0x426e0c STP X27, X28, [SP, #80] |
0x426e10 LDP W19, W27, [X0, #88] |
0x426e14 CMP W27, #0 |
0x426e18 B.LE 4270cc |
0x426e1c CMP W19, #0 |
0x426e20 B.LE 4270cc |
0x426e24 ORR X20, XZR, X0 |
0x426e28 STP X21, X22, [SP, #32] |
0x426e2c MADD W22, W27, W19, WZR |
0x426e30 BL 403530 |
0x426e34 ORR W21, WZR, W0 |
0x426e38 BL 4033c0 |
0x426e3c UDIV W6, W22, W21 |
0x426e40 ORR W3, WZR, W0 |
0x426e44 MSUB W0, W6, W21, W22 |
0x426e48 CMP W3, W0 |
0x426e4c B.CC 4272cc |
0x426e50 MADD W3, W6, W3, W0 |
0x426e54 ADD W28, W6, W3 |
0x426e58 CMP W3, W28 |
0x426e5c B.CS 4270dc |
0x426e60 UDIV W8, W3, W19 |
0x426e64 LDP X7, X22, [X20] |
0x426e68 STP X23, X24, [SP, #48] |
0x426e6c LDRSW X1, [X20, #96] |
0x426e70 STR X7, [SP, #128] |
0x426e74 LDR X10, [X20, #16] |
0x426e78 STP X25, X26, [SP, #64] |
0x426e7c MSUB W7, W8, W19, W3 |
0x426e80 SBFM X9, X8, #0, #31 |
0x426e84 ADD W8, W8, #1 |
0x426e88 UBFM X2, X1, #62, #61 |
0x426e8c UBFM X5, X1, #61, #60 |
0x426e90 LDR X11, [X20, #24] |
0x426e94 SUB W13, W19, W7 |
0x426e98 STR X2, [SP, #104] |
0x426e9c LDR X12, [X20, #56] |
0x426ea0 CMP W6, W13 |
0x426ea4 CSEL W13, W6, W13, #9 |
0x426ea8 STP W19, W28, [SP, #112] |
0x426eac STR X10, [SP, #136] |
0x426eb0 ADD W10, W3, W13 |
0x426eb4 STR X11, [SP, #144] |
0x426eb8 LDP X25, X21, [X20, #32] |
0x426ebc STR X12, [SP, #152] |
0x426ec0 LDR X24, [X20, #48] |
0x426ec4 LDP X30, X23, [X20, #64] |
0x426ec8 LDR X4, [X20, #80] |
0x426ecc CMP W3, W10 |
0x426ed0 B.CS 4270a4 |
0x426ed4 HINT #0 |
0x426ed8 HINT #0 |
0x426edc HINT #0 |
(329) 0x426ee0 SBFM X1, X7, #0, #31 |
(329) 0x426ee4 SBFM X15, X8, #0, #31 |
(329) 0x426ee8 LDR X16, [X23, #8] |
(329) 0x426eec SUB W14, W13, #1 |
(329) 0x426ef0 ADD X0, X1, #1 |
(329) 0x426ef4 UBFM X13, X9, #61, #60 |
(329) 0x426ef8 ADD X3, X0, X14 |
(329) 0x426efc STR X15, [SP, #120] |
(329) 0x426f00 LDR X17, [X25, #8] |
(329) 0x426f04 SBFM X19, X8, #61, #31 |
(329) 0x426f08 LDR X26, [X24, #8] |
(329) 0x426f0c LDR X18, [SP, #104] |
(329) 0x426f10 ADD X7, X17, X5 |
(329) 0x426f14 ADD X6, X26, X5 |
(329) 0x426f18 LDR W2, [X16, X18] |
(329) 0x426f1c B 426f40 |
(329) 0x426f20 CMP W2, #2 |
(329) 0x426f24 B.EQ 4270f0 |
(329) 0x426f28 CMP W2, #3 |
(329) 0x426f2c B.EQ 4271e8 |
(329) 0x426f30 ORR X1, XZR, X0 |
(329) 0x426f34 CMP X0, X3 |
(329) 0x426f38 B.EQ 427070 |
(330) 0x426f3c ADD X0, X0, #1 |
(330) 0x426f40 LDR D3, [X6] |
(330) 0x426f44 LDR D1, [X7] |
(330) 0x426f48 CMP W2, #1 |
(330) 0x426f4c B.NE 426f20 |
(330) 0x426f50 LDR X17, [X4, #600] |
(330) 0x426f54 ADD X16, X17, X1,LSL #3 |
(330) 0x426f58 LDR D16, [X16, #8] |
(330) 0x426f5c FCMPE D16, D1 |
(330) 0x426f60 B.MI 426f30 |
(330) 0x426f64 LDR X15, [X21, #8] |
(330) 0x426f68 LDR D17, [X17, X1,LSL #3] |
(330) 0x426f6c LDR D18, [X15, X5] |
(330) 0x426f70 FCMPE D17, D18 |
(330) 0x426f74 B.GE 426f30 |
(330) 0x426f78 LDR X20, [X4, #632] |
(330) 0x426f7c LDR D19, [X20, X19] |
(330) 0x426f80 FCMPE D19, D3 |
(330) 0x426f84 B.MI 426f30 |
(330) 0x426f88 LDR X18, [SP, #152] |
(330) 0x426f8c LDR D20, [X20, X13] |
(330) 0x426f90 LDR X28, [X18, #8] |
(330) 0x426f94 LDR D21, [X28, X5] |
(330) 0x426f98 FCMPE D20, D21 |
(330) 0x426f9c B.GE 426f30 |
(330) 0x426fa0 LDR X11, [X22, #8] |
(330) 0x426fa4 LDP X28, X15, [SP, #120] |
(330) 0x426fa8 LDR X14, [X4, #48] |
(330) 0x426fac LDR D22, [X11, X5] |
(330) 0x426fb0 LDR X17, [X4] |
(330) 0x426fb4 MADD X12, X9, X14, X1 |
(330) 0x426fb8 LDR X20, [X15, #8] |
(330) 0x426fbc LDR X26, [X4, #64] |
(330) 0x426fc0 MADD X11, X9, X17, X1 |
(330) 0x426fc4 LDR X16, [SP, #136] |
(330) 0x426fc8 LDR X14, [X4, #16] |
(330) 0x426fcc LDR X15, [SP, #144] |
(330) 0x426fd0 LDR X17, [X16, #8] |
(330) 0x426fd4 STR D22, [X26, X12,LSL #3] |
(330) 0x426fd8 LDR D23, [X20, X5] |
(330) 0x426fdc LDR X18, [X4, #168] |
(330) 0x426fe0 LDR X15, [X15, #8] |
(330) 0x426fe4 LDR X16, [X4, #184] |
(330) 0x426fe8 STR D23, [X14, X11,LSL #3] |
(330) 0x426fec MADD X26, X18, X9, XZR |
(330) 0x426ff0 LDR D24, [X17, X5] |
(330) 0x426ff4 MADD X12, X28, X18, XZR |
(330) 0x426ff8 LDR X11, [X4, #216] |
(330) 0x426ffc ADD X18, X1, X26 |
(330) 0x427000 ADD X20, X0, X26 |
(330) 0x427004 ADD X26, X1, X12 |
(330) 0x427008 ADD X12, X0, X12 |
(330) 0x42700c LDR X14, [X4, #232] |
(330) 0x427010 STR D24, [X16, X18,LSL #3] |
(330) 0x427014 LDR D25, [X15, X5] |
(330) 0x427018 MADD X18, X11, X9, XZR |
(330) 0x42701c MADD X11, X28, X11, XZR |
(330) 0x427020 ADD X28, X1, X18 |
(330) 0x427024 ADD X18, X0, X18 |
(330) 0x427028 ADD X1, X1, X11 |
(330) 0x42702c ADD X11, X0, X11 |
(330) 0x427030 STR D25, [X14, X28,LSL #3] |
(330) 0x427034 LDR D26, [X17, X5] |
(330) 0x427038 STR D26, [X16, X20,LSL #3] |
(330) 0x42703c LDR D27, [X15, X5] |
(330) 0x427040 STR D27, [X14, X18,LSL #3] |
(330) 0x427044 LDR D28, [X17, X5] |
(330) 0x427048 STR D28, [X16, X26,LSL #3] |
(330) 0x42704c LDR D29, [X15, X5] |
(330) 0x427050 STR D29, [X14, X1,LSL #3] |
(330) 0x427054 ORR X1, XZR, X0 |
(330) 0x427058 LDR D30, [X17, X5] |
(330) 0x42705c STR D30, [X16, X12,LSL #3] |
(330) 0x427060 LDR D31, [X15, X5] |
(330) 0x427064 STR D31, [X14, X11,LSL #3] |
(330) 0x427068 CMP X0, X3 |
(330) 0x42706c B.NE 426f3c |
(331) 0x427070 ADD X9, X9, #1 |
(331) 0x427074 CMP W27, W8 |
(331) 0x427078 B.LE 4270c0 |
(332) 0x42707c LDP W13, W0, [SP, #112] |
(332) 0x427080 ORR W3, WZR, W10 |
(332) 0x427084 MOVZ W7, #0 |
(332) 0x427088 ADD W8, W8, #1 |
(332) 0x42708c SUB W6, W0, W10 |
(332) 0x427090 CMP W6, W13 |
(332) 0x427094 CSEL W13, W6, W13, #9 |
(332) 0x427098 ADD W10, W3, W13 |
(332) 0x42709c CMP W3, W10 |
(332) 0x4270a0 B.CC 426ee0 |
(332) 0x4270a4 ORR W10, WZR, W3 |
(332) 0x4270a8 ADD X9, X9, #1 |
(332) 0x4270ac CMP W27, W8 |
(332) 0x4270b0 B.GT 42707c |
(327) 0x4270b4 HINT #0 |
(327) 0x4270b8 HINT #0 |
(327) 0x4270bc HINT #0 |
(327) 0x4270c0 LDP X21, X22, [SP, #32] |
(327) 0x4270c4 LDP X23, X24, [SP, #48] |
(327) 0x4270c8 LDP X25, X26, [SP, #64] |
(327) 0x4270cc LDP X19, X20, [SP, #16] |
(327) 0x4270d0 LDP X27, X28, [SP, #80] |
(327) 0x4270d4 LDP X29, X30, [SP], #160 |
(327) 0x4270d8 RET |
(327) 0x4270dc LDP X19, X20, [SP, #16] |
(327) 0x4270e0 LDP X21, X22, [SP, #32] |
(327) 0x4270e4 LDP X27, X28, [SP, #80] |
(327) 0x4270e8 LDP X29, X30, [SP], #160 |
(327) 0x4270ec RET |
(328) 0x4270f0 LDR X16, [X4, #568] |
(328) 0x4270f4 LDR X17, [X4, #536] |
(328) 0x4270f8 LDR X15, [X30, #8] |
(328) 0x4270fc LDR D22, [X16, X13] |
(328) 0x427100 LDR D23, [X17, X1,LSL #3] |
(328) 0x427104 LDR D29, [X15, X5] |
(328) 0x427108 FSUB D24, D22, S3 |
(328) 0x42710c FSUB D25, D23, S1 |
(328) 0x427110 FMUL D26, D24, D24 |
(328) 0x427114 FMADD D27, D25, D25, D26 |
(328) 0x427118 FSQRT D28, D27 |
(328) 0x42711c FCMPE D29, D28 |
(328) 0x427120 B.MI 426f30 |
(328) 0x427124 LDR X11, [X22, #8] |
(328) 0x427128 LDP X28, X17, [SP, #128] |
(328) 0x42712c LDR X18, [X4, #48] |
(328) 0x427130 LDR D30, [X11, X5] |
(328) 0x427134 LDR X16, [X28, #8] |
(328) 0x427138 MADD X12, X9, X18, X1 |
(328) 0x42713c LDR X26, [X4, #64] |
(328) 0x427140 LDR X14, [X4] |
(328) 0x427144 LDR X17, [X17, #8] |
(328) 0x427148 STR D30, [X26, X12,LSL #3] |
(328) 0x42714c LDR D31, [X16, X5] |
(328) 0x427150 MADD X20, X9, X14, X1 |
(328) 0x427154 LDR X12, [X4, #168] |
(328) 0x427158 LDR X18, [X4, #16] |
(328) 0x42715c LDR X15, [SP, #144] |
(328) 0x427160 MADD X11, X9, X12, XZR |
(328) 0x427164 LDR X16, [X4, #184] |
(328) 0x427168 ADD X14, X12, X11 |
(328) 0x42716c ADD X26, X1, X11 |
(328) 0x427170 LDR X15, [X15, #8] |
(328) 0x427174 ADD X28, X0, X14 |
(328) 0x427178 STR D31, [X18, X20,LSL #3] |
(328) 0x42717c ADD X20, X0, X11 |
(328) 0x427180 ADD X18, X1, X14 |
(328) 0x427184 LDR D3, [X17, X5] |
(328) 0x427188 LDR X11, [X4, #216] |
(328) 0x42718c LDR X14, [X4, #232] |
(328) 0x427190 STR D3, [X16, X26,LSL #3] |
(328) 0x427194 LDR D1, [X15, X5] |
(328) 0x427198 MADD X12, X9, X11, XZR |
(328) 0x42719c ADD X26, X1, X12 |
(328) 0x4271a0 ADD X11, X11, X12 |
(328) 0x4271a4 ADD X12, X0, X12 |
(328) 0x4271a8 ADD X1, X1, X11 |
(328) 0x4271ac STR D1, [X14, X26,LSL #3] |
(328) 0x4271b0 ADD X26, X0, X11 |
(328) 0x4271b4 LDR D0, [X17, X5] |
(328) 0x4271b8 STR D0, [X16, X20,LSL #3] |
(328) 0x4271bc LDR D2, [X15, X5] |
(328) 0x4271c0 STR D2, [X14, X12,LSL #3] |
(328) 0x4271c4 LDR D4, [X17, X5] |
(328) 0x4271c8 STR D4, [X16, X18,LSL #3] |
(328) 0x4271cc LDR D5, [X15, X5] |
(328) 0x4271d0 STR D5, [X14, X1,LSL #3] |
(328) 0x4271d4 LDR D6, [X17, X5] |
(328) 0x4271d8 STR D6, [X16, X28,LSL #3] |
(328) 0x4271dc LDR D7, [X15, X5] |
(328) 0x4271e0 STR D7, [X14, X26,LSL #3] |
(328) 0x4271e4 B 426f30 |
(329) 0x4271e8 LDR X20, [X4, #600] |
(329) 0x4271ec LDR D0, [X20, X1,LSL #3] |
(329) 0x4271f0 FCMP D0, D1 |
(329) 0x4271f4 B.NE 426f30 |
(329) 0x4271f8 LDR X28, [X4, #632] |
(329) 0x4271fc LDR D2, [X28, X13] |
(329) 0x427200 FCMP D2, D3 |
(329) 0x427204 B.NE 426f30 |
(329) 0x427208 LDR X14, [X22, #8] |
(329) 0x42720c LDP X17, X26, [SP, #128] |
(329) 0x427210 LDR X11, [X4, #48] |
(329) 0x427214 LDR D4, [X14, X5] |
(329) 0x427218 LDR X20, [X17, #8] |
(329) 0x42721c MADD X12, X9, X11, X1 |
(329) 0x427220 LDR X15, [X4, #64] |
(329) 0x427224 LDR X16, [X4] |
(329) 0x427228 LDR X17, [X26, #8] |
(329) 0x42722c STR D4, [X15, X12,LSL #3] |
(329) 0x427230 LDR D5, [X20, X5] |
(329) 0x427234 MADD X18, X9, X16, X1 |
(329) 0x427238 LDR X12, [X4, #168] |
(329) 0x42723c LDR X28, [X4, #16] |
(329) 0x427240 LDR X11, [SP, #144] |
(329) 0x427244 MADD X14, X12, X9, XZR |
(329) 0x427248 LDR X16, [X4, #184] |
(329) 0x42724c ADD X20, X14, X1 |
(329) 0x427250 LDR X15, [X11, #8] |
(329) 0x427254 STR D5, [X28, X18,LSL #3] |
(329) 0x427258 ADD X28, X14, X12 |
(329) 0x42725c ADD X18, X14, X0 |
(329) 0x427260 LDR D6, [X17, X5] |
(329) 0x427264 ADD X26, X28, X1 |
(329) 0x427268 ADD X11, X28, X0 |
(329) 0x42726c LDR X12, [X4, #216] |
(329) 0x427270 LDR X14, [X4, #232] |
(329) 0x427274 STR D6, [X16, X20,LSL #3] |
(329) 0x427278 LDR D7, [X15, X5] |
(329) 0x42727c MADD X20, X12, X9, XZR |
(329) 0x427280 ADD X28, X20, X1 |
(329) 0x427284 ADD X12, X12, X20 |
(329) 0x427288 ADD X20, X20, X0 |
(329) 0x42728c ADD X1, X12, X1 |
(329) 0x427290 STR D7, [X14, X28,LSL #3] |
(329) 0x427294 ADD X28, X12, X0 |
(329) 0x427298 LDR D16, [X17, X5] |
(329) 0x42729c STR D16, [X16, X18,LSL #3] |
(329) 0x4272a0 LDR D17, [X15, X5] |
(329) 0x4272a4 STR D17, [X14, X20,LSL #3] |
(329) 0x4272a8 LDR D18, [X17, X5] |
(329) 0x4272ac STR D18, [X16, X26,LSL #3] |
(329) 0x4272b0 LDR D19, [X15, X5] |
(329) 0x4272b4 STR D19, [X14, X1,LSL #3] |
(329) 0x4272b8 LDR D20, [X17, X5] |
(329) 0x4272bc STR D20, [X16, X11,LSL #3] |
(329) 0x4272c0 LDR D21, [X15, X5] |
(329) 0x4272c4 STR D21, [X14, X28,LSL #3] |
(329) 0x4272c8 B 426f30 |
0x4272cc ADD W6, W6, #1 |
0x4272d0 MOVZ W0, #0 |
0x4272d4 B 426e50 |
0x4272d8 HINT #0 |
0x4272dc HINT #0 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►97.97+ | __kmp_GOMP_microtask_wrapper(i[...] | libomp.so | |
○ | __kmp_invoke_microtask | libomp.so | |
►2.03+ | GOMP_parallel | libomp.so | |
○ | generate_chunk(int, global_var[...] | generate_chunk.cpp:84 | exec |
○ | start(parallel_&, global_confi[...] | start.cpp:81 | exec |
○ | initialise(parallel_&, std::ve[...] | clover_leaf.cpp:192 | exec |
○ | main | iostream:74 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | iostream:74 | exec |
Path / |
Source file and lines | generate_chunk.cpp:85-123 |
Module | exec |
nb instructions | 61 |
loop length | 244 |
nb stack references | 0 |
front end | 7.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 7.25 | 7.25 | 7.25 | 7.25 | 0.00 | 0.00 | 0.00 | 0.00 | 7.33 | 7.33 | 7.33 | 6.00 | 6.00 |
cycles | 4.00 | 4.00 | 7.25 | 7.25 | 7.25 | 7.25 | 0.00 | 0.00 | 0.00 | 0.00 | 7.33 | 7.33 | 7.33 | 6.00 | 6.00 |
Cycles executing div or sqrt instructions | 2.00-1.00 |
Front-end | 7.00 |
Overall L1 | 7.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #864]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP W19, W27, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W27, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4270cc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP W19, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4270cc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X20, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MADD W22, W27, W19, WZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
BL 403530 <@plt_start@+0x4b0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR W21, WZR, W0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4033c0 <@plt_start@+0x340> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UDIV W6, W22, W21 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-12 | 1-0.50 |
ORR W3, WZR, W0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB W0, W6, W21, W22 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
CMP W3, W0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CC 4272cc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x4cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MADD W3, W6, W3, W0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD W28, W6, W3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W3, W28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CS 4270dc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UDIV W8, W3, W19 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-12 | 1-0.50 |
LDP X7, X22, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDRSW X1, [X20, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X7, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X20, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MSUB W7, W8, W19, W3 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
SBFM X9, X8, #0, #31 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD W8, W8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X2, X1, #62, #61 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X5, X1, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [X20, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB W13, W19, W7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X20, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W6, W13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL W13, W6, W13, #9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP W19, W28, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD W10, W3, W13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X11, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X25, X21, [X20, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X12, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X24, [X20, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X30, X23, [X20, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [X20, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W3, W10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CS 4270a4 <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ADD W6, W6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 426e50 <_Z14generate_chunkiR16global_variables._omp_fn.1+0x50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 |
Source file and lines | generate_chunk.cpp:85-123 |
Module | exec |
nb instructions | 61 |
loop length | 244 |
nb stack references | 0 |
front end | 7.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 7.25 | 7.25 | 7.25 | 7.25 | 0.00 | 0.00 | 0.00 | 0.00 | 7.33 | 7.33 | 7.33 | 6.00 | 6.00 |
cycles | 4.00 | 4.00 | 7.25 | 7.25 | 7.25 | 7.25 | 0.00 | 0.00 | 0.00 | 0.00 | 7.33 | 7.33 | 7.33 | 6.00 | 6.00 |
Cycles executing div or sqrt instructions | 2.00-1.00 |
Front-end | 7.00 |
Overall L1 | 7.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | 0% |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
STP X29, X30, [SP, #864]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP W19, W27, [X0, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W27, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4270cc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP W19, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4270cc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR X20, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MADD W22, W27, W19, WZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
BL 403530 <@plt_start@+0x4b0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ORR W21, WZR, W0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
BL 4033c0 <@plt_start@+0x340> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UDIV W6, W22, W21 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-12 | 1-0.50 |
ORR W3, WZR, W0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MSUB W0, W6, W21, W22 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
CMP W3, W0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CC 4272cc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x4cc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MADD W3, W6, W3, W0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD W28, W6, W3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W3, W28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CS 4270dc <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
UDIV W8, W3, W19 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-12 | 1-0.50 |
LDP X7, X22, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDRSW X1, [X20, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STR X7, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X10, [X20, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MSUB W7, W8, W19, W3 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
SBFM X9, X8, #0, #31 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD W8, W8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X2, X1, #62, #61 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X5, X1, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X11, [X20, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB W13, W19, W7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X2, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X12, [X20, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W6, W13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL W13, W6, W13, #9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP W19, W28, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR X10, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD W10, W3, W13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X11, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X25, X21, [X20, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
STR X12, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDR X24, [X20, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X30, X23, [X20, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X4, [X20, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W3, W10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.CS 4270a4 <_Z14generate_chunkiR16global_variables._omp_fn.1+0x2a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
ADD W6, W6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B 426e50 <_Z14generate_chunkiR16global_variables._omp_fn.1+0x50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼generate_chunk(int, global_variables&) [clone ._omp_fn.1]– | 0.01 | 0.01 |
▼Loop 327 - generate_chunk.cpp:85-123 - exec– | 0 | 0 |
▼Loop 328 - generate_chunk.cpp:85-123 - exec– | 0 | 0 |
▼Loop 329 - generate_chunk.cpp:85-123 - exec– | 0 | 0.01 |
○Loop 330 - generate_chunk.cpp:88-116 - exec | 0.01 | 0.01 |
○Loop 332 - generate_chunk.cpp:85-95 - exec | 0 | 0 |
○Loop 331 - generate_chunk.cpp:95-95 - exec | 0 | 0 |