Loop Id: 253 | Module: exec | Source: calc_dt_kernel.f90:92-129 | Coverage: 3.28% |
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Loop Id: 253 | Module: exec | Source: calc_dt_kernel.f90:92-129 | Coverage: 3.28% |
---|
0x435280 MOV -0x190(%RBP),%RDI [14] |
0x435287 VMOVUPD (%RDI,%RDX,8),%YMM26 [3] |
0x43528e VMOVUPD (%R10,%RDX,8),%YMM27 [4] |
0x435295 VMOVUPD (%R14,%RDX,8),%YMM28 [13] |
0x43529c VADDPD %YMM28,%YMM28,%YMM28 |
0x4352a2 VDIVPD (%RAX,%RDX,8),%YMM28,%YMM28 [8] |
0x4352a9 VFMADD231PD %YMM27,%YMM27,%YMM28 |
0x4352af VSQRTPD %YMM28,%YMM27 |
0x4352b5 VCMPPD $0x2,%YMM27,%YMM10,%K2 |
0x4352bc VBLENDMPD %YMM27,%YMM10,%YMM27{%K2} |
0x4352c2 VCMPPD $0x2,%YMM11,%YMM26,%K2 |
0x4352c9 VBLENDMPD %YMM26,%YMM11,%YMM26{%K2} |
0x4352cf VMULPD %YMM26,%YMM12,%YMM26 |
0x4352d5 VDIVPD %YMM27,%YMM26,%YMM26 |
0x4352db VMULPD %YMM14,%YMM18,%YMM27 |
0x4352e1 VANDPD %YMM2,%YMM22,%YMM22 |
0x4352e7 VANDPD %YMM2,%YMM23,%YMM23 |
0x4352ed VMULPD %YMM10,%YMM24,%YMM24 |
0x4352f3 VCMPPD $0x2,%YMM23,%YMM24,%K2 |
0x4352fa VBLENDMPD %YMM23,%YMM24,%YMM23{%K2} |
0x435300 VCMPPD $0x2,%YMM22,%YMM23,%K2 |
0x435307 VMOVAPD %YMM22,%YMM23{%K2} |
0x43530d VDIVPD %YMM23,%YMM27,%YMM22 |
0x435313 VMULPD %YMM15,%YMM18,%YMM18 |
0x435319 VANDPD %YMM2,%YMM19,%YMM19 |
0x43531f VANDPD %YMM2,%YMM21,%YMM21 |
0x435325 VCMPPD $0x2,%YMM21,%YMM24,%K2 |
0x43532c VMOVAPD %YMM21,%YMM24{%K2} |
0x435332 VCMPPD $0x2,%YMM19,%YMM24,%K2 |
0x435339 VMOVAPD %YMM19,%YMM24{%K2} |
0x43533f VDIVPD %YMM24,%YMM18,%YMM19 |
0x435345 VBROADCASTSD %XMM25,%YMM18 |
0x43534b VXORPD %YMM3,%YMM18,%YMM21 |
0x435351 VBROADCASTSD %XMM20,%YMM18 |
0x435357 VDIVPD %YMM17,%YMM21,%YMM18{%K1} |
0x43535d VCMPPD $0x2,%YMM18,%YMM19,%K1 |
0x435364 VMOVAPD %YMM19,%YMM18{%K1} |
0x43536a VCMPPD $0x2,%YMM18,%YMM22,%K1 |
0x435371 VMOVAPD %YMM22,%YMM18{%K1} |
0x435377 VCMPPD $0x2,%YMM18,%YMM26,%K1 |
0x43537e VMOVAPD %YMM26,%YMM18{%K1} |
0x435384 VCMPPD $0x2,%YMM18,%YMM13,%K1 |
0x43538b VMOVAPD %YMM13,%YMM18{%K1} |
0x435391 ADD $0x4,%RDX |
0x435395 VMOVAPD %YMM18,%YMM13 |
0x43539b CMP -0x40(%RBP),%RDX [14] |
0x43539f JAE 435470 |
0x4353a5 VMOVUPD -0x8(%R15,%RDX,8),%YMM17 [6] |
0x4353b0 VMOVUPD (%R15,%RDX,8),%YMM18 [6] |
0x4353b7 VADDPD -0x8(%RBX,%RDX,8),%YMM17,%YMM17 [12] |
0x4353c2 VMULPD -0x8(%R8,%RDX,8),%YMM17,%YMM22 [2] |
0x4353cd VADDPD (%RBX,%RDX,8),%YMM18,%YMM17 [12] |
0x4353d4 VMULPD (%R8,%RDX,8),%YMM17,%YMM23 [2] |
0x4353db VMOVUPD (%R12,%RDX,8),%YMM24 [9] |
0x4353e2 VADDPD %YMM24,%YMM24,%YMM18 |
0x4353e8 VMOVUPD (%R9,%RDX,8),%YMM17 [5] |
0x4353ef VADDPD -0x8(%R9,%RDX,8),%YMM17,%YMM17 [5] |
0x4353fa VMULPD (%R13,%RDX,8),%YMM17,%YMM19 [15] |
0x435402 VMOVUPD (%RSI,%RDX,8),%YMM17 [7] |
0x435409 VADDPD -0x8(%RSI,%RDX,8),%YMM17,%YMM17 [7] |
0x435414 VMULPD (%RCX,%RDX,8),%YMM17,%YMM21 [11] |
0x43541b VADDPD %YMM19,%YMM22,%YMM17 |
0x435421 VSUBPD %YMM17,%YMM23,%YMM17 |
0x435427 VADDPD %YMM21,%YMM17,%YMM17 |
0x43542d VDIVPD %YMM18,%YMM17,%YMM17 |
0x435433 VCMPPD $0x5,%YMM16,%YMM17,%K0 |
0x43543a KORTESTB %K0,%K0 |
0x43543e JE 43544a |
0x435440 MOV 0x78(%RBP),%RDI [14] |
0x435444 VMOVSD (%RDI),%XMM20 [10] |
0x43544a VCMPPD $0x1,%YMM16,%YMM17,%K1 |
0x435451 KORTESTB %K1,%K1 |
0x435455 JE 435280 |
0x43545b MOV 0x58(%RBP),%RDI [14] |
0x43545f VMOVSD (%RDI),%XMM25 [1] |
0x435465 JMP 435280 |
/home/eoseret/qaas_runs_CPU_9468/171-152-3172/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/calc_dt_kernel.f90: 92 - 129 |
-------------------------------------------------------------------------------- |
92: DO k=y_min,y_max |
93: !$OMP SIMD |
94: DO j=x_min,x_max |
95: |
96: dsx=celldx(j) |
97: dsy=celldy(k) |
98: |
99: cc=soundspeed(j,k)*soundspeed(j,k) |
100: cc=cc+2.0_8*viscosity_a(j,k)/density0(j,k) |
101: cc=MAX(SQRT(cc),g_small) |
102: |
103: dtct=dtc_safe*MIN(dsx,dsy)/cc |
104: |
105: div=0.0 |
106: |
107: dv1=(xvel0(j ,k)+xvel0(j ,k+1))*xarea(j ,k) |
108: dv2=(xvel0(j+1,k)+xvel0(j+1,k+1))*xarea(j+1,k) |
109: |
110: div=div+dv2-dv1 |
111: |
112: dtut=dtu_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
113: |
114: dv1=(yvel0(j,k )+yvel0(j+1,k ))*yarea(j,k ) |
115: dv2=(yvel0(j,k+1)+yvel0(j+1,k+1))*yarea(j,k+1) |
116: |
117: div=div+dv2-dv1 |
118: |
119: dtvt=dtv_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
120: |
121: div=div/(2.0_8*volume(j,k)) |
122: |
123: IF(div.LT.-g_small)THEN |
124: dtdivt=dtdiv_safe*(-1.0_8/div) |
125: ELSE |
126: dtdivt=g_big |
127: ENDIF |
128: |
129: dt_min_val=MIN(dt_min_val,dtct,dtut,dtvt,dtdivt) |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 3.45 |
Bottlenecks | |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source | calc_dt_kernel.f90:92-129 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | medium |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 57.00 |
CQA cycles if no scalar integer | 57.00 |
CQA cycles if FP arith vectorized | 57.00 |
CQA cycles if fully vectorized | 57.00 |
Front-end cycles | 13.75 |
DIV/SQRT cycles | 16.17 |
P0 cycles | 16.33 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 0.00 |
P4 cycles | 16.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 7.00 |
P11 cycles | 57.00 |
Inter-iter dependencies cycles | 0 - 2 |
FE+BE cycles (UFS) | 59.18 - 57.26 |
Stall cycles (UFS) | 44.58 - 42.68 |
Nb insns | 73.50 |
Nb uops | 73.50 |
Nb loads | 21.00 |
Nb stores | 0.00 |
Nb stack references | 3.00 |
FLOP/cycle | 1.82 |
Nb FLOP add-sub | 36.00 |
Nb FLOP mul | 32.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 24.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 4.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.11 |
Bytes prefetched | 0.00 |
Bytes loaded | 576.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 7.00 |
Stride n | 5.00 |
Stride unknown | 0.00 |
Stride indirect | 0.75 |
Vectorization ratio all | 95.32 |
Vectorization ratio load | 94.59 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 93.33 |
Vector-efficiency ratio all | 48.25 |
Vector-efficiency ratio load | 47.97 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 50.00 |
Vector-efficiency ratio other | 47.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 3.45 |
Bottlenecks | P0, |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source | calc_dt_kernel.f90:92-129 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | medium |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 57.00 |
CQA cycles if no scalar integer | 57.00 |
CQA cycles if FP arith vectorized | 57.00 |
CQA cycles if fully vectorized | 57.00 |
Front-end cycles | 14.17 |
DIV/SQRT cycles | 16.17 |
P0 cycles | 16.33 |
P1 cycles | 7.67 |
P2 cycles | 7.67 |
P3 cycles | 0.00 |
P4 cycles | 16.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 7.67 |
P11 cycles | 57.00 |
Inter-iter dependencies cycles | 0 - 2 |
FE+BE cycles (UFS) | 59.18 - 57.26 |
Stall cycles (UFS) | 44.17 - 42.27 |
Nb insns | 76.00 |
Nb uops | 76.00 |
Nb loads | 23.00 |
Nb stores | 0.00 |
Nb stack references | 4.00 |
FLOP/cycle | 1.82 |
Nb FLOP add-sub | 36.00 |
Nb FLOP mul | 32.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 24.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 4.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.39 |
Bytes prefetched | 0.00 |
Bytes loaded | 592.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 7.00 |
Stride n | 5.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 93.85 |
Vectorization ratio load | 89.47 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 93.33 |
Vector-efficiency ratio all | 47.69 |
Vector-efficiency ratio load | 46.05 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 50.00 |
Vector-efficiency ratio other | 47.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 3.45 |
Bottlenecks | P0, |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source | calc_dt_kernel.f90:92-129 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | medium |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 57.00 |
CQA cycles if no scalar integer | 57.00 |
CQA cycles if FP arith vectorized | 57.00 |
CQA cycles if fully vectorized | 57.00 |
Front-end cycles | 13.67 |
DIV/SQRT cycles | 16.17 |
P0 cycles | 16.33 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 0.00 |
P4 cycles | 16.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 7.00 |
P11 cycles | 57.00 |
Inter-iter dependencies cycles | 0 - 2 |
FE+BE cycles (UFS) | 59.18 - 57.25 |
Stall cycles (UFS) | 44.66 - 42.76 |
Nb insns | 73.00 |
Nb uops | 73.00 |
Nb loads | 21.00 |
Nb stores | 0.00 |
Nb stack references | 3.00 |
FLOP/cycle | 1.82 |
Nb FLOP add-sub | 36.00 |
Nb FLOP mul | 32.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 24.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 4.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.11 |
Bytes prefetched | 0.00 |
Bytes loaded | 576.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 7.00 |
Stride n | 5.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 95.31 |
Vectorization ratio load | 94.44 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 93.33 |
Vector-efficiency ratio all | 48.24 |
Vector-efficiency ratio load | 47.92 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 50.00 |
Vector-efficiency ratio other | 47.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 3.45 |
Bottlenecks | P0, |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source | calc_dt_kernel.f90:92-129 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | medium |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 57.00 |
CQA cycles if no scalar integer | 57.00 |
CQA cycles if FP arith vectorized | 57.00 |
CQA cycles if fully vectorized | 57.00 |
Front-end cycles | 13.83 |
DIV/SQRT cycles | 16.17 |
P0 cycles | 16.33 |
P1 cycles | 7.00 |
P2 cycles | 7.00 |
P3 cycles | 0.00 |
P4 cycles | 16.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 7.00 |
P11 cycles | 57.00 |
Inter-iter dependencies cycles | 0 - 2 |
FE+BE cycles (UFS) | 59.18 - 57.26 |
Stall cycles (UFS) | 44.50 - 42.60 |
Nb insns | 74.00 |
Nb uops | 74.00 |
Nb loads | 21.00 |
Nb stores | 0.00 |
Nb stack references | 3.00 |
FLOP/cycle | 1.82 |
Nb FLOP add-sub | 36.00 |
Nb FLOP mul | 32.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 24.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 4.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.11 |
Bytes prefetched | 0.00 |
Bytes loaded | 576.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 7.00 |
Stride n | 5.00 |
Stride unknown | 0.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 95.31 |
Vectorization ratio load | 94.44 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 93.33 |
Vector-efficiency ratio all | 48.24 |
Vector-efficiency ratio load | 47.92 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 50.00 |
Vector-efficiency ratio other | 47.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 3.45 |
Bottlenecks | P0, |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source | calc_dt_kernel.f90:92-129 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | medium |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 57.00 |
CQA cycles if no scalar integer | 57.00 |
CQA cycles if FP arith vectorized | 57.00 |
CQA cycles if fully vectorized | 57.00 |
Front-end cycles | 13.33 |
DIV/SQRT cycles | 16.17 |
P0 cycles | 16.33 |
P1 cycles | 6.33 |
P2 cycles | 6.33 |
P3 cycles | 0.00 |
P4 cycles | 16.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.00 |
P10 cycles | 6.33 |
P11 cycles | 57.00 |
Inter-iter dependencies cycles | 0 - 2 |
FE+BE cycles (UFS) | 59.18 - 57.25 |
Stall cycles (UFS) | 45.00 - 43.09 |
Nb insns | 71.00 |
Nb uops | 71.00 |
Nb loads | 19.00 |
Nb stores | 0.00 |
Nb stack references | 2.00 |
FLOP/cycle | 1.82 |
Nb FLOP add-sub | 36.00 |
Nb FLOP mul | 32.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 24.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 4.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.82 |
Bytes prefetched | 0.00 |
Bytes loaded | 560.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 7.00 |
Stride n | 5.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 96.83 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 93.33 |
Vector-efficiency ratio all | 48.81 |
Vector-efficiency ratio load | 50.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 50.00 |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | 50.00 |
Vector-efficiency ratio other | 47.50 |
Path / |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | calc_dt_kernel.f90:92-129 |
Module | exec |
nb instructions | 73.50 |
nb uops | 73.50 |
loop length | 477.50 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 19 |
used zmm registers | 0 |
nb stack references | 3 |
ADD-SUB / MUL ratio | 1.13 |
micro-operation queue | 13.75 cycles |
front end | 13.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.17 | 16.33 | 7.00 | 7.00 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.00 |
cycles | 16.17 | 16.33 | 7.00 | 7.00 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.00 |
Cycles executing div or sqrt instructions | 57.00 |
Longest recurrence chain latency (RecMII) | 0.00-2.00 |
FE+BE cycles | 59.18-57.25 |
Stall cycles | 44.58-42.68 |
ROB full (events) | 48.28-44.18 |
Front-end | 13.75 |
Dispatch | 16.50 |
DIV/SQRT | 57.00 |
Data deps. | 0.00-2.00 |
Overall L1 | 57.00 |
all | 95% |
load | 94% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 93% |
all | 48% |
load | 47% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 50% |
other | 47% |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | calc_dt_kernel.f90:92-129 |
Module | exec |
nb instructions | 76 |
nb uops | 76 |
loop length | 490 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 19 |
used zmm registers | 0 |
nb stack references | 4 |
ADD-SUB / MUL ratio | 1.13 |
micro-operation queue | 14.17 cycles |
front end | 14.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.17 | 16.33 | 7.67 | 7.67 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.67 |
cycles | 16.17 | 16.33 | 7.67 | 7.67 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.67 |
Cycles executing div or sqrt instructions | 57.00 |
Longest recurrence chain latency (RecMII) | 0.00-2.00 |
FE+BE cycles | 59.18-57.26 |
Stall cycles | 44.17-42.27 |
ROB full (events) | 48.28-43.45 |
Front-end | 14.17 |
Dispatch | 16.50 |
DIV/SQRT | 57.00 |
Data deps. | 0.00-2.00 |
Overall L1 | 57.00 |
all | 93% |
load | 89% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 93% |
all | 47% |
load | 46% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 50% |
other | 47% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x190(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%RDI,%RDX,8),%YMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R10,%RDX,8),%YMM27 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R14,%RDX,8),%YMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM28,%YMM28,%YMM28 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD (%RAX,%RDX,8),%YMM28,%YMM28 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 13-15 | 8 |
VFMADD231PD %YMM27,%YMM27,%YMM28 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSQRTPD %YMM28,%YMM27 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-19 | 9 |
VCMPPD $0x2,%YMM27,%YMM10,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM27,%YMM10,%YMM27{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM11,%YMM26,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM26,%YMM11,%YMM26{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM26,%YMM12,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %YMM27,%YMM26,%YMM26 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM14,%YMM18,%YMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM22,%YMM22 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM23,%YMM23 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM10,%YMM24,%YMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%YMM23,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM23,%YMM24,%YMM23{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM22,%YMM23,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM23{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM23,%YMM27,%YMM22 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM15,%YMM18,%YMM18 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM19,%YMM19 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM21,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM21,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM21,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM19,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM24,%YMM18,%YMM19 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VBROADCASTSD %XMM25,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM3,%YMM18,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBROADCASTSD %XMM20,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %YMM17,%YMM21,%YMM18{%K1} | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x2,%YMM18,%YMM19,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM22,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM26,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM26,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM13,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM13,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
ADD $0x4,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVAPD %YMM18,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
CMP -0x40(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JAE 435470 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x750> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD -0x8(%R15,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R15,%RDX,8),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RBX,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD -0x8(%R8,%RDX,8),%YMM17,%YMM22 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RDX,8),%YMM18,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R8,%RDX,8),%YMM17,%YMM23 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R12,%RDX,8),%YMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM24,%YMM24,%YMM18 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD (%R9,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%R9,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R13,%RDX,8),%YMM17,%YMM19 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RSI,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RSI,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%RCX,%RDX,8),%YMM17,%YMM21 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %YMM19,%YMM22,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM17,%YMM23,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM21,%YMM17,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %YMM18,%YMM17,%YMM17 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x5,%YMM16,%YMM17,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 43544a <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x72a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RDI),%XMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VCMPPD $0x1,%YMM16,%YMM17,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 435280 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RDI),%XMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 435280 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x560> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | calc_dt_kernel.f90:92-129 |
Module | exec |
nb instructions | 73 |
nb uops | 73 |
loop length | 475 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 19 |
used zmm registers | 0 |
nb stack references | 3 |
ADD-SUB / MUL ratio | 1.13 |
micro-operation queue | 13.67 cycles |
front end | 13.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.17 | 16.33 | 7.00 | 7.00 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.00 |
cycles | 16.17 | 16.33 | 7.00 | 7.00 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.00 |
Cycles executing div or sqrt instructions | 57.00 |
Longest recurrence chain latency (RecMII) | 0.00-2.00 |
FE+BE cycles | 59.18-57.25 |
Stall cycles | 44.66-42.76 |
ROB full (events) | 48.28-44.42 |
Front-end | 13.67 |
Dispatch | 16.50 |
DIV/SQRT | 57.00 |
Data deps. | 0.00-2.00 |
Overall L1 | 57.00 |
all | 95% |
load | 94% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 93% |
all | 48% |
load | 47% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 50% |
other | 47% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x190(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%RDI,%RDX,8),%YMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R10,%RDX,8),%YMM27 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R14,%RDX,8),%YMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM28,%YMM28,%YMM28 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD (%RAX,%RDX,8),%YMM28,%YMM28 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 13-15 | 8 |
VFMADD231PD %YMM27,%YMM27,%YMM28 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSQRTPD %YMM28,%YMM27 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-19 | 9 |
VCMPPD $0x2,%YMM27,%YMM10,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM27,%YMM10,%YMM27{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM11,%YMM26,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM26,%YMM11,%YMM26{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM26,%YMM12,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %YMM27,%YMM26,%YMM26 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM14,%YMM18,%YMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM22,%YMM22 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM23,%YMM23 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM10,%YMM24,%YMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%YMM23,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM23,%YMM24,%YMM23{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM22,%YMM23,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM23{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM23,%YMM27,%YMM22 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM15,%YMM18,%YMM18 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM19,%YMM19 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM21,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM21,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM21,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM19,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM24,%YMM18,%YMM19 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VBROADCASTSD %XMM25,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM3,%YMM18,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBROADCASTSD %XMM20,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %YMM17,%YMM21,%YMM18{%K1} | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x2,%YMM18,%YMM19,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM22,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM26,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM26,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM13,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM13,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
ADD $0x4,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVAPD %YMM18,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
CMP -0x40(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JAE 435470 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x750> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD -0x8(%R15,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R15,%RDX,8),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RBX,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD -0x8(%R8,%RDX,8),%YMM17,%YMM22 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RDX,8),%YMM18,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R8,%RDX,8),%YMM17,%YMM23 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R12,%RDX,8),%YMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM24,%YMM24,%YMM18 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD (%R9,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%R9,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R13,%RDX,8),%YMM17,%YMM19 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RSI,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RSI,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%RCX,%RDX,8),%YMM17,%YMM21 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %YMM19,%YMM22,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM17,%YMM23,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM21,%YMM17,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %YMM18,%YMM17,%YMM17 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x5,%YMM16,%YMM17,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 43544a <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x72a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RDI),%XMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VCMPPD $0x1,%YMM16,%YMM17,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 435280 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | calc_dt_kernel.f90:92-129 |
Module | exec |
nb instructions | 74 |
nb uops | 74 |
loop length | 480 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 19 |
used zmm registers | 0 |
nb stack references | 3 |
ADD-SUB / MUL ratio | 1.13 |
micro-operation queue | 13.83 cycles |
front end | 13.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.17 | 16.33 | 7.00 | 7.00 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.00 |
cycles | 16.17 | 16.33 | 7.00 | 7.00 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 7.00 |
Cycles executing div or sqrt instructions | 57.00 |
Longest recurrence chain latency (RecMII) | 0.00-2.00 |
FE+BE cycles | 59.18-57.26 |
Stall cycles | 44.50-42.60 |
ROB full (events) | 48.28-44.42 |
Front-end | 13.83 |
Dispatch | 16.50 |
DIV/SQRT | 57.00 |
Data deps. | 0.00-2.00 |
Overall L1 | 57.00 |
all | 95% |
load | 94% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 93% |
all | 48% |
load | 47% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 50% |
other | 47% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x190(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%RDI,%RDX,8),%YMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R10,%RDX,8),%YMM27 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R14,%RDX,8),%YMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM28,%YMM28,%YMM28 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD (%RAX,%RDX,8),%YMM28,%YMM28 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 13-15 | 8 |
VFMADD231PD %YMM27,%YMM27,%YMM28 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSQRTPD %YMM28,%YMM27 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-19 | 9 |
VCMPPD $0x2,%YMM27,%YMM10,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM27,%YMM10,%YMM27{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM11,%YMM26,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM26,%YMM11,%YMM26{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM26,%YMM12,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %YMM27,%YMM26,%YMM26 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM14,%YMM18,%YMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM22,%YMM22 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM23,%YMM23 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM10,%YMM24,%YMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%YMM23,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM23,%YMM24,%YMM23{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM22,%YMM23,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM23{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM23,%YMM27,%YMM22 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM15,%YMM18,%YMM18 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM19,%YMM19 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM21,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM21,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM21,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM19,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM24,%YMM18,%YMM19 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VBROADCASTSD %XMM25,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM3,%YMM18,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBROADCASTSD %XMM20,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %YMM17,%YMM21,%YMM18{%K1} | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x2,%YMM18,%YMM19,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM22,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM26,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM26,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM13,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM13,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
ADD $0x4,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVAPD %YMM18,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
CMP -0x40(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JAE 435470 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x750> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD -0x8(%R15,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R15,%RDX,8),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RBX,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD -0x8(%R8,%RDX,8),%YMM17,%YMM22 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RDX,8),%YMM18,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R8,%RDX,8),%YMM17,%YMM23 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R12,%RDX,8),%YMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM24,%YMM24,%YMM18 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD (%R9,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%R9,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R13,%RDX,8),%YMM17,%YMM19 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RSI,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RSI,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%RCX,%RDX,8),%YMM17,%YMM21 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %YMM19,%YMM22,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM17,%YMM23,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM21,%YMM17,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %YMM18,%YMM17,%YMM17 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x5,%YMM16,%YMM17,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 43544a <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x72a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCMPPD $0x1,%YMM16,%YMM17,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 435280 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x58(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RDI),%XMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 435280 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x560> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | calc_dt_kernel.f90:92-129 |
Module | exec |
nb instructions | 71 |
nb uops | 71 |
loop length | 465 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 19 |
used zmm registers | 0 |
nb stack references | 2 |
ADD-SUB / MUL ratio | 1.13 |
micro-operation queue | 13.33 cycles |
front end | 13.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.17 | 16.33 | 6.33 | 6.33 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 6.33 |
cycles | 16.17 | 16.33 | 6.33 | 6.33 | 0.00 | 16.50 | 3.00 | 0.00 | 0.00 | 0.00 | 1.00 | 6.33 |
Cycles executing div or sqrt instructions | 57.00 |
Longest recurrence chain latency (RecMII) | 0.00-2.00 |
FE+BE cycles | 59.18-57.25 |
Stall cycles | 45.00-43.09 |
ROB full (events) | 48.28-44.42 |
Front-end | 13.33 |
Dispatch | 16.50 |
DIV/SQRT | 57.00 |
Data deps. | 0.00-2.00 |
Overall L1 | 57.00 |
all | 96% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 93% |
all | 48% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 50% |
fma | 50% |
div/sqrt | 50% |
other | 47% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x190(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%RDI,%RDX,8),%YMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R10,%RDX,8),%YMM27 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R14,%RDX,8),%YMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM28,%YMM28,%YMM28 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD (%RAX,%RDX,8),%YMM28,%YMM28 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 13-15 | 8 |
VFMADD231PD %YMM27,%YMM27,%YMM28 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSQRTPD %YMM28,%YMM27 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-19 | 9 |
VCMPPD $0x2,%YMM27,%YMM10,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM27,%YMM10,%YMM27{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM11,%YMM26,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM26,%YMM11,%YMM26{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM26,%YMM12,%YMM26 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %YMM27,%YMM26,%YMM26 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM14,%YMM18,%YMM27 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM22,%YMM22 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM23,%YMM23 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMULPD %YMM10,%YMM24,%YMM24 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x2,%YMM23,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDMPD %YMM23,%YMM24,%YMM23{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM22,%YMM23,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM23{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM23,%YMM27,%YMM22 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VMULPD %YMM15,%YMM18,%YMM18 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %YMM2,%YMM19,%YMM19 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VANDPD %YMM2,%YMM21,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VCMPPD $0x2,%YMM21,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM21,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM19,%YMM24,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM24{%K2} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VDIVPD %YMM24,%YMM18,%YMM19 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VBROADCASTSD %XMM25,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %YMM3,%YMM18,%YMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VBROADCASTSD %XMM20,%YMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VDIVPD %YMM17,%YMM21,%YMM18{%K1} | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x2,%YMM18,%YMM19,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM19,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM22,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM22,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM26,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM26,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VCMPPD $0x2,%YMM18,%YMM13,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM13,%YMM18{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
ADD $0x4,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVAPD %YMM18,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
CMP -0x40(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JAE 435470 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x750> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD -0x8(%R15,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD (%R15,%RDX,8),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RBX,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD -0x8(%R8,%RDX,8),%YMM17,%YMM22 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RDX,8),%YMM18,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R8,%RDX,8),%YMM17,%YMM23 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R12,%RDX,8),%YMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD %YMM24,%YMM24,%YMM18 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD (%R9,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%R9,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%R13,%RDX,8),%YMM17,%YMM19 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RSI,%RDX,8),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VADDPD -0x8(%RSI,%RDX,8),%YMM17,%YMM17 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD (%RCX,%RDX,8),%YMM17,%YMM21 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %YMM19,%YMM22,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %YMM17,%YMM23,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDPD %YMM21,%YMM17,%YMM17 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %YMM18,%YMM17,%YMM17 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
VCMPPD $0x5,%YMM16,%YMM17,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 43544a <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x72a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCMPPD $0x1,%YMM16,%YMM17,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 435280 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x560> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |