Loop Id: 197 | Module: exec | Source: flux_calc_kernel.f90:58-60 | Coverage: 5.02% |
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Loop Id: 197 | Module: exec | Source: flux_calc_kernel.f90:58-60 | Coverage: 5.02% |
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0x43e5a1 VMULSD (%RAX),%XMM2,%XMM4 [11] |
0x43e5a5 VMOVUPD (%R10,%RDX,1),%ZMM1 [14] |
0x43e5ac VMOVUPD (%R11,%RDX,1),%ZMM9 [6] |
0x43e5b3 MOV 0x1e8(%RSP),%RCX [22] |
0x43e5bb VADDPD (%R15,%RDX,1),%ZMM1,%ZMM8 [13] |
0x43e5c2 VADDPD (%R14,%RDX,1),%ZMM9,%ZMM10 [3] |
0x43e5c9 VBROADCASTSD %XMM4,%ZMM12 |
0x43e5cf VMULPD (%RDI,%RDX,1),%ZMM12,%ZMM13 [8] |
0x43e5d6 VADDPD %ZMM10,%ZMM8,%ZMM11 |
0x43e5dc VMULPD %ZMM13,%ZMM11,%ZMM14 |
0x43e5e2 VMOVUPD %ZMM14,(%R8,%RDX,1) [4] |
0x43e5e9 VMULSD (%RAX),%XMM2,%XMM15 [11] |
0x43e5ed VMOVUPD (%R12,%RDX,1),%ZMM6 [12] |
0x43e5f4 VMOVUPD (%RBX,%RDX,1),%ZMM3 [1] |
0x43e5fb VADDPD (%RCX,%RDX,1),%ZMM6,%ZMM0 [13] |
0x43e602 VADDPD (%RSI,%RDX,1),%ZMM3,%ZMM7 [21] |
0x43e609 VBROADCASTSD %XMM15,%ZMM1 |
0x43e60f VMULPD (%R9,%RDX,1),%ZMM1,%ZMM8 [17] |
0x43e616 VADDPD %ZMM7,%ZMM0,%ZMM4 |
0x43e61c VMULPD %ZMM8,%ZMM4,%ZMM9 |
0x43e622 VMOVUPD %ZMM9,(%R13,%RDX,1) [23] |
0x43e62a VMULSD (%RAX),%XMM2,%XMM10 [11] |
0x43e62e VMOVUPD 0x40(%RDX,%R10,1),%ZMM11 [10] |
0x43e636 VMOVUPD 0x40(%RDX,%R11,1),%ZMM13 [2] |
0x43e63e VADDPD 0x40(%RDX,%R15,1),%ZMM11,%ZMM12 [7] |
0x43e646 VADDPD 0x40(%RDX,%R14,1),%ZMM13,%ZMM14 [9] |
0x43e64e VBROADCASTSD %XMM10,%ZMM6 |
0x43e654 VMULPD 0x40(%RDX,%RDI,1),%ZMM6,%ZMM0 [20] |
0x43e65c VADDPD %ZMM14,%ZMM12,%ZMM15 |
0x43e662 VMULPD %ZMM0,%ZMM15,%ZMM3 |
0x43e668 VMOVUPD %ZMM3,0x40(%RDX,%R8,1) [19] |
0x43e670 VMULSD (%RAX),%XMM2,%XMM4 [11] |
0x43e674 VMOVUPD 0x40(%RDX,%R12,1),%ZMM7 [15] |
0x43e67c VMOVUPD 0x40(%RDX,%RBX,1),%ZMM8 [18] |
0x43e684 VADDPD 0x40(%RCX,%RDX,1),%ZMM7,%ZMM1 [13] |
0x43e68c MOV 0x228(%RSP),%RCX [22] |
0x43e694 VADDPD 0x40(%RSI,%RDX,1),%ZMM8,%ZMM9 [21] |
0x43e69c SUB $-0x80,%RDX |
0x43e6a0 VBROADCASTSD %XMM4,%ZMM11 |
0x43e6a6 VMULPD -0x40(%RDX,%R9,1),%ZMM11,%ZMM12 [5] |
0x43e6ae VADDPD %ZMM9,%ZMM1,%ZMM10 |
0x43e6b4 VMULPD %ZMM12,%ZMM10,%ZMM13 |
0x43e6ba VMOVUPD %ZMM13,-0x40(%RDX,%R13,1) [16] |
0x43e6c2 CMP %RCX,%RDX |
0x43e6c5 JNE 43e5a1 |
/home/eoseret/qaas_runs_CPU_9468/171-152-3172/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/flux_calc_kernel.f90: 58 - 60 |
-------------------------------------------------------------------------------- |
58: *(xvel0(j,k)+xvel0(j,k+1)+xvel1(j,k)+xvel1(j,k+1)) |
59: vol_flux_y(j,k)=0.25_8*dt*yarea(j,k) & |
60: *(yvel0(j,k)+yvel0(j+1,k)+yvel1(j,k)+yvel1(j+1,k)) |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.04 |
CQA speedup if fully vectorized | 1.19 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.04 |
Bottlenecks | P0, |
Function | flux_calc_kernel._omp_fn.0 |
Source | flux_calc_kernel.f90:58-60 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.50 |
CQA cycles if no scalar integer | 12.50 |
CQA cycles if FP arith vectorized | 12.06 |
CQA cycles if fully vectorized | 10.50 |
Front-end cycles | 9.33 |
DIV/SQRT cycles | 12.50 |
P0 cycles | 12.00 |
P1 cycles | 8.67 |
P2 cycles | 8.67 |
P3 cycles | 2.00 |
P4 cycles | 12.00 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.00 |
P10 cycles | 8.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 12.24 |
Stall cycles (UFS) | 2.23 |
Nb insns | 45.00 |
Nb uops | 44.00 |
Nb loads | 26.00 |
Nb stores | 4.00 |
Nb stack references | 2.00 |
FLOP/cycle | 13.12 |
Nb FLOP add-sub | 96.00 |
Nb FLOP mul | 68.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 126.72 |
Bytes prefetched | 0.00 |
Bytes loaded | 1328.00 |
Bytes stored | 256.00 |
Stride 0 | 2.00 |
Stride 1 | 2.00 |
Stride n | 20.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 80.00 |
Vectorization ratio load | 83.33 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 66.67 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 82.50 |
Vector-efficiency ratio load | 85.42 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 70.83 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.04 |
CQA speedup if fully vectorized | 1.19 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.04 |
Bottlenecks | P0, |
Function | flux_calc_kernel._omp_fn.0 |
Source | flux_calc_kernel.f90:58-60 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.50 |
CQA cycles if no scalar integer | 12.50 |
CQA cycles if FP arith vectorized | 12.06 |
CQA cycles if fully vectorized | 10.50 |
Front-end cycles | 9.33 |
DIV/SQRT cycles | 12.50 |
P0 cycles | 12.00 |
P1 cycles | 8.67 |
P2 cycles | 8.67 |
P3 cycles | 2.00 |
P4 cycles | 12.00 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.00 |
P10 cycles | 8.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 12.24 |
Stall cycles (UFS) | 2.23 |
Nb insns | 45.00 |
Nb uops | 44.00 |
Nb loads | 26.00 |
Nb stores | 4.00 |
Nb stack references | 2.00 |
FLOP/cycle | 13.12 |
Nb FLOP add-sub | 96.00 |
Nb FLOP mul | 68.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 126.72 |
Bytes prefetched | 0.00 |
Bytes loaded | 1328.00 |
Bytes stored | 256.00 |
Stride 0 | 2.00 |
Stride 1 | 2.00 |
Stride n | 20.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 80.00 |
Vectorization ratio load | 83.33 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 66.67 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 82.50 |
Vector-efficiency ratio load | 85.42 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 70.83 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | flux_calc_kernel._omp_fn.0 |
Source file and lines | flux_calc_kernel.f90:58-60 |
Module | exec |
nb instructions | 45 |
nb uops | 44 |
loop length | 298 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 14 |
nb stack references | 2 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 9.33 cycles |
front end | 9.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.50 | 3.50 | 8.67 | 8.67 | 2.00 | 12.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 8.67 |
cycles | 12.50 | 12.00 | 8.67 | 8.67 | 2.00 | 12.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 8.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 12.24 |
Stall cycles | 2.22 |
LB full (events) | 3.34 |
Front-end | 9.33 |
Dispatch | 12.50 |
Data deps. | 1.00 |
Overall L1 | 12.50 |
all | 80% |
load | 83% |
store | 100% |
mul | 66% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 82% |
load | 85% |
store | 100% |
mul | 70% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULSD (%RAX),%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R10,%RDX,1),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R11,%RDX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
MOV 0x1e8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDPD (%R15,%RDX,1),%ZMM1,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R14,%RDX,1),%ZMM9,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VBROADCASTSD %XMM4,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD (%RDI,%RDX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM10,%ZMM8,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM13,%ZMM11,%ZMM14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM14,(%R8,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULSD (%RAX),%XMM2,%XMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R12,%RDX,1),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RBX,%RDX,1),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%RCX,%RDX,1),%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%RSI,%RDX,1),%ZMM3,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VBROADCASTSD %XMM15,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD (%R9,%RDX,1),%ZMM1,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM7,%ZMM0,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM8,%ZMM4,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM9,(%R13,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULSD (%RAX),%XMM2,%XMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD 0x40(%RDX,%R10,1),%ZMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%RDX,%R11,1),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD 0x40(%RDX,%R15,1),%ZMM11,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD 0x40(%RDX,%R14,1),%ZMM13,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VBROADCASTSD %XMM10,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD 0x40(%RDX,%RDI,1),%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM14,%ZMM12,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM0,%ZMM15,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM3,0x40(%RDX,%R8,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULSD (%RAX),%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD 0x40(%RDX,%R12,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%RDX,%RBX,1),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD 0x40(%RCX,%RDX,1),%ZMM7,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
MOV 0x228(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDPD 0x40(%RSI,%RDX,1),%ZMM8,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
SUB $-0x80,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VBROADCASTSD %XMM4,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD -0x40(%RDX,%R9,1),%ZMM11,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM9,%ZMM1,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM12,%ZMM10,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM13,-0x40(%RDX,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 43e5a1 <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0x731> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | flux_calc_kernel._omp_fn.0 |
Source file and lines | flux_calc_kernel.f90:58-60 |
Module | exec |
nb instructions | 45 |
nb uops | 44 |
loop length | 298 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 14 |
nb stack references | 2 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 9.33 cycles |
front end | 9.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.50 | 3.50 | 8.67 | 8.67 | 2.00 | 12.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 8.67 |
cycles | 12.50 | 12.00 | 8.67 | 8.67 | 2.00 | 12.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 8.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 12.24 |
Stall cycles | 2.22 |
LB full (events) | 3.34 |
Front-end | 9.33 |
Dispatch | 12.50 |
Data deps. | 1.00 |
Overall L1 | 12.50 |
all | 80% |
load | 83% |
store | 100% |
mul | 66% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 82% |
load | 85% |
store | 100% |
mul | 70% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMULSD (%RAX),%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R10,%RDX,1),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R11,%RDX,1),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
MOV 0x1e8(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDPD (%R15,%RDX,1),%ZMM1,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R14,%RDX,1),%ZMM9,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VBROADCASTSD %XMM4,%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD (%RDI,%RDX,1),%ZMM12,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM10,%ZMM8,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM13,%ZMM11,%ZMM14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM14,(%R8,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULSD (%RAX),%XMM2,%XMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R12,%RDX,1),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RBX,%RDX,1),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%RCX,%RDX,1),%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%RSI,%RDX,1),%ZMM3,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VBROADCASTSD %XMM15,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD (%R9,%RDX,1),%ZMM1,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM7,%ZMM0,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM8,%ZMM4,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM9,(%R13,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULSD (%RAX),%XMM2,%XMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD 0x40(%RDX,%R10,1),%ZMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%RDX,%R11,1),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD 0x40(%RDX,%R15,1),%ZMM11,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD 0x40(%RDX,%R14,1),%ZMM13,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VBROADCASTSD %XMM10,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD 0x40(%RDX,%RDI,1),%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM14,%ZMM12,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM0,%ZMM15,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM3,0x40(%RDX,%R8,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULSD (%RAX),%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD 0x40(%RDX,%R12,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%RDX,%RBX,1),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD 0x40(%RCX,%RDX,1),%ZMM7,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
MOV 0x228(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDPD 0x40(%RSI,%RDX,1),%ZMM8,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
SUB $-0x80,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VBROADCASTSD %XMM4,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULPD -0x40(%RDX,%R9,1),%ZMM11,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM9,%ZMM1,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM12,%ZMM10,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM13,-0x40(%RDX,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 43e5a1 <__flux_calc_kernel_module_MOD_flux_calc_kernel._omp_fn.0+0x731> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |