Loop Id: 217 | Module: exec | Source: PdV_kernel.f90:69-99 [...] | Coverage: 5.81% |
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Loop Id: 217 | Module: exec | Source: PdV_kernel.f90:69-99 [...] | Coverage: 5.81% |
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0x42adc0 VMOVUPD -0x8(%RDI,%RAX,8),%ZMM21 [6] |
0x42adcb VMOVUPD (%RDI,%RAX,8),%ZMM22 [6] |
0x42add2 VADDPD -0x8(%RBX,%RAX,8),%ZMM21,%ZMM21 [2] |
0x42addd VMULPD -0x8(%RSI,%RAX,8),%ZMM20,%ZMM23 [8] |
0x42ade8 VADDPD (%RBX,%RAX,8),%ZMM22,%ZMM22 [2] |
0x42adef VMULPD (%RSI,%RAX,8),%ZMM20,%ZMM24 [8] |
0x42adf6 VMOVUPD (%RDX,%RAX,8),%ZMM25 [1] |
0x42adfd VADDPD -0x8(%RDX,%RAX,8),%ZMM25,%ZMM25 [1] |
0x42ae08 VMULPD (%R12,%RAX,8),%ZMM20,%ZMM26 [4] |
0x42ae0f VMULPD %ZMM25,%ZMM26,%ZMM25 |
0x42ae15 VFMADD231PD %ZMM23,%ZMM21,%ZMM25 |
0x42ae1b VMOVUPD (%R13,%RAX,8),%ZMM21 [12] |
0x42ae23 VADDPD -0x8(%R13,%RAX,8),%ZMM21,%ZMM21 [12] |
0x42ae2e VMULPD (%R15,%RAX,8),%ZMM20,%ZMM23 [9] |
0x42ae35 VFNMADD231PD %ZMM24,%ZMM22,%ZMM25 |
0x42ae3b VFMSUB213PD %ZMM25,%ZMM21,%ZMM23 |
0x42ae41 VMOVUPD (%R11,%RAX,8),%ZMM21 [11] |
0x42ae48 VMOVUPD (%RCX,%RAX,8),%ZMM22 [14] |
0x42ae4f VADDPD (%R9,%RAX,8),%ZMM22,%ZMM22 [7] |
0x42ae56 VMULPD %ZMM22,%ZMM23,%ZMM22 |
0x42ae5c VMULPD (%R14,%RAX,8),%ZMM21,%ZMM24 [15] |
0x42ae63 VDIVPD %ZMM24,%ZMM22,%ZMM22 |
0x42ae69 VADDPD %ZMM21,%ZMM23,%ZMM21 |
0x42ae6f MOV 0xc8(%RSP),%R8 [5] |
0x42ae77 VMOVUPD (%R8,%RAX,8),%ZMM23 [13] |
0x42ae7e VSUBPD %ZMM22,%ZMM23,%ZMM22 |
0x42ae84 VDIVPD %ZMM21,%ZMM24,%ZMM21 |
0x42ae8a MOV 0xd0(%RSP),%R8 [5] |
0x42ae92 VMOVUPD %ZMM22,(%R8,%RAX,8) [3] |
0x42ae99 MOV 0x28(%RSP),%R8 [5] |
0x42ae9e VMOVUPD %ZMM21,(%R8,%RAX,8) [10] |
0x42aea5 ADD $0x8,%RAX |
0x42aea9 CMP %R10,%RAX |
0x42aeac JB 42adc0 |
/home/eoseret/qaas_runs_CPU_9468/171-152-3172/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 69 - 99 |
-------------------------------------------------------------------------------- |
69: IF(predict)THEN |
[...] |
75: DO j=x_min,x_max |
76: |
77: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
78: +xvel0(j ,k )+xvel0(j ,k+1)))*0.25_8*dt*0.5 |
79: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
80: +xvel0(j+1,k )+xvel0(j+1,k+1)))*0.25_8*dt*0.5 |
81: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
82: +yvel0(j ,k )+yvel0(j+1,k )))*0.25_8*dt*0.5 |
83: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
84: +yvel0(j ,k+1)+yvel0(j+1,k+1)))*0.25_8*dt*0.5 |
85: total_flux=right_flux-left_flux+top_flux-bottom_flux |
86: |
87: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
95: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
96: |
97: energy1(j,k)=energy0(j,k)-energy_change |
98: |
99: density1(j,k)=density0(j,k)*volume_change_s |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.78 |
Bottlenecks | P0, |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source | PdV_kernel.f90:69-69,PdV_kernel.f90:75-87,PdV_kernel.f90:95-99 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.00 |
CQA cycles if no scalar integer | 32.00 |
CQA cycles if FP arith vectorized | 32.00 |
CQA cycles if fully vectorized | 32.00 |
Front-end cycles | 7.83 |
DIV/SQRT cycles | 11.50 |
P0 cycles | 8.50 |
P1 cycles | 6.67 |
P2 cycles | 6.67 |
P3 cycles | 1.00 |
P4 cycles | 11.50 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 6.67 |
P11 cycles | 32.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 32.46 - 32.52 |
Stall cycles (UFS) | 23.88 - 23.94 |
Nb insns | 34.00 |
Nb uops | 37.00 |
Nb loads | 20.00 |
Nb stores | 2.00 |
Nb stack references | 3.00 |
FLOP/cycle | 5.50 |
Nb FLOP add-sub | 56.00 |
Nb FLOP mul | 56.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 16.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 38.75 |
Bytes prefetched | 0.00 |
Bytes loaded | 1112.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 6.00 |
Stride n | 5.00 |
Stride unknown | 1.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.78 |
Bottlenecks | P0, |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source | PdV_kernel.f90:69-69,PdV_kernel.f90:75-87,PdV_kernel.f90:95-99 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 32.00 |
CQA cycles if no scalar integer | 32.00 |
CQA cycles if FP arith vectorized | 32.00 |
CQA cycles if fully vectorized | 32.00 |
Front-end cycles | 7.83 |
DIV/SQRT cycles | 11.50 |
P0 cycles | 8.50 |
P1 cycles | 6.67 |
P2 cycles | 6.67 |
P3 cycles | 1.00 |
P4 cycles | 11.50 |
P5 cycles | 1.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.00 |
P10 cycles | 6.67 |
P11 cycles | 32.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 32.46 - 32.52 |
Stall cycles (UFS) | 23.88 - 23.94 |
Nb insns | 34.00 |
Nb uops | 37.00 |
Nb loads | 20.00 |
Nb stores | 2.00 |
Nb stack references | 3.00 |
FLOP/cycle | 5.50 |
Nb FLOP add-sub | 56.00 |
Nb FLOP mul | 56.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 16.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 38.75 |
Bytes prefetched | 0.00 |
Bytes loaded | 1112.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 6.00 |
Stride n | 5.00 |
Stride unknown | 1.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Path / |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | PdV_kernel.f90:69-99 |
Module | exec |
nb instructions | 34 |
nb uops | 37 |
loop length | 242 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 7 |
nb stack references | 3 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 7.83 cycles |
front end | 7.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.50 | 0.00 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
cycles | 11.50 | 8.50 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
Cycles executing div or sqrt instructions | 32.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 32.46-32.52 |
Stall cycles | 23.88-23.94 |
LB full (events) | 25.69-25.75 |
Front-end | 7.83 |
Dispatch | 11.50 |
DIV/SQRT | 32.00 |
Data deps. | 1.00 |
Overall L1 | 32.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD -0x8(%RDI,%RAX,8),%ZMM21 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RDI,%RAX,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RBX,%RAX,8),%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD -0x8(%RSI,%RAX,8),%ZMM20,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RAX,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RSI,%RAX,8),%ZMM20,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RDX,%RAX,8),%ZMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDX,%RAX,8),%ZMM25,%ZMM25 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R12,%RAX,8),%ZMM20,%ZMM26 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM25,%ZMM26,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM23,%ZMM21,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R13,%RAX,8),%ZMM21 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%R13,%RAX,8),%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R15,%RAX,8),%ZMM20,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VFNMADD231PD %ZMM24,%ZMM22,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMSUB213PD %ZMM25,%ZMM21,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R11,%RAX,8),%ZMM21 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RCX,%RAX,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%R9,%RAX,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM22,%ZMM23,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD (%R14,%RAX,8),%ZMM21,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VDIVPD %ZMM24,%ZMM22,%ZMM22 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM21,%ZMM23,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%R8,%RAX,8),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VSUBPD %ZMM22,%ZMM23,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %ZMM21,%ZMM24,%ZMM21 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
MOV 0xd0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM22,(%R8,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x28(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM21,(%R8,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 42adc0 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x11c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | PdV_kernel.f90:69-99 |
Module | exec |
nb instructions | 34 |
nb uops | 37 |
loop length | 242 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 7 |
nb stack references | 3 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 7.83 cycles |
front end | 7.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.50 | 0.00 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
cycles | 11.50 | 8.50 | 6.67 | 6.67 | 1.00 | 11.50 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
Cycles executing div or sqrt instructions | 32.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 32.46-32.52 |
Stall cycles | 23.88-23.94 |
LB full (events) | 25.69-25.75 |
Front-end | 7.83 |
Dispatch | 11.50 |
DIV/SQRT | 32.00 |
Data deps. | 1.00 |
Overall L1 | 32.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD -0x8(%RDI,%RAX,8),%ZMM21 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RDI,%RAX,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RBX,%RAX,8),%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD -0x8(%RSI,%RAX,8),%ZMM20,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RBX,%RAX,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RSI,%RAX,8),%ZMM20,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%RDX,%RAX,8),%ZMM25 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDX,%RAX,8),%ZMM25,%ZMM25 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R12,%RAX,8),%ZMM20,%ZMM26 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM25,%ZMM26,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM23,%ZMM21,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R13,%RAX,8),%ZMM21 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%R13,%RAX,8),%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R15,%RAX,8),%ZMM20,%ZMM23 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VFNMADD231PD %ZMM24,%ZMM22,%ZMM25 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMSUB213PD %ZMM25,%ZMM21,%ZMM23 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R11,%RAX,8),%ZMM21 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RCX,%RAX,8),%ZMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%R9,%RAX,8),%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD %ZMM22,%ZMM23,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD (%R14,%RAX,8),%ZMM21,%ZMM24 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VDIVPD %ZMM24,%ZMM22,%ZMM22 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VADDPD %ZMM21,%ZMM23,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD (%R8,%RAX,8),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VSUBPD %ZMM22,%ZMM23,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %ZMM21,%ZMM24,%ZMM21 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
MOV 0xd0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM22,(%R8,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x28(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD %ZMM21,(%R8,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 42adc0 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x11c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |