Function: __pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:202-207 | Coverage: 0.03% |
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Function: __pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0 | Module: exec | Source: pack_kernel.f90:202-207 | Coverage: 0.03% |
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/scratch_na/users/xoserete/qaas_runs/171-415-7190/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 202 - 207 |
-------------------------------------------------------------------------------- |
202: !$OMP PARALLEL DO PRIVATE(index) |
203: DO k=y_min-depth,y_max+y_inc+depth |
204: !$OMP SIMD |
205: DO j=1,depth |
206: index= buffer_offset + j+(k+depth-1)*depth |
207: field(x_max+x_inc+j,k)=right_rcv_buffer(index) |
0x429da0 PUSH %RBP |
0x429da1 MOV %RSP,%RBP |
0x429da4 PUSH %R15 |
0x429da6 PUSH %R14 |
0x429da8 PUSH %R13 |
0x429daa PUSH %R12 |
0x429dac PUSH %RBX |
0x429dad SUB $0xa8,%RSP |
0x429db4 MOV %RDI,-0x38(%RBP) |
0x429db8 MOV 0x30(%RDI),%RDX |
0x429dbc MOV 0x54(%RDI),%EAX |
0x429dbf MOV 0x28(%RDI),%RCX |
0x429dc3 MOV 0x58(%RDI),%R14D |
0x429dc7 MOV 0x48(%RDI),%R13 |
0x429dcb MOV 0x40(%RDI),%RBX |
0x429dcf MOV %RDX,-0x48(%RBP) |
0x429dd3 MOV %RCX,-0x70(%RBP) |
0x429dd7 MOV 0x20(%RDI),%R12 |
0x429ddb MOV %EAX,-0x88(%RBP) |
0x429de1 CALL 402080 <@plt_start@+0x60> |
0x429de6 MOV %EAX,%R15D |
0x429de9 CALL 402180 <@plt_start@+0x160> |
0x429dee MOV -0x38(%RBP),%R9 |
0x429df2 MOV %EAX,%ESI |
0x429df4 MOV 0x5c(%R9),%EAX |
0x429df8 INC %EAX |
0x429dfa SUB %R14D,%EAX |
0x429dfd CLTD |
0x429dfe IDIV %R15D |
0x429e01 CMP %EDX,%ESI |
0x429e03 JL 42a29d |
0x429e09 IMUL %EAX,%ESI |
0x429e0c ADD %EDX,%ESI |
0x429e0e ADD %ESI,%EAX |
0x429e10 CMP %EAX,%ESI |
0x429e12 JGE 42a27e |
0x429e18 MOV 0x8(%R9),%R8 |
0x429e1c LEA (%R14,%RSI,1),%EDI |
0x429e20 ADD %R14D,%EAX |
0x429e23 MOV -0x70(%RBP),%RDX |
0x429e27 KXORB %K0,%K0,%K0 |
0x429e2b MOV 0x10(%R9),%R11 |
0x429e2f MOV (%R9),%RCX |
0x429e32 MOV %EAX,-0x50(%RBP) |
0x429e35 MOVSXD %EDI,%RAX |
0x429e38 MOV (%R8),%R10D |
0x429e3b IMUL %RDX,%RAX |
0x429e3f MOV %EDI,-0x40(%RBP) |
0x429e42 LEA (,%R12,8),%RDX |
0x429e4a MOV 0x38(%R9),%R14 |
0x429e4e MOV 0x18(%R9),%R15 |
0x429e52 MOV %R11,-0x90(%RBP) |
0x429e59 LEA -0x1(%R10),%ESI |
0x429e5d MOV %R10D,%R11D |
0x429e60 MOV %RCX,-0x98(%RBP) |
0x429e67 LEA (,%RBX,8),%RCX |
0x429e6f LEA (%RDI,%RSI,1),%R8D |
0x429e73 MOV -0x48(%RBP),%RDI |
0x429e77 SHR $0x2,%R11D |
0x429e7b MOV %RDX,-0x80(%RBP) |
0x429e7f MOV %R11D,-0x48(%RBP) |
0x429e83 MOV %R10D,%EDX |
0x429e86 IMUL %R10D,%R8D |
0x429e8a MOV %RBX,%R11 |
0x429e8d ADD %RAX,%RDI |
0x429e90 MOV %R12,%RAX |
0x429e93 SAL $0x4,%R11 |
0x429e97 AND $-0x4,%EDX |
0x429e9a SAL $0x5,%RAX |
0x429e9e MOV %ESI,-0x9c(%RBP) |
0x429ea4 MOV %RBX,%RSI |
0x429ea7 MOV %RCX,-0x78(%RBP) |
0x429eab MOV %R12,%RCX |
0x429eae SAL $0x5,%RSI |
0x429eb2 MOV %RAX,-0x60(%RBP) |
0x429eb6 LEA (%R12,%R12,2),%RAX |
0x429eba SAL $0x4,%RCX |
0x429ebe SAL $0x3,%RAX |
0x429ec2 MOV %R11,-0xb0(%RBP) |
0x429ec9 XOR %R11D,%R11D |
0x429ecc MOV %EDX,-0xa0(%RBP) |
0x429ed2 INC %EDX |
0x429ed4 TEST %R10D,%R10D |
0x429ed7 CMOVNS %R10D,%R11D |
0x429edb MOV %RCX,-0x58(%RBP) |
0x429edf MOV %RAX,-0x68(%RBP) |
0x429ee3 INC %R11D |
0x429ee6 MOV %EDX,-0xbc(%RBP) |
0x429eec MOV %R11D,-0x84(%RBP) |
0x429ef3 MOV %R9,-0xc8(%RBP) |
0x429efa MOV %R10D,-0x3c(%RBP) |
0x429efe MOV $0x1,%R10D |
0x429f04 KMOVB %R10D,%K1 |
0x429f09 NOPL (%RAX) |
(183) 0x429f10 MOV -0x3c(%RBP),%R9D |
(183) 0x429f14 TEST %R9D,%R9D |
(183) 0x429f17 JLE 42a22c |
(183) 0x429f1d MOV -0x98(%RBP),%RDX |
(183) 0x429f24 MOV -0x88(%RBP),%R11D |
(183) 0x429f2b MOV -0x90(%RBP),%RCX |
(183) 0x429f32 ADD (%RDX),%R11D |
(183) 0x429f35 CMPL $0x2,-0x9c(%RBP) |
(183) 0x429f3c MOV %R11D,-0x38(%RBP) |
(183) 0x429f40 MOV (%RCX),%EAX |
(183) 0x429f42 JBE 42a290 |
(183) 0x429f48 MOVSXD %R11D,%R11 |
(183) 0x429f4b MOVSXD %EAX,%R10 |
(183) 0x429f4e MOVSXD %R8D,%RCX |
(183) 0x429f51 INC %R11 |
(183) 0x429f54 LEA 0x1(%R10,%RCX,1),%R9 |
(183) 0x429f59 MOV -0xb0(%RBP),%RCX |
(183) 0x429f60 IMUL %R12,%R11 |
(183) 0x429f64 IMUL %RBX,%R9 |
(183) 0x429f68 ADD %RDI,%R11 |
(183) 0x429f6b ADD %R13,%R9 |
(183) 0x429f6e LEA (%R15,%R11,8),%RDX |
(183) 0x429f72 MOV -0x48(%RBP),%R11D |
(183) 0x429f76 LEA (%R14,%R9,8),%R10 |
(183) 0x429f7a XOR %R9D,%R9D |
(183) 0x429f7d MOV %R10,-0xa8(%RBP) |
(183) 0x429f84 ADD %R10,%RCX |
(183) 0x429f87 AND $0x3,%R11D |
(183) 0x429f8b JE 42a07b |
(183) 0x429f91 CMP $0x1,%R11D |
(183) 0x429f95 JE 42a02f |
(183) 0x429f9b CMP $0x2,%R11D |
(183) 0x429f9f JE 429fed |
(183) 0x429fa1 MOV -0xa8(%RBP),%R9 |
(183) 0x429fa8 VMOVSD (%RCX),%XMM1 |
(183) 0x429fac ADD %RSI,%R10 |
(183) 0x429faf MOV -0x58(%RBP),%R11 |
(183) 0x429fb3 VMOVSD (%RCX,%RBX,8),%XMM0 |
(183) 0x429fb8 ADD %RSI,%RCX |
(183) 0x429fbb VMOVSD (%R9),%XMM3 |
(183) 0x429fc0 VMOVSD (%R9,%RBX,8),%XMM2 |
(183) 0x429fc6 MOV -0x68(%RBP),%R9 |
(183) 0x429fca VMOVSD %XMM3,(%RDX) |
(183) 0x429fce VMOVSD %XMM2,(%RDX,%R12,8) |
(183) 0x429fd4 VMOVSD %XMM1,(%RDX,%R11,1) |
(183) 0x429fda MOV -0x60(%RBP),%R11 |
(183) 0x429fde VMOVSD %XMM0,(%RDX,%R9,1) |
(183) 0x429fe4 MOV $0x1,%R9D |
(183) 0x429fea ADD %R11,%RDX |
(183) 0x429fed VMOVSD (%R10),%XMM4 |
(183) 0x429ff2 VMOVSD (%R10,%RBX,8),%XMM5 |
(183) 0x429ff8 INC %R9D |
(183) 0x429ffb ADD %RSI,%R10 |
(183) 0x429ffe VMOVSD (%RCX),%XMM6 |
(183) 0x42a002 MOV -0x58(%RBP),%R11 |
(183) 0x42a006 VMOVSD (%RCX,%RBX,8),%XMM7 |
(183) 0x42a00b VMOVSD %XMM4,(%RDX) |
(183) 0x42a00f ADD %RSI,%RCX |
(183) 0x42a012 VMOVSD %XMM5,(%RDX,%R12,8) |
(183) 0x42a018 VMOVSD %XMM6,(%RDX,%R11,1) |
(183) 0x42a01e MOV -0x68(%RBP),%R11 |
(183) 0x42a022 VMOVSD %XMM7,(%RDX,%R11,1) |
(183) 0x42a028 MOV -0x60(%RBP),%R11 |
(183) 0x42a02c ADD %R11,%RDX |
(183) 0x42a02f VMOVSD (%R10),%XMM8 |
(183) 0x42a034 VMOVSD (%R10,%RBX,8),%XMM9 |
(183) 0x42a03a INC %R9D |
(183) 0x42a03d ADD %RSI,%R10 |
(183) 0x42a040 VMOVSD (%RCX),%XMM10 |
(183) 0x42a044 MOV -0x58(%RBP),%R11 |
(183) 0x42a048 VMOVSD (%RCX,%RBX,8),%XMM11 |
(183) 0x42a04d VMOVSD %XMM8,(%RDX) |
(183) 0x42a051 ADD %RSI,%RCX |
(183) 0x42a054 VMOVSD %XMM9,(%RDX,%R12,8) |
(183) 0x42a05a VMOVSD %XMM10,(%RDX,%R11,1) |
(183) 0x42a060 MOV -0x68(%RBP),%R11 |
(183) 0x42a064 VMOVSD %XMM11,(%RDX,%R11,1) |
(183) 0x42a06a MOV -0x60(%RBP),%R11 |
(183) 0x42a06e ADD %R11,%RDX |
(183) 0x42a071 CMP %R9D,-0x48(%RBP) |
(183) 0x42a075 JE 42a177 |
(183) 0x42a07b MOV %EAX,-0xa8(%RBP) |
(183) 0x42a081 MOV -0x68(%RBP),%R11 |
(183) 0x42a085 MOV %RDI,-0xb8(%RBP) |
(183) 0x42a08c MOV -0x58(%RBP),%RAX |
(183) 0x42a090 MOV -0x60(%RBP),%RDI |
(184) 0x42a094 VMOVSD (%R10),%XMM12 |
(184) 0x42a099 VMOVSD (%R10,%RBX,8),%XMM13 |
(184) 0x42a09f ADD %RSI,%R10 |
(184) 0x42a0a2 ADD $0x4,%R9D |
(184) 0x42a0a6 VMOVSD (%RCX),%XMM14 |
(184) 0x42a0aa VMOVSD (%RCX,%RBX,8),%XMM15 |
(184) 0x42a0af ADD %RSI,%RCX |
(184) 0x42a0b2 VMOVSD %XMM12,(%RDX) |
(184) 0x42a0b6 VMOVSD %XMM13,(%RDX,%R12,8) |
(184) 0x42a0bc VMOVSD %XMM14,(%RDX,%RAX,1) |
(184) 0x42a0c1 VMOVSD %XMM15,(%RDX,%R11,1) |
(184) 0x42a0c7 ADD %RDI,%RDX |
(184) 0x42a0ca VMOVSD (%R10),%XMM3 |
(184) 0x42a0cf VMOVSD (%R10,%RBX,8),%XMM2 |
(184) 0x42a0d5 ADD %RSI,%R10 |
(184) 0x42a0d8 VMOVSD (%RCX),%XMM1 |
(184) 0x42a0dc VMOVSD (%RCX,%RBX,8),%XMM0 |
(184) 0x42a0e1 ADD %RSI,%RCX |
(184) 0x42a0e4 VMOVSD %XMM3,(%RDX) |
(184) 0x42a0e8 VMOVSD %XMM2,(%RDX,%R12,8) |
(184) 0x42a0ee VMOVSD %XMM1,(%RDX,%RAX,1) |
(184) 0x42a0f3 VMOVSD %XMM0,(%RDX,%R11,1) |
(184) 0x42a0f9 ADD %RDI,%RDX |
(184) 0x42a0fc VMOVSD (%R10),%XMM4 |
(184) 0x42a101 VMOVSD (%R10,%RBX,8),%XMM5 |
(184) 0x42a107 ADD %RSI,%R10 |
(184) 0x42a10a VMOVSD (%RCX),%XMM6 |
(184) 0x42a10e VMOVSD (%RCX,%RBX,8),%XMM7 |
(184) 0x42a113 ADD %RSI,%RCX |
(184) 0x42a116 VMOVSD %XMM4,(%RDX) |
(184) 0x42a11a VMOVSD %XMM5,(%RDX,%R12,8) |
(184) 0x42a120 VMOVSD %XMM6,(%RDX,%RAX,1) |
(184) 0x42a125 VMOVSD %XMM7,(%RDX,%R11,1) |
(184) 0x42a12b ADD %RDI,%RDX |
(184) 0x42a12e VMOVSD (%R10),%XMM8 |
(184) 0x42a133 VMOVSD (%R10,%RBX,8),%XMM9 |
(184) 0x42a139 ADD %RSI,%R10 |
(184) 0x42a13c VMOVSD (%RCX),%XMM10 |
(184) 0x42a140 VMOVSD (%RCX,%RBX,8),%XMM11 |
(184) 0x42a145 ADD %RSI,%RCX |
(184) 0x42a148 VMOVSD %XMM8,(%RDX) |
(184) 0x42a14c VMOVSD %XMM9,(%RDX,%R12,8) |
(184) 0x42a152 VMOVSD %XMM10,(%RDX,%RAX,1) |
(184) 0x42a157 VMOVSD %XMM11,(%RDX,%R11,1) |
(184) 0x42a15d ADD %RDI,%RDX |
(184) 0x42a160 CMP %R9D,-0x48(%RBP) |
(184) 0x42a164 JNE 42a094 |
(183) 0x42a16a MOV -0xa8(%RBP),%EAX |
(183) 0x42a170 MOV -0xb8(%RBP),%RDI |
(183) 0x42a177 MOV -0xa0(%RBP),%R10D |
(183) 0x42a17e MOV -0x3c(%RBP),%EDX |
(183) 0x42a181 CMP %EDX,%R10D |
(183) 0x42a184 JE 42a22c |
(183) 0x42a18a MOV -0xbc(%RBP),%EDX |
(183) 0x42a190 MOV %R10D,%R9D |
(183) 0x42a193 MOV -0x3c(%RBP),%R10D |
(183) 0x42a197 SUB %R9D,%R10D |
(183) 0x42a19a CMP $0x1,%R10D |
(183) 0x42a19e JE 42a203 |
(183) 0x42a1a0 MOVSXD %R8D,%R11 |
(183) 0x42a1a3 MOVSXD %EAX,%RCX |
(183) 0x42a1a6 LEA 0x1(%RCX,%R11,1),%RCX |
(183) 0x42a1ab MOV %RBX,%R11 |
(183) 0x42a1ae IMUL %RBX,%RCX |
(183) 0x42a1b2 IMUL %R9,%R11 |
(183) 0x42a1b6 IMUL %R12,%R9 |
(183) 0x42a1ba ADD %R13,%RCX |
(183) 0x42a1bd ADD %R11,%RCX |
(183) 0x42a1c0 LEA (%R14,%RCX,8),%R11 |
(183) 0x42a1c4 MOVSXD -0x38(%RBP),%RCX |
(183) 0x42a1c8 VMOVSD (%R11),%XMM12 |
(183) 0x42a1cd INC %RCX |
(183) 0x42a1d0 IMUL %R12,%RCX |
(183) 0x42a1d4 ADD %RDI,%RCX |
(183) 0x42a1d7 ADD %R9,%RCX |
(183) 0x42a1da MOV -0x78(%RBP),%R9 |
(183) 0x42a1de LEA (%R15,%RCX,8),%RCX |
(183) 0x42a1e2 VMOVSD (%R11,%R9,1),%XMM13 |
(183) 0x42a1e8 MOV -0x80(%RBP),%R11 |
(183) 0x42a1ec VMOVSD %XMM12,(%RCX) |
(183) 0x42a1f0 VMOVSD %XMM13,(%RCX,%R11,1) |
(183) 0x42a1f6 TEST $0x1,%R10B |
(183) 0x42a1fa JE 42a22c |
(183) 0x42a1fc AND $-0x2,%R10D |
(183) 0x42a200 ADD %R10D,%EDX |
(183) 0x42a203 ADD %EDX,%EAX |
(183) 0x42a205 ADD %R8D,%EAX |
(183) 0x42a208 CLTQ |
(183) 0x42a20a IMUL %RBX,%RAX |
(183) 0x42a20e ADD %R13,%RAX |
(183) 0x42a211 VMOVSD (%R14,%RAX,8),%XMM14 |
(183) 0x42a217 MOV -0x38(%RBP),%EAX |
(183) 0x42a21a ADD %EDX,%EAX |
(183) 0x42a21c MOVSXD %EAX,%RDX |
(183) 0x42a21f IMUL %R12,%RDX |
(183) 0x42a223 ADD %RDI,%RDX |
(183) 0x42a226 VMOVSD %XMM14,(%R15,%RDX,8) |
(183) 0x42a22c MOV -0x3c(%RBP),%R10D |
(183) 0x42a230 MOV -0x4c(%RBP),%ECX |
(183) 0x42a233 KMOVB %K0,%R9D |
(183) 0x42a237 KMOVB %K1,%R11D |
(183) 0x42a23b MOV -0x70(%RBP),%RDX |
(183) 0x42a23f TEST %R10D,%R10D |
(183) 0x42a242 CMOVNS -0x84(%RBP),%ECX |
(183) 0x42a249 CMOVNS %R11D,%R9D |
(183) 0x42a24d INCL -0x40(%RBP) |
(183) 0x42a250 ADD %R10D,%R8D |
(183) 0x42a253 ADD %RDX,%RDI |
(183) 0x42a256 MOV %ECX,-0x4c(%RBP) |
(183) 0x42a259 KMOVB %R9D,%K0 |
(183) 0x42a25e MOV -0x40(%RBP),%EAX |
(183) 0x42a261 CMP %EAX,-0x50(%RBP) |
(183) 0x42a264 JG 429f10 |
0x42a26a MOV -0xc8(%RBP),%R13 |
0x42a271 KORTESTB %K0,%K0 |
0x42a275 JE 42a27e |
0x42a277 MOV -0x4c(%RBP),%EBX |
0x42a27a MOV %EBX,0x50(%R13) |
0x42a27e ADD $0xa8,%RSP |
0x42a285 POP %RBX |
0x42a286 POP %R12 |
0x42a288 POP %R13 |
0x42a28a POP %R14 |
0x42a28c POP %R15 |
0x42a28e POP %RBP |
0x42a28f RET |
(183) 0x42a290 XOR %R9D,%R9D |
(183) 0x42a293 MOV $0x1,%EDX |
(183) 0x42a298 JMP 42a193 |
0x42a29d INC %EAX |
0x42a29f XOR %EDX,%EDX |
0x42a2a1 JMP 429e09 |
0x42a2a6 NOPW %CS:(%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○95.49 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○4.10 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | pack_kernel.f90:202-207 |
Module | exec |
nb instructions | 111 |
nb uops | 116 |
loop length | 425 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 21 |
micro-operation queue | 19.33 cycles |
front end | 19.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.20 | 8.67 | 8.67 | 15.00 | 8.20 | 8.20 | 15.00 | 15.00 | 15.00 | 8.20 | 8.67 |
cycles | 8.20 | 10.13 | 8.67 | 8.67 | 15.00 | 8.20 | 8.20 | 15.00 | 15.00 | 15.00 | 8.20 | 8.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 19.06-19.09 |
Stall cycles | 0.00 |
Front-end | 19.33 |
Dispatch | 15.00 |
DIV/SQRT | 6.00 |
Overall L1 | 19.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 12% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 9% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42a29d <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x4fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42a27e <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x4de> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R9),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R14,%RSI,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x10(%R9),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R8),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R12,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%R9),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R9),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%R10),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDI,%RSI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R10D,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RBX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x4,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ESI,-0x9c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%R12,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R10D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R10D,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,-0xbc(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KMOVB %R10D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42a27e <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x4de> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x4c(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x50(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 429e09 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x69> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:202-207 |
Module | exec |
nb instructions | 111 |
nb uops | 116 |
loop length | 425 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 21 |
micro-operation queue | 19.33 cycles |
front end | 19.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.20 | 8.67 | 8.67 | 15.00 | 8.20 | 8.20 | 15.00 | 15.00 | 15.00 | 8.20 | 8.67 |
cycles | 8.20 | 10.13 | 8.67 | 8.67 | 15.00 | 8.20 | 8.20 | 15.00 | 15.00 | 15.00 | 8.20 | 8.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 19.06-19.09 |
Stall cycles | 0.00 |
Front-end | 19.33 |
Dispatch | 15.00 |
DIV/SQRT | 6.00 |
Overall L1 | 19.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 9% |
load | 12% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 9% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RDI),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x5c(%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R15D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 42a29d <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x4fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42a27e <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x4de> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%R9),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R14,%RSI,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R14D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x10(%R9),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %EDI,%RAX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R8),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R12,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%R9),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R9),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%R10),%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDI,%RSI,1),%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %R10D,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RBX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x4,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ESI,-0x9c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R12,%R12,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EDX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %R10D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %R10D,%R11D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,-0xbc(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11D,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10D,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
KMOVB %R10D,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 42a27e <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x4de> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x4c(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x50(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD $0xa8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 429e09 <__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0+0x69> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__pack_kernel_module_MOD_clover_unpack_message_right._omp_fn.0.lto_priv.0– | 0.03 | 0.01 |
▼Loop 183 - pack_kernel.f90:204-207 - exec– | 0.03 | 0.02 |
○Loop 184 - pack_kernel.f90:207-207 - exec | 0 | 0 |