Function: pdv_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: PdV_kernel.f90:67-139 [...] | Coverage: 10.89% |
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Function: pdv_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: PdV_kernel.f90:67-139 [...] | Coverage: 10.89% |
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/scratch_na/users/xoserete/qaas_runs/171-415-7190/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 67 - 139 |
-------------------------------------------------------------------------------- |
67: !$OMP PARALLEL |
68: |
69: IF(predict)THEN |
70: |
71: !$OMP DO PRIVATE(right_flux,left_flux,top_flux,bottom_flux,total_flux,min_cell_volume, & |
72: !$OMP energy_change,recip_volume,volume_change_s) |
73: DO k=y_min,y_max |
74: !$OMP SIMD |
75: DO j=x_min,x_max |
76: |
77: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
78: +xvel0(j ,k )+xvel0(j ,k+1)))*0.25_8*dt*0.5 |
79: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
80: +xvel0(j+1,k )+xvel0(j+1,k+1)))*0.25_8*dt*0.5 |
81: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
82: +yvel0(j ,k )+yvel0(j+1,k )))*0.25_8*dt*0.5 |
83: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
84: +yvel0(j ,k+1)+yvel0(j+1,k+1)))*0.25_8*dt*0.5 |
85: total_flux=right_flux-left_flux+top_flux-bottom_flux |
86: |
87: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
95: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
96: |
97: energy1(j,k)=energy0(j,k)-energy_change |
98: |
99: density1(j,k)=density0(j,k)*volume_change_s |
100: |
101: ENDDO |
102: ENDDO |
103: !$OMP END DO |
104: |
105: ELSE |
106: |
107: !$OMP DO PRIVATE(right_flux,left_flux,top_flux,bottom_flux,total_flux,min_cell_volume, & |
108: !$OMP energy_change,recip_volume,volume_change_s) |
109: DO k=y_min,y_max |
110: !$OMP SIMD |
111: DO j=x_min,x_max |
112: |
113: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
114: +xvel1(j ,k )+xvel1(j ,k+1)))*0.25_8*dt |
115: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
116: +xvel1(j+1,k )+xvel1(j+1,k+1)))*0.25_8*dt |
117: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
118: +yvel1(j ,k )+yvel1(j+1,k )))*0.25_8*dt |
119: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
120: +yvel1(j ,k+1)+yvel1(j+1,k+1)))*0.25_8*dt |
121: total_flux=right_flux-left_flux+top_flux-bottom_flux |
122: |
123: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
131: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
132: |
133: energy1(j,k)=energy0(j,k)-energy_change |
134: |
135: density1(j,k)=density0(j,k)*volume_change_s |
136: |
137: ENDDO |
138: ENDDO |
139: !$OMP END DO |
0x42b740 PUSH %RBP |
0x42b741 MOV %RSP,%RBP |
0x42b744 PUSH %R15 |
0x42b746 PUSH %R14 |
0x42b748 PUSH %R13 |
0x42b74a PUSH %R12 |
0x42b74c PUSH %RBX |
0x42b74d AND $-0x40,%RSP |
0x42b751 SUB $0x840,%RSP |
0x42b758 MOV %R9,0x60(%RSP) |
0x42b75d MOV %RCX,0x58(%RSP) |
0x42b762 MOV 0x88(%RBP),%EBX |
0x42b768 MOV 0x80(%RBP),%EAX |
0x42b76e SUB %EBX,%EAX |
0x42b770 TESTB $0x1,0xa0(%RBP) |
0x42b777 JNE 42b840 |
0x42b77d MOVL $0,0xf4(%RSP) |
0x42b788 TEST %EAX,%EAX |
0x42b78a JS 42b8e1 |
0x42b790 MOV %RDI,0xb8(%RSP) |
0x42b798 MOV (%RDI),%ESI |
0x42b79a MOVL $0,0x4c(%RSP) |
0x42b7a2 MOV %EAX,0x48(%RSP) |
0x42b7a6 MOVL $0x1,0xf0(%RSP) |
0x42b7b1 SUB $0x8,%RSP |
0x42b7b5 LEA 0xf8(%RSP),%RAX |
0x42b7bd LEA 0xfc(%RSP),%RCX |
0x42b7c5 LEA 0x54(%RSP),%R8 |
0x42b7ca LEA 0x50(%RSP),%R9 |
0x42b7cf MOV $0x749e10,%EDI |
0x42b7d4 MOV %ESI,0xf4(%RSP) |
0x42b7db MOV $0x22,%EDX |
0x42b7e0 PUSH $0x1 |
0x42b7e2 PUSH $0x1 |
0x42b7e4 PUSH %RAX |
0x42b7e5 CALL 4044c0 <__kmpc_for_static_init_4@plt> |
0x42b7ea ADD $0x20,%RSP |
0x42b7ee MOV 0x4c(%RSP),%EAX |
0x42b7f2 MOV 0x48(%RSP),%ECX |
0x42b7f6 SUB %EAX,%ECX |
0x42b7f8 MOV %ECX,0xd0(%RSP) |
0x42b7ff JAE 42b940 |
0x42b805 MOV $0x749e30,%EDI |
0x42b80a MOV 0xec(%RSP),%ESI |
0x42b811 JMP 42b8d1 |
0x42b816 NOPW %CS:(%RAX,%RAX,1) |
0x42b825 NOPW %CS:(%RAX,%RAX,1) |
0x42b834 NOPW %CS:(%RAX,%RAX,1) |
0x42b840 MOVL $0,0xfc(%RSP) |
0x42b84b TEST %EAX,%EAX |
0x42b84d JS 42b8e1 |
0x42b853 MOV %RDI,0xb8(%RSP) |
0x42b85b MOV (%RDI),%ESI |
0x42b85d MOVL $0,0x54(%RSP) |
0x42b865 MOV %EAX,0x50(%RSP) |
0x42b869 MOVL $0x1,0xf8(%RSP) |
0x42b874 SUB $0x8,%RSP |
0x42b878 LEA 0x100(%RSP),%RAX |
0x42b880 LEA 0x104(%RSP),%RCX |
0x42b888 LEA 0x5c(%RSP),%R8 |
0x42b88d LEA 0x58(%RSP),%R9 |
0x42b892 MOV $0x749db0,%EDI |
0x42b897 MOV %ESI,0x188(%RSP) |
0x42b89e MOV $0x22,%EDX |
0x42b8a3 PUSH $0x1 |
0x42b8a5 PUSH $0x1 |
0x42b8a7 PUSH %RAX |
0x42b8a8 CALL 4044c0 <__kmpc_for_static_init_4@plt> |
0x42b8ad ADD $0x20,%RSP |
0x42b8b1 MOV 0x54(%RSP),%EAX |
0x42b8b5 MOV 0x50(%RSP),%ECX |
0x42b8b9 SUB %EAX,%ECX |
0x42b8bb MOV %ECX,0x28(%RSP) |
0x42b8bf JAE 42c480 |
0x42b8c5 MOV $0x749dd0,%EDI |
0x42b8ca MOV 0x180(%RSP),%ESI |
0x42b8d1 VZEROUPPER |
0x42b8d4 CALL 4040b0 <__kmpc_for_static_fini@plt> |
0x42b8d9 MOV 0xb8(%RSP),%RDI |
0x42b8e1 MOV (%RDI),%ESI |
0x42b8e3 MOV %RDI,%RBX |
0x42b8e6 MOV $0x749e50,%EDI |
0x42b8eb CALL 404580 <__kmpc_barrier@plt> |
0x42b8f0 MOV (%RBX),%ESI |
0x42b8f2 MOV $0x749df0,%EDI |
0x42b8f7 CALL 404580 <__kmpc_barrier@plt> |
0x42b8fc LEA -0x28(%RBP),%RSP |
0x42b900 POP %RBX |
0x42b901 POP %R12 |
0x42b903 POP %R13 |
0x42b905 POP %R14 |
0x42b907 POP %R15 |
0x42b909 POP %RBP |
0x42b90a RET |
0x42b90b NOPW %CS:(%RAX,%RAX,1) |
0x42b91a NOPW %CS:(%RAX,%RAX,1) |
0x42b929 NOPW %CS:(%RAX,%RAX,1) |
0x42b938 NOPL (%RAX,%RAX,1) |
0x42b940 MOV %RAX,%RSI |
0x42b943 MOV 0x20(%RBP),%R8 |
0x42b947 MOV 0x10(%RBP),%RCX |
0x42b94b MOVSXD 0x60(%RSP),%RAX |
0x42b950 SAL $0x3,%RAX |
0x42b954 MOV $0x18,%R9D |
0x42b95a SUB %RAX,%R9 |
0x42b95d ADD %R9,%RCX |
0x42b960 MOV %RCX,0x170(%RSP) |
0x42b968 MOVSXD 0x58(%RSP),%RCX |
0x42b96d MOV $0x3,%EDX |
0x42b972 SUB %RCX,%RDX |
0x42b975 MOV %RDX,0x168(%RSP) |
0x42b97d ADD %EBX,%ESI |
0x42b97f MOV 0x18(%RBP),%RDX |
0x42b983 ADD %R9,%RDX |
0x42b986 MOV %RDX,0x160(%RSP) |
0x42b98e MOV $0x2,%EDX |
0x42b993 SUB %RCX,%RDX |
0x42b996 MOV %RDX,0x158(%RSP) |
0x42b99e MOV 0x70(%RBP),%RCX |
0x42b9a2 ADD %R9,%RCX |
0x42b9a5 MOV %RCX,0x150(%RSP) |
0x42b9ad LEA (%R8,%R9,1),%RCX |
0x42b9b1 MOV %RCX,0x148(%RSP) |
0x42b9b9 ADD 0x28(%RBP),%R9 |
0x42b9bd MOV %R9,0x178(%RSP) |
0x42b9c5 MOV $0x10,%ECX |
0x42b9ca SUB %RAX,%RCX |
0x42b9cd MOV 0x50(%RBP),%RAX |
0x42b9d1 ADD %RCX,%RAX |
0x42b9d4 MOV %RAX,0x138(%RSP) |
0x42b9dc MOV 0x40(%RBP),%RAX |
0x42b9e0 LEA (%RAX,%RCX,1),%RAX |
0x42b9e4 MOV %RAX,0x130(%RSP) |
0x42b9ec MOV 0x48(%RBP),%RAX |
0x42b9f0 LEA (%RAX,%RCX,1),%RAX |
0x42b9f4 MOV %RAX,0x128(%RSP) |
0x42b9fc MOV 0x38(%RBP),%RAX |
0x42ba00 LEA (%RAX,%RCX,1),%RAX |
0x42ba04 MOV %RAX,0x120(%RSP) |
0x42ba0c MOV 0x30(%RBP),%RAX |
0x42ba10 ADD %RCX,%RAX |
0x42ba13 MOV %RAX,0x118(%RSP) |
0x42ba1b MOV 0x58(%RBP),%RAX |
0x42ba1f ADD %RCX,%RAX |
0x42ba22 MOV %RAX,0x110(%RSP) |
0x42ba2a MOV 0x60(%RBP),%RAX |
0x42ba2e ADD %RCX,%RAX |
0x42ba31 MOV %RAX,0x108(%RSP) |
0x42ba39 ADD 0x68(%RBP),%RCX |
0x42ba3d MOV %RCX,0x140(%RSP) |
0x42ba45 VMOVSD 0xdd391(%RIP),%XMM22 |
0x42ba4f XOR %R15D,%R15D |
0x42ba52 MOV %RSI,0x100(%RSP) |
0x42ba5a MOV %ESI,%R8D |
0x42ba5d JMP 42ba98 |
0x42ba5f NOPW %CS:(%RAX,%RAX,1) |
0x42ba6e NOPW %CS:(%RAX,%RAX,1) |
0x42ba7d NOPL (%RAX) |
(217) 0x42ba80 LEA 0x1(%R15),%EAX |
(217) 0x42ba84 INC %R8D |
(217) 0x42ba87 CMP 0xd0(%RSP),%R15D |
(217) 0x42ba8f MOV %EAX,%R15D |
(217) 0x42ba92 JE 42b805 |
(217) 0x42ba98 MOV 0x98(%RBP),%RAX |
(217) 0x42ba9f MOVSXD (%RAX),%R13 |
(217) 0x42baa2 MOV 0x90(%RBP),%RAX |
(217) 0x42baa9 MOV (%RAX),%ECX |
(217) 0x42baab CMP %R13D,%ECX |
(217) 0x42baae JS 42ba80 |
(217) 0x42bab0 MOV 0xa8(%RBP),%RAX |
(217) 0x42bab7 MOV (%RAX),%RAX |
(217) 0x42baba MOV %RAX,0x80(%RSP) |
(217) 0x42bac2 MOV 0xb0(%RBP),%RAX |
(217) 0x42bac9 MOV (%RAX),%RAX |
(217) 0x42bacc MOV %RAX,0x78(%RSP) |
(217) 0x42bad1 MOV 0x158(%RBP),%RAX |
(217) 0x42bad8 MOV (%RAX),%R11 |
(217) 0x42badb VMULSD 0x32733b(%RIP),%XMM22,%XMM27 |
(217) 0x42bae5 MOV 0xb8(%RBP),%RAX |
(217) 0x42baec MOV (%RAX),%RSI |
(217) 0x42baef MOV 0xc0(%RBP),%RAX |
(217) 0x42baf6 MOV (%RAX),%R12 |
(217) 0x42baf9 MOV 0x160(%RBP),%RAX |
(217) 0x42bb00 MOV (%RAX),%R9 |
(217) 0x42bb03 MOV 0xc8(%RBP),%RAX |
(217) 0x42bb0a MOV (%RAX),%RAX |
(217) 0x42bb0d MOV %RAX,0x88(%RSP) |
(217) 0x42bb15 MOV 0xd0(%RBP),%RAX |
(217) 0x42bb1c MOV (%RAX),%RBX |
(217) 0x42bb1f MOV 0xd8(%RBP),%RAX |
(217) 0x42bb26 MOV (%RAX),%R10 |
(217) 0x42bb29 MOV 0xe0(%RBP),%RAX |
(217) 0x42bb30 MOV (%RAX),%RDI |
(217) 0x42bb33 MOV 0xe8(%RBP),%RAX |
(217) 0x42bb3a MOV (%RAX),%RDX |
(217) 0x42bb3d MOV 0xf0(%RBP),%RAX |
(217) 0x42bb44 MOV (%RAX),%RAX |
(217) 0x42bb47 MOV %RAX,0xa0(%RSP) |
(217) 0x42bb4f MOV 0xf8(%RBP),%RAX |
(217) 0x42bb56 MOV (%RAX),%R14 |
(217) 0x42bb59 SUB %R13D,%ECX |
(217) 0x42bb5c INC %ECX |
(217) 0x42bb5e CMP $0x2,%ECX |
(217) 0x42bb61 MOV $0x1,%EAX |
(217) 0x42bb66 CMOVL %EAX,%ECX |
(217) 0x42bb69 VPBROADCASTQ %RCX,%ZMM28 |
(217) 0x42bb6f MOV %RCX,0xc8(%RSP) |
(217) 0x42bb77 AND $0x7ffffff8,%RCX |
(217) 0x42bb7e MOV %R14,0xa8(%RSP) |
(217) 0x42bb86 MOV %RDI,0x98(%RSP) |
(217) 0x42bb8e MOV %R10,0x90(%RSP) |
(217) 0x42bb96 MOV %R9,0xc0(%RSP) |
(217) 0x42bb9e MOV %R12,0x680(%RSP) |
(217) 0x42bba6 MOV %R11,0x640(%RSP) |
(217) 0x42bbae MOV %R13,0x600(%RSP) |
(217) 0x42bbb6 JE 42bf40 |
(217) 0x42bbbc MOV %R15,0x580(%RSP) |
(217) 0x42bbc4 MOV %R8D,0x5c0(%RSP) |
(217) 0x42bbcc MOVSXD %R8D,%R14 |
(217) 0x42bbcf MOV 0x168(%RSP),%RAX |
(217) 0x42bbd7 LEA (%RAX,%R14,1),%R8 |
(217) 0x42bbdb ADD 0x158(%RSP),%R14 |
(217) 0x42bbe3 VBROADCASTSD %XMM27,%ZMM1 |
(217) 0x42bbe9 MOV %R9,%RAX |
(217) 0x42bbec IMUL %R8,%RAX |
(217) 0x42bbf0 MOV %RCX,0x20(%RSP) |
(217) 0x42bbf5 MOV %R9,%R15 |
(217) 0x42bbf8 MOV %R13,%R9 |
(217) 0x42bbfb LEA (%RAX,%R13,8),%R13 |
(217) 0x42bbff MOV 0x170(%RSP),%RCX |
(217) 0x42bc07 ADD %RCX,%R13 |
(217) 0x42bc0a MOV %R12,%RAX |
(217) 0x42bc0d IMUL %R8,%RAX |
(217) 0x42bc11 MOV %RSI,0x28(%RSP) |
(217) 0x42bc16 MOV %RBX,0x68(%RSP) |
(217) 0x42bc1b MOV %R8,%RBX |
(217) 0x42bc1e MOV %R8,0x540(%RSP) |
(217) 0x42bc26 LEA (%RAX,%R9,8),%R8 |
(217) 0x42bc2a MOV %RDX,0x70(%RSP) |
(217) 0x42bc2f MOV 0x160(%RSP),%RDX |
(217) 0x42bc37 ADD %RDX,%R8 |
(217) 0x42bc3a MOV %R15,%RAX |
(217) 0x42bc3d IMUL %R14,%RAX |
(217) 0x42bc41 LEA (%RAX,%R9,8),%R10 |
(217) 0x42bc45 ADD %RCX,%R10 |
(217) 0x42bc48 MOV %R12,%RAX |
(217) 0x42bc4b IMUL %R14,%RAX |
(217) 0x42bc4f LEA (%RAX,%R9,8),%RSI |
(217) 0x42bc53 ADD %RDX,%RSI |
(217) 0x42bc56 MOV 0x80(%RSP),%RAX |
(217) 0x42bc5e IMUL %R14,%RAX |
(217) 0x42bc62 LEA (%RAX,%R9,8),%RDX |
(217) 0x42bc66 ADD 0x150(%RSP),%RDX |
(217) 0x42bc6e MOV %R11,%RAX |
(217) 0x42bc71 IMUL %RBX,%RAX |
(217) 0x42bc75 LEA (%RAX,%R9,8),%R12 |
(217) 0x42bc79 MOV 0x148(%RSP),%RCX |
(217) 0x42bc81 ADD %RCX,%R12 |
(217) 0x42bc84 IMUL %R14,%R11 |
(217) 0x42bc88 LEA (%R11,%R9,8),%RDI |
(217) 0x42bc8c ADD %RCX,%RDI |
(217) 0x42bc8f MOV 0x78(%RSP),%R15 |
(217) 0x42bc94 MOV %R15,%RAX |
(217) 0x42bc97 IMUL %R14,%RAX |
(217) 0x42bc9b LEA (%RAX,%R9,8),%RCX |
(217) 0x42bc9f MOV 0x178(%RSP),%R11 |
(217) 0x42bca7 ADD %R11,%RCX |
(217) 0x42bcaa MOV %R15,%RAX |
(217) 0x42bcad IMUL %RBX,%RAX |
(217) 0x42bcb1 LEA (%RAX,%R9,8),%R15 |
(217) 0x42bcb5 ADD %R11,%R15 |
(217) 0x42bcb8 MOV 0xa8(%RSP),%RAX |
(217) 0x42bcc0 IMUL %R14,%RAX |
(217) 0x42bcc4 LEA (%RAX,%R9,8),%RAX |
(217) 0x42bcc8 ADD 0x138(%RSP),%RAX |
(217) 0x42bcd0 MOV %RAX,0xe0(%RSP) |
(217) 0x42bcd8 MOV 0xa0(%RSP),%RAX |
(217) 0x42bce0 IMUL %R14,%RAX |
(217) 0x42bce4 LEA (%RAX,%R9,8),%RAX |
(217) 0x42bce8 ADD 0x130(%RSP),%RAX |
(217) 0x42bcf0 MOV %RAX,0xd8(%RSP) |
(217) 0x42bcf8 MOV 0x70(%RSP),%RAX |
(217) 0x42bcfd IMUL %R14,%RAX |
(217) 0x42bd01 LEA (%RAX,%R9,8),%RAX |
(217) 0x42bd05 ADD 0x128(%RSP),%RAX |
(217) 0x42bd0d MOV %RAX,0x40(%RSP) |
(217) 0x42bd12 MOV 0x68(%RSP),%RAX |
(217) 0x42bd17 IMUL %R14,%RAX |
(217) 0x42bd1b LEA (%RAX,%R9,8),%RAX |
(217) 0x42bd1f ADD 0x120(%RSP),%RAX |
(217) 0x42bd27 MOV %RAX,0x38(%RSP) |
(217) 0x42bd2c MOV 0x98(%RSP),%RAX |
(217) 0x42bd34 IMUL %R14,%RAX |
(217) 0x42bd38 LEA (%RAX,%R9,8),%RAX |
(217) 0x42bd3c ADD 0x118(%RSP),%RAX |
(217) 0x42bd44 MOV %RAX,0x30(%RSP) |
(217) 0x42bd49 MOV 0x90(%RSP),%RAX |
(217) 0x42bd51 IMUL %R14,%RAX |
(217) 0x42bd55 LEA (%RAX,%R9,8),%RAX |
(217) 0x42bd59 ADD 0x110(%RSP),%RAX |
(217) 0x42bd61 MOV %RAX,0xb0(%RSP) |
(217) 0x42bd69 MOV 0x88(%RSP),%RAX |
(217) 0x42bd71 IMUL %R14,%RAX |
(217) 0x42bd75 LEA (%RAX,%R9,8),%RBX |
(217) 0x42bd79 ADD 0x108(%RSP),%RBX |
(217) 0x42bd81 MOV 0x540(%RSP),%RAX |
(217) 0x42bd89 IMUL 0x28(%RSP),%RAX |
(217) 0x42bd8f LEA (%RAX,%R9,8),%R11 |
(217) 0x42bd93 MOV 0x140(%RSP),%RAX |
(217) 0x42bd9b ADD %RAX,%R11 |
(217) 0x42bd9e IMUL 0x28(%RSP),%R14 |
(217) 0x42bda4 LEA (%R14,%R9,8),%R9 |
(217) 0x42bda8 ADD %RAX,%R9 |
(217) 0x42bdab XOR %EAX,%EAX |
(217) 0x42bdad NOPL (%RAX) |
(218) 0x42bdb0 VMOVUPD -0x8(%R15,%RAX,8),%ZMM0 |
(218) 0x42bdbb VMOVUPD (%R15,%RAX,8),%ZMM2 |
(218) 0x42bdc2 VADDPD -0x8(%RCX,%RAX,8),%ZMM0,%ZMM0 |
(218) 0x42bdcd VADDPD -0x8(%RDI,%RAX,8),%ZMM0,%ZMM0 |
(218) 0x42bdd8 VADDPD -0x8(%R12,%RAX,8),%ZMM0,%ZMM0 |
(218) 0x42bde3 VMULPD -0x8(%RDX,%RAX,8),%ZMM1,%ZMM3 |
(218) 0x42bdee VADDPD (%RCX,%RAX,8),%ZMM2,%ZMM2 |
(218) 0x42bdf5 VADDPD (%RDI,%RAX,8),%ZMM2,%ZMM2 |
(218) 0x42bdfc VADDPD (%R12,%RAX,8),%ZMM2,%ZMM2 |
(218) 0x42be03 VMULPD (%RDX,%RAX,8),%ZMM1,%ZMM4 |
(218) 0x42be0a VMOVUPD (%RSI,%RAX,8),%ZMM5 |
(218) 0x42be11 VADDPD -0x8(%RSI,%RAX,8),%ZMM5,%ZMM5 |
(218) 0x42be1c VADDPD -0x8(%R10,%RAX,8),%ZMM5,%ZMM5 |
(218) 0x42be27 VADDPD (%R10,%RAX,8),%ZMM5,%ZMM5 |
(218) 0x42be2e VMULPD (%R9,%RAX,8),%ZMM1,%ZMM7 |
(218) 0x42be35 VMULPD %ZMM5,%ZMM7,%ZMM5 |
(218) 0x42be3b VFMADD231PD %ZMM3,%ZMM0,%ZMM5 |
(218) 0x42be41 VMOVUPD (%R8,%RAX,8),%ZMM0 |
(218) 0x42be48 VADDPD -0x8(%R8,%RAX,8),%ZMM0,%ZMM0 |
(218) 0x42be53 VADDPD -0x8(%R13,%RAX,8),%ZMM0,%ZMM0 |
(218) 0x42be5e VADDPD (%R13,%RAX,8),%ZMM0,%ZMM0 |
(218) 0x42be66 VMULPD (%R11,%RAX,8),%ZMM1,%ZMM3 |
(218) 0x42be6d VFNMADD231PD %ZMM4,%ZMM2,%ZMM5 |
(218) 0x42be73 VFMSUB213PD %ZMM5,%ZMM0,%ZMM3 |
(218) 0x42be79 VMOVUPD (%RBX,%RAX,8),%ZMM0 |
(218) 0x42be80 MOV 0x30(%RSP),%R14 |
(218) 0x42be85 VMOVUPD (%R14,%RAX,8),%ZMM2 |
(218) 0x42be8c MOV 0x38(%RSP),%R14 |
(218) 0x42be91 VADDPD (%R14,%RAX,8),%ZMM2,%ZMM2 |
(218) 0x42be98 VMULPD %ZMM2,%ZMM3,%ZMM2 |
(218) 0x42be9e MOV 0xb0(%RSP),%R14 |
(218) 0x42bea6 VMULPD (%R14,%RAX,8),%ZMM0,%ZMM4 |
(218) 0x42bead VDIVPD %ZMM4,%ZMM2,%ZMM2 |
(218) 0x42beb3 VADDPD %ZMM0,%ZMM3,%ZMM0 |
(218) 0x42beb9 MOV 0x40(%RSP),%R14 |
(218) 0x42bebe VMOVUPD (%R14,%RAX,8),%ZMM3 |
(218) 0x42bec5 VSUBPD %ZMM2,%ZMM3,%ZMM2 |
(218) 0x42becb VDIVPD %ZMM0,%ZMM4,%ZMM0 |
(218) 0x42bed1 MOV 0xd8(%RSP),%R14 |
(218) 0x42bed9 VMOVUPD %ZMM2,(%R14,%RAX,8) |
(218) 0x42bee0 MOV 0xe0(%RSP),%R14 |
(218) 0x42bee8 VMOVUPD %ZMM0,(%R14,%RAX,8) |
(218) 0x42beef ADD $0x8,%RAX |
(218) 0x42bef3 CMP 0x20(%RSP),%RAX |
(218) 0x42bef8 JB 42bdb0 |
(217) 0x42befe MOV 0x20(%RSP),%R13 |
(217) 0x42bf03 CMP 0xc8(%RSP),%R13 |
(217) 0x42bf0b MOV 0x5c0(%RSP),%R8D |
(217) 0x42bf13 MOV 0x580(%RSP),%R15 |
(217) 0x42bf1b MOV 0x70(%RSP),%RDX |
(217) 0x42bf20 MOV 0x68(%RSP),%RBX |
(217) 0x42bf25 MOV 0x28(%RSP),%R9 |
(217) 0x42bf2a JE 42ba80 |
(217) 0x42bf30 JMP 42bf46 |
0x42bf32 NOPW %CS:(%RAX,%RAX,1) |
(217) 0x42bf40 XOR %R13D,%R13D |
(217) 0x42bf43 MOV %RSI,%R9 |
(217) 0x42bf46 VPBROADCASTQ %R13,%ZMM0 |
(217) 0x42bf4c VPSUBQ %ZMM0,%ZMM28,%ZMM0 |
(217) 0x42bf52 VPCMPNLEUQ 0xdb9e3(%RIP),%ZMM0,%K1 |
(217) 0x42bf5d KORTESTB %K1,%K1 |
(217) 0x42bf61 JE 42ba80 |
(217) 0x42bf67 MOV 0x100(%RSP),%RAX |
(217) 0x42bf6f ADD %R15D,%EAX |
(217) 0x42bf72 MOVSXD %EAX,%R11 |
(217) 0x42bf75 MOVSXD 0x58(%RSP),%RAX |
(217) 0x42bf7a SUB %RAX,%R11 |
(217) 0x42bf7d ADD 0x600(%RSP),%R13 |
(217) 0x42bf85 MOVSXD 0x60(%RSP),%RAX |
(217) 0x42bf8a SUB %RAX,%R13 |
(217) 0x42bf8d MOV %RBX,%RSI |
(217) 0x42bf90 LEA 0x3(%R11),%RBX |
(217) 0x42bf94 MOV 0x78(%RSP),%RDI |
(217) 0x42bf99 MOV %RDI,%RAX |
(217) 0x42bf9c IMUL %RBX,%RAX |
(217) 0x42bfa0 MOV 0x28(%RBP),%RCX |
(217) 0x42bfa4 ADD %RCX,%RAX |
(217) 0x42bfa7 VMOVUPD 0x10(%RAX,%R13,8),%ZMM28{%K1}{z} |
(217) 0x42bfb2 VMOVUPD 0x18(%RAX,%R13,8),%ZMM29{%K1}{z} |
(217) 0x42bfbd ADD $0x2,%R11 |
(217) 0x42bfc1 IMUL %R11,%RDI |
(217) 0x42bfc5 ADD %RCX,%RDI |
(217) 0x42bfc8 VMOVUPD 0x10(%RDI,%R13,8),%ZMM2{%K1}{z} |
(217) 0x42bfd3 VMOVUPD 0x18(%RDI,%R13,8),%ZMM30{%K1}{z} |
(217) 0x42bfde MOV 0x640(%RSP),%RDI |
(217) 0x42bfe6 MOV %RDI,%RAX |
(217) 0x42bfe9 IMUL %R11,%RAX |
(217) 0x42bfed MOV 0x20(%RBP),%RCX |
(217) 0x42bff1 ADD %RCX,%RAX |
(217) 0x42bff4 VMOVUPD 0x10(%RAX,%R13,8),%ZMM3{%K1}{z} |
(217) 0x42bfff VMOVUPD 0x18(%RAX,%R13,8),%ZMM31{%K1}{z} |
(217) 0x42c00a IMUL %RBX,%RDI |
(217) 0x42c00e ADD %RCX,%RDI |
(217) 0x42c011 VMOVUPD 0x10(%RDI,%R13,8),%ZMM4{%K1}{z} |
(217) 0x42c01c VMOVUPD 0x18(%RDI,%R13,8),%ZMM1{%K1}{z} |
(217) 0x42c027 MOV 0x80(%RSP),%RAX |
(217) 0x42c02f IMUL %R11,%RAX |
(217) 0x42c033 ADD 0x70(%RBP),%RAX |
(217) 0x42c037 VMOVUPD 0x10(%RAX,%R13,8),%ZMM5{%K1}{z} |
(217) 0x42c042 VMOVUPD 0x18(%RAX,%R13,8),%ZMM0{%K1}{z} |
(217) 0x42c04d MOV 0x680(%RSP),%R12 |
(217) 0x42c055 MOV %R12,%RAX |
(217) 0x42c058 IMUL %R11,%RAX |
(217) 0x42c05c MOV %RDX,%R14 |
(217) 0x42c05f MOV 0x18(%RBP),%R10 |
(217) 0x42c063 MOV %R9,%RDI |
(217) 0x42c066 ADD %R10,%RAX |
(217) 0x42c069 VMOVUPD 0x18(%RAX,%R13,8),%ZMM7{%K1}{z} |
(217) 0x42c074 VMOVUPD 0x10(%RAX,%R13,8),%ZMM8{%K1}{z} |
(217) 0x42c07f MOV 0xc0(%RSP),%R9 |
(217) 0x42c087 MOV %R9,%RAX |
(217) 0x42c08a IMUL %R11,%RAX |
(217) 0x42c08e MOV %RSI,%RDX |
(217) 0x42c091 MOV 0x10(%RBP),%RSI |
(217) 0x42c095 ADD %RSI,%RAX |
(217) 0x42c098 VMOVUPD 0x10(%RAX,%R13,8),%ZMM9{%K1}{z} |
(217) 0x42c0a3 VMOVUPD 0x18(%RAX,%R13,8),%ZMM10{%K1}{z} |
(217) 0x42c0ae MOV %RDI,%RAX |
(217) 0x42c0b1 IMUL %R11,%RAX |
(217) 0x42c0b5 MOV 0x68(%RBP),%RCX |
(217) 0x42c0b9 ADD %RCX,%RAX |
(217) 0x42c0bc VMOVUPD 0x10(%RAX,%R13,8),%ZMM12{%K1}{z} |
(217) 0x42c0c7 IMUL %RBX,%R12 |
(217) 0x42c0cb ADD %R10,%R12 |
(217) 0x42c0ce VMOVUPD 0x18(%R12,%R13,8),%ZMM11{%K1}{z} |
(217) 0x42c0d9 VMOVUPD 0x10(%R12,%R13,8),%ZMM13{%K1}{z} |
(217) 0x42c0e4 IMUL %RBX,%R9 |
(217) 0x42c0e8 ADD %RSI,%R9 |
(217) 0x42c0eb VMOVUPD 0x10(%R9,%R13,8),%ZMM14{%K1}{z} |
(217) 0x42c0f6 VMOVUPD 0x18(%R9,%R13,8),%ZMM15{%K1}{z} |
(217) 0x42c101 IMUL %RBX,%RDI |
(217) 0x42c105 ADD %RCX,%RDI |
(217) 0x42c108 VMOVUPD 0x10(%RDI,%R13,8),%ZMM16{%K1}{z} |
(217) 0x42c113 MOV 0x88(%RSP),%RAX |
(217) 0x42c11b IMUL %R11,%RAX |
(217) 0x42c11f ADD 0x60(%RBP),%RAX |
(217) 0x42c123 VMOVUPD 0x10(%RAX,%R13,8),%ZMM17{%K1}{z} |
(217) 0x42c12e MOV 0x90(%RSP),%RAX |
(217) 0x42c136 IMUL %R11,%RAX |
(217) 0x42c13a ADD 0x58(%RBP),%RAX |
(217) 0x42c13e VMOVUPD 0x10(%RAX,%R13,8),%ZMM18{%K1}{z} |
(217) 0x42c149 MOV 0x98(%RSP),%RAX |
(217) 0x42c151 IMUL %R11,%RAX |
(217) 0x42c155 ADD 0x30(%RBP),%RAX |
(217) 0x42c159 VMOVUPD 0x10(%RAX,%R13,8),%ZMM19{%K1}{z} |
(217) 0x42c164 IMUL %R11,%RDX |
(217) 0x42c168 ADD 0x38(%RBP),%RDX |
(217) 0x42c16c VMOVUPD 0x10(%RDX,%R13,8),%ZMM20{%K1}{z} |
(217) 0x42c177 IMUL %R11,%R14 |
(217) 0x42c17b ADD 0x48(%RBP),%R14 |
(217) 0x42c17f VMOVUPD 0x10(%R14,%R13,8),%ZMM21{%K1}{z} |
(217) 0x42c18a VMOVAPD %ZMM28,%ZMM26{%K1} |
(217) 0x42c190 VMOVAPD %ZMM2,%ZMM25{%K1} |
(217) 0x42c196 VMOVAPD %ZMM3,%ZMM24{%K1} |
(217) 0x42c19c VADDPD %ZMM25,%ZMM26,%ZMM2 |
(217) 0x42c1a2 VMOVAPD %ZMM4,%ZMM23{%K1} |
(217) 0x42c1a8 VADDPD %ZMM23,%ZMM24,%ZMM3 |
(217) 0x42c1ae VADDPD %ZMM3,%ZMM2,%ZMM2 |
(217) 0x42c1b4 VMOVAPD 0x6c0(%RSP),%ZMM28 |
(217) 0x42c1bc VMOVAPD %ZMM5,%ZMM28{%K1} |
(217) 0x42c1c2 VMOVAPD 0x1c0(%RSP),%ZMM4 |
(217) 0x42c1ca VMOVAPD %ZMM7,%ZMM4{%K1} |
(217) 0x42c1d0 VMOVAPD 0x200(%RSP),%ZMM3 |
(217) 0x42c1d8 VMOVAPD %ZMM8,%ZMM3{%K1} |
(217) 0x42c1de VMOVAPD 0x240(%RSP),%ZMM5 |
(217) 0x42c1e6 VMOVAPD %ZMM9,%ZMM5{%K1} |
(217) 0x42c1ec VMOVAPD %ZMM3,0x200(%RSP) |
(217) 0x42c1f4 VMOVAPD %ZMM4,0x1c0(%RSP) |
(217) 0x42c1fc VADDPD %ZMM3,%ZMM4,%ZMM3 |
(217) 0x42c202 VMOVAPD 0x280(%RSP),%ZMM4 |
(217) 0x42c20a VMOVAPD %ZMM10,%ZMM4{%K1} |
(217) 0x42c210 VMOVAPD %ZMM4,0x280(%RSP) |
(217) 0x42c218 VMOVAPD %ZMM5,0x240(%RSP) |
(217) 0x42c220 VADDPD %ZMM4,%ZMM5,%ZMM4 |
(217) 0x42c226 VADDPD %ZMM4,%ZMM3,%ZMM3 |
(217) 0x42c22c VBROADCASTSD %XMM27,%ZMM4 |
(217) 0x42c232 VMOVAPD 0x2c0(%RSP),%ZMM5 |
(217) 0x42c23a VMOVAPD %ZMM12,%ZMM5{%K1} |
(217) 0x42c240 VMOVAPD %ZMM5,0x2c0(%RSP) |
(217) 0x42c248 VMULPD %ZMM5,%ZMM4,%ZMM5 |
(217) 0x42c24e VMULPD %ZMM3,%ZMM5,%ZMM3 |
(217) 0x42c254 VMOVAPD %ZMM28,0x6c0(%RSP) |
(217) 0x42c25c VMULPD %ZMM28,%ZMM4,%ZMM5 |
(217) 0x42c262 VFMADD231PD %ZMM5,%ZMM2,%ZMM3 |
(217) 0x42c268 VMOVAPD 0x700(%RSP),%ZMM5 |
(217) 0x42c270 VMOVAPD %ZMM29,%ZMM5{%K1} |
(217) 0x42c276 VMOVAPD 0x740(%RSP),%ZMM2 |
(217) 0x42c27e VMOVAPD %ZMM30,%ZMM2{%K1} |
(217) 0x42c284 VMOVAPD 0x780(%RSP),%ZMM7 |
(217) 0x42c28c VMOVAPD %ZMM31,%ZMM7{%K1} |
(217) 0x42c292 VMOVAPD %ZMM2,0x740(%RSP) |
(217) 0x42c29a VMOVAPD %ZMM5,0x700(%RSP) |
(217) 0x42c2a2 VADDPD %ZMM2,%ZMM5,%ZMM2 |
(217) 0x42c2a8 VMOVAPD 0x7c0(%RSP),%ZMM5 |
(217) 0x42c2b0 VMOVAPD %ZMM1,%ZMM5{%K1} |
(217) 0x42c2b6 VMOVAPD %ZMM5,0x7c0(%RSP) |
(217) 0x42c2be VMOVAPD %ZMM7,0x780(%RSP) |
(217) 0x42c2c6 VADDPD %ZMM5,%ZMM7,%ZMM1 |
(217) 0x42c2cc VADDPD %ZMM1,%ZMM2,%ZMM1 |
(217) 0x42c2d2 VMOVAPD 0x180(%RSP),%ZMM2 |
(217) 0x42c2da VMOVAPD %ZMM0,%ZMM2{%K1} |
(217) 0x42c2e0 VMOVAPD %ZMM2,0x180(%RSP) |
(217) 0x42c2e8 VMULPD %ZMM2,%ZMM4,%ZMM0 |
(217) 0x42c2ee VFNMADD231PD %ZMM0,%ZMM1,%ZMM3 |
(217) 0x42c2f4 VMOVAPD 0x300(%RSP),%ZMM1 |
(217) 0x42c2fc VMOVAPD %ZMM11,%ZMM1{%K1} |
(217) 0x42c302 VMOVAPD 0x340(%RSP),%ZMM0 |
(217) 0x42c30a VMOVAPD %ZMM13,%ZMM0{%K1} |
(217) 0x42c310 VMOVAPD 0x380(%RSP),%ZMM2 |
(217) 0x42c318 VMOVAPD %ZMM14,%ZMM2{%K1} |
(217) 0x42c31e VMOVAPD %ZMM0,0x340(%RSP) |
(217) 0x42c326 VMOVAPD %ZMM1,0x300(%RSP) |
(217) 0x42c32e VADDPD %ZMM0,%ZMM1,%ZMM0 |
(217) 0x42c334 VMOVAPD 0x3c0(%RSP),%ZMM1 |
(217) 0x42c33c VMOVAPD %ZMM15,%ZMM1{%K1} |
(217) 0x42c342 VMOVAPD %ZMM1,0x3c0(%RSP) |
(217) 0x42c34a VMOVAPD %ZMM2,0x380(%RSP) |
(217) 0x42c352 VADDPD %ZMM1,%ZMM2,%ZMM1 |
(217) 0x42c358 VADDPD %ZMM1,%ZMM0,%ZMM0 |
(217) 0x42c35e VMOVAPD 0x400(%RSP),%ZMM1 |
(217) 0x42c366 VMOVAPD %ZMM16,%ZMM1{%K1} |
(217) 0x42c36c VMOVAPD %ZMM1,0x400(%RSP) |
(217) 0x42c374 VMULPD %ZMM1,%ZMM4,%ZMM1 |
(217) 0x42c37a VFMSUB213PD %ZMM3,%ZMM0,%ZMM1 |
(217) 0x42c380 VMOVAPD %ZMM17,%ZMM6{%K1} |
(217) 0x42c386 VMOVAPD 0x440(%RSP),%ZMM3 |
(217) 0x42c38e VMOVAPD %ZMM18,%ZMM3{%K1} |
(217) 0x42c394 VMOVAPD 0x480(%RSP),%ZMM2 |
(217) 0x42c39c VMOVAPD %ZMM19,%ZMM2{%K1} |
(217) 0x42c3a2 VMOVAPD 0x4c0(%RSP),%ZMM0 |
(217) 0x42c3aa VMOVAPD %ZMM20,%ZMM0{%K1} |
(217) 0x42c3b0 VMOVAPD %ZMM0,0x4c0(%RSP) |
(217) 0x42c3b8 VMOVAPD %ZMM2,0x480(%RSP) |
(217) 0x42c3c0 VADDPD %ZMM0,%ZMM2,%ZMM0 |
(217) 0x42c3c6 VMULPD %ZMM0,%ZMM1,%ZMM0 |
(217) 0x42c3cc VMOVAPD %ZMM3,0x440(%RSP) |
(217) 0x42c3d4 VMULPD %ZMM3,%ZMM6,%ZMM2 |
(217) 0x42c3da VDIVPD %ZMM2,%ZMM0,%ZMM0 |
(217) 0x42c3e0 VMOVAPD 0x500(%RSP),%ZMM3 |
(217) 0x42c3e8 VMOVAPD %ZMM21,%ZMM3{%K1} |
(217) 0x42c3ee VMOVAPD %ZMM3,0x500(%RSP) |
(217) 0x42c3f6 VSUBPD %ZMM0,%ZMM3,%ZMM0 |
(217) 0x42c3fc MOV 0xa0(%RSP),%RAX |
(217) 0x42c404 IMUL %R11,%RAX |
(217) 0x42c408 ADD 0x40(%RBP),%RAX |
(217) 0x42c40c VMOVUPD %ZMM0,0x10(%RAX,%R13,8){%K1} |
(217) 0x42c417 MOV 0xa8(%RSP),%RAX |
(217) 0x42c41f IMUL %R11,%RAX |
(217) 0x42c423 VADDPD %ZMM6,%ZMM1,%ZMM0 |
(217) 0x42c429 VDIVPD %ZMM0,%ZMM2,%ZMM0 |
(217) 0x42c42f ADD 0x50(%RBP),%RAX |
(217) 0x42c433 VMOVUPD %ZMM0,0x10(%RAX,%R13,8){%K1} |
(217) 0x42c43e JMP 42ba80 |
0x42c443 NOPW %CS:(%RAX,%RAX,1) |
0x42c452 NOPW %CS:(%RAX,%RAX,1) |
0x42c461 NOPW %CS:(%RAX,%RAX,1) |
0x42c470 NOPW %CS:(%RAX,%RAX,1) |
0x42c47f NOP |
0x42c480 MOV %RAX,%RDX |
0x42c483 MOVSXD 0x60(%RSP),%RAX |
0x42c488 SAL $0x3,%RAX |
0x42c48c MOV $0x18,%ESI |
0x42c491 SUB %RAX,%RSI |
0x42c494 MOV 0x18(%RBP),%RCX |
0x42c498 ADD %RSI,%RCX |
0x42c49b MOV %RCX,0x4c0(%RSP) |
0x42c4a3 MOVSXD 0x58(%RSP),%RCX |
0x42c4a8 MOV $0x3,%R8D |
0x42c4ae SUB %RCX,%R8 |
0x42c4b1 MOV %R8,0x480(%RSP) |
0x42c4b9 ADD %EBX,%EDX |
0x42c4bb MOV $0x2,%R8D |
0x42c4c1 SUB %RCX,%R8 |
0x42c4c4 MOV %R8,0x440(%RSP) |
0x42c4cc MOV 0x70(%RBP),%RCX |
0x42c4d0 ADD %RSI,%RCX |
0x42c4d3 MOV %RCX,0x400(%RSP) |
0x42c4db ADD 0x28(%RBP),%RSI |
0x42c4df MOV %RSI,0x500(%RSP) |
0x42c4e7 MOV $0x10,%ECX |
0x42c4ec SUB %RAX,%RCX |
0x42c4ef MOV 0x50(%RBP),%RAX |
0x42c4f3 ADD %RCX,%RAX |
0x42c4f6 MOV %RAX,0x380(%RSP) |
0x42c4fe MOV 0x40(%RBP),%RAX |
0x42c502 LEA (%RAX,%RCX,1),%RAX |
0x42c506 MOV %RAX,0x340(%RSP) |
0x42c50e MOV 0x48(%RBP),%RAX |
0x42c512 LEA (%RAX,%RCX,1),%RAX |
0x42c516 MOV %RAX,0x300(%RSP) |
0x42c51e MOV 0x38(%RBP),%RAX |
0x42c522 LEA (%RAX,%RCX,1),%RAX |
0x42c526 MOV %RAX,0x2c0(%RSP) |
0x42c52e MOV 0x30(%RBP),%RAX |
0x42c532 ADD %RCX,%RAX |
0x42c535 MOV %RAX,0x280(%RSP) |
0x42c53d MOV 0x58(%RBP),%RAX |
0x42c541 ADD %RCX,%RAX |
0x42c544 MOV %RAX,0x240(%RSP) |
0x42c54c MOV 0x60(%RBP),%RAX |
0x42c550 ADD %RCX,%RAX |
0x42c553 MOV %RAX,0x200(%RSP) |
0x42c55b ADD 0x68(%RBP),%RCX |
0x42c55f MOV %RCX,0x3c0(%RSP) |
0x42c567 VMOVSD 0xdc871(%RIP),%XMM5 |
0x42c56f XOR %R9D,%R9D |
0x42c572 MOV %RDX,0x1c0(%RSP) |
0x42c57a MOV %EDX,%R8D |
0x42c57d JMP 42c595 |
0x42c57f NOP |
(215) 0x42c580 LEA 0x1(%R9),%EAX |
(215) 0x42c584 INC %R8D |
(215) 0x42c587 CMP 0x28(%RSP),%R9D |
(215) 0x42c58c MOV %EAX,%R9D |
(215) 0x42c58f JE 42b8c5 |
(215) 0x42c595 MOV 0x98(%RBP),%RAX |
(215) 0x42c59c MOVSXD (%RAX),%R11 |
(215) 0x42c59f MOV 0x90(%RBP),%RAX |
(215) 0x42c5a6 MOV (%RAX),%EDI |
(215) 0x42c5a8 CMP %R11D,%EDI |
(215) 0x42c5ab JS 42c580 |
(215) 0x42c5ad MOV 0xa8(%RBP),%RAX |
(215) 0x42c5b4 MOV (%RAX),%RSI |
(215) 0x42c5b7 MOV 0xb0(%RBP),%RAX |
(215) 0x42c5be MOV (%RAX),%R15 |
(215) 0x42c5c1 VMULSD 0x326855(%RIP),%XMM5,%XMM19 |
(215) 0x42c5cb MOV 0xb8(%RBP),%RAX |
(215) 0x42c5d2 MOV (%RAX),%RDX |
(215) 0x42c5d5 MOV 0xc0(%RBP),%RAX |
(215) 0x42c5dc MOV (%RAX),%R10 |
(215) 0x42c5df MOV 0xc8(%RBP),%RAX |
(215) 0x42c5e6 MOV (%RAX),%RAX |
(215) 0x42c5e9 MOV %RAX,0xb0(%RSP) |
(215) 0x42c5f1 MOV 0xd0(%RBP),%RAX |
(215) 0x42c5f8 MOV (%RAX),%R13 |
(215) 0x42c5fb MOV 0xd8(%RBP),%RAX |
(215) 0x42c602 MOV (%RAX),%RBX |
(215) 0x42c605 MOV 0xe0(%RBP),%RAX |
(215) 0x42c60c MOV (%RAX),%RAX |
(215) 0x42c60f MOV %RAX,0x38(%RSP) |
(215) 0x42c614 MOV 0xe8(%RBP),%RAX |
(215) 0x42c61b MOV (%RAX),%RAX |
(215) 0x42c61e MOV %RAX,0x40(%RSP) |
(215) 0x42c623 MOV 0xf0(%RBP),%RAX |
(215) 0x42c62a MOV (%RAX),%R12 |
(215) 0x42c62d MOV 0xf8(%RBP),%RAX |
(215) 0x42c634 MOV (%RAX),%R14 |
(215) 0x42c637 SUB %R11D,%EDI |
(215) 0x42c63a INC %EDI |
(215) 0x42c63c CMP $0x2,%EDI |
(215) 0x42c63f MOV $0x1,%EAX |
(215) 0x42c644 CMOVL %EAX,%EDI |
(215) 0x42c647 MOV %RDI,%RCX |
(215) 0x42c64a VPBROADCASTQ %RDI,%ZMM20 |
(215) 0x42c650 AND $0x7ffffff8,%RCX |
(215) 0x42c657 MOV %R14,0xa8(%RSP) |
(215) 0x42c65f MOV %R10,0xa0(%RSP) |
(215) 0x42c667 MOV %RSI,0x98(%RSP) |
(215) 0x42c66f MOV %R15,0x90(%RSP) |
(215) 0x42c677 MOV %R11,0x88(%RSP) |
(215) 0x42c67f JE 42c980 |
(215) 0x42c685 MOV %RDI,0xc8(%RSP) |
(215) 0x42c68d MOV %R9,0x78(%RSP) |
(215) 0x42c692 MOV %R8D,0x80(%RSP) |
(215) 0x42c69a MOV %RDX,0x30(%RSP) |
(215) 0x42c69f MOVSXD %R8D,%RDI |
(215) 0x42c6a2 MOV 0x480(%RSP),%RAX |
(215) 0x42c6aa LEA (%RAX,%RDI,1),%RDX |
(215) 0x42c6ae ADD 0x440(%RSP),%RDI |
(215) 0x42c6b6 VBROADCASTSD %XMM19,%ZMM21 |
(215) 0x42c6bc MOV %R10,%RAX |
(215) 0x42c6bf IMUL %RDX,%RAX |
(215) 0x42c6c3 MOV %RDX,%R8 |
(215) 0x42c6c6 MOV %RDX,0xc0(%RSP) |
(215) 0x42c6ce MOV %RCX,0x20(%RSP) |
(215) 0x42c6d3 MOV %R11,%RDX |
(215) 0x42c6d6 LEA (%RAX,%R11,8),%R11 |
(215) 0x42c6da MOV 0x4c0(%RSP),%RCX |
(215) 0x42c6e2 ADD %RCX,%R11 |
(215) 0x42c6e5 MOV %R10,%RAX |
(215) 0x42c6e8 IMUL %RDI,%RAX |
(215) 0x42c6ec MOV %R14,%R9 |
(215) 0x42c6ef LEA (%RAX,%RDX,8),%R14 |
(215) 0x42c6f3 ADD %RCX,%R14 |
(215) 0x42c6f6 IMUL %RDI,%RSI |
(215) 0x42c6fa LEA (%RSI,%RDX,8),%RAX |
(215) 0x42c6fe ADD 0x400(%RSP),%RAX |
(215) 0x42c706 MOV %R15,%RCX |
(215) 0x42c709 IMUL %RDI,%RCX |
(215) 0x42c70d MOV %RDI,%R10 |
(215) 0x42c710 LEA (%RCX,%RDX,8),%RDI |
(215) 0x42c714 MOV 0x500(%RSP),%RSI |
(215) 0x42c71c ADD %RSI,%RDI |
(215) 0x42c71f IMUL %R8,%R15 |
(215) 0x42c723 LEA (%R15,%RDX,8),%R8 |
(215) 0x42c727 ADD %RSI,%R8 |
(215) 0x42c72a MOV %R9,%RCX |
(215) 0x42c72d IMUL %R10,%RCX |
(215) 0x42c731 LEA (%RCX,%RDX,8),%RCX |
(215) 0x42c735 ADD 0x380(%RSP),%RCX |
(215) 0x42c73d MOV %RCX,0xe0(%RSP) |
(215) 0x42c745 MOV %R12,0x70(%RSP) |
(215) 0x42c74a IMUL %R10,%R12 |
(215) 0x42c74e LEA (%R12,%RDX,8),%RCX |
(215) 0x42c752 ADD 0x340(%RSP),%RCX |
(215) 0x42c75a MOV %RCX,0xd8(%RSP) |
(215) 0x42c762 MOV 0x40(%RSP),%RSI |
(215) 0x42c767 MOV %R10,%RCX |
(215) 0x42c76a IMUL %R10,%RSI |
(215) 0x42c76e LEA (%RSI,%RDX,8),%R12 |
(215) 0x42c772 ADD 0x300(%RSP),%R12 |
(215) 0x42c77a MOV %R13,0x68(%RSP) |
(215) 0x42c77f MOV %R13,%RSI |
(215) 0x42c782 IMUL %R10,%RSI |
(215) 0x42c786 LEA (%RSI,%RDX,8),%R15 |
(215) 0x42c78a ADD 0x2c0(%RSP),%R15 |
(215) 0x42c792 MOV 0x38(%RSP),%RSI |
(215) 0x42c797 IMUL %R10,%RSI |
(215) 0x42c79b LEA (%RSI,%RDX,8),%R10 |
(215) 0x42c79f ADD 0x280(%RSP),%R10 |
(215) 0x42c7a7 MOV %RBX,0xd0(%RSP) |
(215) 0x42c7af IMUL %RCX,%RBX |
(215) 0x42c7b3 LEA (%RBX,%RDX,8),%RBX |
(215) 0x42c7b7 ADD 0x240(%RSP),%RBX |
(215) 0x42c7bf MOV 0xb0(%RSP),%RSI |
(215) 0x42c7c7 IMUL %RCX,%RSI |
(215) 0x42c7cb LEA (%RSI,%RDX,8),%R13 |
(215) 0x42c7cf ADD 0x200(%RSP),%R13 |
(215) 0x42c7d7 MOV 0xc0(%RSP),%RSI |
(215) 0x42c7df IMUL 0x30(%RSP),%RSI |
(215) 0x42c7e5 LEA (%RSI,%RDX,8),%R9 |
(215) 0x42c7e9 MOV 0x3c0(%RSP),%RSI |
(215) 0x42c7f1 ADD %RSI,%R9 |
(215) 0x42c7f4 IMUL 0x30(%RSP),%RCX |
(215) 0x42c7fa LEA (%RCX,%RDX,8),%RDX |
(215) 0x42c7fe ADD %RSI,%RDX |
(215) 0x42c801 XOR %ESI,%ESI |
(215) 0x42c803 NOPW %CS:(%RAX,%RAX,1) |
(216) 0x42c810 VMOVUPD -0x8(%R8,%RSI,8),%ZMM22 |
(216) 0x42c81b VMOVUPD (%R8,%RSI,8),%ZMM23 |
(216) 0x42c822 VADDPD -0x8(%RDI,%RSI,8),%ZMM22,%ZMM22 |
(216) 0x42c82d VMULPD -0x8(%RAX,%RSI,8),%ZMM21,%ZMM24 |
(216) 0x42c838 VADDPD (%RDI,%RSI,8),%ZMM23,%ZMM23 |
(216) 0x42c83f VMULPD (%RAX,%RSI,8),%ZMM21,%ZMM25 |
(216) 0x42c846 VMOVUPD (%R14,%RSI,8),%ZMM26 |
(216) 0x42c84d VADDPD -0x8(%R14,%RSI,8),%ZMM26,%ZMM26 |
(216) 0x42c858 VMULPD (%RDX,%RSI,8),%ZMM21,%ZMM27 |
(216) 0x42c85f VMULPD %ZMM26,%ZMM27,%ZMM26 |
(216) 0x42c865 VFMADD231PD %ZMM24,%ZMM22,%ZMM26 |
(216) 0x42c86b VMOVUPD (%R11,%RSI,8),%ZMM22 |
(216) 0x42c872 VADDPD -0x8(%R11,%RSI,8),%ZMM22,%ZMM22 |
(216) 0x42c87d VMULPD (%R9,%RSI,8),%ZMM21,%ZMM24 |
(216) 0x42c884 VFNMADD231PD %ZMM25,%ZMM23,%ZMM26 |
(216) 0x42c88a VFMSUB213PD %ZMM26,%ZMM22,%ZMM24 |
(216) 0x42c890 VMOVUPD (%R13,%RSI,8),%ZMM22 |
(216) 0x42c898 VMOVUPD (%R10,%RSI,8),%ZMM23 |
(216) 0x42c89f VADDPD (%R15,%RSI,8),%ZMM23,%ZMM23 |
(216) 0x42c8a6 VMULPD %ZMM23,%ZMM24,%ZMM23 |
(216) 0x42c8ac VMULPD (%RBX,%RSI,8),%ZMM22,%ZMM25 |
(216) 0x42c8b3 VDIVPD %ZMM25,%ZMM23,%ZMM23 |
(216) 0x42c8b9 VADDPD %ZMM22,%ZMM24,%ZMM22 |
(216) 0x42c8bf VMOVUPD (%R12,%RSI,8),%ZMM24 |
(216) 0x42c8c6 VSUBPD %ZMM23,%ZMM24,%ZMM23 |
(216) 0x42c8cc VDIVPD %ZMM22,%ZMM25,%ZMM22 |
(216) 0x42c8d2 MOV 0xd8(%RSP),%RCX |
(216) 0x42c8da VMOVUPD %ZMM23,(%RCX,%RSI,8) |
(216) 0x42c8e1 MOV 0xe0(%RSP),%RCX |
(216) 0x42c8e9 VMOVUPD %ZMM22,(%RCX,%RSI,8) |
(216) 0x42c8f0 ADD $0x8,%RSI |
(216) 0x42c8f4 CMP 0x20(%RSP),%RSI |
(216) 0x42c8f9 JB 42c810 |
(215) 0x42c8ff MOV 0x20(%RSP),%R11 |
(215) 0x42c904 CMP 0xc8(%RSP),%R11 |
(215) 0x42c90c MOV 0x80(%RSP),%R8D |
(215) 0x42c914 MOV 0x78(%RSP),%R9 |
(215) 0x42c919 MOV 0x70(%RSP),%R12 |
(215) 0x42c91e MOV 0x40(%RSP),%R15 |
(215) 0x42c923 MOV 0x68(%RSP),%R13 |
(215) 0x42c928 MOV 0x38(%RSP),%RDI |
(215) 0x42c92d MOV 0xd0(%RSP),%RBX |
(215) 0x42c935 MOV 0x30(%RSP),%RDX |
(215) 0x42c93a JE 42c580 |
(215) 0x42c940 JMP 42c98d |
0x42c942 NOPW %CS:(%RAX,%RAX,1) |
0x42c951 NOPW %CS:(%RAX,%RAX,1) |
0x42c960 NOPW %CS:(%RAX,%RAX,1) |
0x42c96f NOPW %CS:(%RAX,%RAX,1) |
0x42c97e XCHG %AX,%AX |
(215) 0x42c980 XOR %R11D,%R11D |
(215) 0x42c983 MOV 0x40(%RSP),%R15 |
(215) 0x42c988 MOV 0x38(%RSP),%RDI |
(215) 0x42c98d VPBROADCASTQ %R11,%ZMM21 |
(215) 0x42c993 VPSUBQ %ZMM21,%ZMM20,%ZMM20 |
(215) 0x42c999 VPCMPNLEUQ 0xdaf9c(%RIP),%ZMM20,%K1 |
(215) 0x42c9a4 KORTESTB %K1,%K1 |
(215) 0x42c9a8 JE 42c580 |
(215) 0x42c9ae MOV 0x1c0(%RSP),%RAX |
(215) 0x42c9b6 ADD %R9D,%EAX |
(215) 0x42c9b9 MOV %R13,%R14 |
(215) 0x42c9bc MOVSXD %EAX,%R13 |
(215) 0x42c9bf MOVSXD 0x58(%RSP),%RAX |
(215) 0x42c9c4 SUB %RAX,%R13 |
(215) 0x42c9c7 ADD 0x88(%RSP),%R11 |
(215) 0x42c9cf MOVSXD 0x60(%RSP),%RAX |
(215) 0x42c9d4 SUB %RAX,%R11 |
(215) 0x42c9d7 LEA 0x3(%R13),%RAX |
(215) 0x42c9db MOV %RAX,0x20(%RSP) |
(215) 0x42c9e0 MOV 0x90(%RSP),%RSI |
(215) 0x42c9e8 MOV %RSI,%RCX |
(215) 0x42c9eb IMUL %RAX,%RCX |
(215) 0x42c9ef MOV %RDX,%RAX |
(215) 0x42c9f2 MOV 0x28(%RBP),%RDX |
(215) 0x42c9f6 ADD %RDX,%RCX |
(215) 0x42c9f9 VMOVUPD 0x10(%RCX,%R11,8),%ZMM20{%K1}{z} |
(215) 0x42ca04 VMOVUPD 0x18(%RCX,%R11,8),%ZMM21{%K1}{z} |
(215) 0x42ca0f ADD $0x2,%R13 |
(215) 0x42ca13 IMUL %R13,%RSI |
(215) 0x42ca17 ADD %RDX,%RSI |
(215) 0x42ca1a VMOVUPD 0x10(%RSI,%R11,8),%ZMM24{%K1}{z} |
(215) 0x42ca25 VMOVUPD 0x18(%RSI,%R11,8),%ZMM22{%K1}{z} |
(215) 0x42ca30 MOV 0x98(%RSP),%RCX |
(215) 0x42ca38 IMUL %R13,%RCX |
(215) 0x42ca3c ADD 0x70(%RBP),%RCX |
(215) 0x42ca40 VMOVUPD 0x10(%RCX,%R11,8),%ZMM25{%K1}{z} |
(215) 0x42ca4b VMOVUPD 0x18(%RCX,%R11,8),%ZMM23{%K1}{z} |
(215) 0x42ca56 MOV 0xa0(%RSP),%R10 |
(215) 0x42ca5e MOV %R10,%RCX |
(215) 0x42ca61 IMUL %R13,%RCX |
(215) 0x42ca65 MOV 0x18(%RBP),%RDX |
(215) 0x42ca69 MOV 0xb0(%RSP),%RSI |
(215) 0x42ca71 ADD %RDX,%RCX |
(215) 0x42ca74 VMOVUPD 0x18(%RCX,%R11,8),%ZMM26{%K1}{z} |
(215) 0x42ca7f VMOVUPD 0x10(%RCX,%R11,8),%ZMM27{%K1}{z} |
(215) 0x42ca8a MOV %RAX,%RCX |
(215) 0x42ca8d IMUL %R13,%RCX |
(215) 0x42ca91 MOV 0x68(%RBP),%RDX |
(215) 0x42ca95 ADD %RDX,%RCX |
(215) 0x42ca98 VMOVUPD 0x10(%RCX,%R11,8),%ZMM28{%K1}{z} |
(215) 0x42caa3 MOV 0x20(%RSP),%RCX |
(215) 0x42caa8 IMUL %RCX,%R10 |
(215) 0x42caac ADD 0x18(%RBP),%R10 |
(215) 0x42cab0 VMOVUPD 0x18(%R10,%R11,8),%ZMM29{%K1}{z} |
(215) 0x42cabb VMOVUPD 0x10(%R10,%R11,8),%ZMM30{%K1}{z} |
(215) 0x42cac6 IMUL %RCX,%RAX |
(215) 0x42caca ADD %RDX,%RAX |
(215) 0x42cacd VMOVUPD 0x10(%RAX,%R11,8),%ZMM31{%K1}{z} |
(215) 0x42cad8 IMUL %R13,%RSI |
(215) 0x42cadc ADD 0x60(%RBP),%RSI |
(215) 0x42cae0 VMOVUPD 0x10(%RSI,%R11,8),%ZMM1{%K1}{z} |
(215) 0x42caeb IMUL %R13,%RBX |
(215) 0x42caef ADD 0x58(%RBP),%RBX |
(215) 0x42caf3 VMOVUPD 0x10(%RBX,%R11,8),%ZMM0{%K1}{z} |
(215) 0x42cafe IMUL %R13,%RDI |
(215) 0x42cb02 ADD 0x30(%RBP),%RDI |
(215) 0x42cb06 VMOVUPD 0x10(%RDI,%R11,8),%ZMM2{%K1}{z} |
(215) 0x42cb11 IMUL %R13,%R14 |
(215) 0x42cb15 ADD 0x38(%RBP),%R14 |
(215) 0x42cb19 VMOVUPD 0x10(%R14,%R11,8),%ZMM3{%K1}{z} |
(215) 0x42cb24 IMUL %R13,%R15 |
(215) 0x42cb28 ADD 0x48(%RBP),%R15 |
(215) 0x42cb2c VMOVUPD 0x10(%R15,%R11,8),%ZMM4{%K1}{z} |
(215) 0x42cb37 VMOVAPD 0x680(%RSP),%ZMM6 |
(215) 0x42cb3f VMOVAPD %ZMM20,%ZMM6{%K1} |
(215) 0x42cb45 VMOVAPD 0x640(%RSP),%ZMM20 |
(215) 0x42cb4d VMOVAPD %ZMM24,%ZMM20{%K1} |
(215) 0x42cb53 VMOVAPD 0x600(%RSP),%ZMM7 |
(215) 0x42cb5b VMOVAPD %ZMM25,%ZMM7{%K1} |
(215) 0x42cb61 VMOVAPD %ZMM26,%ZMM8{%K1} |
(215) 0x42cb67 VMOVAPD %ZMM6,0x680(%RSP) |
(215) 0x42cb6f VMOVAPD %ZMM20,0x640(%RSP) |
(215) 0x42cb77 VADDPD %ZMM20,%ZMM6,%ZMM20 |
(215) 0x42cb7d VBROADCASTSD %XMM19,%ZMM19 |
(215) 0x42cb83 VMOVAPD %ZMM27,%ZMM9{%K1} |
(215) 0x42cb89 VADDPD %ZMM9,%ZMM8,%ZMM24 |
(215) 0x42cb8f VMOVAPD %ZMM28,%ZMM10{%K1} |
(215) 0x42cb95 VMULPD %ZMM10,%ZMM19,%ZMM25 |
(215) 0x42cb9b VMULPD %ZMM24,%ZMM25,%ZMM24 |
(215) 0x42cba1 VMOVAPD %ZMM7,0x600(%RSP) |
(215) 0x42cba9 VMULPD %ZMM7,%ZMM19,%ZMM25 |
(215) 0x42cbaf VFMADD231PD %ZMM25,%ZMM20,%ZMM24 |
(215) 0x42cbb5 VMOVAPD 0x5c0(%RSP),%ZMM6 |
(215) 0x42cbbd VMOVAPD %ZMM21,%ZMM6{%K1} |
(215) 0x42cbc3 VMOVAPD 0x580(%RSP),%ZMM7 |
(215) 0x42cbcb VMOVAPD %ZMM22,%ZMM7{%K1} |
(215) 0x42cbd1 VMOVAPD %ZMM6,0x5c0(%RSP) |
(215) 0x42cbd9 VMOVAPD %ZMM7,0x580(%RSP) |
(215) 0x42cbe1 VADDPD %ZMM7,%ZMM6,%ZMM20 |
(215) 0x42cbe7 VMOVAPD 0x540(%RSP),%ZMM6 |
(215) 0x42cbef VMOVAPD %ZMM23,%ZMM6{%K1} |
(215) 0x42cbf5 VMOVAPD %ZMM6,0x540(%RSP) |
(215) 0x42cbfd VMULPD %ZMM6,%ZMM19,%ZMM21 |
(215) 0x42cc03 VFNMADD231PD %ZMM21,%ZMM20,%ZMM24 |
(215) 0x42cc09 VMOVAPD %ZMM29,%ZMM11{%K1} |
(215) 0x42cc0f VMOVAPD %ZMM30,%ZMM12{%K1} |
(215) 0x42cc15 VMOVAPD %ZMM31,%ZMM13{%K1} |
(215) 0x42cc1b VADDPD %ZMM12,%ZMM11,%ZMM20 |
(215) 0x42cc21 VMULPD %ZMM13,%ZMM19,%ZMM19 |
(215) 0x42cc27 VFMSUB213PD %ZMM24,%ZMM20,%ZMM19 |
(215) 0x42cc2d VMOVAPD %ZMM1,%ZMM14{%K1} |
(215) 0x42cc33 VMOVAPD %ZMM0,%ZMM15{%K1} |
(215) 0x42cc39 VMOVAPD %ZMM2,%ZMM16{%K1} |
(215) 0x42cc3f VMOVAPD %ZMM3,%ZMM17{%K1} |
(215) 0x42cc45 VADDPD %ZMM17,%ZMM16,%ZMM0 |
(215) 0x42cc4b VMULPD %ZMM0,%ZMM19,%ZMM0 |
(215) 0x42cc51 VMULPD %ZMM15,%ZMM14,%ZMM1 |
(215) 0x42cc57 VDIVPD %ZMM1,%ZMM0,%ZMM0 |
(215) 0x42cc5d VMOVAPD %ZMM4,%ZMM18{%K1} |
(215) 0x42cc63 VSUBPD %ZMM0,%ZMM18,%ZMM0 |
(215) 0x42cc69 IMUL %R13,%R12 |
(215) 0x42cc6d ADD 0x40(%RBP),%R12 |
(215) 0x42cc71 VMOVUPD %ZMM0,0x10(%R12,%R11,8){%K1} |
(215) 0x42cc7c MOV 0xa8(%RSP),%RAX |
(215) 0x42cc84 IMUL %R13,%RAX |
(215) 0x42cc88 VADDPD %ZMM14,%ZMM19,%ZMM0 |
(215) 0x42cc8e VDIVPD %ZMM0,%ZMM1,%ZMM0 |
(215) 0x42cc94 ADD 0x50(%RBP),%RAX |
(215) 0x42cc98 VMOVUPD %ZMM0,0x10(%RAX,%R11,8){%K1} |
(215) 0x42cca3 JMP 42c580 |
0x42cca8 NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | PdV_kernel.f90:67-139 |
Module | exec |
nb instructions | 222 |
nb uops | 228 |
loop length | 1233 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 65 |
micro-operation queue | 38.00 cycles |
front end | 38.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.80 | 11.80 | 17.00 | 17.00 | 31.50 | 11.80 | 11.80 | 31.50 | 31.50 | 31.50 | 11.80 | 17.00 |
cycles | 11.80 | 11.80 | 17.00 | 17.00 | 31.50 | 11.80 | 11.80 | 31.50 | 31.50 | 31.50 | 11.80 | 17.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 37.13 |
Stall cycles | 0.00 |
Front-end | 38.00 |
Dispatch | 31.50 |
Overall L1 | 38.00 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
all | 10% |
load | 7% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 10% |
load | 8% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x840,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TESTB $0x1,0xa0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JNE 42b840 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x100> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVL $0,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 42b8e1 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1a1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xf8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xfc(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x54(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x50(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x749e10,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4044c0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x4c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 42b940 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x749e30,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xec(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 42b8d1 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x191> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,0xfc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 42b8e1 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1a1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x54(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x100(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x104(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x5c(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x58(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x749db0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4044c0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x54(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 42c480 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xd40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x749dd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x180(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4040b0 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x749e50,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404580 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749df0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404580 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x20(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x18,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x3,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%R9,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x28(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R9,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x68(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdd391(%RIP),%XMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 42ba98 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x358> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x18,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x3,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x2,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x28(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RSI,0x500(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x68(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdc871(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 42c595 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xe55> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | PdV_kernel.f90:67-139 |
Module | exec |
nb instructions | 222 |
nb uops | 228 |
loop length | 1233 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 65 |
micro-operation queue | 38.00 cycles |
front end | 38.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 11.80 | 11.80 | 17.00 | 17.00 | 31.50 | 11.80 | 11.80 | 31.50 | 31.50 | 31.50 | 11.80 | 17.00 |
cycles | 11.80 | 11.80 | 17.00 | 17.00 | 31.50 | 11.80 | 11.80 | 31.50 | 31.50 | 31.50 | 11.80 | 17.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 37.13 |
Stall cycles | 0.00 |
Front-end | 38.00 |
Dispatch | 31.50 |
Overall L1 | 38.00 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
all | 10% |
load | 7% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 10% |
load | 8% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x840,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TESTB $0x1,0xa0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JNE 42b840 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x100> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVL $0,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 42b8e1 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1a1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xf8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xfc(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x54(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x50(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x749e10,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0xf4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4044c0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x4c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 42b940 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x749e30,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xec(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 42b8d1 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x191> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,0xfc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 42b8e1 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1a1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x54(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x100(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x104(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x5c(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x58(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x749db0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4044c0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x54(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 42c480 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xd40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x749dd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x180(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4040b0 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xb8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x749e50,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404580 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x749df0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404580 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x20(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x18,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x3,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%R9,1),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x28(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R9,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x68(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdd391(%RIP),%XMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RSI,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 42ba98 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x358> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x18,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x4c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD 0x58(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x3,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x2,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x28(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RSI,0x500(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x68(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RCX,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xdc871(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 42c595 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0xe55> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼pdv_kernel_.DIR.OMP.PARALLEL.2– | 10.89 | 3.54 |
▼Loop 217 - PdV_kernel.f90:69-135 - exec– | 0 | 0 |
○Loop 218 - PdV_kernel.f90:111-135 - exec | 5.97 | 1.93 |
▼Loop 215 - PdV_kernel.f90:69-99 - exec– | 0 | 0 |
○Loop 216 - PdV_kernel.f90:69-99 - exec | 4.92 | 1.59 |