Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.04% |
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Function: __generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0 | Module: exec | Source: generate_chunk_kernel.f90:85-161 | Coverage: 0.04% |
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/scratch_na/users/xoserete/qaas_runs/171-415-7190/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/generate_chunk_kernel.f90: 85 - 161 |
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85: !$OMP PARALLEL SHARED(x_cent,y_cent) |
86: !$OMP DO |
87: DO k=y_min-2,y_max+2 |
88: !$OMP SIMD |
89: DO j=x_min-2,x_max+2 |
90: energy0(j,k)=state_energy(1) |
91: ENDDO |
92: ENDDO |
93: !$OMP END DO |
94: !$OMP DO |
95: DO k=y_min-2,y_max+2 |
96: !$OMP SIMD |
97: DO j=x_min-2,x_max+2 |
98: density0(j,k)=state_density(1) |
99: ENDDO |
100: ENDDO |
101: !$OMP END DO |
102: !$OMP DO |
103: DO k=y_min-2,y_max+2 |
104: !$OMP SIMD |
105: DO j=x_min-2,x_max+2 |
106: xvel0(j,k)=state_xvel(1) |
107: ENDDO |
108: ENDDO |
109: !$OMP END DO |
110: !$OMP DO |
111: DO k=y_min-2,y_max+2 |
112: !$OMP SIMD |
113: DO j=x_min-2,x_max+2 |
114: yvel0(j,k)=state_yvel(1) |
115: ENDDO |
116: ENDDO |
117: !$OMP END DO |
118: |
119: DO state=2,number_of_states |
120: |
121: ! Could the velocity setting be thread unsafe? |
122: x_cent=state_xmin(state) |
123: y_cent=state_ymin(state) |
124: |
125: !$OMP DO PRIVATE(radius,jt,kt) |
126: DO k=y_min-2,y_max+2 |
127: !$OMP SIMD |
128: DO j=x_min-2,x_max+2 |
129: IF(state_geometry(state).EQ.g_rect ) THEN |
130: IF(vertexx(j+1).GE.state_xmin(state).AND.vertexx(j).LT.state_xmax(state)) THEN |
131: IF(vertexy(k+1).GE.state_ymin(state).AND.vertexy(k).LT.state_ymax(state)) THEN |
132: energy0(j,k)=state_energy(state) |
133: density0(j,k)=state_density(state) |
134: DO kt=k,k+1 |
135: DO jt=j,j+1 |
136: xvel0(jt,kt)=state_xvel(state) |
137: yvel0(jt,kt)=state_yvel(state) |
138: ENDDO |
139: ENDDO |
140: ENDIF |
141: ENDIF |
142: ELSEIF(state_geometry(state).EQ.g_circ ) THEN |
143: radius=SQRT((cellx(j)-x_cent)*(cellx(j)-x_cent)+(celly(k)-y_cent)*(celly(k)-y_cent)) |
144: IF(radius.LE.state_radius(state))THEN |
145: energy0(j,k)=state_energy(state) |
146: density0(j,k)=state_density(state) |
147: DO kt=k,k+1 |
148: DO jt=j,j+1 |
149: xvel0(jt,kt)=state_xvel(state) |
150: yvel0(jt,kt)=state_yvel(state) |
151: ENDDO |
152: ENDDO |
153: ENDIF |
154: ELSEIF(state_geometry(state).EQ.g_point) THEN |
155: IF(vertexx(j).EQ.x_cent .AND. vertexy(k).EQ.y_cent) THEN |
156: energy0(j,k)=state_energy(state) |
157: density0(j,k)=state_density(state) |
158: DO kt=k,k+1 |
159: DO jt=j,j+1 |
160: xvel0(jt,kt)=state_xvel(state) |
161: yvel0(jt,kt)=state_yvel(state) |
0x42efd0 PUSH %RBP |
0x42efd1 MOV %RSP,%RBP |
0x42efd4 PUSH %R15 |
0x42efd6 PUSH %R14 |
0x42efd8 PUSH %R13 |
0x42efda PUSH %R12 |
0x42efdc MOV %RDI,%R12 |
0x42efdf PUSH %RBX |
0x42efe0 AND $-0x20,%RSP |
0x42efe4 SUB $0x180,%RSP |
0x42efeb MOV 0x128(%RDI),%RAX |
0x42eff2 MOV 0x120(%RDI),%RDX |
0x42eff9 MOV 0x118(%RDI),%RCX |
0x42f000 MOV 0x108(%RDI),%RSI |
0x42f007 MOV 0x100(%RDI),%R8 |
0x42f00e MOV 0xf8(%RDI),%R9 |
0x42f015 MOV %RAX,0x48(%RSP) |
0x42f01a MOV 0xf0(%RDI),%R10 |
0x42f021 MOV 0xe8(%RDI),%R11 |
0x42f028 MOV %RDX,0x140(%RSP) |
0x42f030 MOV 0xe0(%RDI),%R13 |
0x42f037 MOV 0xd0(%RDI),%RDX |
0x42f03e MOV %RCX,0x40(%RSP) |
0x42f043 MOV 0xd8(%RDI),%RAX |
0x42f04a MOV 0x110(%RDI),%RBX |
0x42f051 MOV %RSI,0x38(%RSP) |
0x42f056 MOV 0x10(%RDI),%RDI |
0x42f05a MOV %RDX,0x20(%RSP) |
0x42f05f MOV %R8,0x118(%RSP) |
0x42f067 MOV %R9,0x30(%RSP) |
0x42f06c MOV %R10,0xf8(%RSP) |
0x42f074 MOV %R11,0x120(%RSP) |
0x42f07c MOV %R13,0x100(%RSP) |
0x42f084 MOV %RAX,0x110(%RSP) |
0x42f08c MOV %RBX,0x138(%RSP) |
0x42f094 MOV (%RDI),%EBX |
0x42f096 CALL 402080 <@plt_start@+0x60> |
0x42f09b MOV %EAX,%R13D |
0x42f09e MOV %EAX,0xc8(%RSP) |
0x42f0a5 SUB $0x2,%EBX |
0x42f0a8 CALL 402180 <@plt_start@+0x160> |
0x42f0ad MOV 0x18(%R12),%RSI |
0x42f0b2 MOV %EAX,0xdc(%RSP) |
0x42f0b9 MOV %EAX,%ECX |
0x42f0bb MOV (%RSI),%EAX |
0x42f0bd ADD $0x3,%EAX |
0x42f0c0 SUB %EBX,%EAX |
0x42f0c2 CLTD |
0x42f0c3 IDIV %R13D |
0x42f0c6 CMP %EDX,%ECX |
0x42f0c8 JL 4305bd |
0x42f0ce MOV 0xdc(%RSP),%R8D |
0x42f0d6 IMUL %EAX,%R8D |
0x42f0da ADD %EDX,%R8D |
0x42f0dd ADD %R8D,%EAX |
0x42f0e0 CMP %EAX,%R8D |
0x42f0e3 JGE 42f3be |
0x42f0e9 ADD %EBX,%EAX |
0x42f0eb ADD %EBX,%R8D |
0x42f0ee MOV 0xf8(%RSP),%RBX |
0x42f0f6 MOV (%R12),%R9 |
0x42f0fa MOV 0x8(%R12),%R11 |
0x42f0ff MOV 0x48(%R12),%RSI |
0x42f104 MOV %EAX,0x170(%RSP) |
0x42f10b LEA (,%RBX,8),%RCX |
0x42f113 MOVSXD (%R9),%R10 |
0x42f116 MOV 0x70(%R12),%RDX |
0x42f11b MOV %R12,0xd0(%RSP) |
0x42f123 MOV %RCX,0x160(%RSP) |
0x42f12b MOVSXD %R8D,%RCX |
0x42f12e MOV (%R11),%EDI |
0x42f131 IMUL %RBX,%RCX |
0x42f135 MOV 0x30(%RSP),%RBX |
0x42f13a MOV %R10,%RAX |
0x42f13d LEA -0x2(%R10),%R13D |
0x42f141 LEA 0x3(%RDI),%R11D |
0x42f145 SUB %EAX,%EDI |
0x42f147 MOV %R10,0xe8(%RSP) |
0x42f14f LEA (%R10,%RBX,1),%R9 |
0x42f153 LEA 0x5(%RDI),%EAX |
0x42f156 MOV %EDI,0x148(%RSP) |
0x42f15d ADD %RCX,%R9 |
0x42f160 ADD %RBX,%RCX |
0x42f163 MOV %EAX,%EBX |
0x42f165 MOV %R13D,0x178(%RSP) |
0x42f16d LEA -0x10(%RSI,%R9,8),%R10 |
0x42f172 MOV %EDI,%R9D |
0x42f175 MOV %EAX,%EDI |
0x42f177 SHR $0x2,%EBX |
0x42f17a AND $-0x4,%EDI |
0x42f17d SAL $0x5,%RBX |
0x42f181 MOV 0xe8(%RSP),%R12 |
0x42f189 MOV %R14D,0xe0(%RSP) |
0x42f191 MOV %EDI,0x134(%RSP) |
0x42f198 ADD %R13D,%EDI |
0x42f19b CMP %R11D,%R13D |
0x42f19e MOV %EDI,0x128(%RSP) |
0x42f1a5 LEA 0x5(%R13,%R9,1),%EDI |
0x42f1aa LEA 0x4(%R9),%R9D |
0x42f1ae CMOVGE %R13D,%EDI |
0x42f1b2 MOV %R9D,0x158(%RSP) |
0x42f1ba AND $0x3,%EAX |
0x42f1bd XOR %R13D,%R13D |
0x42f1c0 MOV %EAX,0x150(%RSP) |
0x42f1c7 MOV %R13D,%R14D |
0x42f1ca MOV $0x1,%EAX |
0x42f1cf MOV %EDI,0x168(%RSP) |
0x42f1d6 KMOVB %EAX,%K1 |
0x42f1da NOPW (%RAX,%RAX,1) |
(234) 0x42f1e0 CMP %R11D,0x178(%RSP) |
(234) 0x42f1e8 JGE 42f35a |
(234) 0x42f1ee CMPL $0x2,0x158(%RSP) |
(234) 0x42f1f6 JBE 4305a6 |
(234) 0x42f1fc LEA -0x20(%RBX),%R9 |
(234) 0x42f200 LEA (%RBX,%R10,1),%R13 |
(234) 0x42f204 MOV %R10,%RAX |
(234) 0x42f207 SHR $0x5,%R9 |
(234) 0x42f20b INC %R9 |
(234) 0x42f20e AND $0x7,%R9D |
(234) 0x42f212 JE 42f299 |
(234) 0x42f218 CMP $0x1,%R9 |
(234) 0x42f21c JE 42f286 |
(234) 0x42f21e CMP $0x2,%R9 |
(234) 0x42f222 JE 42f278 |
(234) 0x42f224 CMP $0x3,%R9 |
(234) 0x42f228 JE 42f26a |
(234) 0x42f22a CMP $0x4,%R9 |
(234) 0x42f22e JE 42f25c |
(234) 0x42f230 CMP $0x5,%R9 |
(234) 0x42f234 JE 42f24e |
(234) 0x42f236 CMP $0x6,%R9 |
(234) 0x42f23a JNE 430569 |
(234) 0x42f240 VBROADCASTSD (%RDX),%YMM1 |
(234) 0x42f245 ADD $0x20,%RAX |
(234) 0x42f249 VMOVUPD %YMM1,-0x20(%RAX) |
(234) 0x42f24e VBROADCASTSD (%RDX),%YMM2 |
(234) 0x42f253 ADD $0x20,%RAX |
(234) 0x42f257 VMOVUPD %YMM2,-0x20(%RAX) |
(234) 0x42f25c VBROADCASTSD (%RDX),%YMM3 |
(234) 0x42f261 ADD $0x20,%RAX |
(234) 0x42f265 VMOVUPD %YMM3,-0x20(%RAX) |
(234) 0x42f26a VBROADCASTSD (%RDX),%YMM4 |
(234) 0x42f26f ADD $0x20,%RAX |
(234) 0x42f273 VMOVUPD %YMM4,-0x20(%RAX) |
(234) 0x42f278 VBROADCASTSD (%RDX),%YMM5 |
(234) 0x42f27d ADD $0x20,%RAX |
(234) 0x42f281 VMOVUPD %YMM5,-0x20(%RAX) |
(234) 0x42f286 VBROADCASTSD (%RDX),%YMM6 |
(234) 0x42f28b ADD $0x20,%RAX |
(234) 0x42f28f VMOVUPD %YMM6,-0x20(%RAX) |
(234) 0x42f294 CMP %R13,%RAX |
(234) 0x42f297 JE 42f300 |
(235) 0x42f299 VBROADCASTSD (%RDX),%YMM7 |
(235) 0x42f29e ADD $0x100,%RAX |
(235) 0x42f2a4 VMOVUPD %YMM7,-0x100(%RAX) |
(235) 0x42f2ac VBROADCASTSD (%RDX),%YMM8 |
(235) 0x42f2b1 VMOVUPD %YMM8,-0xe0(%RAX) |
(235) 0x42f2b9 VBROADCASTSD (%RDX),%YMM9 |
(235) 0x42f2be VMOVUPD %YMM9,-0xc0(%RAX) |
(235) 0x42f2c6 VBROADCASTSD (%RDX),%YMM10 |
(235) 0x42f2cb VMOVUPD %YMM10,-0xa0(%RAX) |
(235) 0x42f2d3 VBROADCASTSD (%RDX),%YMM11 |
(235) 0x42f2d8 VMOVUPD %YMM11,-0x80(%RAX) |
(235) 0x42f2dd VBROADCASTSD (%RDX),%YMM12 |
(235) 0x42f2e2 VMOVUPD %YMM12,-0x60(%RAX) |
(235) 0x42f2e7 VBROADCASTSD (%RDX),%YMM13 |
(235) 0x42f2ec VMOVUPD %YMM13,-0x40(%RAX) |
(235) 0x42f2f1 VBROADCASTSD (%RDX),%YMM14 |
(235) 0x42f2f6 VMOVUPD %YMM14,-0x20(%RAX) |
(235) 0x42f2fb CMP %R13,%RAX |
(235) 0x42f2fe JNE 42f299 |
(234) 0x42f300 MOV 0x150(%RSP),%EDI |
(234) 0x42f307 TEST %EDI,%EDI |
(234) 0x42f309 JE 42f35a |
(234) 0x42f30b MOV 0x134(%RSP),%EDI |
(234) 0x42f312 MOV 0x128(%RSP),%EAX |
(234) 0x42f319 MOV 0x148(%RSP),%R13D |
(234) 0x42f321 SUB %EDI,%R13D |
(234) 0x42f324 LEA 0x5(%R13),%R9D |
(234) 0x42f328 CMP $-0x4,%R13D |
(234) 0x42f32c JE 42f34c |
(234) 0x42f32e LEA (%R12,%RCX,1),%R13 |
(234) 0x42f332 VMOVDDUP (%RDX),%XMM15 |
(234) 0x42f336 ADD %R13,%RDI |
(234) 0x42f339 VMOVUPD %XMM15,-0x10(%RSI,%RDI,8) |
(234) 0x42f33f TEST $0x1,%R9B |
(234) 0x42f343 JE 42f35a |
(234) 0x42f345 AND $-0x2,%R9D |
(234) 0x42f349 ADD %R9D,%EAX |
(234) 0x42f34c VMOVSD (%RDX),%XMM0 |
(234) 0x42f350 CLTQ |
(234) 0x42f352 ADD %RCX,%RAX |
(234) 0x42f355 VMOVSD %XMM0,(%RSI,%RAX,8) |
(234) 0x42f35a MOV 0x168(%RSP),%EAX |
(234) 0x42f361 MOV 0x160(%RSP),%R9 |
(234) 0x42f369 KMOVB %K1,%EDI |
(234) 0x42f36d MOV 0xf8(%RSP),%R13 |
(234) 0x42f375 CMP %EAX,%R11D |
(234) 0x42f378 CMOVE %R11D,%R15D |
(234) 0x42f37c CMOVE %EDI,%R14D |
(234) 0x42f380 INC %R8D |
(234) 0x42f383 ADD %R9,%R10 |
(234) 0x42f386 ADD %R13,%RCX |
(234) 0x42f389 CMP %R8D,0x170(%RSP) |
(234) 0x42f391 JG 42f1e0 |
0x42f397 MOV %R14D,%R8D |
0x42f39a MOV 0xd0(%RSP),%R12 |
0x42f3a2 MOV 0xe0(%RSP),%R14D |
0x42f3aa TEST %R8B,%R8B |
0x42f3ad JE 4305e8 |
0x42f3b3 MOV %R15D,0x140(%R12) |
0x42f3bb VZEROUPPER |
0x42f3be CALL 402220 <@plt_start@+0x200> |
0x42f3c3 MOV 0x18(%R12),%RDX |
0x42f3c8 MOV 0x10(%R12),%R15 |
0x42f3cd MOV (%RDX),%EAX |
0x42f3cf MOV (%R15),%R11D |
0x42f3d2 ADD $0x3,%EAX |
0x42f3d5 SUB $0x2,%R11D |
0x42f3d9 SUB %R11D,%EAX |
0x42f3dc CLTD |
0x42f3dd IDIVL 0xc8(%RSP) |
0x42f3e4 CMP %EDX,0xdc(%RSP) |
0x42f3eb JL 4305c6 |
0x42f3f1 MOV 0xdc(%RSP),%R8D |
0x42f3f9 IMUL %EAX,%R8D |
0x42f3fd ADD %EDX,%R8D |
0x42f400 ADD %R8D,%EAX |
0x42f403 CMP %EAX,%R8D |
0x42f406 JGE 42f6f6 |
0x42f40c MOV (%R12),%RSI |
0x42f410 MOV 0x8(%R12),%RCX |
0x42f415 ADD %R11D,%R8D |
0x42f418 ADD %R11D,%EAX |
0x42f41b MOV 0x100(%RSP),%R10 |
0x42f423 MOV 0x68(%R12),%RDX |
0x42f428 MOV %EAX,0x170(%RSP) |
0x42f42f MOVSXD (%RSI),%R9 |
0x42f432 MOV (%RCX),%EDI |
0x42f434 MOVSXD %R8D,%RCX |
0x42f437 MOV %R12,0xd0(%RSP) |
0x42f43f IMUL %R10,%RCX |
0x42f443 MOV 0x120(%RSP),%RAX |
0x42f44b MOV 0x40(%R12),%RSI |
0x42f450 LEA (,%R10,8),%R13 |
0x42f458 MOV %R9,%R15 |
0x42f45b LEA -0x2(%R9),%EBX |
0x42f45f MOV %R9,0xe8(%RSP) |
0x42f467 LEA 0x3(%RDI),%R11D |
0x42f46b LEA (%R9,%RAX,1),%R9 |
0x42f46f SUB %R15D,%EDI |
0x42f472 MOV %R13,0x160(%RSP) |
0x42f47a ADD %RCX,%R9 |
0x42f47d ADD %RAX,%RCX |
0x42f480 LEA 0x5(%RDI),%EAX |
0x42f483 MOV %EDI,0x148(%RSP) |
0x42f48a MOV %EAX,%R13D |
0x42f48d LEA -0x10(%RSI,%R9,8),%R10 |
0x42f492 MOV %EDI,%R9D |
0x42f495 MOV %EAX,%EDI |
0x42f497 AND $-0x4,%EDI |
0x42f49a SHR $0x2,%R13D |
0x42f49e LEA 0x5(%RBX,%R9,1),%R15D |
0x42f4a3 MOV %EBX,0x178(%RSP) |
0x42f4aa MOV %EDI,0x134(%RSP) |
0x42f4b1 SAL $0x5,%R13 |
0x42f4b5 ADD %EBX,%EDI |
0x42f4b7 CMP %R11D,%EBX |
0x42f4ba CMOVGE %EBX,%R15D |
0x42f4be AND $0x3,%EAX |
0x42f4c1 LEA 0x4(%R9),%EBX |
0x42f4c5 MOV %EDI,0x128(%RSP) |
0x42f4cc MOV %EAX,0x150(%RSP) |
0x42f4d3 XOR %EDI,%EDI |
0x42f4d5 MOV 0xe8(%RSP),%R12 |
0x42f4dd MOV $0x1,%R9D |
0x42f4e3 MOV %R15D,0x168(%RSP) |
0x42f4eb KMOVB %R9D,%K0 |
0x42f4f0 MOV %EBX,0x158(%RSP) |
0x42f4f7 MOV 0x108(%RSP),%EBX |
0x42f4fe MOV %R14D,0xe0(%RSP) |
0x42f506 MOV %EDI,%R14D |
0x42f509 NOPL (%RAX) |
(232) 0x42f510 CMP %R11D,0x178(%RSP) |
(232) 0x42f518 JGE 42f68b |
(232) 0x42f51e CMPL $0x2,0x158(%RSP) |
(232) 0x42f526 JBE 43057c |
(232) 0x42f52c LEA -0x20(%R13),%R9 |
(232) 0x42f530 LEA (%R13,%R10,1),%R15 |
(232) 0x42f535 MOV %R10,%RAX |
(232) 0x42f538 SHR $0x5,%R9 |
(232) 0x42f53c INC %R9 |
(232) 0x42f53f AND $0x7,%R9D |
(232) 0x42f543 JE 42f5ca |
(232) 0x42f549 CMP $0x1,%R9 |
(232) 0x42f54d JE 42f5b7 |
(232) 0x42f54f CMP $0x2,%R9 |
(232) 0x42f553 JE 42f5a9 |
(232) 0x42f555 CMP $0x3,%R9 |
(232) 0x42f559 JE 42f59b |
(232) 0x42f55b CMP $0x4,%R9 |
(232) 0x42f55f JE 42f58d |
(232) 0x42f561 CMP $0x5,%R9 |
(232) 0x42f565 JE 42f57f |
(232) 0x42f567 CMP $0x6,%R9 |
(232) 0x42f56b JNE 430556 |
(232) 0x42f571 VBROADCASTSD (%RDX),%YMM2 |
(232) 0x42f576 ADD $0x20,%RAX |
(232) 0x42f57a VMOVUPD %YMM2,-0x20(%RAX) |
(232) 0x42f57f VBROADCASTSD (%RDX),%YMM3 |
(232) 0x42f584 ADD $0x20,%RAX |
(232) 0x42f588 VMOVUPD %YMM3,-0x20(%RAX) |
(232) 0x42f58d VBROADCASTSD (%RDX),%YMM4 |
(232) 0x42f592 ADD $0x20,%RAX |
(232) 0x42f596 VMOVUPD %YMM4,-0x20(%RAX) |
(232) 0x42f59b VBROADCASTSD (%RDX),%YMM5 |
(232) 0x42f5a0 ADD $0x20,%RAX |
(232) 0x42f5a4 VMOVUPD %YMM5,-0x20(%RAX) |
(232) 0x42f5a9 VBROADCASTSD (%RDX),%YMM6 |
(232) 0x42f5ae ADD $0x20,%RAX |
(232) 0x42f5b2 VMOVUPD %YMM6,-0x20(%RAX) |
(232) 0x42f5b7 VBROADCASTSD (%RDX),%YMM7 |
(232) 0x42f5bc ADD $0x20,%RAX |
(232) 0x42f5c0 VMOVUPD %YMM7,-0x20(%RAX) |
(232) 0x42f5c5 CMP %R15,%RAX |
(232) 0x42f5c8 JE 42f631 |
(233) 0x42f5ca VBROADCASTSD (%RDX),%YMM8 |
(233) 0x42f5cf ADD $0x100,%RAX |
(233) 0x42f5d5 VMOVUPD %YMM8,-0x100(%RAX) |
(233) 0x42f5dd VBROADCASTSD (%RDX),%YMM9 |
(233) 0x42f5e2 VMOVUPD %YMM9,-0xe0(%RAX) |
(233) 0x42f5ea VBROADCASTSD (%RDX),%YMM10 |
(233) 0x42f5ef VMOVUPD %YMM10,-0xc0(%RAX) |
(233) 0x42f5f7 VBROADCASTSD (%RDX),%YMM11 |
(233) 0x42f5fc VMOVUPD %YMM11,-0xa0(%RAX) |
(233) 0x42f604 VBROADCASTSD (%RDX),%YMM12 |
(233) 0x42f609 VMOVUPD %YMM12,-0x80(%RAX) |
(233) 0x42f60e VBROADCASTSD (%RDX),%YMM13 |
(233) 0x42f613 VMOVUPD %YMM13,-0x60(%RAX) |
(233) 0x42f618 VBROADCASTSD (%RDX),%YMM14 |
(233) 0x42f61d VMOVUPD %YMM14,-0x40(%RAX) |
(233) 0x42f622 VBROADCASTSD (%RDX),%YMM15 |
(233) 0x42f627 VMOVUPD %YMM15,-0x20(%RAX) |
(233) 0x42f62c CMP %R15,%RAX |
(233) 0x42f62f JNE 42f5ca |
(232) 0x42f631 MOV 0x150(%RSP),%EDI |
(232) 0x42f638 TEST %EDI,%EDI |
(232) 0x42f63a JE 42f68b |
(232) 0x42f63c MOV 0x134(%RSP),%EDI |
(232) 0x42f643 MOV 0x128(%RSP),%EAX |
(232) 0x42f64a MOV 0x148(%RSP),%R15D |
(232) 0x42f652 SUB %EDI,%R15D |
(232) 0x42f655 LEA 0x5(%R15),%R9D |
(232) 0x42f659 CMP $-0x4,%R15D |
(232) 0x42f65d JE 42f67d |
(232) 0x42f65f LEA (%R12,%RCX,1),%R15 |
(232) 0x42f663 VMOVDDUP (%RDX),%XMM0 |
(232) 0x42f667 ADD %R15,%RDI |
(232) 0x42f66a VMOVUPD %XMM0,-0x10(%RSI,%RDI,8) |
(232) 0x42f670 TEST $0x1,%R9B |
(232) 0x42f674 JE 42f68b |
(232) 0x42f676 AND $-0x2,%R9D |
(232) 0x42f67a ADD %R9D,%EAX |
(232) 0x42f67d VMOVSD (%RDX),%XMM1 |
(232) 0x42f681 CLTQ |
(232) 0x42f683 ADD %RCX,%RAX |
(232) 0x42f686 VMOVSD %XMM1,(%RSI,%RAX,8) |
(232) 0x42f68b MOV 0x168(%RSP),%EAX |
(232) 0x42f692 MOV 0x160(%RSP),%R9 |
(232) 0x42f69a KMOVB %K0,%EDI |
(232) 0x42f69e MOV 0x100(%RSP),%R15 |
(232) 0x42f6a6 CMP %EAX,%R11D |
(232) 0x42f6a9 CMOVE %R11D,%EBX |
(232) 0x42f6ad CMOVE %EDI,%R14D |
(232) 0x42f6b1 INC %R8D |
(232) 0x42f6b4 ADD %R9,%R10 |
(232) 0x42f6b7 ADD %R15,%RCX |
(232) 0x42f6ba CMP %R8D,0x170(%RSP) |
(232) 0x42f6c2 JG 42f510 |
0x42f6c8 MOV %R14D,%R8D |
0x42f6cb MOV 0xd0(%RSP),%R12 |
0x42f6d3 MOV 0xe0(%RSP),%R14D |
0x42f6db MOV %EBX,0x108(%RSP) |
0x42f6e2 TEST %R8B,%R8B |
0x42f6e5 JE 4305f0 |
0x42f6eb MOV %EBX,0x140(%R12) |
0x42f6f3 VZEROUPPER |
0x42f6f6 CALL 402220 <@plt_start@+0x200> |
0x42f6fb MOV 0x18(%R12),%RDX |
0x42f700 MOV 0x10(%R12),%R11 |
0x42f705 MOV (%RDX),%EAX |
0x42f707 MOV (%R11),%ESI |
0x42f70a ADD $0x3,%EAX |
0x42f70d SUB $0x2,%ESI |
0x42f710 SUB %ESI,%EAX |
0x42f712 CLTD |
0x42f713 IDIVL 0xc8(%RSP) |
0x42f71a CMP %EDX,0xdc(%RSP) |
0x42f721 JL 4305b4 |
0x42f727 MOV 0xdc(%RSP),%R8D |
0x42f72f IMUL %EAX,%R8D |
0x42f733 ADD %EDX,%R8D |
0x42f736 ADD %R8D,%EAX |
0x42f739 CMP %EAX,%R8D |
0x42f73c JGE 42fa26 |
0x42f742 MOV (%R12),%RCX |
0x42f746 MOV 0x8(%R12),%R10 |
0x42f74b ADD %ESI,%R8D |
0x42f74e ADD %ESI,%EAX |
0x42f750 MOV 0x138(%RSP),%R13 |
0x42f758 MOV 0x50(%R12),%RSI |
0x42f75d MOV %EAX,0x170(%RSP) |
0x42f764 MOVSXD (%RCX),%R9 |
0x42f767 MOVSXD %R8D,%RCX |
0x42f76a MOV (%R10),%EDI |
0x42f76d MOV %R12,0xe0(%RSP) |
0x42f775 IMUL %R13,%RCX |
0x42f779 LEA (,%R13,8),%RAX |
0x42f781 MOV 0x40(%RSP),%R13 |
0x42f786 MOV 0x78(%R12),%RDX |
0x42f78b MOV %R9,%R15 |
0x42f78e LEA -0x2(%R9),%EBX |
0x42f792 MOV %R9,0x108(%RSP) |
0x42f79a LEA 0x3(%RDI),%R11D |
0x42f79e LEA (%R9,%R13,1),%R9 |
0x42f7a2 SUB %R15D,%EDI |
0x42f7a5 MOV %RAX,0x160(%RSP) |
0x42f7ad ADD %RCX,%R9 |
0x42f7b0 LEA 0x5(%RDI),%EAX |
0x42f7b3 ADD %R13,%RCX |
0x42f7b6 MOV %EDI,0x148(%RSP) |
0x42f7bd MOV %EAX,%R13D |
0x42f7c0 LEA -0x10(%RSI,%R9,8),%R10 |
0x42f7c5 MOV %EDI,%R9D |
0x42f7c8 MOV %EAX,%EDI |
0x42f7ca AND $-0x4,%EDI |
0x42f7cd SHR $0x2,%R13D |
0x42f7d1 LEA 0x5(%RBX,%R9,1),%R15D |
0x42f7d6 MOV %EBX,0x178(%RSP) |
0x42f7dd MOV %EDI,0x134(%RSP) |
0x42f7e4 SAL $0x5,%R13 |
0x42f7e8 ADD %EBX,%EDI |
0x42f7ea CMP %R11D,%EBX |
0x42f7ed CMOVGE %EBX,%R15D |
0x42f7f1 AND $0x3,%EAX |
0x42f7f4 LEA 0x4(%R9),%EBX |
0x42f7f8 MOV %EDI,0x128(%RSP) |
0x42f7ff MOV %EAX,0x150(%RSP) |
0x42f806 XOR %EDI,%EDI |
0x42f808 MOV 0x108(%RSP),%R12 |
0x42f810 MOV $0x1,%R9D |
0x42f816 MOV %R15D,0x168(%RSP) |
0x42f81e KMOVB %R9D,%K2 |
0x42f823 MOV %EBX,0x158(%RSP) |
0x42f82a MOV 0xf0(%RSP),%EBX |
0x42f831 MOV %R14D,0xe8(%RSP) |
0x42f839 MOV %EDI,%R14D |
0x42f83c NOPL (%RAX) |
(230) 0x42f840 CMP %R11D,0x178(%RSP) |
(230) 0x42f848 JGE 42f9bb |
(230) 0x42f84e CMPL $0x2,0x158(%RSP) |
(230) 0x42f856 JBE 430598 |
(230) 0x42f85c LEA -0x20(%R13),%R9 |
(230) 0x42f860 LEA (%R13,%R10,1),%R15 |
(230) 0x42f865 MOV %R10,%RAX |
(230) 0x42f868 SHR $0x5,%R9 |
(230) 0x42f86c INC %R9 |
(230) 0x42f86f AND $0x7,%R9D |
(230) 0x42f873 JE 42f8fa |
(230) 0x42f879 CMP $0x1,%R9 |
(230) 0x42f87d JE 42f8e7 |
(230) 0x42f87f CMP $0x2,%R9 |
(230) 0x42f883 JE 42f8d9 |
(230) 0x42f885 CMP $0x3,%R9 |
(230) 0x42f889 JE 42f8cb |
(230) 0x42f88b CMP $0x4,%R9 |
(230) 0x42f88f JE 42f8bd |
(230) 0x42f891 CMP $0x5,%R9 |
(230) 0x42f895 JE 42f8af |
(230) 0x42f897 CMP $0x6,%R9 |
(230) 0x42f89b JNE 430543 |
(230) 0x42f8a1 VBROADCASTSD (%RDX),%YMM3 |
(230) 0x42f8a6 ADD $0x20,%RAX |
(230) 0x42f8aa VMOVUPD %YMM3,-0x20(%RAX) |
(230) 0x42f8af VBROADCASTSD (%RDX),%YMM4 |
(230) 0x42f8b4 ADD $0x20,%RAX |
(230) 0x42f8b8 VMOVUPD %YMM4,-0x20(%RAX) |
(230) 0x42f8bd VBROADCASTSD (%RDX),%YMM5 |
(230) 0x42f8c2 ADD $0x20,%RAX |
(230) 0x42f8c6 VMOVUPD %YMM5,-0x20(%RAX) |
(230) 0x42f8cb VBROADCASTSD (%RDX),%YMM6 |
(230) 0x42f8d0 ADD $0x20,%RAX |
(230) 0x42f8d4 VMOVUPD %YMM6,-0x20(%RAX) |
(230) 0x42f8d9 VBROADCASTSD (%RDX),%YMM7 |
(230) 0x42f8de ADD $0x20,%RAX |
(230) 0x42f8e2 VMOVUPD %YMM7,-0x20(%RAX) |
(230) 0x42f8e7 VBROADCASTSD (%RDX),%YMM8 |
(230) 0x42f8ec ADD $0x20,%RAX |
(230) 0x42f8f0 VMOVUPD %YMM8,-0x20(%RAX) |
(230) 0x42f8f5 CMP %R15,%RAX |
(230) 0x42f8f8 JE 42f961 |
(231) 0x42f8fa VBROADCASTSD (%RDX),%YMM9 |
(231) 0x42f8ff ADD $0x100,%RAX |
(231) 0x42f905 VMOVUPD %YMM9,-0x100(%RAX) |
(231) 0x42f90d VBROADCASTSD (%RDX),%YMM10 |
(231) 0x42f912 VMOVUPD %YMM10,-0xe0(%RAX) |
(231) 0x42f91a VBROADCASTSD (%RDX),%YMM11 |
(231) 0x42f91f VMOVUPD %YMM11,-0xc0(%RAX) |
(231) 0x42f927 VBROADCASTSD (%RDX),%YMM12 |
(231) 0x42f92c VMOVUPD %YMM12,-0xa0(%RAX) |
(231) 0x42f934 VBROADCASTSD (%RDX),%YMM13 |
(231) 0x42f939 VMOVUPD %YMM13,-0x80(%RAX) |
(231) 0x42f93e VBROADCASTSD (%RDX),%YMM14 |
(231) 0x42f943 VMOVUPD %YMM14,-0x60(%RAX) |
(231) 0x42f948 VBROADCASTSD (%RDX),%YMM15 |
(231) 0x42f94d VMOVUPD %YMM15,-0x40(%RAX) |
(231) 0x42f952 VBROADCASTSD (%RDX),%YMM0 |
(231) 0x42f957 VMOVUPD %YMM0,-0x20(%RAX) |
(231) 0x42f95c CMP %R15,%RAX |
(231) 0x42f95f JNE 42f8fa |
(230) 0x42f961 MOV 0x150(%RSP),%EDI |
(230) 0x42f968 TEST %EDI,%EDI |
(230) 0x42f96a JE 42f9bb |
(230) 0x42f96c MOV 0x134(%RSP),%EDI |
(230) 0x42f973 MOV 0x128(%RSP),%EAX |
(230) 0x42f97a MOV 0x148(%RSP),%R15D |
(230) 0x42f982 SUB %EDI,%R15D |
(230) 0x42f985 LEA 0x5(%R15),%R9D |
(230) 0x42f989 CMP $-0x4,%R15D |
(230) 0x42f98d JE 42f9ad |
(230) 0x42f98f LEA (%R12,%RCX,1),%R15 |
(230) 0x42f993 VMOVDDUP (%RDX),%XMM1 |
(230) 0x42f997 ADD %R15,%RDI |
(230) 0x42f99a VMOVUPD %XMM1,-0x10(%RSI,%RDI,8) |
(230) 0x42f9a0 TEST $0x1,%R9B |
(230) 0x42f9a4 JE 42f9bb |
(230) 0x42f9a6 AND $-0x2,%R9D |
(230) 0x42f9aa ADD %R9D,%EAX |
(230) 0x42f9ad VMOVSD (%RDX),%XMM2 |
(230) 0x42f9b1 CLTQ |
(230) 0x42f9b3 ADD %RCX,%RAX |
(230) 0x42f9b6 VMOVSD %XMM2,(%RSI,%RAX,8) |
(230) 0x42f9bb MOV 0x168(%RSP),%EAX |
(230) 0x42f9c2 MOV 0x160(%RSP),%R9 |
(230) 0x42f9ca KMOVB %K2,%EDI |
(230) 0x42f9ce MOV 0x138(%RSP),%R15 |
(230) 0x42f9d6 CMP %EAX,%R11D |
(230) 0x42f9d9 CMOVE %R11D,%EBX |
(230) 0x42f9dd CMOVE %EDI,%R14D |
(230) 0x42f9e1 INC %R8D |
(230) 0x42f9e4 ADD %R9,%R10 |
(230) 0x42f9e7 ADD %R15,%RCX |
(230) 0x42f9ea CMP %R8D,0x170(%RSP) |
(230) 0x42f9f2 JG 42f840 |
0x42f9f8 MOV %R14D,%R8D |
0x42f9fb MOV 0xe0(%RSP),%R12 |
0x42fa03 MOV 0xe8(%RSP),%R14D |
0x42fa0b MOV %EBX,0xf0(%RSP) |
0x42fa12 TEST %R8B,%R8B |
0x42fa15 JE 4305e0 |
0x42fa1b MOV %EBX,0x140(%R12) |
0x42fa23 VZEROUPPER |
0x42fa26 CALL 402220 <@plt_start@+0x200> |
0x42fa2b MOV 0x18(%R12),%RDX |
0x42fa30 MOV 0x10(%R12),%R11 |
0x42fa35 MOV (%RDX),%EAX |
0x42fa37 MOV (%R11),%ESI |
0x42fa3a ADD $0x3,%EAX |
0x42fa3d SUB $0x2,%ESI |
0x42fa40 SUB %ESI,%EAX |
0x42fa42 CLTD |
0x42fa43 IDIVL 0xc8(%RSP) |
0x42fa4a CMP %EDX,0xdc(%RSP) |
0x42fa51 JL 4305cf |
0x42fa57 MOV 0xdc(%RSP),%R8D |
0x42fa5f IMUL %EAX,%R8D |
0x42fa63 ADD %EDX,%R8D |
0x42fa66 ADD %R8D,%EAX |
0x42fa69 CMP %EAX,%R8D |
0x42fa6c JGE 42fd2f |
0x42fa72 MOV (%R12),%RCX |
0x42fa76 MOV 0x8(%R12),%R13 |
0x42fa7b ADD %ESI,%EAX |
0x42fa7d ADD %ESI,%R8D |
0x42fa80 MOV 0x140(%RSP),%R9 |
0x42fa88 MOV 0x58(%R12),%RSI |
0x42fa8d MOV %EAX,0x170(%RSP) |
0x42fa94 MOVSXD (%RCX),%R10 |
0x42fa97 MOV (%R13),%EDI |
0x42fa9b MOVSXD %R8D,%RCX |
0x42fa9e MOV %R12,0x108(%RSP) |
0x42faa6 IMUL %R9,%RCX |
0x42faaa MOV 0x48(%RSP),%R13 |
0x42faaf LEA (,%R9,8),%RBX |
0x42fab7 MOV 0x80(%R12),%RDX |
0x42fabf MOV %R10,%RAX |
0x42fac2 LEA 0x3(%RDI),%R11D |
0x42fac6 LEA -0x2(%R10),%R15D |
0x42faca MOV %RBX,0x160(%RSP) |
0x42fad2 SUB %EAX,%EDI |
0x42fad4 MOV %R10,%RBX |
0x42fad7 LEA (%R10,%R13,1),%R10 |
0x42fadb MOV %R15D,0x178(%RSP) |
0x42fae3 LEA 0x5(%RDI),%EAX |
0x42fae6 MOV %EDI,%R9D |
0x42fae9 MOV %EDI,0x148(%RSP) |
0x42faf0 ADD %RCX,%R10 |
0x42faf3 MOV %EAX,%EDI |
0x42faf5 ADD %R13,%RCX |
0x42faf8 LEA -0x10(%RSI,%R10,8),%R10 |
0x42fafd MOV %EAX,%R13D |
0x42fb00 AND $-0x4,%EDI |
0x42fb03 SHR $0x2,%R13D |
0x42fb07 MOV %EDI,0x128(%RSP) |
0x42fb0e ADD %R15D,%EDI |
0x42fb11 SAL $0x5,%R13 |
0x42fb15 CMP %R11D,%R15D |
0x42fb18 MOV %EDI,0x134(%RSP) |
0x42fb1f LEA 0x5(%R15,%R9,1),%EDI |
0x42fb24 LEA 0x4(%R9),%R9D |
0x42fb28 CMOVGE %R15D,%EDI |
0x42fb2c MOV %R9D,0x158(%RSP) |
0x42fb34 AND $0x3,%EAX |
0x42fb37 XOR %R15D,%R15D |
0x42fb3a MOV %EAX,0x150(%RSP) |
0x42fb41 MOV %R15D,%R12D |
0x42fb44 MOV $0x1,%EAX |
0x42fb49 MOV %EDI,0x168(%RSP) |
0x42fb50 KMOVB %EAX,%K3 |
0x42fb54 NOPL (%RAX) |
(228) 0x42fb58 CMP %R11D,0x178(%RSP) |
(228) 0x42fb60 JGE 42fcd3 |
(228) 0x42fb66 CMPL $0x2,0x158(%RSP) |
(228) 0x42fb6e JBE 43058a |
(228) 0x42fb74 LEA -0x20(%R13),%R9 |
(228) 0x42fb78 LEA (%R13,%R10,1),%R15 |
(228) 0x42fb7d MOV %R10,%RAX |
(228) 0x42fb80 SHR $0x5,%R9 |
(228) 0x42fb84 INC %R9 |
(228) 0x42fb87 AND $0x7,%R9D |
(228) 0x42fb8b JE 42fc12 |
(228) 0x42fb91 CMP $0x1,%R9 |
(228) 0x42fb95 JE 42fbff |
(228) 0x42fb97 CMP $0x2,%R9 |
(228) 0x42fb9b JE 42fbf1 |
(228) 0x42fb9d CMP $0x3,%R9 |
(228) 0x42fba1 JE 42fbe3 |
(228) 0x42fba3 CMP $0x4,%R9 |
(228) 0x42fba7 JE 42fbd5 |
(228) 0x42fba9 CMP $0x5,%R9 |
(228) 0x42fbad JE 42fbc7 |
(228) 0x42fbaf CMP $0x6,%R9 |
(228) 0x42fbb3 JNE 430530 |
(228) 0x42fbb9 VBROADCASTSD (%RDX),%YMM4 |
(228) 0x42fbbe ADD $0x20,%RAX |
(228) 0x42fbc2 VMOVUPD %YMM4,-0x20(%RAX) |
(228) 0x42fbc7 VBROADCASTSD (%RDX),%YMM5 |
(228) 0x42fbcc ADD $0x20,%RAX |
(228) 0x42fbd0 VMOVUPD %YMM5,-0x20(%RAX) |
(228) 0x42fbd5 VBROADCASTSD (%RDX),%YMM6 |
(228) 0x42fbda ADD $0x20,%RAX |
(228) 0x42fbde VMOVUPD %YMM6,-0x20(%RAX) |
(228) 0x42fbe3 VBROADCASTSD (%RDX),%YMM7 |
(228) 0x42fbe8 ADD $0x20,%RAX |
(228) 0x42fbec VMOVUPD %YMM7,-0x20(%RAX) |
(228) 0x42fbf1 VBROADCASTSD (%RDX),%YMM8 |
(228) 0x42fbf6 ADD $0x20,%RAX |
(228) 0x42fbfa VMOVUPD %YMM8,-0x20(%RAX) |
(228) 0x42fbff VBROADCASTSD (%RDX),%YMM9 |
(228) 0x42fc04 ADD $0x20,%RAX |
(228) 0x42fc08 VMOVUPD %YMM9,-0x20(%RAX) |
(228) 0x42fc0d CMP %R15,%RAX |
(228) 0x42fc10 JE 42fc79 |
(229) 0x42fc12 VBROADCASTSD (%RDX),%YMM10 |
(229) 0x42fc17 ADD $0x100,%RAX |
(229) 0x42fc1d VMOVUPD %YMM10,-0x100(%RAX) |
(229) 0x42fc25 VBROADCASTSD (%RDX),%YMM11 |
(229) 0x42fc2a VMOVUPD %YMM11,-0xe0(%RAX) |
(229) 0x42fc32 VBROADCASTSD (%RDX),%YMM12 |
(229) 0x42fc37 VMOVUPD %YMM12,-0xc0(%RAX) |
(229) 0x42fc3f VBROADCASTSD (%RDX),%YMM13 |
(229) 0x42fc44 VMOVUPD %YMM13,-0xa0(%RAX) |
(229) 0x42fc4c VBROADCASTSD (%RDX),%YMM14 |
(229) 0x42fc51 VMOVUPD %YMM14,-0x80(%RAX) |
(229) 0x42fc56 VBROADCASTSD (%RDX),%YMM15 |
(229) 0x42fc5b VMOVUPD %YMM15,-0x60(%RAX) |
(229) 0x42fc60 VBROADCASTSD (%RDX),%YMM0 |
(229) 0x42fc65 VMOVUPD %YMM0,-0x40(%RAX) |
(229) 0x42fc6a VBROADCASTSD (%RDX),%YMM1 |
(229) 0x42fc6f VMOVUPD %YMM1,-0x20(%RAX) |
(229) 0x42fc74 CMP %R15,%RAX |
(229) 0x42fc77 JNE 42fc12 |
(228) 0x42fc79 MOV 0x150(%RSP),%EDI |
(228) 0x42fc80 TEST %EDI,%EDI |
(228) 0x42fc82 JE 42fcd3 |
(228) 0x42fc84 MOV 0x128(%RSP),%EDI |
(228) 0x42fc8b MOV 0x134(%RSP),%EAX |
(228) 0x42fc92 MOV 0x148(%RSP),%R15D |
(228) 0x42fc9a SUB %EDI,%R15D |
(228) 0x42fc9d LEA 0x5(%R15),%R9D |
(228) 0x42fca1 CMP $-0x4,%R15D |
(228) 0x42fca5 JE 42fcc5 |
(228) 0x42fca7 LEA (%RBX,%RCX,1),%R15 |
(228) 0x42fcab VMOVDDUP (%RDX),%XMM2 |
(228) 0x42fcaf ADD %R15,%RDI |
(228) 0x42fcb2 VMOVUPD %XMM2,-0x10(%RSI,%RDI,8) |
(228) 0x42fcb8 TEST $0x1,%R9B |
(228) 0x42fcbc JE 42fcd3 |
(228) 0x42fcbe AND $-0x2,%R9D |
(228) 0x42fcc2 ADD %R9D,%EAX |
(228) 0x42fcc5 VMOVSD (%RDX),%XMM3 |
(228) 0x42fcc9 CLTQ |
(228) 0x42fccb ADD %RCX,%RAX |
(228) 0x42fcce VMOVSD %XMM3,(%RSI,%RAX,8) |
(228) 0x42fcd3 MOV 0x168(%RSP),%EAX |
(228) 0x42fcda MOV 0x160(%RSP),%R9 |
(228) 0x42fce2 KMOVB %K3,%EDI |
(228) 0x42fce6 MOV 0x140(%RSP),%R15 |
(228) 0x42fcee CMP %EAX,%R11D |
(228) 0x42fcf1 CMOVE %R11D,%R14D |
(228) 0x42fcf5 CMOVE %EDI,%R12D |
(228) 0x42fcf9 INC %R8D |
(228) 0x42fcfc ADD %R9,%R10 |
(228) 0x42fcff ADD %R15,%RCX |
(228) 0x42fd02 CMP %R8D,0x170(%RSP) |
(228) 0x42fd0a JG 42fb58 |
0x42fd10 MOV %R12D,%R8D |
0x42fd13 MOV 0x108(%RSP),%R12 |
0x42fd1b TEST %R8B,%R8B |
0x42fd1e JE 4305d8 |
0x42fd24 MOV %R14D,0x140(%R12) |
0x42fd2c VZEROUPPER |
0x42fd2f CALL 402220 <@plt_start@+0x200> |
0x42fd34 MOV 0x60(%R12),%R14 |
0x42fd39 MOV (%R14),%R11D |
0x42fd3c CMP $0x1,%R11D |
0x42fd40 JLE 430521 |
0x42fd46 MOV 0x120(%RSP),%RCX |
0x42fd4e MOV 0x100(%RSP),%RDX |
0x42fd56 MOV %R11,0x58(%RSP) |
0x42fd5b MOV 0x118(%RSP),%RSI |
0x42fd63 MOV 0x110(%RSP),%R10 |
0x42fd6b MOV 0x38(%RSP),%R13 |
0x42fd70 NEG %RDX |
0x42fd73 LEA -0x1(%RCX),%RDI |
0x42fd77 SUB %RCX,%RSI |
0x42fd7a SAL $0x3,%RDX |
0x42fd7e MOV %RDI,0x8(%RSP) |
0x42fd83 SUB %R13,%R10 |
0x42fd86 LEA (,%RSI,8),%RBX |
0x42fd8e MOV %RDX,0xd0(%RSP) |
0x42fd96 LEA (,%R10,8),%RAX |
0x42fd9e MOV %RBX,0x18(%RSP) |
0x42fda3 MOV $0x1,%EBX |
0x42fda8 MOV %RAX,0x10(%RSP) |
0x42fdad JMP 42fdc6 |
0x42fdaf NOP |
(225) 0x42fdb0 CALL 402220 <@plt_start@+0x200> |
(225) 0x42fdb5 MOV 0x58(%RSP),%R13 |
(225) 0x42fdba INC %RBX |
(225) 0x42fdbd CMP %R13,%RBX |
(225) 0x42fdc0 JE 430521 |
(225) 0x42fdc6 MOV 0x10(%R12),%R8 |
(225) 0x42fdcb MOV 0x18(%R12),%R11 |
(225) 0x42fdd0 MOV 0x88(%R12),%R9 |
(225) 0x42fdd8 MOV 0x98(%R12),%R15 |
(225) 0x42fde0 MOV (%R8),%R14D |
(225) 0x42fde3 MOV (%R11),%EAX |
(225) 0x42fde6 VMOVSD (%R9,%RBX,8),%XMM2 |
(225) 0x42fdec VMOVSD (%R15,%RBX,8),%XMM3 |
(225) 0x42fdf2 MOV %R9,0x158(%RSP) |
(225) 0x42fdfa SUB $0x2,%R14D |
(225) 0x42fdfe ADD $0x3,%EAX |
(225) 0x42fe01 MOV %R15,0xb0(%RSP) |
(225) 0x42fe09 SUB %R14D,%EAX |
(225) 0x42fe0c VUNPCKLPD %XMM2,%XMM3,%XMM4 |
(225) 0x42fe10 CLTD |
(225) 0x42fe11 VMOVUPD %XMM4,0x130(%R12) |
(225) 0x42fe1b IDIVL 0xc8(%RSP) |
(225) 0x42fe22 CMP %EDX,0xdc(%RSP) |
(225) 0x42fe29 JL 430518 |
(225) 0x42fe2f MOV 0xdc(%RSP),%ESI |
(225) 0x42fe36 IMUL %EAX,%ESI |
(225) 0x42fe39 ADD %ESI,%EDX |
(225) 0x42fe3b ADD %EDX,%EAX |
(225) 0x42fe3d CMP %EAX,%EDX |
(225) 0x42fe3f JGE 42fdb0 |
(225) 0x42fe45 MOV (%R12),%RCX |
(225) 0x42fe49 MOV 0x8(%R12),%R10 |
(225) 0x42fe4e LEA (%R14,%RDX,1),%R13D |
(225) 0x42fe52 ADD %R14D,%EAX |
(225) 0x42fe55 KXORB %K4,%K4,%K4 |
(225) 0x42fe59 MOV 0xb8(%R12),%R11 |
(225) 0x42fe61 MOV 0xc8(%R12),%RDX |
(225) 0x42fe69 MOV %EAX,0xd8(%RSP) |
(225) 0x42fe70 MOV (%RCX),%R9D |
(225) 0x42fe73 MOV 0x50(%R12),%RCX |
(225) 0x42fe78 MOV %R13D,0x160(%RSP) |
(225) 0x42fe80 MOV (%R10),%R8D |
(225) 0x42fe83 MOV 0xc0(%R12),%RAX |
(225) 0x42fe8b MOV %R11,0xa0(%RSP) |
(225) 0x42fe93 MOV 0x90(%R12),%R11 |
(225) 0x42fe9b MOV 0x80(%R12),%R10 |
(225) 0x42fea3 MOV %RCX,0xc0(%RSP) |
(225) 0x42feab LEA -0x2(%R9),%EDI |
(225) 0x42feaf MOV 0x100(%RSP),%RCX |
(225) 0x42feb7 MOV 0xb0(%R12),%R14 |
(225) 0x42febf MOV %RDX,0x168(%RSP) |
(225) 0x42fec7 MOVSXD %R13D,%RDX |
(225) 0x42feca MOV 0x8(%RSP),%R13 |
(225) 0x42fecf LEA 0x3(%R8),%R15D |
(225) 0x42fed3 MOV 0x78(%R12),%RSI |
(225) 0x42fed8 MOV %RAX,0x178(%RSP) |
(225) 0x42fee0 IMUL %RDX,%RCX |
(225) 0x42fee4 MOVSXD %R9D,%RAX |
(225) 0x42fee7 MOV %R11,0xf0(%RSP) |
(225) 0x42feef LEA 0x4(%R8),%R11D |
(225) 0x42fef3 SUB %R9D,%R11D |
(225) 0x42fef6 MOV %R10,0x68(%RSP) |
(225) 0x42fefb LEA (%R13,%RAX,1),%R10 |
(225) 0x42ff00 MOV 0x20(%R12),%R13 |
(225) 0x42ff05 ADD %R11,%R10 |
(225) 0x42ff08 MOV %R15D,0x134(%RSP) |
(225) 0x42ff10 MOV 0x58(%R12),%R15 |
(225) 0x42ff15 ADD %RCX,%R10 |
(225) 0x42ff18 MOV 0xd0(%RSP),%RCX |
(225) 0x42ff20 MOV %R14,0xa8(%RSP) |
(225) 0x42ff28 MOV 0xa8(%R12),%R14 |
(225) 0x42ff30 MOV %RSI,0x50(%RSP) |
(225) 0x42ff35 IMUL %RDX,%RCX |
(225) 0x42ff39 MOV 0x18(%RSP),%RSI |
(225) 0x42ff3e MOV %R15,0xb8(%RSP) |
(225) 0x42ff46 MOV %R14,0x110(%RSP) |
(225) 0x42ff4e MOV 0x38(%RSP),%R15 |
(225) 0x42ff53 MOV 0x138(%RSP),%R14 |
(225) 0x42ff5b MOV %EDI,0xe0(%RSP) |
(225) 0x42ff62 ADD %RSI,%RCX |
(225) 0x42ff65 MOV 0x48(%RSP),%RSI |
(225) 0x42ff6a LEA (%RDX,%R15,1),%R15 |
(225) 0x42ff6e IMUL %RDX,%R14 |
(225) 0x42ff72 ADD %RCX,%R13 |
(225) 0x42ff75 MOV 0x40(%RSP),%RCX |
(225) 0x42ff7a LEA (%R14,%RCX,1),%R14 |
(225) 0x42ff7e MOV 0x140(%RSP),%RCX |
(225) 0x42ff86 IMUL %RDX,%RCX |
(225) 0x42ff8a ADD %RSI,%RCX |
(225) 0x42ff8d MOVSXD %EDI,%RSI |
(225) 0x42ff90 MOV 0xf8(%RSP),%RDI |
(225) 0x42ff98 MOV %RCX,0x128(%RSP) |
(225) 0x42ffa0 MOV 0x30(%RSP),%RCX |
(225) 0x42ffa5 IMUL %RDI,%RDX |
(225) 0x42ffa9 MOV 0x30(%R12),%RDI |
(225) 0x42ffae ADD %RSI,%RCX |
(225) 0x42ffb1 ADD %RDX,%RCX |
(225) 0x42ffb4 MOV 0x20(%RSP),%RDX |
(225) 0x42ffb9 MOV %RCX,0x120(%RSP) |
(225) 0x42ffc1 LEA (,%RAX,8),%RCX |
(225) 0x42ffc9 ADD %RAX,%RDX |
(225) 0x42ffcc ADD %R11,%RDX |
(225) 0x42ffcf LEA (%RDI,%RDX,8),%RDX |
(225) 0x42ffd3 MOV 0x10(%RSP),%RDI |
(225) 0x42ffd8 MOV %RDX,0x98(%RSP) |
(225) 0x42ffe0 MOV $0x1,%EDX |
(225) 0x42ffe5 ADD 0x38(%R12),%RDI |
(225) 0x42ffea MOV %RDI,0x108(%RSP) |
(225) 0x42fff2 MOV 0xe0(%RSP),%EDI |
(225) 0x42fff9 LEA 0x5(%RDI,%R8,1),%R8D |
(225) 0x42fffe SUB %R9D,%R8D |
(225) 0x430001 CMP %EDI,0x134(%RSP) |
(225) 0x430008 MOV 0xc0(%RSP),%R9 |
(225) 0x430010 CMOVLE %EDI,%R8D |
(225) 0x430014 SUB %RAX,%RDX |
(225) 0x430017 MOV %RDX,%RDI |
(225) 0x43001a ADD %RSI,%RDI |
(225) 0x43001d MOV %R8D,0xcc(%RSP) |
(225) 0x430025 MOV 0xb8(%RSP),%RSI |
(225) 0x43002d SUB %R11,%RDI |
(225) 0x430030 LEA -0x10(%R9,%RCX,1),%R11 |
(225) 0x430035 MOV 0x40(%RSP),%R8 |
(225) 0x43003a LEA (,%RBX,8),%R9 |
(225) 0x430042 MOV %RDI,0x90(%RSP) |
(225) 0x43004a MOV 0x48(%RSP),%RDI |
(225) 0x43004f LEA -0x10(%RSI,%RCX,1),%RCX |
(225) 0x430054 MOV %R11,0x88(%RSP) |
(225) 0x43005c MOV 0x50(%RSP),%R11 |
(225) 0x430061 LEA (%RAX,%R8,1),%RDX |
(225) 0x430065 LEA (%RAX,%RDI,1),%RAX |
(225) 0x430069 MOV %RCX,0x80(%RSP) |
(225) 0x430071 ADD %R9,%R11 |
(225) 0x430074 MOV %RDX,0x78(%RSP) |
(225) 0x430079 MOV %RAX,0x70(%RSP) |
(225) 0x43007e MOV %R9,0x60(%RSP) |
(225) 0x430083 MOV %R11,0xe8(%RSP) |
(225) 0x43008b NOPL (%RAX,%RAX,1) |
(226) 0x430090 MOV 0xe0(%RSP),%ESI |
(226) 0x430097 INCL 0x160(%RSP) |
(226) 0x43009e CMP %ESI,0x134(%RSP) |
(226) 0x4300a5 JLE 430500 |
(226) 0x4300ab MOV 0xa8(%RSP),%RCX |
(226) 0x4300b3 MOV 0xa0(%RSP),%RDX |
(226) 0x4300bb MOV %R14,0x118(%RSP) |
(226) 0x4300c3 MOV 0x90(%RSP),%RDI |
(226) 0x4300cb MOV 0x88(%RSP),%RAX |
(226) 0x4300d3 MOV (%RCX,%RBX,4),%R8D |
(226) 0x4300d7 MOV (%RDX),%R11D |
(226) 0x4300da MOV 0x138(%RSP),%RCX |
(226) 0x4300e2 MOVSXD 0x160(%RSP),%RDX |
(226) 0x4300ea ADD %R10,%RDI |
(226) 0x4300ed MOV 0x80(%RSP),%R9 |
(226) 0x4300f5 MOV 0x128(%RSP),%RSI |
(226) 0x4300fd MOV %RDI,0x170(%RSP) |
(226) 0x430105 LEA (%RAX,%R14,8),%RDI |
(226) 0x430109 IMUL %RDX,%RCX |
(226) 0x43010d MOV 0x78(%RSP),%RAX |
(226) 0x430112 LEA (%R9,%RSI,8),%RSI |
(226) 0x430116 MOV 0xc0(%RSP),%R9 |
(226) 0x43011e ADD %RAX,%RCX |
(226) 0x430121 MOV 0x140(%RSP),%RAX |
(226) 0x430129 LEA -0x10(%R9,%RCX,8),%RCX |
(226) 0x43012e MOV 0x70(%RSP),%R9 |
(226) 0x430133 IMUL %RAX,%RDX |
(226) 0x430137 MOV 0xb8(%RSP),%RAX |
(226) 0x43013f ADD %R9,%RDX |
(226) 0x430142 MOV %R10,%R9 |
(226) 0x430145 LEA -0x10(%RAX,%RDX,8),%RDX |
(226) 0x43014a MOV 0x98(%RSP),%RAX |
(226) 0x430152 NEG %R9 |
(226) 0x430155 LEA -0x8(%RAX,%R9,8),%R9 |
(226) 0x43015a LEA 0x1(%R15),%RAX |
(226) 0x43015e MOV %R9,0x148(%RSP) |
(226) 0x430166 MOV 0x120(%RSP),%R9 |
(226) 0x43016e MOV %RAX,0x150(%RSP) |
(226) 0x430176 MOV 0x170(%RSP),%RAX |
(226) 0x43017e MOV %R15,0x170(%RSP) |
(226) 0x430186 JMP 4301d1 |
0x430188 NOPL (%RAX,%RAX,1) |
(227) 0x430190 MOV 0x178(%RSP),%R14 |
(227) 0x430198 CMP (%R14),%R8D |
(227) 0x43019b JE 4302f0 |
(227) 0x4301a1 MOV 0x168(%RSP),%R15 |
(227) 0x4301a9 CMP (%R15),%R8D |
(227) 0x4301ac JE 4303b0 |
(227) 0x4301b2 INC %RAX |
(227) 0x4301b5 INC %R9 |
(227) 0x4301b8 ADD $0x8,%RDI |
(227) 0x4301bc ADD $0x8,%RSI |
(227) 0x4301c0 ADD $0x8,%RCX |
(227) 0x4301c4 ADD $0x8,%RDX |
(227) 0x4301c8 CMP %R10,%RAX |
(227) 0x4301cb JE 430440 |
(227) 0x4301d1 CMP %R11D,%R8D |
(227) 0x4301d4 JNE 430190 |
(227) 0x4301d6 VMOVSD 0x8(%R13,%RAX,8),%XMM7 |
(227) 0x4301dd MOV 0x158(%RSP),%R14 |
(227) 0x4301e5 VCOMISD (%R14,%RBX,8),%XMM7 |
(227) 0x4301eb JB 4301b2 |
(227) 0x4301ed MOV 0xf0(%RSP),%R15 |
(227) 0x4301f5 VMOVSD (%R15,%RBX,8),%XMM8 |
(227) 0x4301fb VCOMISD (%R13,%RAX,8),%XMM8 |
(227) 0x430202 JBE 4301b2 |
(227) 0x430204 MOV 0x150(%RSP),%R15 |
(227) 0x43020c MOV 0x28(%R12),%R14 |
(227) 0x430211 VMOVSD (%R14,%R15,8),%XMM9 |
(227) 0x430217 MOV 0xb0(%RSP),%R15 |
(227) 0x43021f VCOMISD (%R15,%RBX,8),%XMM9 |
(227) 0x430225 JB 4301b2 |
(227) 0x430227 MOV 0xa0(%R12),%R15 |
(227) 0x43022f VMOVSD (%R15,%RBX,8),%XMM10 |
(227) 0x430235 MOV 0x170(%RSP),%R15 |
(227) 0x43023d VCOMISD (%R14,%R15,8),%XMM10 |
(227) 0x430243 JBE 4301b2 |
(227) 0x430249 MOV 0x70(%R12),%R14 |
(227) 0x43024e MOV 0x48(%R12),%R15 |
(227) 0x430253 VMOVSD (%R14,%RBX,8),%XMM11 |
(227) 0x430259 MOV 0x68(%R12),%R14 |
(227) 0x43025e VMOVSD %XMM11,(%R15,%R9,8) |
(227) 0x430264 MOV 0x40(%R12),%R15 |
(227) 0x430269 VMOVSD (%R14,%RBX,8),%XMM12 |
(227) 0x43026f LEA (,%RBX,8),%R14 |
(227) 0x430277 VMOVSD %XMM12,(%R15,%RAX,8) |
(227) 0x43027d MOV 0x50(%RSP),%R15 |
(227) 0x430282 ADD %R14,%R15 |
(227) 0x430285 VMOVSD (%R15),%XMM13 |
(227) 0x43028a MOV %R15,0x28(%RSP) |
(227) 0x43028f MOV 0x68(%RSP),%R15 |
(227) 0x430294 VMOVSD %XMM13,(%RDI) |
(227) 0x430298 ADD %R15,%R14 |
(227) 0x43029b MOV 0x28(%RSP),%R15 |
(227) 0x4302a0 VMOVSD (%R14),%XMM14 |
(227) 0x4302a5 VMOVSD %XMM14,(%RSI) |
(227) 0x4302a9 NOPL (%RAX) |
(227) 0x4302b0 VMOVSD (%R15),%XMM15 |
(227) 0x4302b5 VMOVSD %XMM15,0x8(%RDI) |
(227) 0x4302ba VMOVSD (%R14),%XMM0 |
(227) 0x4302bf VMOVSD %XMM0,0x8(%RSI) |
(227) 0x4302c4 VMOVSD (%R15),%XMM1 |
(227) 0x4302c9 VMOVSD %XMM1,(%RCX) |
(227) 0x4302cd VMOVSD (%R14),%XMM4 |
(227) 0x4302d2 VMOVSD %XMM4,(%RDX) |
(227) 0x4302d6 VMOVSD (%R15),%XMM5 |
(227) 0x4302db VMOVSD %XMM5,0x8(%RCX) |
(227) 0x4302e0 VMOVSD (%R14),%XMM6 |
(227) 0x4302e5 VMOVSD %XMM6,0x8(%RDX) |
(227) 0x4302ea JMP 4301b2 |
0x4302ef NOP |
(227) 0x4302f0 MOV 0x148(%RSP),%R14 |
(227) 0x4302f8 MOV 0x170(%RSP),%R15 |
(227) 0x430300 VMOVSD (%R14,%RAX,8),%XMM9 |
(227) 0x430306 MOV 0x108(%RSP),%R14 |
(227) 0x43030e VMOVSD (%R14,%R15,8),%XMM11 |
(227) 0x430314 VSUBSD %XMM2,%XMM9,%XMM10 |
(227) 0x430318 MOV 0x110(%RSP),%R14 |
(227) 0x430320 VSUBSD %XMM3,%XMM11,%XMM12 |
(227) 0x430324 VUNPCKLPD %XMM12,%XMM10,%XMM13 |
(227) 0x430329 VMULPD %XMM13,%XMM13,%XMM14 |
(227) 0x43032e VUNPCKHPD %XMM14,%XMM14,%XMM15 |
(227) 0x430333 VADDPD %XMM14,%XMM15,%XMM0 |
(227) 0x430338 VSQRTSD %XMM0,%XMM0,%XMM0 |
(227) 0x43033c VCOMISD (%R14,%RBX,8),%XMM0 |
(227) 0x430342 JA 4301b2 |
(227) 0x430348 MOV 0x70(%R12),%R15 |
(227) 0x43034d MOV 0x48(%R12),%R14 |
(227) 0x430352 VMOVSD (%R15,%RBX,8),%XMM1 |
(227) 0x430358 MOV 0x68(%R12),%R15 |
(227) 0x43035d VMOVSD %XMM1,(%R14,%R9,8) |
(227) 0x430363 MOV 0x40(%R12),%R14 |
(227) 0x430368 VMOVSD (%R15,%RBX,8),%XMM4 |
(227) 0x43036e MOV 0xe8(%RSP),%R15 |
(227) 0x430376 VMOVSD %XMM4,(%R14,%RAX,8) |
(227) 0x43037c MOV 0x60(%RSP),%R14 |
(227) 0x430381 VMOVSD (%R15),%XMM5 |
(227) 0x430386 MOV 0x68(%RSP),%R15 |
(227) 0x43038b VMOVSD %XMM5,(%RDI) |
(227) 0x43038f ADD %R15,%R14 |
(227) 0x430392 MOV 0xe8(%RSP),%R15 |
(227) 0x43039a VMOVSD (%R14),%XMM6 |
(227) 0x43039f VMOVSD %XMM6,(%RSI) |
(227) 0x4303a3 JMP 4302b0 |
0x4303a8 NOPL (%RAX,%RAX,1) |
(227) 0x4303b0 VCOMISD (%R13,%RAX,8),%XMM2 |
(227) 0x4303b7 JNE 4301b2 |
(227) 0x4303bd MOV 0x28(%R12),%R14 |
(227) 0x4303c2 MOV 0x170(%RSP),%R15 |
(227) 0x4303ca VCOMISD (%R14,%R15,8),%XMM3 |
(227) 0x4303d0 JNE 4301b2 |
(227) 0x4303d6 MOV 0x70(%R12),%R14 |
(227) 0x4303db MOV 0x48(%R12),%R15 |
(227) 0x4303e0 VMOVSD (%R14,%RBX,8),%XMM5 |
(227) 0x4303e6 MOV 0x68(%R12),%R14 |
(227) 0x4303eb VMOVSD %XMM5,(%R15,%R9,8) |
(227) 0x4303f1 MOV 0x40(%R12),%R15 |
(227) 0x4303f6 VMOVSD (%R14,%RBX,8),%XMM6 |
(227) 0x4303fc MOV 0xe8(%RSP),%R14 |
(227) 0x430404 VMOVSD %XMM6,(%R15,%RAX,8) |
(227) 0x43040a MOV 0x60(%RSP),%R15 |
(227) 0x43040f VMOVSD (%R14),%XMM7 |
(227) 0x430414 MOV 0x68(%RSP),%R14 |
(227) 0x430419 VMOVSD %XMM7,(%RDI) |
(227) 0x43041d ADD %R15,%R14 |
(227) 0x430420 MOV 0xe8(%RSP),%R15 |
(227) 0x430428 VMOVSD (%R14),%XMM8 |
(227) 0x43042d VMOVSD %XMM8,(%RSI) |
(227) 0x430431 JMP 4302b0 |
0x430436 NOPW %CS:(%RAX,%RAX,1) |
(226) 0x430440 MOV 0x118(%RSP),%R14 |
(226) 0x430448 MOV 0x134(%RSP),%R15D |
(226) 0x430450 MOV 0xcc(%RSP),%EAX |
(226) 0x430457 MOV $0x1,%ECX |
(226) 0x43045c KMOVB %K4,%ESI |
(226) 0x430460 MOV 0x130(%RSP),%EDX |
(226) 0x430467 MOV 0x100(%RSP),%RDI |
(226) 0x43046f CMP %EAX,%R15D |
(226) 0x430472 MOV 0xd0(%RSP),%R8 |
(226) 0x43047a MOV 0x138(%RSP),%R9 |
(226) 0x430482 CMOVE %R15D,%EDX |
(226) 0x430486 CMOVE %ECX,%ESI |
(226) 0x430489 MOV 0x140(%RSP),%R11 |
(226) 0x430491 MOV 0xf8(%RSP),%RAX |
(226) 0x430499 MOV 0x150(%RSP),%R15 |
(226) 0x4304a1 ADD %RDI,%R10 |
(226) 0x4304a4 ADD %R8,%R13 |
(226) 0x4304a7 MOV %EDX,0x130(%RSP) |
(226) 0x4304ae MOV 0x160(%RSP),%EDX |
(226) 0x4304b5 ADD %R9,%R14 |
(226) 0x4304b8 KMOVB %ESI,%K4 |
(226) 0x4304bc ADD %R11,0x128(%RSP) |
(226) 0x4304c4 ADD %RAX,0x120(%RSP) |
(226) 0x4304cc CMP %EDX,0xd8(%RSP) |
(226) 0x4304d3 JG 430090 |
(225) 0x4304d9 KORTESTB %K4,%K4 |
(225) 0x4304dd JE 42fdb0 |
(225) 0x4304e3 MOV 0x130(%RSP),%R10D |
(225) 0x4304eb MOV %R10D,0x140(%R12) |
(225) 0x4304f3 JMP 42fdb0 |
0x4304f8 NOPL (%RAX,%RAX,1) |
(226) 0x430500 LEA 0x1(%R15),%R15 |
(226) 0x430504 MOV %R15,0x150(%RSP) |
(226) 0x43050c JMP 430448 |
0x430511 NOPL (%RAX) |
(225) 0x430518 INC %EAX |
(225) 0x43051a XOR %EDX,%EDX |
(225) 0x43051c JMP 42fe2f |
0x430521 LEA -0x28(%RBP),%RSP |
0x430525 POP %RBX |
0x430526 POP %R12 |
0x430528 POP %R13 |
0x43052a POP %R14 |
0x43052c POP %R15 |
0x43052e POP %RBP |
0x43052f RET |
(228) 0x430530 VBROADCASTSD (%RDX),%YMM3 |
(228) 0x430535 LEA 0x20(%R10),%RAX |
(228) 0x430539 VMOVUPD %YMM3,(%R10) |
(228) 0x43053e JMP 42fbb9 |
(230) 0x430543 VBROADCASTSD (%RDX),%YMM2 |
(230) 0x430548 LEA 0x20(%R10),%RAX |
(230) 0x43054c VMOVUPD %YMM2,(%R10) |
(230) 0x430551 JMP 42f8a1 |
(232) 0x430556 VBROADCASTSD (%RDX),%YMM1 |
(232) 0x43055b LEA 0x20(%R10),%RAX |
(232) 0x43055f VMOVUPD %YMM1,(%R10) |
(232) 0x430564 JMP 42f571 |
(234) 0x430569 VBROADCASTSD (%RDX),%YMM0 |
(234) 0x43056e LEA 0x20(%R10),%RAX |
(234) 0x430572 VMOVUPD %YMM0,(%R10) |
(234) 0x430577 JMP 42f240 |
(232) 0x43057c MOV 0x178(%RSP),%EAX |
(232) 0x430583 XOR %EDI,%EDI |
(232) 0x430585 JMP 42f64a |
(228) 0x43058a MOV 0x178(%RSP),%EAX |
(228) 0x430591 XOR %EDI,%EDI |
(228) 0x430593 JMP 42fc92 |
(230) 0x430598 MOV 0x178(%RSP),%EAX |
(230) 0x43059f XOR %EDI,%EDI |
(230) 0x4305a1 JMP 42f97a |
(234) 0x4305a6 MOV 0x178(%RSP),%EAX |
(234) 0x4305ad XOR %EDI,%EDI |
(234) 0x4305af JMP 42f319 |
0x4305b4 INC %EAX |
0x4305b6 XOR %EDX,%EDX |
0x4305b8 JMP 42f727 |
0x4305bd INC %EAX |
0x4305bf XOR %EDX,%EDX |
0x4305c1 JMP 42f0ce |
0x4305c6 INC %EAX |
0x4305c8 XOR %EDX,%EDX |
0x4305ca JMP 42f3f1 |
0x4305cf INC %EAX |
0x4305d1 XOR %EDX,%EDX |
0x4305d3 JMP 42fa57 |
0x4305d8 VZEROUPPER |
0x4305db JMP 42fd2f |
0x4305e0 VZEROUPPER |
0x4305e3 JMP 42fa26 |
0x4305e8 VZEROUPPER |
0x4305eb JMP 42f3be |
0x4305f0 VZEROUPPER |
0x4305f3 JMP 42f6f6 |
0x4305f8 NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○97.54 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○2.46 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 408 |
nb uops | 437 |
loop length | 1926 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 33 |
micro-operation queue | 72.83 cycles |
front end | 72.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 33.30 | 33.20 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
cycles | 33.30 | 49.13 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
Cycles executing div or sqrt instructions | 24.00 |
FE+BE cycles | 69.57-69.64 |
Stall cycles | 0.00 |
Front-end | 72.83 |
Dispatch | 49.13 |
DIV/SQRT | 24.00 |
Overall L1 | 72.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 27% |
all | 8% |
load | 6% |
store | 8% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x180,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xdc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4305bd <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f3be <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD (%R9),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R11),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x30(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R10),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RBX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%EBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R13,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R13D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305e8 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1618> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4305c6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15f6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f6f6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R11D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x100(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R10,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x108(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305f0 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1620> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4305b4 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42fa26 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x138(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R10),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%R13,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305e0 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1610> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4305cf <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42fd2f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x140(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R9,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x48(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x80(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x2(%R10),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R10,%R13,1),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x10(%RSI,%R10,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R11D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R15,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R15D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305d8 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1608> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x60(%R12),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 430521 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NEG %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RSI,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R10,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 42fdc6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xdf6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f727 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x757> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f0ce <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xfe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f3f1 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x421> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42fa57 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa87> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42fd2f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42fa26 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42f3be <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42f6f6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | generate_chunk_kernel.f90:85-161 |
Module | exec |
nb instructions | 408 |
nb uops | 437 |
loop length | 1926 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 33 |
micro-operation queue | 72.83 cycles |
front end | 72.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 33.30 | 33.20 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
cycles | 33.30 | 49.13 | 32.00 | 32.00 | 41.50 | 33.20 | 33.10 | 41.50 | 41.50 | 41.50 | 33.20 | 32.00 |
Cycles executing div or sqrt instructions | 24.00 |
FE+BE cycles | 69.57-69.64 |
Stall cycles | 0.00 |
Front-end | 72.83 |
Dispatch | 49.13 |
DIV/SQRT | 24.00 |
Overall L1 | 72.83 |
all | 6% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 27% |
all | 8% |
load | 6% |
store | 8% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x180,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x128(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RDI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RDI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RDI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RDI),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RDI),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RDI),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDI),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x2,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xdc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%RSI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4305bd <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f3be <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0xf8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD (%R9),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R11),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x30(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R10),%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RBX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R13D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%EBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x5,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R13,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R13D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305e8 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1618> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4305c6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15f6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42f6f6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R11D,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R11D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x100(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R10,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xe8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x108(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xd0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305f0 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1620> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4305b4 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15e4> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42fa26 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x138(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV (%R10),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R13,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (,%R13,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x40(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%R9,%R13,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x10(%RSI,%R9,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x5(%RBX,%R9,1),%R15D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EBX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R11D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %EBX,%R15D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA 0x4(%R9),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15D,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %R9D,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EBX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RSP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14D,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xe0(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EBX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305e0 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1610> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EBX,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R11),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB $0x2,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIVL 0xc8(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
CMP %EDX,0xdc(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 4305cf <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x15ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0xdc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 42fd2f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x140(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%R12),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVSXD (%RCX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %R8D,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R12,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R9,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x48(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R9,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x80(%R12),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x3(%RDI),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x2(%R10),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %EAX,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R10,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R10,%R13,1),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15D,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%RDI),%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EDI,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R13,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x10(%RSI,%R10,8),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x2,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R15D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x5,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %R11D,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x134(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x5(%R15,%R9,1),%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x4(%R9),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMOVGE %R15D,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R9D,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
KMOVB %EAX,%K3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x108(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8B,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4305d8 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1608> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,0x140(%R12) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 402220 <@plt_start@+0x200> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x60(%R12),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 430521 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x100(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x118(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NEG %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RCX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RDI,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RSI,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%R10,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x1,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 42fdc6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xdf6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f727 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x757> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f0ce <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xfe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42f3f1 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x421> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 42fa57 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa87> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42fd2f <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xd5f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42fa26 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0xa56> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42f3be <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x3ee> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 42f6f6 <__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0+0x726> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼__generate_chunk_kernel_module_MOD_generate_chunk_kernel._omp_fn.0.lto_priv.0– | 0.04 | 0.01 |
▼Loop 228 - generate_chunk_kernel.f90:112-114 - exec– | 0 | 0 |
○Loop 229 - generate_chunk_kernel.f90:114-114 - exec | 0.01 | 0 |
▼Loop 234 - generate_chunk_kernel.f90:88-90 - exec– | 0 | 0 |
○Loop 235 - generate_chunk_kernel.f90:90-90 - exec | 0.01 | 0 |
▼Loop 225 - generate_chunk_kernel.f90:119-161 - exec– | 0 | 0 |
▼Loop 226 - generate_chunk_kernel.f90:127-161 - exec– | 0 | 0 |
○Loop 227 - generate_chunk_kernel.f90:129-161 - exec | 0.01 | 0.01 |
▼Loop 230 - generate_chunk_kernel.f90:104-106 - exec– | 0 | 0 |
○Loop 231 - generate_chunk_kernel.f90:106-106 - exec | 0.01 | 0 |
▼Loop 232 - generate_chunk_kernel.f90:96-98 - exec– | 0 | 0 |
○Loop 233 - generate_chunk_kernel.f90:98-98 - exec | 0.01 | 0 |