Function: clover_unpack_message_left._omp_fn.0 | Module: exec | Source: pack_kernel.f90:108-113 | Coverage: 0.03% |
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Function: clover_unpack_message_left._omp_fn.0 | Module: exec | Source: pack_kernel.f90:108-113 | Coverage: 0.03% |
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/scratch_na/users/xoserete/qaas_runs/171-322-0339/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/pack_kernel.f90: 108 - 113 |
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108: !$OMP PARALLEL DO PRIVATE(index) |
109: DO k=y_min-depth,y_max+y_inc+depth |
110: !$OMP SIMD |
111: DO j=1,depth |
112: index= buffer_offset + j+(k+depth-1)*depth |
113: field(x_min-j,k)=left_rcv_buffer(index) |
0x4578f0 PUSH %RBP |
0x4578f1 MOV %RSP,%RBP |
0x4578f4 PUSH %R15 |
0x4578f6 PUSH %R14 |
0x4578f8 MOV %RDI,%R14 |
0x4578fb PUSH %R13 |
0x4578fd PUSH %R12 |
0x4578ff PUSH %RBX |
0x457900 AND $-0x40,%RSP |
0x457904 SUB $0x100,%RSP |
0x45790b MOV 0x20(%RDI),%RDX |
0x45790f MOV 0x54(%RDI),%ESI |
0x457912 MOV 0x28(%RDI),%RAX |
0x457916 MOV 0x48(%RDI),%R15 |
0x45791a MOV 0x40(%RDI),%RBX |
0x45791e MOV 0x30(%RDI),%R12 |
0x457922 MOV %RDX,0xe8(%RSP) |
0x45792a MOV %ESI,0xfc(%RSP) |
0x457931 MOV %RAX,0xf0(%RSP) |
0x457939 CALL 402080 <@plt_start@+0x60> |
0x45793e MOV %EAX,%R13D |
0x457941 CALL 402180 <@plt_start@+0x160> |
0x457946 MOV 0xfc(%RSP),%R8D |
0x45794e MOV %EAX,%ECX |
0x457950 MOV 0x58(%R14),%EAX |
0x457954 INC %EAX |
0x457956 SUB %R8D,%EAX |
0x457959 CLTD |
0x45795a IDIV %R13D |
0x45795d CMP %EDX,%ECX |
0x45795f JL 457e10 |
0x457965 IMUL %EAX,%ECX |
0x457968 ADD %EDX,%ECX |
0x45796a ADD %ECX,%EAX |
0x45796c CMP %EAX,%ECX |
0x45796e JGE 457d81 |
0x457974 ADD %R8D,%EAX |
0x457977 CMPQ $0x1,0xe8(%RSP) |
0x457980 LEA (%R8,%RCX,1),%EDI |
0x457984 MOV 0x8(%R14),%R9 |
0x457988 SETNE %SIL |
0x45798c CMP $0x1,%RBX |
0x457990 MOV 0x10(%R14),%R10 |
0x457994 MOV (%R14),%R11 |
0x457997 SETNE %CL |
0x45799a MOV 0x38(%R14),%R13 |
0x45799e MOV 0x18(%R14),%R8 |
0x4579a2 MOV %EAX,0xf8(%RSP) |
0x4579a9 OR %CL,%SIL |
0x4579ac MOV %EDI,0xfc(%RSP) |
0x4579b3 MOV (%R9),%EAX |
0x4579b6 MOV %R10,0xe0(%RSP) |
0x4579be MOV %R11,0xd8(%RSP) |
0x4579c6 MOV %SIL,0x9f(%RSP) |
0x4579ce JNE 457e19 |
0x4579d4 MOVSXD 0xfc(%RSP),%R10 |
0x4579dc MOV 0xf0(%RSP),%RDX |
0x4579e4 LEA -0x1(%RAX),%EBX |
0x4579e7 MOV %EAX,%EDI |
0x4579e9 MOV %EAX,%ESI |
0x4579eb SHR $0x3,%EDI |
0x4579ee XOR %ECX,%ECX |
0x4579f0 MOV %EBX,0xe8(%RSP) |
0x4579f7 LEA (%R10,%RBX,1),%R11D |
0x4579fb AND $-0x8,%ESI |
0x4579fe SAL $0x6,%RDI |
0x457a02 LEA 0x1(%R15),%RBX |
0x457a06 IMUL %RDX,%R10 |
0x457a0a MOV %ESI,0xd0(%RSP) |
0x457a11 INC %ESI |
0x457a13 VMOVDQA64 0x552a3(%RIP),%ZMM15 |
0x457a1d IMUL %EAX,%R11D |
0x457a21 MOV %RDI,0xc8(%RSP) |
0x457a29 MOV %ESI,0xb8(%RSP) |
0x457a30 ADD %R12,%R10 |
0x457a33 TEST %EAX,%EAX |
0x457a35 MOV %RBX,0xc0(%RSP) |
0x457a3d CMOVNS %EAX,%ECX |
0x457a40 MOV %R14,0xb0(%RSP) |
0x457a48 LEA 0x1(%RCX),%R12D |
0x457a4c MOV %R12D,0x98(%RSP) |
0x457a54 NOPL (%RAX) |
(318) 0x457a58 TEST %EAX,%EAX |
(318) 0x457a5a JLE 457d3b |
(318) 0x457a60 MOV 0xe0(%RSP),%R14 |
(318) 0x457a68 MOV 0xd8(%RSP),%R9 |
(318) 0x457a70 CMPL $0x6,0xe8(%RSP) |
(318) 0x457a78 MOV (%R14),%ECX |
(318) 0x457a7b MOV (%R9),%EDI |
(318) 0x457a7e JBE 457e03 |
(318) 0x457a84 MOV 0xc0(%RSP),%R12 |
(318) 0x457a8c MOV 0xc8(%RSP),%R9 |
(318) 0x457a94 MOVSXD %ECX,%RDX |
(318) 0x457a97 MOVSXD %R11D,%RBX |
(318) 0x457a9a MOVSXD %EDI,%R14 |
(318) 0x457a9d ADD %R12,%RDX |
(318) 0x457aa0 ADD %R10,%R14 |
(318) 0x457aa3 ADD %RBX,%RDX |
(318) 0x457aa6 LEA -0x40(%R9),%RBX |
(318) 0x457aaa LEA -0x40(%R8,%R14,8),%RSI |
(318) 0x457aaf SHR $0x6,%RBX |
(318) 0x457ab3 LEA (%R13,%RDX,8),%RDX |
(318) 0x457ab8 INC %RBX |
(318) 0x457abb LEA (%RDX,%R9,1),%R12 |
(318) 0x457abf AND $0x7,%EBX |
(318) 0x457ac2 JE 457bac |
(318) 0x457ac8 CMP $0x1,%RBX |
(318) 0x457acc JE 457b8a |
(318) 0x457ad2 CMP $0x2,%RBX |
(318) 0x457ad6 JE 457b71 |
(318) 0x457adc CMP $0x3,%RBX |
(318) 0x457ae0 JE 457b58 |
(318) 0x457ae2 CMP $0x4,%RBX |
(318) 0x457ae6 JE 457b3f |
(318) 0x457ae8 CMP $0x5,%RBX |
(318) 0x457aec JE 457b26 |
(318) 0x457aee CMP $0x6,%RBX |
(318) 0x457af2 JE 457b0d |
(318) 0x457af4 VXORPS %XMM7,%XMM7,%XMM7 |
(318) 0x457af8 VPERMPD (%RDX),%ZMM15,%ZMM7 |
(318) 0x457afe SUB $0x40,%RSI |
(318) 0x457b02 ADD $0x40,%RDX |
(318) 0x457b06 VMOVUPD %ZMM7,0x40(%RSI) |
(318) 0x457b0d VXORPS %XMM6,%XMM6,%XMM6 |
(318) 0x457b11 VPERMPD (%RDX),%ZMM15,%ZMM6 |
(318) 0x457b17 SUB $0x40,%RSI |
(318) 0x457b1b ADD $0x40,%RDX |
(318) 0x457b1f VMOVUPD %ZMM6,0x40(%RSI) |
(318) 0x457b26 VXORPS %XMM5,%XMM5,%XMM5 |
(318) 0x457b2a VPERMPD (%RDX),%ZMM15,%ZMM5 |
(318) 0x457b30 SUB $0x40,%RSI |
(318) 0x457b34 ADD $0x40,%RDX |
(318) 0x457b38 VMOVUPD %ZMM5,0x40(%RSI) |
(318) 0x457b3f VXORPS %XMM4,%XMM4,%XMM4 |
(318) 0x457b43 VPERMPD (%RDX),%ZMM15,%ZMM4 |
(318) 0x457b49 SUB $0x40,%RSI |
(318) 0x457b4d ADD $0x40,%RDX |
(318) 0x457b51 VMOVUPD %ZMM4,0x40(%RSI) |
(318) 0x457b58 VXORPS %XMM3,%XMM3,%XMM3 |
(318) 0x457b5c VPERMPD (%RDX),%ZMM15,%ZMM3 |
(318) 0x457b62 SUB $0x40,%RSI |
(318) 0x457b66 ADD $0x40,%RDX |
(318) 0x457b6a VMOVUPD %ZMM3,0x40(%RSI) |
(318) 0x457b71 VXORPS %XMM2,%XMM2,%XMM2 |
(318) 0x457b75 VPERMPD (%RDX),%ZMM15,%ZMM2 |
(318) 0x457b7b SUB $0x40,%RSI |
(318) 0x457b7f ADD $0x40,%RDX |
(318) 0x457b83 VMOVUPD %ZMM2,0x40(%RSI) |
(318) 0x457b8a VXORPS %XMM1,%XMM1,%XMM1 |
(318) 0x457b8e VPERMPD (%RDX),%ZMM15,%ZMM1 |
(318) 0x457b94 ADD $0x40,%RDX |
(318) 0x457b98 SUB $0x40,%RSI |
(318) 0x457b9c VMOVUPD %ZMM1,0x40(%RSI) |
(318) 0x457ba3 CMP %RDX,%R12 |
(318) 0x457ba6 JE 457c59 |
(319) 0x457bac VXORPS %XMM0,%XMM0,%XMM0 |
(319) 0x457bb0 VPERMPD (%RDX),%ZMM15,%ZMM0 |
(319) 0x457bb6 ADD $0x200,%RDX |
(319) 0x457bbd SUB $0x200,%RSI |
(319) 0x457bc4 VMOVUPD %ZMM0,0x200(%RSI) |
(319) 0x457bcb VXORPS %XMM8,%XMM8,%XMM8 |
(319) 0x457bd0 VPERMPD -0x1c0(%RDX),%ZMM15,%ZMM8 |
(319) 0x457bd7 VMOVUPD %ZMM8,0x1c0(%RSI) |
(319) 0x457bde VXORPS %XMM9,%XMM9,%XMM9 |
(319) 0x457be3 VPERMPD -0x180(%RDX),%ZMM15,%ZMM9 |
(319) 0x457bea VMOVUPD %ZMM9,0x180(%RSI) |
(319) 0x457bf1 VXORPS %XMM10,%XMM10,%XMM10 |
(319) 0x457bf6 VPERMPD -0x140(%RDX),%ZMM15,%ZMM10 |
(319) 0x457bfd VMOVUPD %ZMM10,0x140(%RSI) |
(319) 0x457c04 VXORPS %XMM11,%XMM11,%XMM11 |
(319) 0x457c09 VPERMPD -0x100(%RDX),%ZMM15,%ZMM11 |
(319) 0x457c10 VMOVUPD %ZMM11,0x100(%RSI) |
(319) 0x457c17 VXORPS %XMM12,%XMM12,%XMM12 |
(319) 0x457c1c VPERMPD -0xc0(%RDX),%ZMM15,%ZMM12 |
(319) 0x457c23 VMOVUPD %ZMM12,0xc0(%RSI) |
(319) 0x457c2a VXORPS %XMM13,%XMM13,%XMM13 |
(319) 0x457c2f VPERMPD -0x80(%RDX),%ZMM15,%ZMM13 |
(319) 0x457c36 VMOVUPD %ZMM13,0x80(%RSI) |
(319) 0x457c3d VXORPS %XMM14,%XMM14,%XMM14 |
(319) 0x457c42 VPERMPD -0x40(%RDX),%ZMM15,%ZMM14 |
(319) 0x457c49 VMOVUPD %ZMM14,0x40(%RSI) |
(319) 0x457c50 CMP %RDX,%R12 |
(319) 0x457c53 JNE 457bac |
(318) 0x457c59 MOV 0xd0(%RSP),%EDX |
(318) 0x457c60 CMP %EAX,%EDX |
(318) 0x457c62 JE 457d3b |
(318) 0x457c68 MOV 0xb8(%RSP),%ESI |
(318) 0x457c6f MOV %EDX,%R9D |
(318) 0x457c72 MOV %EAX,%R12D |
(318) 0x457c75 SUB %R9D,%R12D |
(318) 0x457c78 LEA -0x1(%R12),%R14D |
(318) 0x457c7d CMP $0x2,%R14D |
(318) 0x457c81 JBE 457cc1 |
(318) 0x457c83 LEA (%R15,%R9,1),%R14 |
(318) 0x457c87 MOVSXD %ECX,%RDX |
(318) 0x457c8a MOVSXD %R11D,%RBX |
(318) 0x457c8d ADD %R14,%RDX |
(318) 0x457c90 LEA 0x1(%RBX,%RDX,1),%RDX |
(318) 0x457c95 MOVSXD %EDI,%RBX |
(318) 0x457c98 ADD %R10,%RBX |
(318) 0x457c9b VXORPS %XMM7,%XMM7,%XMM7 |
(318) 0x457c9f VPERMPD $0x1b,(%R13,%RDX,8),%YMM7 |
(318) 0x457ca7 SUB %R9,%RBX |
(318) 0x457caa MOV %R12D,%R9D |
(318) 0x457cad AND $-0x4,%R9D |
(318) 0x457cb1 VMOVUPD %YMM7,-0x20(%R8,%RBX,8) |
(318) 0x457cb8 ADD %R9D,%ESI |
(318) 0x457cbb AND $0x3,%R12D |
(318) 0x457cbf JE 457d3b |
(318) 0x457cc1 LEA (%RCX,%RSI,1),%R12D |
(318) 0x457cc5 MOV %EDI,%EDX |
(318) 0x457cc7 LEA 0x1(%RSI),%R9D |
(318) 0x457ccb ADD %R11D,%R12D |
(318) 0x457cce SUB %ESI,%EDX |
(318) 0x457cd0 MOVSXD %R12D,%R14 |
(318) 0x457cd3 MOVSXD %EDX,%RBX |
(318) 0x457cd6 ADD %R15,%R14 |
(318) 0x457cd9 ADD %R10,%RBX |
(318) 0x457cdc VMOVSD (%R13,%R14,8),%XMM6 |
(318) 0x457ce3 VMOVSD %XMM6,(%R8,%RBX,8) |
(318) 0x457ce9 CMP %R9D,%EAX |
(318) 0x457cec JL 457d3b |
(318) 0x457cee LEA (%RCX,%R9,1),%R12D |
(318) 0x457cf2 MOV %EDI,%EDX |
(318) 0x457cf4 ADD $0x2,%ESI |
(318) 0x457cf7 ADD %R11D,%R12D |
(318) 0x457cfa SUB %R9D,%EDX |
(318) 0x457cfd MOVSXD %R12D,%R14 |
(318) 0x457d00 MOVSXD %EDX,%RBX |
(318) 0x457d03 ADD %R15,%R14 |
(318) 0x457d06 ADD %R10,%RBX |
(318) 0x457d09 VMOVSD (%R13,%R14,8),%XMM5 |
(318) 0x457d10 VMOVSD %XMM5,(%R8,%RBX,8) |
(318) 0x457d16 CMP %ESI,%EAX |
(318) 0x457d18 JL 457d3b |
(318) 0x457d1a LEA (%RSI,%RCX,1),%ECX |
(318) 0x457d1d SUB %ESI,%EDI |
(318) 0x457d1f ADD %R11D,%ECX |
(318) 0x457d22 MOVSXD %EDI,%RDI |
(318) 0x457d25 MOVSXD %ECX,%R9 |
(318) 0x457d28 ADD %R10,%RDI |
(318) 0x457d2b ADD %R15,%R9 |
(318) 0x457d2e VMOVSD (%R13,%R9,8),%XMM4 |
(318) 0x457d35 VMOVSD %XMM4,(%R8,%RDI,8) |
(318) 0x457d3b INCL 0xfc(%RSP) |
(318) 0x457d42 TEST %EAX,%EAX |
(318) 0x457d44 JNS 457dc8 |
(318) 0x457d4a MOV 0xf0(%RSP),%R12 |
(318) 0x457d52 MOV 0xfc(%RSP),%ESI |
(318) 0x457d59 ADD %EAX,%R11D |
(318) 0x457d5c ADD %R12,%R10 |
(318) 0x457d5f CMP %ESI,0xf8(%RSP) |
(318) 0x457d66 JG 457a58 |
0x457d6c MOV 0xb0(%RSP),%R15 |
0x457d74 VZEROUPPER |
0x457d77 CMPB $0,0x9f(%RSP) |
0x457d7f JNE 457dab |
0x457d81 LEA -0x28(%RBP),%RSP |
0x457d85 POP %RBX |
0x457d86 POP %R12 |
0x457d88 POP %R13 |
0x457d8a POP %R14 |
0x457d8c POP %R15 |
0x457d8e POP %RBP |
0x457d8f RET |
0x457d90 MOV 0xb0(%RSP),%R15 |
0x457d98 VZEROUPPER |
0x457d9b MOV 0x98(%RSP),%R13D |
0x457da3 MOV %R13D,0x94(%RSP) |
0x457dab MOV 0x94(%RSP),%EAX |
0x457db2 MOV %EAX,0x50(%R15) |
0x457db6 LEA -0x28(%RBP),%RSP |
0x457dba POP %RBX |
0x457dbb POP %R12 |
0x457dbd POP %R13 |
0x457dbf POP %R14 |
0x457dc1 POP %R15 |
0x457dc3 POP %RBP |
0x457dc4 RET |
0x457dc5 NOPL (%RAX) |
(318) 0x457dc8 MOV 0xf0(%RSP),%RDX |
(318) 0x457dd0 MOV 0xfc(%RSP),%R14D |
(318) 0x457dd8 ADD %EAX,%R11D |
(318) 0x457ddb ADD %RDX,%R10 |
(318) 0x457dde CMP %R14D,0xf8(%RSP) |
(318) 0x457de6 JLE 457d90 |
(318) 0x457de8 MOV 0x98(%RSP),%EBX |
(318) 0x457def MOVB $0x1,0x9f(%RSP) |
(318) 0x457df7 MOV %EBX,0x94(%RSP) |
(318) 0x457dfe JMP 457a58 |
(318) 0x457e03 XOR %R9D,%R9D |
(318) 0x457e06 MOV $0x1,%ESI |
(318) 0x457e0b JMP 457c72 |
0x457e10 INC %EAX |
0x457e12 XOR %EDX,%EDX |
0x457e14 JMP 457965 |
0x457e19 MOV 0xfc(%RSP),%EDI |
0x457e20 MOV 0xf0(%RSP),%R11 |
0x457e28 LEA -0x1(%RAX),%EDX |
0x457e2b LEA (,%RBX,8),%RCX |
0x457e33 KXORB %K0,%K0,%K0 |
0x457e37 MOV %RCX,0x88(%RSP) |
0x457e3f MOV %EAX,%ESI |
0x457e41 MOVSXD %EDI,%R10 |
0x457e44 LEA (%RDI,%RDX,1),%R9D |
0x457e48 MOV 0xe8(%RSP),%RDI |
0x457e50 MOV %EDX,0x5c(%RSP) |
0x457e54 IMUL %R11,%R10 |
0x457e58 MOV %RBX,%RDX |
0x457e5b SHR $0x3,%ESI |
0x457e5e MOV %RBX,%R11 |
0x457e61 MOV %RDI,%RCX |
0x457e64 IMUL %EAX,%R9D |
0x457e68 SAL $0x5,%RDX |
0x457e6c MOV %ESI,0xb0(%RSP) |
0x457e73 NEG %RCX |
0x457e76 MOV %RDX,0x50(%RSP) |
0x457e7b MOV %RBX,%RSI |
0x457e7e SAL $0x4,%R11 |
0x457e82 LEA (%R10,%R12,1),%R12 |
0x457e86 SAL $0x6,%RSI |
0x457e8a MOV %R11,0x80(%RSP) |
0x457e92 IMUL $-0x28,%RDI,%R10 |
0x457e96 MOV %R9D,0xc8(%RSP) |
0x457e9e LEA (,%RCX,8),%R9 |
0x457ea6 MOV %R12,0xd0(%RSP) |
0x457eae MOV %RCX,%R12 |
0x457eb1 LEA (%RBX,%RBX,2),%RDI |
0x457eb5 SAL $0x6,%R12 |
0x457eb9 LEA (,%RDI,8),%R11 |
0x457ec1 MOV %R8,0xb8(%RSP) |
0x457ec9 MOV %R10,0x48(%RSP) |
0x457ece MOV %RCX,%R10 |
0x457ed1 SAL $0x5,%RCX |
0x457ed5 SAL $0x4,%R10 |
0x457ed9 MOV %RCX,0x68(%RSP) |
0x457ede MOV %EAX,%ECX |
0x457ee0 MOV %R10,%RDX |
0x457ee3 AND $-0x8,%ECX |
0x457ee6 MOV %R10,0x78(%RSP) |
0x457eeb NEG %RDX |
0x457eee LEA 0x1(%RCX),%EDI |
0x457ef1 MOV %ECX,0x58(%RSP) |
0x457ef5 MOV %RDX,0x70(%RSP) |
0x457efa XOR %EDX,%EDX |
0x457efc TEST %EAX,%EAX |
0x457efe CMOVNS %EAX,%EDX |
0x457f01 MOV %EDI,0x44(%RSP) |
0x457f05 MOV %R13,0xc0(%RSP) |
0x457f0d MOV %R12,%R13 |
0x457f10 LEA 0x1(%RDX),%ECX |
0x457f13 MOV %R14,0x38(%RSP) |
0x457f18 MOV %R15,%R14 |
0x457f1b MOV %RSI,%R15 |
0x457f1e MOV %ECX,0x98(%RSP) |
0x457f25 NOPL (%RAX) |
(316) 0x457f28 TEST %EAX,%EAX |
(316) 0x457f2a JLE 45836a |
(316) 0x457f30 MOV 0xe0(%RSP),%R8 |
(316) 0x457f38 MOV 0xd8(%RSP),%RSI |
(316) 0x457f40 CMPL $0x6,0x5c(%RSP) |
(316) 0x457f45 MOV (%R8),%R12D |
(316) 0x457f48 MOV (%RSI),%R8D |
(316) 0x457f4b MOV %R12D,0xac(%RSP) |
(316) 0x457f53 MOV %R8D,0xa8(%RSP) |
(316) 0x457f5b JBE 4583dd |
(316) 0x457f61 MOVSXD 0xc8(%RSP),%RCX |
(316) 0x457f69 MOVSXD %R12D,%RDX |
(316) 0x457f6c MOVSXD %R8D,%R8 |
(316) 0x457f6f MOV 0xc0(%RSP),%RSI |
(316) 0x457f77 DEC %R8 |
(316) 0x457f7a LEA 0x1(%RDX,%RCX,1),%R12 |
(316) 0x457f7f MOV 0xe8(%RSP),%RDX |
(316) 0x457f87 MOV 0xd0(%RSP),%RCX |
(316) 0x457f8f IMUL %RBX,%R12 |
(316) 0x457f93 IMUL %RDX,%R8 |
(316) 0x457f97 MOV 0x48(%RSP),%RDX |
(316) 0x457f9c ADD %R14,%R12 |
(316) 0x457f9f LEA (%RSI,%R12,8),%RDI |
(316) 0x457fa3 MOV 0xb8(%RSP),%R12 |
(316) 0x457fab ADD %RCX,%R8 |
(316) 0x457fae MOV 0x50(%RSP),%RCX |
(316) 0x457fb3 LEA (%R12,%R8,8),%RSI |
(316) 0x457fb7 ADD %RDI,%RCX |
(316) 0x457fba XOR %R12D,%R12D |
(316) 0x457fbd MOV %RSI,0xa0(%RSP) |
(316) 0x457fc5 ADD %RSI,%RDX |
(316) 0x457fc8 TESTB $0x1,0xb0(%RSP) |
(316) 0x457fd0 JE 45806f |
(316) 0x457fd6 MOV 0x80(%RSP),%R10 |
(316) 0x457fde VMOVSD (%RDI),%XMM7 |
(316) 0x457fe2 ADD %R13,%RSI |
(316) 0x457fe5 VMOVSD (%RDI,%RBX,8),%XMM6 |
(316) 0x457fea VMOVSD (%RDI,%R11,1),%XMM4 |
(316) 0x457ff0 VMOVSD (%RDI,%R10,1),%XMM5 |
(316) 0x457ff6 VMOVSD (%RCX,%R10,1),%XMM1 |
(316) 0x457ffc ADD %R15,%RDI |
(316) 0x457fff MOV 0xa0(%RSP),%R10 |
(316) 0x458007 MOV 0x78(%RSP),%R12 |
(316) 0x45800c MOV 0x70(%RSP),%R8 |
(316) 0x458011 VMOVSD (%RCX),%XMM3 |
(316) 0x458015 VMOVSD (%RCX,%RBX,8),%XMM2 |
(316) 0x45801a VMOVSD (%RCX,%R11,1),%XMM0 |
(316) 0x458020 VMOVSD %XMM7,(%R10) |
(316) 0x458025 ADD %R15,%RCX |
(316) 0x458028 VMOVSD %XMM6,(%R10,%R9,1) |
(316) 0x45802e VMOVSD %XMM5,(%R10,%R12,1) |
(316) 0x458034 VMOVSD %XMM4,(%RDX,%R8,1) |
(316) 0x45803a MOV 0x68(%RSP),%R8 |
(316) 0x45803f VMOVSD %XMM3,(%R10,%R8,1) |
(316) 0x458045 MOV 0xb0(%RSP),%R10D |
(316) 0x45804d VMOVSD %XMM2,(%RDX) |
(316) 0x458051 VMOVSD %XMM1,(%RDX,%R9,1) |
(316) 0x458057 VMOVSD %XMM0,(%RDX,%R12,1) |
(316) 0x45805d MOV $0x1,%R12D |
(316) 0x458063 ADD %R13,%RDX |
(316) 0x458066 CMP %R10D,%R12D |
(316) 0x458069 JE 458191 |
(316) 0x45806f MOV 0x80(%RSP),%R8 |
(316) 0x458077 MOV 0x78(%RSP),%R10 |
(316) 0x45807c MOV %R14,0x60(%RSP) |
(316) 0x458081 MOV 0x70(%RSP),%R14 |
(316) 0x458086 MOV %EAX,0x90(%RSP) |
(316) 0x45808d MOV %R14,0xa0(%RSP) |
(316) 0x458095 MOV 0x68(%RSP),%R14 |
(317) 0x45809a VMOVSD (%RDI),%XMM8 |
(317) 0x45809e VMOVSD (%RDI,%RBX,8),%XMM9 |
(317) 0x4580a3 ADD $0x2,%R12D |
(317) 0x4580a7 VMOVSD (%RDI,%R8,1),%XMM10 |
(317) 0x4580ad VMOVSD (%RDI,%R11,1),%XMM11 |
(317) 0x4580b3 ADD %R15,%RDI |
(317) 0x4580b6 VMOVSD (%RCX),%XMM12 |
(317) 0x4580ba VMOVSD (%RCX,%RBX,8),%XMM13 |
(317) 0x4580bf VMOVSD (%RCX,%R8,1),%XMM14 |
(317) 0x4580c5 VMOVSD (%RCX,%R11,1),%XMM15 |
(317) 0x4580cb VMOVSD %XMM8,(%RSI) |
(317) 0x4580cf ADD %R15,%RCX |
(317) 0x4580d2 MOV 0xa0(%RSP),%RAX |
(317) 0x4580da VMOVSD %XMM9,(%RSI,%R9,1) |
(317) 0x4580e0 VMOVSD %XMM10,(%RSI,%R10,1) |
(317) 0x4580e6 VMOVSD %XMM11,(%RDX,%RAX,1) |
(317) 0x4580eb VMOVSD %XMM12,(%RSI,%R14,1) |
(317) 0x4580f1 ADD %R13,%RSI |
(317) 0x4580f4 VMOVSD %XMM13,(%RDX) |
(317) 0x4580f8 VMOVSD %XMM14,(%RDX,%R9,1) |
(317) 0x4580fe VMOVSD %XMM15,(%RDX,%R10,1) |
(317) 0x458104 ADD %R13,%RDX |
(317) 0x458107 VMOVSD (%RDI),%XMM7 |
(317) 0x45810b VMOVSD (%RDI,%RBX,8),%XMM6 |
(317) 0x458110 VMOVSD (%RDI,%R8,1),%XMM5 |
(317) 0x458116 VMOVSD (%RDI,%R11,1),%XMM4 |
(317) 0x45811c ADD %R15,%RDI |
(317) 0x45811f VMOVSD (%RCX),%XMM3 |
(317) 0x458123 VMOVSD (%RCX,%RBX,8),%XMM2 |
(317) 0x458128 VMOVSD (%RCX,%R8,1),%XMM1 |
(317) 0x45812e VMOVSD (%RCX,%R11,1),%XMM0 |
(317) 0x458134 VMOVSD %XMM7,(%RSI) |
(317) 0x458138 ADD %R15,%RCX |
(317) 0x45813b VMOVSD %XMM6,(%RSI,%R9,1) |
(317) 0x458141 VMOVSD %XMM5,(%RSI,%R10,1) |
(317) 0x458147 VMOVSD %XMM4,(%RDX,%RAX,1) |
(317) 0x45814c VMOVSD %XMM3,(%RSI,%R14,1) |
(317) 0x458152 ADD %R13,%RSI |
(317) 0x458155 VMOVSD %XMM2,(%RDX) |
(317) 0x458159 VMOVSD %XMM1,(%RDX,%R9,1) |
(317) 0x45815f VMOVSD %XMM0,(%RDX,%R10,1) |
(317) 0x458165 MOV 0xb0(%RSP),%EAX |
(317) 0x45816c ADD %R13,%RDX |
(317) 0x45816f CMP %EAX,%R12D |
(317) 0x458172 JNE 45809a |
(316) 0x458178 MOV 0x60(%RSP),%R14 |
(316) 0x45817d MOV 0x90(%RSP),%EAX |
(316) 0x458184 MOV %R8,0x80(%RSP) |
(316) 0x45818c MOV %R10,0x78(%RSP) |
(316) 0x458191 MOV 0x58(%RSP),%EDI |
(316) 0x458195 CMP %EAX,%EDI |
(316) 0x458197 JE 45836a |
(316) 0x45819d MOV %EDI,%R10D |
(316) 0x4581a0 MOV 0x44(%RSP),%EDI |
(316) 0x4581a4 MOV %EAX,%R12D |
(316) 0x4581a7 SUB %R10D,%R12D |
(316) 0x4581aa LEA -0x1(%R12),%ESI |
(316) 0x4581af CMP $0x2,%ESI |
(316) 0x4581b2 JBE 45826c |
(316) 0x4581b8 MOVSXD 0xac(%RSP),%RDX |
(316) 0x4581c0 MOVSXD 0xc8(%RSP),%RCX |
(316) 0x4581c8 MOV %RBX,%RSI |
(316) 0x4581cb IMUL %R10,%RSI |
(316) 0x4581cf IMUL %R9,%R10 |
(316) 0x4581d3 LEA 0x1(%RDX,%RCX,1),%R8 |
(316) 0x4581d8 MOV 0xc0(%RSP),%RDX |
(316) 0x4581e0 MOVSXD 0xa8(%RSP),%RCX |
(316) 0x4581e8 IMUL %RBX,%R8 |
(316) 0x4581ec DEC %RCX |
(316) 0x4581ef ADD %R14,%R8 |
(316) 0x4581f2 ADD %RSI,%R8 |
(316) 0x4581f5 MOV 0xd0(%RSP),%RSI |
(316) 0x4581fd LEA (%RDX,%R8,8),%RDX |
(316) 0x458201 MOV 0xe8(%RSP),%R8 |
(316) 0x458209 VMOVSD (%RDX),%XMM8 |
(316) 0x45820d IMUL %R8,%RCX |
(316) 0x458211 MOV 0x88(%RSP),%R8 |
(316) 0x458219 ADD %R8,%RDX |
(316) 0x45821c ADD %RSI,%RCX |
(316) 0x45821f VMOVSD (%RDX),%XMM9 |
(316) 0x458223 ADD %R8,%RDX |
(316) 0x458226 LEA (%R10,%RCX,8),%R10 |
(316) 0x45822a MOV 0xb8(%RSP),%RCX |
(316) 0x458232 VMOVSD (%RDX),%XMM10 |
(316) 0x458236 VMOVSD (%RDX,%R8,1),%XMM11 |
(316) 0x45823c MOV %R12D,%EDX |
(316) 0x45823f ADD %RCX,%R10 |
(316) 0x458242 AND $-0x4,%EDX |
(316) 0x458245 VMOVSD %XMM8,(%R10) |
(316) 0x45824a ADD %R9,%R10 |
(316) 0x45824d ADD %EDX,%EDI |
(316) 0x45824f VMOVSD %XMM9,(%R10) |
(316) 0x458254 ADD %R9,%R10 |
(316) 0x458257 AND $0x3,%R12D |
(316) 0x45825b VMOVSD %XMM10,(%R10) |
(316) 0x458260 VMOVSD %XMM11,(%R10,%R9,1) |
(316) 0x458266 JE 45836a |
(316) 0x45826c MOV 0xac(%RSP),%R8D |
(316) 0x458274 MOV 0xc8(%RSP),%R12D |
(316) 0x45827c MOV 0xc0(%RSP),%RCX |
(316) 0x458284 LEA (%R8,%RDI,1),%ESI |
(316) 0x458288 ADD %R12D,%ESI |
(316) 0x45828b MOVSXD %ESI,%R10 |
(316) 0x45828e MOV 0xa8(%RSP),%ESI |
(316) 0x458295 IMUL %RBX,%R10 |
(316) 0x458299 MOV %ESI,%EDX |
(316) 0x45829b SUB %EDI,%EDX |
(316) 0x45829d ADD %R14,%R10 |
(316) 0x4582a0 MOVSXD %EDX,%RDX |
(316) 0x4582a3 VMOVSD (%RCX,%R10,8),%XMM12 |
(316) 0x4582a9 MOV 0xe8(%RSP),%R10 |
(316) 0x4582b1 MOV 0xd0(%RSP),%RCX |
(316) 0x4582b9 IMUL %R10,%RDX |
(316) 0x4582bd MOV 0xb8(%RSP),%R10 |
(316) 0x4582c5 ADD %RCX,%RDX |
(316) 0x4582c8 LEA 0x1(%RDI),%ECX |
(316) 0x4582cb VMOVSD %XMM12,(%R10,%RDX,8) |
(316) 0x4582d1 CMP %ECX,%EAX |
(316) 0x4582d3 JL 45836a |
(316) 0x4582d9 LEA (%R8,%RCX,1),%EDX |
(316) 0x4582dd MOV 0xc0(%RSP),%R10 |
(316) 0x4582e5 ADD $0x2,%EDI |
(316) 0x4582e8 ADD %R12D,%EDX |
(316) 0x4582eb MOVSXD %EDX,%RDX |
(316) 0x4582ee IMUL %RBX,%RDX |
(316) 0x4582f2 ADD %R14,%RDX |
(316) 0x4582f5 VMOVSD (%R10,%RDX,8),%XMM13 |
(316) 0x4582fb MOV %ESI,%EDX |
(316) 0x4582fd MOV 0xd0(%RSP),%R10 |
(316) 0x458305 SUB %ECX,%EDX |
(316) 0x458307 MOV 0xe8(%RSP),%RCX |
(316) 0x45830f MOVSXD %EDX,%RDX |
(316) 0x458312 IMUL %RCX,%RDX |
(316) 0x458316 ADD %R10,%RDX |
(316) 0x458319 MOV 0xb8(%RSP),%R10 |
(316) 0x458321 VMOVSD %XMM13,(%R10,%RDX,8) |
(316) 0x458327 CMP %EDI,%EAX |
(316) 0x458329 JL 45836a |
(316) 0x45832b ADD %EDI,%R8D |
(316) 0x45832e SUB %EDI,%ESI |
(316) 0x458330 MOV 0xc0(%RSP),%RDX |
(316) 0x458338 ADD %R12D,%R8D |
(316) 0x45833b MOVSXD %ESI,%RDI |
(316) 0x45833e MOV 0xd0(%RSP),%RSI |
(316) 0x458346 MOVSXD %R8D,%R12 |
(316) 0x458349 IMUL %RCX,%RDI |
(316) 0x45834d MOV 0xb8(%RSP),%RCX |
(316) 0x458355 IMUL %RBX,%R12 |
(316) 0x458359 ADD %RSI,%RDI |
(316) 0x45835c ADD %R14,%R12 |
(316) 0x45835f VMOVSD (%RDX,%R12,8),%XMM14 |
(316) 0x458365 VMOVSD %XMM14,(%RCX,%RDI,8) |
(316) 0x45836a INCL 0xfc(%RSP) |
(316) 0x458371 MOV 0xf0(%RSP),%R8 |
(316) 0x458379 ADD %EAX,0xc8(%RSP) |
(316) 0x458380 ADD %R8,0xd0(%RSP) |
(316) 0x458388 MOV 0xfc(%RSP),%R10D |
(316) 0x458390 TEST %EAX,%EAX |
(316) 0x458392 JNS 4583b5 |
(316) 0x458394 CMP %R10D,0xf8(%RSP) |
(316) 0x45839c JG 457f28 |
0x4583a2 MOV 0x38(%RSP),%R15 |
0x4583a7 KMOVB %K0,0x9f(%RSP) |
0x4583b0 JMP 457d77 |
(316) 0x4583b5 CMP %R10D,0xf8(%RSP) |
(316) 0x4583bd JLE 4583ea |
(316) 0x4583bf MOV 0x98(%RSP),%R12D |
(316) 0x4583c7 KMOVB 0x9f(%RSP),%K0 |
(316) 0x4583d0 MOV %R12D,0x94(%RSP) |
(316) 0x4583d8 JMP 457f28 |
(316) 0x4583dd XOR %R10D,%R10D |
(316) 0x4583e0 MOV $0x1,%EDI |
(316) 0x4583e5 JMP 4581a4 |
0x4583ea MOV 0x38(%RSP),%R15 |
0x4583ef JMP 457d9b |
0x4583f4 NOPW %CS:(%RAX,%RAX,1) |
0x4583ff NOP |
Path / |
Source file and lines | pack_kernel.f90:108-113 |
Module | exec |
nb instructions | 179 |
nb uops | 186 |
loop length | 773 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 26 |
micro-operation queue | 31.00 cycles |
front end | 31.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.30 | 12.20 | 14.00 | 14.00 | 21.50 | 12.27 | 12.10 | 21.50 | 21.50 | 21.50 | 12.13 | 14.00 |
cycles | 12.30 | 15.33 | 14.00 | 14.00 | 21.50 | 12.27 | 12.10 | 21.50 | 21.50 | 21.50 | 12.13 | 14.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 30.29-30.31 |
Stall cycles | 0.00 |
Front-end | 31.00 |
Dispatch | 21.50 |
DIV/SQRT | 6.00 |
Overall L1 | 31.00 |
all | 4% |
load | 12% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 10% |
all | 11% |
load | 20% |
store | 9% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x20(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0xfc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xfc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x58(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 457e10 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x520> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ECX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 457d81 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x491> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMPQ $0x1,0xe8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R8,%RCX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%R14),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R14),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R14),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R14),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
OR %CL,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0xfc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %SIL,0x9f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 457e19 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x529> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0xfc(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RBX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x1(%R15),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RDX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %ESI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDQA64 0x552a3(%RIP),%ZMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
IMUL %EAX,%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RCX),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R12D,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0x9f(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 457dab <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x4bb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0xb0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x98(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x94(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x94(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 457965 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x75> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xfc(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD %EDI,%R10 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%RDI,%RDX,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x5c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R11,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SAL $0x5,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ESI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NEG %RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%R10,%R12,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL $-0x28,%RDI,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9D,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RCX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RBX,%RBX,2),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%RDI,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x4,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NEG %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RCX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %EAX,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RDX),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %ECX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0x9f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 457d77 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x487> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x38(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 457d9b <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x4ab> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | pack_kernel.f90:108-113 |
Module | exec |
nb instructions | 179 |
nb uops | 186 |
loop length | 773 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 26 |
micro-operation queue | 31.00 cycles |
front end | 31.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.30 | 12.20 | 14.00 | 14.00 | 21.50 | 12.27 | 12.10 | 21.50 | 21.50 | 21.50 | 12.13 | 14.00 |
cycles | 12.30 | 15.33 | 14.00 | 14.00 | 21.50 | 12.27 | 12.10 | 21.50 | 21.50 | 21.50 | 12.13 | 14.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 30.29-30.31 |
Stall cycles | 0.00 |
Front-end | 31.00 |
Dispatch | 21.50 |
DIV/SQRT | 6.00 |
Overall L1 | 31.00 |
all | 4% |
load | 12% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 10% |
all | 11% |
load | 20% |
store | 9% |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x20(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x54(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0xfc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 402080 <@plt_start@+0x60> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402180 <@plt_start@+0x160> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0xfc(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x58(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 457e10 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x520> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ECX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 457d81 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x491> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMPQ $0x1,0xe8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R8,%RCX,1),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0x8(%R14),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP $0x1,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x10(%R14),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETNE %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%R14),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R14),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
OR %CL,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EDI,0xfc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R9),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %SIL,0x9f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JNE 457e19 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x529> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0xfc(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %EAX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EBX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RBX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
AND $-0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SAL $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x1(%R15),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL %RDX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %ESI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDQA64 0x552a3(%RIP),%ZMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
IMUL %EAX,%R11D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R12,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVNS %EAX,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R14,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RCX),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R12D,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CMPB $0,0x9f(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 457dab <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x4bb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV 0xb0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV 0x98(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,0x94(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x94(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,0x50(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 457965 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x75> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xfc(%RSP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x1(%RAX),%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (,%RBX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXORB %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD %EDI,%R10 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
LEA (%RDI,%RDX,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x5c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R11,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %EAX,%R9D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SAL $0x5,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %ESI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NEG %RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x4,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%R10,%R12,1),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R11,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL $-0x28,%RDI,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9D,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RCX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RBX,%RBX,2),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%R12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (,%RDI,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x5,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x4,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NEG %RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RCX),%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
CMOVNS %EAX,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RDX),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %ECX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
KMOVB %K0,0x9f(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 457d77 <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x487> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x38(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 457d9b <__pack_kernel_module_MOD_clover_unpack_message_left._omp_fn.0+0x4ab> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼clover_unpack_message_left._omp_fn.0– | 0.03 | 0.01 |
▼Loop 318 - pack_kernel.f90:108-113 - exec– | 0.03 | 0.02 |
○Loop 319 - pack_kernel.f90:113-113 - exec | 0 | 0 |
▼Loop 316 - pack_kernel.f90:112-113 - exec– | 0 | 0 |
○Loop 317 - pack_kernel.f90:113-113 - exec | 0 | 0 |