Loop Id: 324 | Module: exec | Source: calc_dt_kernel.f90:94-129 [...] | Coverage: 4.72% |
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Loop Id: 324 | Module: exec | Source: calc_dt_kernel.f90:94-129 [...] | Coverage: 4.72% |
---|
0x4401a0 VMOVUPD (%RDX,%RCX,8),%ZMM7 [12] |
0x4401a7 VADDPD %ZMM7,%ZMM7,%ZMM7 |
0x4401ad VDIVPD (%R11,%RCX,8),%ZMM7,%ZMM7 [1] |
0x4401b4 VMOVUPD (%R12,%RCX,8),%ZMM8 [9] |
0x4401bb VMOVUPD -0x8(%R13,%RCX,8),%ZMM9 [6] |
0x4401c6 VADDPD -0x8(%RDI,%RCX,8),%ZMM9,%ZMM9 [8] |
0x4401d1 VMULPD -0x8(%R15,%RCX,8),%ZMM9,%ZMM9 [3] |
0x4401dc VMINPD %ZMM30,%ZMM8,%ZMM8 |
0x4401e2 VMOVUPD (%R13,%RCX,8),%ZMM11 [6] |
0x4401ea VADDPD (%RDI,%RCX,8),%ZMM11,%ZMM11 [8] |
0x4401f1 VMULPD (%R15,%RCX,8),%ZMM11,%ZMM11 [3] |
0x4401f8 VMULPD %ZMM8,%ZMM31,%ZMM8 |
0x4401fe VMOVUPD (%R10,%RCX,8),%ZMM12 [7] |
0x440205 VMOVUPD (%RAX,%RCX,8),%ZMM13 [4] |
0x44020c VADDPD %ZMM13,%ZMM13,%ZMM14 |
0x440212 VMULPD %ZMM2,%ZMM13,%ZMM13 |
0x440218 VMOVUPD (%R8,%RCX,8),%ZMM15 [2] |
0x44021f VANDPD %ZMM3,%ZMM11,%ZMM16 |
0x440225 VADDPD -0x8(%R8,%RCX,8),%ZMM15,%ZMM15 [2] |
0x440230 VMULPD (%RBX,%RCX,8),%ZMM15,%ZMM15 [11] |
0x440237 VMOVUPD (%R9,%RCX,8),%ZMM17 [5] |
0x44023e VMAXPD %ZMM13,%ZMM16,%ZMM16 |
0x440244 VADDPD -0x8(%R9,%RCX,8),%ZMM17,%ZMM17 [5] |
0x44024f VMULPD (%RSI,%RCX,8),%ZMM17,%ZMM17 [10] |
0x440256 VADDPD %ZMM15,%ZMM9,%ZMM18 |
0x44025c VFMADD231PD %ZMM12,%ZMM12,%ZMM7 |
0x440262 VSUBPD %ZMM18,%ZMM11,%ZMM11 |
0x440268 VANDPD %ZMM3,%ZMM17,%ZMM12 |
0x44026e VMAXPD %ZMM13,%ZMM12,%ZMM12 |
0x440274 VMULPD %ZMM1,%ZMM14,%ZMM13 |
0x44027a VANDPD %ZMM3,%ZMM9,%ZMM9 |
0x440280 VMAXPD %ZMM16,%ZMM9,%ZMM9 |
0x440286 VANDPD %ZMM3,%ZMM15,%ZMM15 |
0x44028c VMAXPD %ZMM12,%ZMM15,%ZMM12 |
0x440292 VMULPD %ZMM0,%ZMM14,%ZMM15 |
0x440298 VDIVPD %ZMM9,%ZMM13,%ZMM9 |
0x44029e VDIVPD %ZMM12,%ZMM15,%ZMM12 |
0x4402a4 VSQRTPD %ZMM7,%ZMM7 |
0x4402aa VADDPD %ZMM17,%ZMM11,%ZMM11 |
0x4402b0 VDIVPD %ZMM14,%ZMM11,%ZMM11 |
0x4402b6 VCMPPD $0x1,%ZMM4,%ZMM11,%K1 |
0x4402bd VMOVAPD %ZMM5,%ZMM13 |
0x4402c3 VMAXPD %ZMM2,%ZMM7,%ZMM7 |
0x4402c9 VDIVPD %ZMM11,%ZMM6,%ZMM13{%K1} |
0x4402cf VDIVPD %ZMM7,%ZMM8,%ZMM7 |
0x4402d5 VMINPD %ZMM13,%ZMM12,%ZMM8 |
0x4402db VMINPD %ZMM8,%ZMM9,%ZMM8 |
0x4402e1 VMINPD %ZMM8,%ZMM7,%ZMM7 |
0x4402e7 VMINPD %ZMM7,%ZMM28,%ZMM28 |
0x4402ed ADD $0x8,%RCX |
0x4402f1 CMP %R14,%RCX |
0x4402f4 JB 4401a0 |
/scratch_na/users/xoserete/qaas_runs/171-322-0339/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/calc_dt_kernel.f90: 94 - 129 |
-------------------------------------------------------------------------------- |
94: DO j=x_min,x_max |
95: |
96: dsx=celldx(j) |
97: dsy=celldy(k) |
98: |
99: cc=soundspeed(j,k)*soundspeed(j,k) |
100: cc=cc+2.0_8*viscosity_a(j,k)/density0(j,k) |
101: cc=MAX(SQRT(cc),g_small) |
102: |
103: dtct=dtc_safe*MIN(dsx,dsy)/cc |
104: |
105: div=0.0 |
106: |
107: dv1=(xvel0(j ,k)+xvel0(j ,k+1))*xarea(j ,k) |
108: dv2=(xvel0(j+1,k)+xvel0(j+1,k+1))*xarea(j+1,k) |
109: |
110: div=div+dv2-dv1 |
111: |
112: dtut=dtu_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
113: |
114: dv1=(yvel0(j,k )+yvel0(j+1,k ))*yarea(j,k ) |
115: dv2=(yvel0(j,k+1)+yvel0(j+1,k+1))*yarea(j,k+1) |
116: |
117: div=div+dv2-dv1 |
118: |
119: dtvt=dtv_safe*2.0_8*volume(j,k)/MAX(ABS(dv1),ABS(dv2),g_small*volume(j,k)) |
120: |
121: div=div/(2.0_8*volume(j,k)) |
122: |
123: IF(div.LT.-g_small)THEN |
[...] |
129: dt_min_val=MIN(dt_min_val,dtct,dtut,dtvt,dtdivt) |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.22 |
Bottlenecks | P0, |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source | calc_dt_kernel.f90:94-123,calc_dt_kernel.f90:129-129 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 114.00 |
CQA cycles if no scalar integer | 114.00 |
CQA cycles if FP arith vectorized | 114.00 |
CQA cycles if fully vectorized | 114.00 |
Front-end cycles | 12.33 |
DIV/SQRT cycles | 27.00 |
P0 cycles | 9.00 |
P1 cycles | 5.67 |
P2 cycles | 5.67 |
P3 cycles | 0.00 |
P4 cycles | 27.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 5.67 |
P11 cycles | 114.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 114.48 - 114.82 |
Stall cycles (UFS) | 101.47 - 101.81 |
Nb insns | 52.00 |
Nb uops | 66.00 |
Nb loads | 17.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 1.82 |
Nb FLOP add-sub | 72.00 |
Nb FLOP mul | 64.00 |
Nb FLOP fma | 8.00 |
Nb FLOP div | 48.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 8.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 1088.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 7.00 |
Stride n | 5.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 100.00 |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 100.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.22 |
Bottlenecks | P0, |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source | calc_dt_kernel.f90:94-123,calc_dt_kernel.f90:129-129 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 114.00 |
CQA cycles if no scalar integer | 114.00 |
CQA cycles if FP arith vectorized | 114.00 |
CQA cycles if fully vectorized | 114.00 |
Front-end cycles | 12.33 |
DIV/SQRT cycles | 27.00 |
P0 cycles | 9.00 |
P1 cycles | 5.67 |
P2 cycles | 5.67 |
P3 cycles | 0.00 |
P4 cycles | 27.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 5.67 |
P11 cycles | 114.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 114.48 - 114.82 |
Stall cycles (UFS) | 101.47 - 101.81 |
Nb insns | 52.00 |
Nb uops | 66.00 |
Nb loads | 17.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 1.82 |
Nb FLOP add-sub | 72.00 |
Nb FLOP mul | 64.00 |
Nb FLOP fma | 8.00 |
Nb FLOP div | 48.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 8.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 9.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 1088.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 7.00 |
Stride n | 5.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 100.00 |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 100.00 |
Path / |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | calc_dt_kernel.f90:94-129 |
Module | exec |
nb instructions | 52 |
nb uops | 66 |
loop length | 346 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 21 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.13 |
micro-operation queue | 12.33 cycles |
front end | 12.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 27.00 | 0.00 | 5.67 | 5.67 | 0.00 | 27.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 5.67 |
cycles | 27.00 | 9.00 | 5.67 | 5.67 | 0.00 | 27.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 5.67 |
Cycles executing div or sqrt instructions | 114.00 |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 114.48-114.82 |
Stall cycles | 101.47-101.81 |
RS full (events) | 0.02 |
PRF_FLOAT full (events) | 107.77-107.61 |
Front-end | 12.33 |
Dispatch | 27.00 |
DIV/SQRT | 114.00 |
Data deps. | 4.00 |
Overall L1 | 114.00 |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%RDX,%RCX,8),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD %ZMM7,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD (%R11,%RCX,8),%ZMM7,%ZMM7 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 |
VMOVUPD (%R12,%RCX,8),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD -0x8(%R13,%RCX,8),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDI,%RCX,8),%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD -0x8(%R15,%RCX,8),%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMINPD %ZMM30,%ZMM8,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R13,%RCX,8),%ZMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%RDI,%RCX,8),%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R15,%RCX,8),%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM8,%ZMM31,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R10,%RCX,8),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RAX,%RCX,8),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD %ZMM13,%ZMM13,%ZMM14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM2,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R8,%RCX,8),%ZMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VANDPD %ZMM3,%ZMM11,%ZMM16 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDPD -0x8(%R8,%RCX,8),%ZMM15,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RBX,%RCX,8),%ZMM15,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R9,%RCX,8),%ZMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMAXPD %ZMM13,%ZMM16,%ZMM16 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD -0x8(%R9,%RCX,8),%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RSI,%RCX,8),%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM15,%ZMM9,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD231PD %ZMM12,%ZMM12,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBPD %ZMM18,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VANDPD %ZMM3,%ZMM17,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMAXPD %ZMM13,%ZMM12,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM1,%ZMM14,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %ZMM3,%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMAXPD %ZMM16,%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %ZMM3,%ZMM15,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMAXPD %ZMM12,%ZMM15,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM0,%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM9,%ZMM13,%ZMM9 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM12,%ZMM15,%ZMM12 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VSQRTPD %ZMM7,%ZMM7 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 23-32 | 18 |
VADDPD %ZMM17,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %ZMM14,%ZMM11,%ZMM11 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VCMPPD $0x1,%ZMM4,%ZMM11,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %ZMM5,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMAXPD %ZMM2,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM11,%ZMM6,%ZMM13{%K1} | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM7,%ZMM8,%ZMM7 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMINPD %ZMM13,%ZMM12,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM8,%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM8,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM7,%ZMM28,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R14,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4401a0 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | calc_dt_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | calc_dt_kernel.f90:94-129 |
Module | exec |
nb instructions | 52 |
nb uops | 66 |
loop length | 346 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 21 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.13 |
micro-operation queue | 12.33 cycles |
front end | 12.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 27.00 | 0.00 | 5.67 | 5.67 | 0.00 | 27.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 5.67 |
cycles | 27.00 | 9.00 | 5.67 | 5.67 | 0.00 | 27.00 | 1.00 | 0.00 | 0.00 | 0.00 | 0.00 | 5.67 |
Cycles executing div or sqrt instructions | 114.00 |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 114.48-114.82 |
Stall cycles | 101.47-101.81 |
RS full (events) | 0.02 |
PRF_FLOAT full (events) | 107.77-107.61 |
Front-end | 12.33 |
Dispatch | 27.00 |
DIV/SQRT | 114.00 |
Data deps. | 4.00 |
Overall L1 | 114.00 |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%RDX,%RCX,8),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD %ZMM7,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD (%R11,%RCX,8),%ZMM7,%ZMM7 | 4 | 2.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 22-24 | 16 |
VMOVUPD (%R12,%RCX,8),%ZMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD -0x8(%R13,%RCX,8),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD -0x8(%RDI,%RCX,8),%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD -0x8(%R15,%RCX,8),%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMINPD %ZMM30,%ZMM8,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R13,%RCX,8),%ZMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD (%RDI,%RCX,8),%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%R15,%RCX,8),%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULPD %ZMM8,%ZMM31,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R10,%RCX,8),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%RAX,%RCX,8),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VADDPD %ZMM13,%ZMM13,%ZMM14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM2,%ZMM13,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD (%R8,%RCX,8),%ZMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VANDPD %ZMM3,%ZMM11,%ZMM16 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDPD -0x8(%R8,%RCX,8),%ZMM15,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RBX,%RCX,8),%ZMM15,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD (%R9,%RCX,8),%ZMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMAXPD %ZMM13,%ZMM16,%ZMM16 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDPD -0x8(%R9,%RCX,8),%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VMULPD (%RSI,%RCX,8),%ZMM17,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD %ZMM15,%ZMM9,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFMADD231PD %ZMM12,%ZMM12,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSUBPD %ZMM18,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VANDPD %ZMM3,%ZMM17,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMAXPD %ZMM13,%ZMM12,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM1,%ZMM14,%ZMM13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %ZMM3,%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMAXPD %ZMM16,%ZMM9,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VANDPD %ZMM3,%ZMM15,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMAXPD %ZMM12,%ZMM15,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM0,%ZMM14,%ZMM15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM9,%ZMM13,%ZMM9 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM12,%ZMM15,%ZMM12 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VSQRTPD %ZMM7,%ZMM7 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 23-32 | 18 |
VADDPD %ZMM17,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VDIVPD %ZMM14,%ZMM11,%ZMM11 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VCMPPD $0x1,%ZMM4,%ZMM11,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %ZMM5,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMAXPD %ZMM2,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM11,%ZMM6,%ZMM13{%K1} | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM7,%ZMM8,%ZMM7 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMINPD %ZMM13,%ZMM12,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM8,%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM8,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM7,%ZMM28,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD $0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R14,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4401a0 <calc_dt_kernel_module_mp_calc_dt_kernel_.DIR.OMP.PARALLEL.2+0x4a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |