Loop Id: 131 | Module: exec | Source: advec_cell_kernel.f90:256-261 | Coverage: 2.68% |
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Loop Id: 131 | Module: exec | Source: advec_cell_kernel.f90:256-261 | Coverage: 2.68% |
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0x434ce8 VMOVUPD (%R15,%RAX,1),%ZMM12 [4] |
0x434cef VMOVUPD (%R12,%RAX,1),%ZMM13 [5] |
0x434cf6 VMULPD (%RCX,%RAX,1),%ZMM12,%ZMM14 [3] |
0x434cfd VSUBPD (%RBX,%RAX,1),%ZMM13,%ZMM1 [1] |
0x434d04 VADDPD (%R11,%RAX,1),%ZMM12,%ZMM5 [10] |
0x434d0b VSUBPD (%R10,%RAX,1),%ZMM5,%ZMM4 [2] |
0x434d12 VSUBPD (%R14,%RAX,1),%ZMM14,%ZMM0 [6] |
0x434d19 VFMADD132PD (%RDX,%RAX,1),%ZMM1,%ZMM14 [7] |
0x434d20 VADDPD (%R13,%RAX,1),%ZMM0,%ZMM2 [9] |
0x434d28 VDIVPD %ZMM2,%ZMM14,%ZMM6 |
0x434d2e VDIVPD %ZMM4,%ZMM2,%ZMM8 |
0x434d34 VMOVUPD %ZMM8,(%RCX,%RAX,1) [3] |
0x434d3b VMOVUPD %ZMM6,(%RDX,%RAX,1) [7] |
0x434d42 VMOVUPD 0x40(%R15,%RAX,1),%ZMM7 [4] |
0x434d4a VMOVUPD 0x40(%R12,%RAX,1),%ZMM10 [5] |
0x434d52 VMULPD 0x40(%RCX,%RAX,1),%ZMM7,%ZMM9 [3] |
0x434d5a VSUBPD 0x40(%RBX,%RAX,1),%ZMM10,%ZMM15 [1] |
0x434d62 VADDPD 0x40(%R11,%RAX,1),%ZMM7,%ZMM12 [10] |
0x434d6a VSUBPD 0x40(%R10,%RAX,1),%ZMM12,%ZMM14 [2] |
0x434d72 VSUBPD 0x40(%R14,%RAX,1),%ZMM9,%ZMM3 [6] |
0x434d7a VFMADD132PD 0x40(%RDX,%RAX,1),%ZMM15,%ZMM9 [7] |
0x434d82 VADDPD 0x40(%R13,%RAX,1),%ZMM3,%ZMM11 [9] |
0x434d8a VDIVPD %ZMM14,%ZMM11,%ZMM0 |
0x434d90 VDIVPD %ZMM11,%ZMM9,%ZMM2 |
0x434d96 VMOVUPD %ZMM0,0x40(%RCX,%RAX,1) [3] |
0x434d9e VMOVUPD %ZMM2,0x40(%RDX,%RAX,1) [7] |
0x434da6 SUB $-0x80,%RAX |
0x434daa CMP %RAX,0x130(%RSP) [8] |
0x434db2 JNE 434ce8 |
/scratch_na/users/xoserete/qaas_runs/171-322-0339/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/advec_cell_kernel.f90: 256 - 261 |
-------------------------------------------------------------------------------- |
256: pre_mass_s=density1(j,k)*pre_vol(j,k) |
257: post_mass_s=pre_mass_s+mass_flux_y(j,k)-mass_flux_y(j,k+1) |
258: post_ener_s=(energy1(j,k)*pre_mass_s+ener_flux(j,k)-ener_flux(j,k+1))/post_mass_s |
259: advec_vol_s=pre_vol(j,k)+vol_flux_y(j,k)-vol_flux_y(j,k+1) |
260: density1(j,k)=post_mass_s/advec_vol_s |
261: energy1(j,k)=post_ener_s |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.92 |
Bottlenecks | P0, |
Function | advec_cell_kernel._omp_fn.0 |
Source | advec_cell_kernel.f90:256-261 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 64.00 |
CQA cycles if no scalar integer | 64.00 |
CQA cycles if FP arith vectorized | 64.00 |
CQA cycles if fully vectorized | 64.00 |
Front-end cycles | 8.33 |
DIV/SQRT cycles | 13.00 |
P0 cycles | 7.00 |
P1 cycles | 6.33 |
P2 cycles | 6.33 |
P3 cycles | 2.00 |
P4 cycles | 13.00 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.00 |
P10 cycles | 6.33 |
P11 cycles | 64.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 64.29 - 64.31 |
Stall cycles (UFS) | 55.12 - 55.14 |
Nb insns | 29.00 |
Nb uops | 36.00 |
Nb loads | 19.00 |
Nb stores | 4.00 |
Nb stack references | 1.00 |
FLOP/cycle | 2.50 |
Nb FLOP add-sub | 80.00 |
Nb FLOP mul | 16.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 32.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.13 |
Bytes prefetched | 0.00 |
Bytes loaded | 1160.00 |
Bytes stored | 256.00 |
Stride 0 | 1.00 |
Stride 1 | 9.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 4.92 |
Bottlenecks | P0, |
Function | advec_cell_kernel._omp_fn.0 |
Source | advec_cell_kernel.f90:256-261 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 64.00 |
CQA cycles if no scalar integer | 64.00 |
CQA cycles if FP arith vectorized | 64.00 |
CQA cycles if fully vectorized | 64.00 |
Front-end cycles | 8.33 |
DIV/SQRT cycles | 13.00 |
P0 cycles | 7.00 |
P1 cycles | 6.33 |
P2 cycles | 6.33 |
P3 cycles | 2.00 |
P4 cycles | 13.00 |
P5 cycles | 1.00 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.00 |
P10 cycles | 6.33 |
P11 cycles | 64.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 64.29 - 64.31 |
Stall cycles (UFS) | 55.12 - 55.14 |
Nb insns | 29.00 |
Nb uops | 36.00 |
Nb loads | 19.00 |
Nb stores | 4.00 |
Nb stack references | 1.00 |
FLOP/cycle | 2.50 |
Nb FLOP add-sub | 80.00 |
Nb FLOP mul | 16.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 32.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.13 |
Bytes prefetched | 0.00 |
Bytes loaded | 1160.00 |
Bytes stored | 256.00 |
Stride 0 | 1.00 |
Stride 1 | 9.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | NA |
Path / |
Function | advec_cell_kernel._omp_fn.0 |
Source file and lines | advec_cell_kernel.f90:256-261 |
Module | exec |
nb instructions | 29 |
nb uops | 36 |
loop length | 208 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 16 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 5.00 |
micro-operation queue | 8.33 cycles |
front end | 8.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.00 | 0.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
cycles | 13.00 | 7.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
Cycles executing div or sqrt instructions | 64.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 64.29-64.31 |
Stall cycles | 55.12-55.14 |
RS full (events) | 0.25-0.24 |
LB full (events) | 55.32-55.34 |
Front-end | 8.33 |
Dispatch | 13.00 |
DIV/SQRT | 64.00 |
Data deps. | 1.00 |
Overall L1 | 64.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%R15,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R12,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD (%RCX,%RAX,1),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD (%RBX,%RAX,1),%ZMM13,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R11,%RAX,1),%ZMM12,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%R10,%RAX,1),%ZMM5,%ZMM4 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%R14,%RAX,1),%ZMM14,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD (%RDX,%RAX,1),%ZMM1,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%R13,%RAX,1),%ZMM0,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM2,%ZMM14,%ZMM6 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM4,%ZMM2,%ZMM8 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM8,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM6,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD 0x40(%R15,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%R12,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD 0x40(%RCX,%RAX,1),%ZMM7,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD 0x40(%RBX,%RAX,1),%ZMM10,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD 0x40(%R11,%RAX,1),%ZMM7,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%R10,%RAX,1),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%R14,%RAX,1),%ZMM9,%ZMM3 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD 0x40(%RDX,%RAX,1),%ZMM15,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD 0x40(%R13,%RAX,1),%ZMM3,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM14,%ZMM11,%ZMM0 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM11,%ZMM9,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM0,0x40(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM2,0x40(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
SUB $-0x80,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,0x130(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 434ce8 <__advec_cell_kernel_module_MOD_advec_cell_kernel._omp_fn.0+0xf28> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | advec_cell_kernel._omp_fn.0 |
Source file and lines | advec_cell_kernel.f90:256-261 |
Module | exec |
nb instructions | 29 |
nb uops | 36 |
loop length | 208 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 16 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 5.00 |
micro-operation queue | 8.33 cycles |
front end | 8.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 13.00 | 0.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
cycles | 13.00 | 7.00 | 6.33 | 6.33 | 2.00 | 13.00 | 1.00 | 2.00 | 2.00 | 2.00 | 0.00 | 6.33 |
Cycles executing div or sqrt instructions | 64.00 |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 64.29-64.31 |
Stall cycles | 55.12-55.14 |
RS full (events) | 0.25-0.24 |
LB full (events) | 55.32-55.34 |
Front-end | 8.33 |
Dispatch | 13.00 |
DIV/SQRT | 64.00 |
Data deps. | 1.00 |
Overall L1 | 64.00 |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%R15,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD (%R12,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD (%RCX,%RAX,1),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD (%RBX,%RAX,1),%ZMM13,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD (%R11,%RAX,1),%ZMM12,%ZMM5 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%R10,%RAX,1),%ZMM5,%ZMM4 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD (%R14,%RAX,1),%ZMM14,%ZMM0 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD (%RDX,%RAX,1),%ZMM1,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%R13,%RAX,1),%ZMM0,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM2,%ZMM14,%ZMM6 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM4,%ZMM2,%ZMM8 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM8,(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM6,(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD 0x40(%R15,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMOVUPD 0x40(%R12,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VMULPD 0x40(%RCX,%RAX,1),%ZMM7,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VSUBPD 0x40(%RBX,%RAX,1),%ZMM10,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VADDPD 0x40(%R11,%RAX,1),%ZMM7,%ZMM12 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%R10,%RAX,1),%ZMM12,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VSUBPD 0x40(%R14,%RAX,1),%ZMM9,%ZMM3 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VFMADD132PD 0x40(%RDX,%RAX,1),%ZMM15,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD 0x40(%R13,%RAX,1),%ZMM3,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.65 |
VDIVPD %ZMM14,%ZMM11,%ZMM0 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VDIVPD %ZMM11,%ZMM9,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD %ZMM0,0x40(%RCX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMOVUPD %ZMM2,0x40(%RDX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
SUB $-0x80,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,0x130(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 434ce8 <__advec_cell_kernel_module_MOD_advec_cell_kernel._omp_fn.0+0xf28> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |