Loop Id: 230 | Module: exec | Source: advec_cell_kernel.f90:83-157 [...] | Coverage: 0.02% |
---|
Loop Id: 230 | Module: exec | Source: advec_cell_kernel.f90:83-157 [...] | Coverage: 0.02% |
---|
0x433880 VCMPPD $0x1,%ZMM4,%ZMM17,%K1 |
0x433887 VADDPD %ZMM28,%ZMM3,%ZMM3{%K1} |
0x43388d VMULPD %ZMM29,%ZMM3,%ZMM2 |
0x433893 VMOVUPD %ZMM2,(%R10,%RCX,8) [2] |
0x43389a ADD $0x8,%RCX |
0x43389e CMP %R12,%RCX |
0x4338a1 JA 433b00 |
0x4338a7 VMOVUPD (%R14,%RCX,8),%ZMM29 [13] |
0x4338ae VXORPD %XMM28,%XMM28,%XMM28 |
0x4338b4 VCMPPD $0x1,%ZMM29,%ZMM28,%K1 |
0x4338bb LEA (%RDI,%RCX,1),%R9 |
0x4338bf VPBROADCASTQ %R9,%ZMM2 |
0x4338c5 VPADDQ %ZMM5,%ZMM2,%ZMM2 |
0x4338cb MOV 0x40(%RSP),%R9 [6] |
0x4338d0 ADD %ECX,%R9D |
0x4338d3 VPBROADCASTD %R9D,%YMM3 |
0x4338d9 VPCMPGTQ %ZMM2,%ZMM0,%K2 |
0x4338df VMOVDQA %YMM1,%YMM4 |
0x4338e3 VPADDD %YMM14,%YMM3,%YMM4{%K2} |
0x4338e9 VPMOVQD %ZMM2,%YMM2 |
0x4338ef VPADDD %YMM3,%YMM15,%YMM6 |
0x4338f3 VPBLENDMD %YMM2,%YMM6,%YMM18{%K1} |
0x4338f9 VMOVDQA %YMM4,%YMM7 |
0x4338fd VMOVDQA32 %YMM6,%YMM2{%K1} |
0x433903 VPMOVSXDQ %YMM2,%ZMM2 |
0x433909 VPSUBQ %ZMM9,%ZMM2,%ZMM19 |
0x43390f KXNORW %K0,%K0,%K2 |
0x433913 VPXORD %XMM30,%XMM30,%XMM30 |
0x433919 VGATHERQPD (%RDX,%ZMM19,8),%ZMM30{%K2} [8] |
0x433920 VPADDD %YMM16,%YMM3,%YMM7{%K1} |
0x433926 VMOVDQA32 %YMM6,%YMM4{%K1} |
0x43392c VANDPD %ZMM8,%ZMM29,%ZMM2 |
0x433932 VPMOVSXDQ %YMM4,%ZMM3 |
0x433938 VPSUBQ %ZMM9,%ZMM3,%ZMM3 |
0x43393e KXNORW %K0,%K0,%K1 |
0x433942 VPXOR %XMM4,%XMM4,%XMM4 |
0x433946 VGATHERQPD (%RSI,%ZMM3,8),%ZMM4{%K1} [7] |
0x43394d VDIVPD %ZMM30,%ZMM2,%ZMM3 |
0x433953 VMOVUPD (%RBX,%RCX,8),%ZMM6 [5] |
0x43395a VFMADD213PD %ZMM6,%ZMM3,%ZMM6 |
0x433960 KXNORW %K0,%K0,%K1 |
0x433964 VXORPD %XMM2,%XMM2,%XMM2 |
0x433968 VGATHERQPD (%R8,%ZMM19,8),%ZMM2{%K1} [3] |
0x43396f VDIVPD %ZMM4,%ZMM6,%ZMM31 |
0x433975 VPMOVSXDQ %YMM7,%ZMM4 |
0x43397b VPSUBQ %ZMM9,%ZMM4,%ZMM4 |
0x433981 KXNORW %K0,%K0,%K1 |
0x433985 VXORPD %XMM6,%XMM6,%XMM6 |
0x433989 VGATHERQPD (%R8,%ZMM4,8),%ZMM6{%K1} [11] |
0x433990 VSUBPD %ZMM3,%ZMM11,%ZMM7 |
0x433996 VSUBPD %ZMM6,%ZMM2,%ZMM6 |
0x43399c VPMOVSXDQ %YMM18,%ZMM18 |
0x4339a2 VPSUBQ %ZMM9,%ZMM18,%ZMM18 |
0x4339a8 KXNORW %K0,%K0,%K1 |
0x4339ac VPXORD %XMM21,%XMM21,%XMM21 |
0x4339b2 VGATHERQPD (%R8,%ZMM18,8),%ZMM21{%K1} [10] |
0x4339b9 VSUBPD %ZMM2,%ZMM21,%ZMM21 |
0x4339bf VMULPD %ZMM6,%ZMM21,%ZMM22 |
0x4339c5 VCMPPD $0x1,%ZMM22,%ZMM28,%K1 |
0x4339cc VSUBPD %ZMM3,%ZMM10,%ZMM3 |
0x4339d2 VFPCLASSPD $0x56,%ZMM21,%K2 |
0x4339d9 VXORPD %ZMM12,%ZMM3,%ZMM3{%K2} |
0x4339df VANDPD %ZMM8,%ZMM6,%ZMM6 |
0x4339e5 VANDPD %ZMM8,%ZMM21,%ZMM21 |
0x4339eb VMULPD %ZMM31,%ZMM6,%ZMM22 |
0x4339f1 VFMADD231PD %ZMM7,%ZMM21,%ZMM22 |
0x4339f7 VMULPD %ZMM13,%ZMM22,%ZMM22 |
0x4339fd VMINPD %ZMM22,%ZMM21,%ZMM21 |
0x433a03 VMINPD %ZMM21,%ZMM6,%ZMM6 |
0x433a09 VMOVAPD %ZMM2,%ZMM21 |
0x433a0f VFMADD231PD %ZMM3,%ZMM6,%ZMM21{%K1} |
0x433a15 VMULPD %ZMM29,%ZMM21,%ZMM29 |
0x433a1b VMOVUPD %ZMM29,(%R11,%RCX,8) [1] |
0x433a22 KXNORW %K0,%K0,%K1 |
0x433a26 VXORPD %XMM3,%XMM3,%XMM3 |
0x433a2a VGATHERQPD (%R13,%ZMM19,8),%ZMM3{%K1} [9] |
0x433a32 KXNORW %K0,%K0,%K1 |
0x433a36 VXORPD %XMM6,%XMM6,%XMM6 |
0x433a3a VGATHERQPD (%R13,%ZMM4,8),%ZMM6{%K1} [4] |
0x433a42 KXNORW %K0,%K0,%K1 |
0x433a46 VXORPD %XMM4,%XMM4,%XMM4 |
0x433a4a VGATHERQPD (%R13,%ZMM18,8),%ZMM4{%K1} [12] |
0x433a52 VSUBPD %ZMM6,%ZMM3,%ZMM6 |
0x433a58 VSUBPD %ZMM3,%ZMM4,%ZMM18 |
0x433a5e VMULPD %ZMM6,%ZMM18,%ZMM4 |
0x433a64 VCMPPD $0x1,%ZMM4,%ZMM28,%K0 |
0x433a6b KORTESTB %K0,%K0 |
0x433a6f JE 433880 |
0x433a75 VANDPD %ZMM8,%ZMM29,%ZMM19 |
0x433a7b VMULPD %ZMM30,%ZMM2,%ZMM2 |
0x433a81 VDIVPD %ZMM2,%ZMM19,%ZMM2 |
0x433a87 VSUBPD %ZMM2,%ZMM10,%ZMM2 |
0x433a8d VFPCLASSPD $0x56,%ZMM18,%K1 |
0x433a94 VXORPD %ZMM12,%ZMM2,%ZMM2{%K1} |
0x433a9a VANDPD %ZMM8,%ZMM6,%ZMM6 |
0x433aa0 VANDPD %ZMM8,%ZMM18,%ZMM18 |
0x433aa6 VMULPD %ZMM31,%ZMM6,%ZMM19 |
0x433aac VFMADD213PD %ZMM19,%ZMM18,%ZMM7 |
0x433ab2 VMULPD %ZMM13,%ZMM7,%ZMM7 |
0x433ab8 VMINPD %ZMM7,%ZMM18,%ZMM7 |
0x433abe VMINPD %ZMM7,%ZMM6,%ZMM6 |
0x433ac4 VMULPD %ZMM2,%ZMM6,%ZMM28 |
0x433aca JMP 433880 |
/scratch_na/users/xoserete/qaas_runs/171-419-3245/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/advec_cell_kernel.f90: 83 - 157 |
-------------------------------------------------------------------------------- |
83: IF(dir.EQ.g_xdir) THEN |
[...] |
112: IF(vol_flux_x(j,k).GT.0.0)THEN |
[...] |
118: upwind =MIN(j+1,x_max+2) |
[...] |
124: sigmat=ABS(vol_flux_x(j,k))/pre_vol(donor,k) |
125: sigma3=(1.0_8+sigmat)*(vertexdx(j)/vertexdx(dif)) |
126: sigma4=2.0_8-sigmat |
127: |
128: sigma=sigmat |
129: sigmav=sigmat |
130: |
131: diffuw=density1(donor,k)-density1(upwind,k) |
132: diffdw=density1(downwind,k)-density1(donor,k) |
133: wind=1.0_8 |
134: IF(diffdw.LE.0.0) wind=-1.0_8 |
135: IF(diffuw*diffdw.GT.0.0)THEN |
136: limiter=(1.0_8-sigmav)*wind*MIN(ABS(diffuw),ABS(diffdw)& |
137: ,one_by_six*(sigma3*ABS(diffuw)+sigma4*ABS(diffdw))) |
138: ELSE |
139: limiter=0.0 |
140: ENDIF |
141: mass_flux_x(j,k)=vol_flux_x(j,k)*(density1(donor,k)+limiter) |
142: |
143: sigmam=ABS(mass_flux_x(j,k))/(density1(donor,k)*pre_vol(donor,k)) |
144: diffuw=energy1(donor,k)-energy1(upwind,k) |
145: diffdw=energy1(downwind,k)-energy1(donor,k) |
146: wind=1.0_8 |
147: IF(diffdw.LE.0.0) wind=-1.0_8 |
148: IF(diffuw*diffdw.GT.0.0)THEN |
149: limiter=(1.0_8-sigmam)*wind*MIN(ABS(diffuw),ABS(diffdw)& |
150: ,one_by_six*(sigma3*ABS(diffuw)+sigma4*ABS(diffdw))) |
151: ELSE |
152: limiter=0.0 |
153: ENDIF |
154: |
155: ener_flux(j,k)=mass_flux_x(j,k)*(energy1(donor,k)+limiter) |
156: |
157: ENDDO |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.05 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.01 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 0.92 |
Bottlenecks | |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_cell_kernel.f90:83-83,advec_cell_kernel.f90:112-112,advec_cell_kernel.f90:118-118,advec_cell_kernel.f90:124-157 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | peel/tail |
Unroll factor | 1 |
CQA cycles | 43.75 |
CQA cycles if no scalar integer | 41.50 |
CQA cycles if FP arith vectorized | 43.75 |
CQA cycles if fully vectorized | 43.34 |
Front-end cycles | 22.08 |
DIV/SQRT cycles | 43.50 |
P0 cycles | 9.50 |
P1 cycles | 22.33 |
P2 cycles | 22.33 |
P3 cycles | 1.00 |
P4 cycles | 43.50 |
P5 cycles | 2.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 2.00 |
P10 cycles | 22.33 |
P11 cycles | 40.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 48.26 - 74.48 |
Stall cycles (UFS) | 28.18 - 54.25 |
Nb insns | 95.50 |
Nb uops | 132.50 |
Nb loads | 11.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 4.57 |
Nb FLOP add-sub | 60.00 |
Nb FLOP mul | 64.00 |
Nb FLOP fma | 28.00 |
Nb FLOP div | 20.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.91 |
Bytes prefetched | 0.00 |
Bytes loaded | 648.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 4.00 |
Stride n | 0.00 |
Stride unknown | 3.00 |
Stride indirect | 5.00 |
Vectorization ratio all | 96.22 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 93.51 |
Vector-efficiency ratio all | 80.55 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 90.31 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 69.86 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.01 |
Bottlenecks | P0, |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_cell_kernel.f90:83-83,advec_cell_kernel.f90:112-112,advec_cell_kernel.f90:118-118,advec_cell_kernel.f90:124-157 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | peel/tail |
Unroll factor | 1 |
CQA cycles | 48.00 |
CQA cycles if no scalar integer | 48.00 |
CQA cycles if FP arith vectorized | 48.00 |
CQA cycles if fully vectorized | 48.00 |
Front-end cycles | 23.50 |
DIV/SQRT cycles | 47.50 |
P0 cycles | 11.00 |
P1 cycles | 22.33 |
P2 cycles | 22.33 |
P3 cycles | 1.00 |
P4 cycles | 47.50 |
P5 cycles | 2.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 2.00 |
P10 cycles | 22.33 |
P11 cycles | 48.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 53.33 - 83.40 |
Stall cycles (UFS) | 31.80 - 61.77 |
Nb insns | 103.00 |
Nb uops | 141.00 |
Nb loads | 11.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 4.83 |
Nb FLOP add-sub | 64.00 |
Nb FLOP mul | 80.00 |
Nb FLOP fma | 32.00 |
Nb FLOP div | 24.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.17 |
Bytes prefetched | 0.00 |
Bytes loaded | 648.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 4.00 |
Stride n | 0.00 |
Stride unknown | 3.00 |
Stride indirect | 5.00 |
Vectorization ratio all | 96.55 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 94.00 |
Vector-efficiency ratio all | 82.26 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 90.63 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 72.13 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.13 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.02 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | NA |
Bottlenecks | P0, P5, |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source | advec_cell_kernel.f90:83-83,advec_cell_kernel.f90:112-112,advec_cell_kernel.f90:118-118,advec_cell_kernel.f90:124-157 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | peel/tail |
Unroll factor | 1 |
CQA cycles | 39.50 |
CQA cycles if no scalar integer | 35.00 |
CQA cycles if FP arith vectorized | 39.50 |
CQA cycles if fully vectorized | 38.69 |
Front-end cycles | 20.67 |
DIV/SQRT cycles | 39.50 |
P0 cycles | 8.00 |
P1 cycles | 22.33 |
P2 cycles | 22.33 |
P3 cycles | 1.00 |
P4 cycles | 39.50 |
P5 cycles | 2.00 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 2.00 |
P10 cycles | 22.33 |
P11 cycles | 32.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 43.19 - 65.57 |
Stall cycles (UFS) | 24.55 - 46.74 |
Nb insns | 88.00 |
Nb uops | 124.00 |
Nb loads | 11.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 4.25 |
Nb FLOP add-sub | 56.00 |
Nb FLOP mul | 48.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 16.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.65 |
Bytes prefetched | 0.00 |
Bytes loaded | 648.00 |
Bytes stored | 128.00 |
Stride 0 | 1.00 |
Stride 1 | 4.00 |
Stride n | 0.00 |
Stride unknown | 3.00 |
Stride indirect | 5.00 |
Vectorization ratio all | 95.89 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 93.02 |
Vector-efficiency ratio all | 78.85 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 90.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 67.59 |
Path / |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_cell_kernel.f90:83-157 |
Module | exec |
nb instructions | 95.50 |
nb uops | 132.50 |
loop length | 546 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 10 |
used zmm registers | 22 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 0.98 |
micro-operation queue | 22.08 cycles |
front end | 22.08 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 43.50 | 6.00 | 22.33 | 22.33 | 1.00 | 43.50 | 2.00 | 1.00 | 1.00 | 1.00 | 2.00 | 22.33 |
cycles | 43.50 | 9.50 | 22.33 | 22.33 | 1.00 | 43.50 | 2.00 | 1.00 | 1.00 | 1.00 | 2.00 | 22.33 |
Cycles executing div or sqrt instructions | 40.00 |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 48.26-74.48 |
Stall cycles | 28.18-54.25 |
RS full (events) | 44.81-23.74 |
PRF_FLOAT full (events) | 1.58-41.66 |
Front-end | 22.08 |
Dispatch | 43.50 |
DIV/SQRT | 40.00 |
Data deps. | 0.00 |
Overall L1 | 43.75 |
all | 88% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 82% |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 96% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 93% |
all | 56% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 81% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 44% |
all | 91% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 84% |
all | 80% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 90% |
fma | 100% |
div/sqrt | 100% |
other | 69% |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_cell_kernel.f90:83-157 |
Module | exec |
nb instructions | 103 |
nb uops | 141 |
loop length | 591 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 10 |
used zmm registers | 22 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 0.80 |
micro-operation queue | 23.50 cycles |
front end | 23.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 47.50 | 6.00 | 22.33 | 22.33 | 1.00 | 47.50 | 2.00 | 1.00 | 1.00 | 1.00 | 2.00 | 22.33 |
cycles | 47.50 | 11.00 | 22.33 | 22.33 | 1.00 | 47.50 | 2.00 | 1.00 | 1.00 | 1.00 | 2.00 | 22.33 |
Cycles executing div or sqrt instructions | 48.00 |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 53.33-83.40 |
Stall cycles | 31.80-61.77 |
RS full (events) | 48.34-34.58 |
PRF_FLOAT full (events) | 3.17-42.00 |
Front-end | 23.50 |
Dispatch | 47.50 |
DIV/SQRT | 48.00 |
Data deps. | 0.00 |
Overall L1 | 48.00 |
all | 88% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 82% |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 96% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 94% |
all | 56% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 81% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 44% |
all | 92% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 86% |
all | 82% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 90% |
fma | 100% |
div/sqrt | 100% |
other | 72% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VCMPPD $0x1,%ZMM4,%ZMM17,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %ZMM28,%ZMM3,%ZMM3{%K1} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM29,%ZMM3,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM2,(%R10,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 433b00 <advec_cell_kernel_module_mp_advec_cell_kernel_.DIR.OMP.PARALLEL.2+0x4cc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD (%R14,%RCX,8),%ZMM29 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VXORPD %XMM28,%XMM28,%XMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VCMPPD $0x1,%ZMM29,%ZMM28,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RDI,%RCX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ %R9,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM5,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ECX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R9D,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPCMPGTQ %ZMM2,%ZMM0,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VMOVDQA %YMM1,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPADDD %YMM14,%YMM3,%YMM4{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMOVQD %ZMM2,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDD %YMM3,%YMM15,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPBLENDMD %YMM2,%YMM6,%YMM18{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA %YMM4,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVDQA32 %YMM6,%YMM2{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %YMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM2,%ZMM19 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXORD %XMM30,%XMM30,%XMM30 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (%RDX,%ZMM19,8),%ZMM30{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDD %YMM16,%YMM3,%YMM7{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA32 %YMM6,%YMM4{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VANDPD %ZMM8,%ZMM29,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMOVSXDQ %YMM4,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXOR %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%RSI,%ZMM3,8),%ZMM4{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VDIVPD %ZMM30,%ZMM2,%ZMM3 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD (%RBX,%RCX,8),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VFMADD213PD %ZMM6,%ZMM3,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R8,%ZMM19,8),%ZMM2{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VDIVPD %ZMM4,%ZMM6,%ZMM31 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VPMOVSXDQ %YMM7,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R8,%ZMM4,8),%ZMM6{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM3,%ZMM11,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM6,%ZMM2,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPMOVSXDQ %YMM18,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM18,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXORD %XMM21,%XMM21,%XMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (%R8,%ZMM18,8),%ZMM21{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM2,%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM6,%ZMM21,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%ZMM22,%ZMM28,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSUBPD %ZMM3,%ZMM10,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFPCLASSPD $0x56,%ZMM21,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %ZMM12,%ZMM3,%ZMM3{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VANDPD %ZMM8,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM8,%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %ZMM31,%ZMM6,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM7,%ZMM21,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM13,%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM22,%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM21,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %ZMM2,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD231PD %ZMM3,%ZMM6,%ZMM21{%K1} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM29,%ZMM21,%ZMM29 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM29,(%R11,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R13,%ZMM19,8),%ZMM3{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R13,%ZMM4,8),%ZMM6{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R13,%ZMM18,8),%ZMM4{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM6,%ZMM3,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM3,%ZMM4,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM6,%ZMM18,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%ZMM4,%ZMM28,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 433880 <advec_cell_kernel_module_mp_advec_cell_kernel_.DIR.OMP.PARALLEL.2+0x4a40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VANDPD %ZMM8,%ZMM29,%ZMM19 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %ZMM30,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM2,%ZMM19,%ZMM2 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VSUBPD %ZMM2,%ZMM10,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFPCLASSPD $0x56,%ZMM18,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %ZMM12,%ZMM2,%ZMM2{%K1} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VANDPD %ZMM8,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM8,%ZMM18,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %ZMM31,%ZMM6,%ZMM19 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD213PD %ZMM19,%ZMM18,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM13,%ZMM7,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM7,%ZMM18,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM7,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM2,%ZMM6,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 433880 <advec_cell_kernel_module_mp_advec_cell_kernel_.DIR.OMP.PARALLEL.2+0x4a40> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | advec_cell_kernel_.DIR.OMP.PARALLEL.2 |
Source file and lines | advec_cell_kernel.f90:83-157 |
Module | exec |
nb instructions | 88 |
nb uops | 124 |
loop length | 501 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 10 |
used zmm registers | 22 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 1.17 |
micro-operation queue | 20.67 cycles |
front end | 20.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 39.50 | 6.00 | 22.33 | 22.33 | 1.00 | 39.50 | 2.00 | 1.00 | 1.00 | 1.00 | 2.00 | 22.33 |
cycles | 39.50 | 8.00 | 22.33 | 22.33 | 1.00 | 39.50 | 2.00 | 1.00 | 1.00 | 1.00 | 2.00 | 22.33 |
Cycles executing div or sqrt instructions | 32.00 |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 43.19-65.57 |
Stall cycles | 24.55-46.74 |
RS full (events) | 41.29-12.90 |
Front-end | 20.67 |
Dispatch | 39.50 |
DIV/SQRT | 32.00 |
Data deps. | 0.00 |
Overall L1 | 39.50 |
all | 88% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 82% |
all | 100% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 95% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 93% |
all | 56% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 81% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 44% |
all | 90% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 82% |
all | 78% |
load | 100% |
store | 100% |
mul | 100% |
add-sub | 90% |
fma | 100% |
div/sqrt | 100% |
other | 67% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VCMPPD $0x1,%ZMM4,%ZMM17,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %ZMM28,%ZMM3,%ZMM3{%K1} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM29,%ZMM3,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM2,(%R10,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
ADD $0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R12,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 433b00 <advec_cell_kernel_module_mp_advec_cell_kernel_.DIR.OMP.PARALLEL.2+0x4cc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD (%R14,%RCX,8),%ZMM29 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VXORPD %XMM28,%XMM28,%XMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VCMPPD $0x1,%ZMM29,%ZMM28,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%RDI,%RCX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ %R9,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ %ZMM5,%ZMM2,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %ECX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R9D,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPCMPGTQ %ZMM2,%ZMM0,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
VMOVDQA %YMM1,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPADDD %YMM14,%YMM3,%YMM4{%K2} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPMOVQD %ZMM2,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDD %YMM3,%YMM15,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPBLENDMD %YMM2,%YMM6,%YMM18{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA %YMM4,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVDQA32 %YMM6,%YMM2{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPMOVSXDQ %YMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM2,%ZMM19 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXORD %XMM30,%XMM30,%XMM30 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (%RDX,%ZMM19,8),%ZMM30{%K2} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VPADDD %YMM16,%YMM3,%YMM7{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDQA32 %YMM6,%YMM4{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VANDPD %ZMM8,%ZMM29,%ZMM2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VPMOVSXDQ %YMM4,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM3,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXOR %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%RSI,%ZMM3,8),%ZMM4{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VDIVPD %ZMM30,%ZMM2,%ZMM3 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VMOVUPD (%RBX,%RCX,8),%ZMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
VFMADD213PD %ZMM6,%ZMM3,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM2,%XMM2,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R8,%ZMM19,8),%ZMM2{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VDIVPD %ZMM4,%ZMM6,%ZMM31 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 22-24 | 16 |
VPMOVSXDQ %YMM7,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM4,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R8,%ZMM4,8),%ZMM6{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM3,%ZMM11,%ZMM7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM6,%ZMM2,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VPMOVSXDQ %YMM18,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPSUBQ %ZMM9,%ZMM18,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPXORD %XMM21,%XMM21,%XMM21 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VGATHERQPD (%R8,%ZMM18,8),%ZMM21{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM2,%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM6,%ZMM21,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%ZMM22,%ZMM28,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSUBPD %ZMM3,%ZMM10,%ZMM3 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFPCLASSPD $0x56,%ZMM21,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %ZMM12,%ZMM3,%ZMM3{%K2} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.50 |
VANDPD %ZMM8,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VANDPD %ZMM8,%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VMULPD %ZMM31,%ZMM6,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %ZMM7,%ZMM21,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM13,%ZMM22,%ZMM22 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM22,%ZMM21,%ZMM21 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMINPD %ZMM21,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %ZMM2,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD231PD %ZMM3,%ZMM6,%ZMM21{%K1} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULPD %ZMM29,%ZMM21,%ZMM29 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD %ZMM29,(%R11,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R13,%ZMM19,8),%ZMM3{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R13,%ZMM4,8),%ZMM6{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VGATHERQPD (%R13,%ZMM18,8),%ZMM4{%K1} | 5 | 1 | 0 | 2.67 | 2.67 | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 2.67 | 0-29 | 2.67 |
VSUBPD %ZMM6,%ZMM3,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSUBPD %ZMM3,%ZMM4,%ZMM18 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMULPD %ZMM6,%ZMM18,%ZMM4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPPD $0x1,%ZMM4,%ZMM28,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
KORTESTB %K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 433880 <advec_cell_kernel_module_mp_advec_cell_kernel_.DIR.OMP.PARALLEL.2+0x4a40> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |