Function: flux_calc_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: flux_calc_kernel.f90:49-63 | Coverage: 4.27% |
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Function: flux_calc_kernel_.DIR.OMP.PARALLEL.2 | Module: exec | Source: flux_calc_kernel.f90:49-63 | Coverage: 4.27% |
---|
/scratch_na/users/xoserete/qaas_runs/171-419-3245/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/flux_calc_kernel.f90: 49 - 63 |
-------------------------------------------------------------------------------- |
49: !$OMP PARALLEL |
50: |
51: ! Note that the loops calculate one extra flux than required, but this |
52: ! allows loop fusion that improves performance |
53: !$OMP DO |
54: DO k=y_min,y_max+1 |
55: !$OMP SIMD |
56: DO j=x_min,x_max+1 |
57: vol_flux_x(j,k)=0.25_8*dt*xarea(j,k) & |
58: *(xvel0(j,k)+xvel0(j,k+1)+xvel1(j,k)+xvel1(j,k+1)) |
59: vol_flux_y(j,k)=0.25_8*dt*yarea(j,k) & |
60: *(yvel0(j,k)+yvel0(j+1,k)+yvel1(j,k)+yvel1(j+1,k)) |
61: ENDDO |
62: ENDDO |
63: !$OMP END DO |
0x442a40 PUSH %RBP |
0x442a41 MOV %RSP,%RBP |
0x442a44 PUSH %R15 |
0x442a46 PUSH %R14 |
0x442a48 PUSH %R13 |
0x442a4a PUSH %R12 |
0x442a4c PUSH %RBX |
0x442a4d SUB $0x108,%RSP |
0x442a54 MOV %R9,-0x50(%RBP) |
0x442a58 MOV %RCX,-0x48(%RBP) |
0x442a5c MOV 0x60(%RBP),%EBX |
0x442a5f MOV 0x58(%RBP),%EAX |
0x442a62 SUB %EBX,%EAX |
0x442a64 INC %EAX |
0x442a66 MOVL $0,-0x68(%RBP) |
0x442a6d JS 442adc |
0x442a6f MOV %RDI,-0x90(%RBP) |
0x442a76 MOV (%RDI),%ESI |
0x442a78 MOVL $0,-0x34(%RBP) |
0x442a7f MOV %EAX,-0x30(%RBP) |
0x442a82 MOVL $0x1,-0x64(%RBP) |
0x442a89 SUB $0x8,%RSP |
0x442a8d LEA -0x64(%RBP),%RAX |
0x442a91 LEA -0x68(%RBP),%RCX |
0x442a95 LEA -0x34(%RBP),%R8 |
0x442a99 LEA -0x30(%RBP),%R9 |
0x442a9d MOV $0x74b5f0,%EDI |
0x442aa2 MOV %ESI,-0x5c(%RBP) |
0x442aa5 MOV $0x22,%EDX |
0x442aaa PUSH $0x1 |
0x442aac PUSH $0x1 |
0x442aae PUSH %RAX |
0x442aaf CALL 4044c0 <__kmpc_for_static_init_4@plt> |
0x442ab4 ADD $0x20,%RSP |
0x442ab8 MOV -0x34(%RBP),%EAX |
0x442abb MOV -0x30(%RBP),%ECX |
0x442abe SUB %EAX,%ECX |
0x442ac0 MOV %ECX,-0x60(%RBP) |
0x442ac3 JAE 442b00 |
0x442ac5 MOV $0x74b610,%EDI |
0x442aca MOV -0x5c(%RBP),%ESI |
0x442acd VZEROUPPER |
0x442ad0 CALL 4040b0 <__kmpc_for_static_fini@plt> |
0x442ad5 MOV -0x90(%RBP),%RDI |
0x442adc MOV (%RDI),%ESI |
0x442ade MOV $0x74b630,%EDI |
0x442ae3 CALL 404580 <__kmpc_barrier@plt> |
0x442ae8 ADD $0x108,%RSP |
0x442aef POP %RBX |
0x442af0 POP %R12 |
0x442af2 POP %R13 |
0x442af4 POP %R14 |
0x442af6 POP %R15 |
0x442af8 POP %RBP |
0x442af9 RET |
0x442afa NOPW (%RAX,%RAX,1) |
0x442b00 MOV %RAX,%RDX |
0x442b03 MOV 0x40(%RBP),%RDI |
0x442b07 MOV 0x38(%RBP),%R8 |
0x442b0b MOV 0x28(%RBP),%R9 |
0x442b0f MOV 0x20(%RBP),%R10 |
0x442b13 MOV 0x18(%RBP),%R11 |
0x442b17 MOV 0x10(%RBP),%R14 |
0x442b1b MOVSXD -0x50(%RBP),%RAX |
0x442b1f SAL $0x3,%RAX |
0x442b23 MOV $0x18,%R15D |
0x442b29 SUB %RAX,%R15 |
0x442b2c MOVSXD -0x48(%RBP),%RCX |
0x442b30 MOV $0x2,%R12D |
0x442b36 SUB %RCX,%R12 |
0x442b39 MOV %R12,-0xd8(%RBP) |
0x442b40 ADD %EBX,%EDX |
0x442b42 MOV $0x10,%EBX |
0x442b47 SUB %RAX,%RBX |
0x442b4a MOV $0x3,%EAX |
0x442b4f SUB %RCX,%RAX |
0x442b52 MOV %RAX,-0xc8(%RBP) |
0x442b59 LEA (%R10,%R15,1),%RAX |
0x442b5d MOV %RAX,-0xc0(%RBP) |
0x442b64 ADD 0x30(%RBP),%R15 |
0x442b68 MOV %R15,-0xe0(%RBP) |
0x442b6f LEA (%R14,%RBX,1),%RAX |
0x442b73 MOV %RAX,-0xb8(%RBP) |
0x442b7a LEA (%RDI,%RBX,1),%RAX |
0x442b7e MOV %RAX,-0xb0(%RBP) |
0x442b85 LEA (%R11,%RBX,1),%RAX |
0x442b89 MOV %RAX,-0xa8(%RBP) |
0x442b90 LEA (%R9,%RBX,1),%RAX |
0x442b94 MOV %RAX,-0xa0(%RBP) |
0x442b9b LEA (%R8,%RBX,1),%RAX |
0x442b9f MOV %RAX,-0x98(%RBP) |
0x442ba6 ADD 0x48(%RBP),%RBX |
0x442baa MOV %RBX,-0xd0(%RBP) |
0x442bb1 VMOVSD 0xc6227(%RIP),%XMM0 |
0x442bb9 VMOVDQA64 0xc53bd(%RIP),%ZMM1 |
0x442bc3 MOV 0x70(%RBP),%RDI |
0x442bc7 MOV 0x68(%RBP),%RSI |
0x442bcb XOR %R9D,%R9D |
0x442bce MOV %RDX,-0xe8(%RBP) |
0x442bd5 JMP 442db0 |
0x442bda NOPW %CS:(%RAX,%RAX,1) |
0x442be9 NOPW %CS:(%RAX,%RAX,1) |
0x442bf8 NOPL (%RAX,%RAX,1) |
(344) 0x442c00 MOVSXD -0x48(%RBP),%RAX |
(344) 0x442c04 SUB %RAX,%RCX |
(344) 0x442c07 LEA 0x2(%RCX),%RAX |
(344) 0x442c0b MOV %R12,%R8 |
(344) 0x442c0e IMUL %RAX,%R8 |
(344) 0x442c12 MOVSXD -0x50(%RBP),%R12 |
(344) 0x442c16 ADD $-0x2,%R12 |
(344) 0x442c1a VBROADCASTSD %XMM13,%ZMM13 |
(344) 0x442c20 ADD $0x3,%RCX |
(344) 0x442c24 MOV %R14,%RDX |
(344) 0x442c27 IMUL %RCX,%RDX |
(344) 0x442c2b MOV %RDX,-0x80(%RBP) |
(344) 0x442c2f IMUL %RAX,%R14 |
(344) 0x442c33 IMUL %R11,%RCX |
(344) 0x442c37 IMUL %RAX,%R11 |
(344) 0x442c3b MOV %R11,-0x78(%RBP) |
(344) 0x442c3f MOV -0x40(%RBP),%RDX |
(344) 0x442c43 IMUL %RAX,%RDX |
(344) 0x442c47 IMUL %RAX,%R9 |
(344) 0x442c4b IMUL %RAX,%R13 |
(344) 0x442c4f IMUL %RAX,%R10 |
(344) 0x442c53 IMUL %RAX,%R15 |
(344) 0x442c57 MOV %R10,%RAX |
(344) 0x442c5a MOV %R15,%R10 |
(344) 0x442c5d MOV %RAX,%R15 |
(344) 0x442c60 MOV %R9,%R11 |
(344) 0x442c63 MOV %RDX,-0x70(%RBP) |
(344) 0x442c67 MOV %R8,%RAX |
(344) 0x442c6a XOR %R8D,%R8D |
(344) 0x442c6d MOV -0x2c(%RBP),%EDX |
(344) 0x442c70 MOV -0x88(%RBP),%R9 |
(344) 0x442c77 VPBROADCASTQ %R8,%ZMM14 |
(344) 0x442c7d ADD %R8,%RBX |
(344) 0x442c80 SUB %R12,%RBX |
(344) 0x442c83 VPSUBQ %ZMM14,%ZMM12,%ZMM12 |
(344) 0x442c89 VPCMPNLEUQ %ZMM1,%ZMM12,%K1 |
(344) 0x442c90 ADD 0x48(%RBP),%RAX |
(344) 0x442c94 VMOVUPD (%RAX,%RBX,8),%ZMM12{%K1}{z} |
(344) 0x442c9b MOV 0x38(%RBP),%RAX |
(344) 0x442c9f MOV -0x80(%RBP),%R8 |
(344) 0x442ca3 ADD %RAX,%R8 |
(344) 0x442ca6 VMOVUPD (%R8,%RBX,8),%ZMM14{%K1}{z} |
(344) 0x442cad ADD %RAX,%R14 |
(344) 0x442cb0 VMOVUPD (%R14,%RBX,8),%ZMM15{%K1}{z} |
(344) 0x442cb7 MOV 0x28(%RBP),%RAX |
(344) 0x442cbb MOV -0x78(%RBP),%R8 |
(344) 0x442cbf ADD %RAX,%R8 |
(344) 0x442cc2 VMOVUPD (%R8,%RBX,8),%ZMM16{%K1}{z} |
(344) 0x442cc9 ADD %RAX,%RCX |
(344) 0x442ccc VMOVUPD (%RCX,%RBX,8),%ZMM17{%K1}{z} |
(344) 0x442cd3 VMOVAPD %ZMM12,%ZMM11{%K1} |
(344) 0x442cd9 VMULPD %ZMM13,%ZMM11,%ZMM12 |
(344) 0x442cdf VMOVAPD %ZMM14,%ZMM10{%K1} |
(344) 0x442ce5 VMOVAPD %ZMM15,%ZMM9{%K1} |
(344) 0x442ceb VADDPD %ZMM9,%ZMM10,%ZMM14 |
(344) 0x442cf1 VMOVAPD %ZMM16,%ZMM8{%K1} |
(344) 0x442cf7 VMOVAPD %ZMM17,%ZMM7{%K1} |
(344) 0x442cfd VADDPD %ZMM7,%ZMM8,%ZMM15 |
(344) 0x442d03 VADDPD %ZMM15,%ZMM14,%ZMM14 |
(344) 0x442d09 VMULPD %ZMM14,%ZMM12,%ZMM12 |
(344) 0x442d0f MOV -0x70(%RBP),%RAX |
(344) 0x442d13 ADD 0x18(%RBP),%RAX |
(344) 0x442d17 VMOVUPD %ZMM12,(%RAX,%RBX,8){%K1} |
(344) 0x442d1e ADD 0x40(%RBP),%R11 |
(344) 0x442d22 VMOVUPD (%R11,%RBX,8),%ZMM12{%K1}{z} |
(344) 0x442d29 ADD 0x30(%RBP),%R13 |
(344) 0x442d2d VMOVUPD 0x8(%R13,%RBX,8),%ZMM14{%K1}{z} |
(344) 0x442d38 VMOVUPD (%R13,%RBX,8),%ZMM15{%K1}{z} |
(344) 0x442d40 ADD 0x20(%RBP),%R15 |
(344) 0x442d44 VMOVUPD (%R15,%RBX,8),%ZMM16{%K1}{z} |
(344) 0x442d4b VMOVUPD 0x8(%R15,%RBX,8),%ZMM17{%K1}{z} |
(344) 0x442d56 VMOVAPD %ZMM12,%ZMM6{%K1} |
(344) 0x442d5c VMOVAPD %ZMM14,%ZMM5{%K1} |
(344) 0x442d62 VMULPD %ZMM13,%ZMM6,%ZMM12 |
(344) 0x442d68 VMOVAPD %ZMM15,%ZMM4{%K1} |
(344) 0x442d6e VADDPD %ZMM4,%ZMM5,%ZMM13 |
(344) 0x442d74 VMOVAPD %ZMM16,%ZMM3{%K1} |
(344) 0x442d7a VMOVAPD %ZMM17,%ZMM2{%K1} |
(344) 0x442d80 VADDPD %ZMM2,%ZMM3,%ZMM14 |
(344) 0x442d86 VADDPD %ZMM14,%ZMM13,%ZMM13 |
(344) 0x442d8c VMULPD %ZMM13,%ZMM12,%ZMM12 |
(344) 0x442d92 ADD 0x10(%RBP),%R10 |
(344) 0x442d96 VMOVUPD %ZMM12,(%R10,%RBX,8){%K1} |
(344) 0x442d9d LEA 0x1(%R9),%EAX |
(344) 0x442da1 INC %EDX |
(344) 0x442da3 CMP -0x60(%RBP),%R9D |
(344) 0x442da7 MOV %EAX,%R9D |
(344) 0x442daa JE 442ac5 |
(344) 0x442db0 MOVSXD (%RDI),%RBX |
(344) 0x442db3 MOV (%RSI),%EAX |
(344) 0x442db5 MOV %EAX,%ECX |
(344) 0x442db7 SUB %EBX,%ECX |
(344) 0x442db9 INC %ECX |
(344) 0x442dbb JS 442d9d |
(344) 0x442dbd MOV %EDX,-0x2c(%RBP) |
(344) 0x442dc0 MOV -0xe8(%RBP),%RCX |
(344) 0x442dc7 MOV %R9,-0x88(%RBP) |
(344) 0x442dce ADD %R9D,%ECX |
(344) 0x442dd1 VMULSD 0x310047(%RIP),%XMM0,%XMM13 |
(344) 0x442dd9 MOV 0x78(%RBP),%RDX |
(344) 0x442ddd MOV (%RDX),%R12 |
(344) 0x442de0 MOV 0x80(%RBP),%RDX |
(344) 0x442de7 MOV (%RDX),%R14 |
(344) 0x442dea MOV 0x88(%RBP),%RDX |
(344) 0x442df1 MOV (%RDX),%R11 |
(344) 0x442df4 MOV 0x90(%RBP),%RDX |
(344) 0x442dfb MOV (%RDX),%RDX |
(344) 0x442dfe MOV %RDX,-0x40(%RBP) |
(344) 0x442e02 MOV 0x98(%RBP),%RDX |
(344) 0x442e09 MOV (%RDX),%R9 |
(344) 0x442e0c MOV 0xa0(%RBP),%RDX |
(344) 0x442e13 MOV (%RDX),%R13 |
(344) 0x442e16 MOV 0xa8(%RBP),%RDX |
(344) 0x442e1d MOV (%RDX),%R10 |
(344) 0x442e20 MOV 0xb0(%RBP),%RDX |
(344) 0x442e27 MOV (%RDX),%R15 |
(344) 0x442e2a SUB %EBX,%EAX |
(344) 0x442e2c ADD $0x2,%EAX |
(344) 0x442e2f CMP $0x2,%EAX |
(344) 0x442e32 MOV $0x1,%EDX |
(344) 0x442e37 CMOVL %EDX,%EAX |
(344) 0x442e3a MOV %RAX,%R8 |
(344) 0x442e3d VPBROADCASTQ %RAX,%ZMM12 |
(344) 0x442e43 MOVSXD %ECX,%RCX |
(344) 0x442e46 AND $0x7ffffff8,%R8 |
(344) 0x442e4d JE 442c00 |
(344) 0x442e53 MOV %RCX,%RSI |
(344) 0x442e56 MOVSXD -0x2c(%RBP),%RCX |
(344) 0x442e5a MOV -0xd8(%RBP),%RDX |
(344) 0x442e61 LEA (%RDX,%RCX,1),%RDI |
(344) 0x442e65 ADD -0xc8(%RBP),%RCX |
(344) 0x442e6c MOVSXD -0x48(%RBP),%RDX |
(344) 0x442e70 SUB %RDX,%RSI |
(344) 0x442e73 LEA 0x2(%RSI),%RDX |
(344) 0x442e77 MOV %R15,-0x58(%RBP) |
(344) 0x442e7b MOV %R10,%R15 |
(344) 0x442e7e MOV %R14,%R10 |
(344) 0x442e81 MOV %R9,%R14 |
(344) 0x442e84 MOV %R12,%R9 |
(344) 0x442e87 IMUL %RDX,%R12 |
(344) 0x442e8b MOV %R12,-0x100(%RBP) |
(344) 0x442e92 ADD $0x3,%RSI |
(344) 0x442e96 MOV %R10,%R12 |
(344) 0x442e99 IMUL %RSI,%R12 |
(344) 0x442e9d MOV %R12,-0x80(%RBP) |
(344) 0x442ea1 MOV %R10,%R12 |
(344) 0x442ea4 IMUL %RDX,%R12 |
(344) 0x442ea8 MOV %R12,-0x108(%RBP) |
(344) 0x442eaf MOV %R11,%R12 |
(344) 0x442eb2 IMUL %RDX,%R12 |
(344) 0x442eb6 MOV %R12,-0x78(%RBP) |
(344) 0x442eba IMUL %R11,%RSI |
(344) 0x442ebe MOV %RSI,-0x130(%RBP) |
(344) 0x442ec5 MOV -0x40(%RBP),%R12 |
(344) 0x442ec9 MOV %R12,%RSI |
(344) 0x442ecc IMUL %RDX,%RSI |
(344) 0x442ed0 MOV %RSI,-0x70(%RBP) |
(344) 0x442ed4 MOV %R14,%RSI |
(344) 0x442ed7 IMUL %RDX,%RSI |
(344) 0x442edb MOV %RSI,-0x110(%RBP) |
(344) 0x442ee2 MOV %R13,%RSI |
(344) 0x442ee5 IMUL %RDX,%RSI |
(344) 0x442ee9 MOV %RSI,-0x118(%RBP) |
(344) 0x442ef0 MOV %R15,%RSI |
(344) 0x442ef3 IMUL %RDX,%RSI |
(344) 0x442ef7 MOV %RSI,-0x120(%RBP) |
(344) 0x442efe MOV -0x58(%RBP),%RSI |
(344) 0x442f02 IMUL %RSI,%RDX |
(344) 0x442f06 MOV %RDX,-0x128(%RBP) |
(344) 0x442f0d IMUL %RDI,%R15 |
(344) 0x442f11 IMUL %RDI,%R13 |
(344) 0x442f15 IMUL %RDI,%RSI |
(344) 0x442f19 MOV %RSI,-0x58(%RBP) |
(344) 0x442f1d IMUL %RDI,%R14 |
(344) 0x442f21 MOV %R14,-0xf8(%RBP) |
(344) 0x442f28 IMUL %RDI,%R12 |
(344) 0x442f2c MOV %R11,%RDX |
(344) 0x442f2f IMUL %RCX,%RDX |
(344) 0x442f33 IMUL %RDI,%R11 |
(344) 0x442f37 IMUL %R10,%RCX |
(344) 0x442f3b MOV %R10,%RSI |
(344) 0x442f3e IMUL %RDI,%RSI |
(344) 0x442f42 IMUL %RDI,%R9 |
(344) 0x442f46 MOV %R9,-0xf0(%RBP) |
(344) 0x442f4d MOVSXD -0x50(%RBP),%RDI |
(344) 0x442f51 ADD $-0x2,%RDI |
(344) 0x442f55 MOV %RDI,-0x40(%RBP) |
(344) 0x442f59 VBROADCASTSD %XMM13,%ZMM13 |
(344) 0x442f5f LEA (%R15,%RBX,8),%RDI |
(344) 0x442f63 ADD -0xc0(%RBP),%RDI |
(344) 0x442f6a LEA (%R13,%RBX,8),%R14 |
(344) 0x442f6f ADD -0xe0(%RBP),%R14 |
(344) 0x442f76 MOV -0x58(%RBP),%R9 |
(344) 0x442f7a LEA (%R9,%RBX,8),%R10 |
(344) 0x442f7e ADD -0xb8(%RBP),%R10 |
(344) 0x442f85 MOV -0xf8(%RBP),%R9 |
(344) 0x442f8c LEA (%R9,%RBX,8),%R9 |
(344) 0x442f90 ADD -0xb0(%RBP),%R9 |
(344) 0x442f97 LEA (%R12,%RBX,8),%R15 |
(344) 0x442f9b ADD -0xa8(%RBP),%R15 |
(344) 0x442fa2 LEA (%RDX,%RBX,8),%RDX |
(344) 0x442fa6 MOV -0xa0(%RBP),%R12 |
(344) 0x442fad ADD %R12,%RDX |
(344) 0x442fb0 LEA (%R11,%RBX,8),%R11 |
(344) 0x442fb4 ADD %R12,%R11 |
(344) 0x442fb7 LEA (%RSI,%RBX,8),%R13 |
(344) 0x442fbb MOV -0x98(%RBP),%RSI |
(344) 0x442fc2 ADD %RSI,%R13 |
(344) 0x442fc5 LEA (%RCX,%RBX,8),%RCX |
(344) 0x442fc9 ADD %RSI,%RCX |
(344) 0x442fcc MOV -0xf0(%RBP),%RSI |
(344) 0x442fd3 LEA (%RSI,%RBX,8),%R12 |
(344) 0x442fd7 ADD -0xd0(%RBP),%R12 |
(344) 0x442fde XOR %ESI,%ESI |
(345) 0x442fe0 VMULPD (%R12,%RSI,8),%ZMM13,%ZMM14 |
(345) 0x442fe7 VMOVUPD (%RCX,%RSI,8),%ZMM15 |
(345) 0x442fee VADDPD (%R13,%RSI,8),%ZMM15,%ZMM15 |
(345) 0x442ff6 VADDPD (%R11,%RSI,8),%ZMM15,%ZMM15 |
(345) 0x442ffd VADDPD (%RDX,%RSI,8),%ZMM15,%ZMM15 |
(345) 0x443004 VMULPD %ZMM15,%ZMM14,%ZMM14 |
(345) 0x44300a VMOVUPD %ZMM14,(%R15,%RSI,8) |
(345) 0x443011 VMULPD (%R9,%RSI,8),%ZMM13,%ZMM14 |
(345) 0x443018 VMOVUPD (%R14,%RSI,8),%ZMM15 |
(345) 0x44301f VADDPD -0x8(%R14,%RSI,8),%ZMM15,%ZMM15 |
(345) 0x44302a VADDPD -0x8(%RDI,%RSI,8),%ZMM15,%ZMM15 |
(345) 0x443035 VADDPD (%RDI,%RSI,8),%ZMM15,%ZMM15 |
(345) 0x44303c VMULPD %ZMM15,%ZMM14,%ZMM14 |
(345) 0x443042 VMOVUPD %ZMM14,(%R10,%RSI,8) |
(345) 0x443049 ADD $0x8,%RSI |
(345) 0x44304d CMP %R8,%RSI |
(345) 0x443050 JB 442fe0 |
(344) 0x443052 CMP %RAX,%R8 |
(344) 0x443055 MOV 0x70(%RBP),%RDI |
(344) 0x443059 MOV 0x68(%RBP),%RSI |
(344) 0x44305d MOV -0x2c(%RBP),%EDX |
(344) 0x443060 MOV -0x88(%RBP),%R9 |
(344) 0x443067 MOV -0x130(%RBP),%RCX |
(344) 0x44306e MOV -0x128(%RBP),%R10 |
(344) 0x443075 MOV -0x120(%RBP),%R15 |
(344) 0x44307c MOV -0x118(%RBP),%R13 |
(344) 0x443083 MOV -0x110(%RBP),%R11 |
(344) 0x44308a MOV -0x108(%RBP),%R14 |
(344) 0x443091 MOV -0x100(%RBP),%RAX |
(344) 0x443098 MOV -0x40(%RBP),%R12 |
(344) 0x44309c JNE 442c77 |
(344) 0x4430a2 JMP 442d9d |
0x4430a7 NOPW (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | flux_calc_kernel.f90:49-63 |
Module | exec |
nb instructions | 104 |
nb uops | 108 |
loop length | 457 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 32 |
micro-operation queue | 18.00 cycles |
front end | 18.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.80 | 4.80 | 9.67 | 9.67 | 16.00 | 4.80 | 4.80 | 16.00 | 16.00 | 16.00 | 4.80 | 9.67 |
cycles | 4.80 | 4.80 | 9.67 | 9.67 | 16.00 | 4.80 | 4.80 | 16.00 | 16.00 | 16.00 | 4.80 | 9.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 17.47-17.52 |
Stall cycles | 0.00 |
Front-end | 18.00 |
Dispatch | 16.00 |
Overall L1 | 18.00 |
all | 5% |
load | 14% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 25% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 5% |
load | 12% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 21% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 20% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x108,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVL $0,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JS 442adc <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0x9c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x64(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x34(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x74b5f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4044c0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x34(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 442b00 <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x74b610,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x5c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4040b0 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x90(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x74b630,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404580 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x108,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x18,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x2,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x10,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%R15,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x30(%RBP),%R15 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R15,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R14,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R9,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x48(%RBP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xc6227(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQA64 0xc53bd(%RIP),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
MOV 0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 442db0 <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0x370> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | flux_calc_kernel.f90:49-63 |
Module | exec |
nb instructions | 104 |
nb uops | 108 |
loop length | 457 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 1 |
nb stack references | 32 |
micro-operation queue | 18.00 cycles |
front end | 18.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.80 | 4.80 | 9.67 | 9.67 | 16.00 | 4.80 | 4.80 | 16.00 | 16.00 | 16.00 | 4.80 | 9.67 |
cycles | 4.80 | 4.80 | 9.67 | 9.67 | 16.00 | 4.80 | 4.80 | 16.00 | 16.00 | 16.00 | 4.80 | 9.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 17.47-17.52 |
Stall cycles | 0.00 |
Front-end | 18.00 |
Dispatch | 16.00 |
Overall L1 | 18.00 |
all | 5% |
load | 14% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 25% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 5% |
load | 12% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 21% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 20% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 10% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x108,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%EBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EBX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVL $0,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JS 442adc <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0x9c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x64(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x64(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x34(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x74b5f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x5c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4044c0 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x34(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 442b00 <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x74b610,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x5c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4040b0 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x90(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x74b630,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 404580 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x108,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x18,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x2,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %EBX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x10,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%R15,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x30(%RBP),%R15 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R15,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R14,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDI,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R11,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R9,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%RBX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD 0x48(%RBP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0xc6227(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDQA64 0xc53bd(%RIP),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.50 |
MOV 0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 442db0 <flux_calc_kernel_module_mp_flux_calc_kernel_.DIR.OMP.PARALLEL.2+0x370> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼flux_calc_kernel_.DIR.OMP.PARALLEL.2– | 4.27 | 1.35 |
▼Loop 344 - flux_calc_kernel.f90:54-60 - exec– | 0.01 | 0 |
○Loop 345 - flux_calc_kernel.f90:56-60 - exec | 4.26 | 1.34 |