Loop Id: 102 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 1.38% |
---|
Loop Id: 102 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 1.38% |
---|
(104) 0x409fbc LDR W17, [X21, X16,LSL #2] |
(104) 0x409fc0 CMP W30, #0 |
(104) 0x409fc4 B.LE 40a118 |
0x40a028 CMP W8, W11 |
0x40a02c B.GE 40a100 |
0x40a030 LDR X6, [X19, #32] |
0x40a034 ADD X5, X4, X4,LSL #1 |
0x40a038 LDR X2, [X6, #24] |
0x40a03c ADD X3, X2, #24 |
0x40a040 ADD X0, X2, X10 |
0x40a044 ADD X3, X3, X9 |
0x40a048 ADD X1, X2, X5 |
0x40a04c SUB X7, X3, X0 |
0x40a050 TBZ W7, #3, 40a090 |
(103) 0x40a090 LDP D5, D25, [X0] |
(103) 0x40a094 LDP D23, D24, [X1] |
(103) 0x40a098 LDR D4, [X0, #16] |
(103) 0x40a09c LDR D27, [X1, #16] |
(103) 0x40a0a0 FSUB D30, D23, S5 |
(103) 0x40a0a4 FSUB D31, D24, S25 |
(103) 0x40a0a8 FSUB D1, D27, S4 |
(103) 0x40a0ac FMADD D26, D30, D30, D3 |
(103) 0x40a0b0 FMADD D22, D31, D31, D26 |
(103) 0x40a0b4 FMADD D0, D1, D1, D22 |
(103) 0x40a0b8 FCMPE D2, D0 |
(103) 0x40a0bc B.GE 40a1d8 |
(103) 0x40a0c0 LDP D26, D22, [X1] |
(103) 0x40a0c4 ADD X2, X0, #24 |
(103) 0x40a0c8 LDR D24, [X0, #24] |
(103) 0x40a0cc LDP D0, D4, [X2, #8] |
(103) 0x40a0d0 LDR D28, [X1, #16] |
(103) 0x40a0d4 FSUB D27, D26, S24 |
(103) 0x40a0d8 FSUB D29, D22, S0 |
(103) 0x40a0dc FSUB D30, D28, S4 |
(103) 0x40a0e0 FMADD D5, D27, D27, D3 |
(103) 0x40a0e4 FMADD D25, D29, D29, D5 |
(103) 0x40a0e8 FMADD D23, D30, D30, D25 |
(103) 0x40a0ec FCMPE D2, D23 |
(103) 0x40a0f0 B.GE 40a168 |
(103) 0x40a0f4 ADD X0, X2, #24 |
(103) 0x40a0f8 CMP X3, X0 |
(103) 0x40a0fc B.NE 40a090 |
0x40a100 ADD X4, X4, #8 |
0x40a104 CMP X12, X4 |
0x40a108 B.NE 40a028 |
0x40a10c ADD X14, X14, #1 |
0x40a110 CMP W30, W14 |
0x40a114 B.GT 409ff4 |
(104) 0x40a118 ADD X16, X16, #1 |
(104) 0x40a11c ADD W13, W13, #64 |
(104) 0x40a120 CMP W15, W16 |
(104) 0x40a124 B.GT 409fbc |
0x40a128 LDP X23, X24, [SP, #48] |
0x40a12c LDP X25, X26, [SP, #64] |
0x40a130 ADD X20, X20, #40 |
0x40a134 LDR X30, [X20] |
(105) 0x40a138 ORR X19, XZR, X30 |
(105) 0x40a13c FMOV D8, X30 |
(105) 0x40a140 FADD D2, D6, D8 |
(105) 0x40a144 FMOV X22, D2 |
(105) 0x40a148 CASAL X30, X22, [X20] |
(105) 0x40a14c CMP X19, X30 |
(105) 0x40a150 B.NE 40a138 |
0x40a154 LDP X19, X20, [SP, #16] |
0x40a158 LDP X21, X22, [SP, #32] |
0x40a15c LDR D8, [SP, #80] |
0x40a160 LDP X29, X30, [SP], #96 |
0x40a164 RET |
(103) 0x40a168 FCMPE D23, #0 |
(103) 0x40a16c B.GT 40a174 |
(103) 0x40a170 B 40a0f4 |
(103) 0x40a174 FDIV D31, D16, D23 |
(103) 0x40a178 FMUL D1, D8, D21 |
(103) 0x40a17c LDP X7, X26, [X6, #40] |
(103) 0x40a180 ADD X0, X7, X5 |
(103) 0x40a184 FMUL D24, D31, D31 |
(103) 0x40a188 FMUL D26, D24, D31 |
(103) 0x40a18c FMUL D22, D26, D18 |
(103) 0x40a190 FMADD D28, D22, D20, D19 |
(103) 0x40a194 FMUL D4, D1, D22 |
(103) 0x40a198 FSUB D0, D22, S16 |
(103) 0x40a19c FMUL D25, D4, D31 |
(103) 0x40a1a0 LDR D31, [X26, X4] |
(103) 0x40a1a4 FNMSUB D5, D22, D0, D17 |
(103) 0x40a1a8 FMADD D6, D5, D7, D6 |
(103) 0x40a1ac FMADD D1, D5, D7, D31 |
(103) 0x40a1b0 FMUL D23, D25, D28 |
(103) 0x40a1b4 STR D1, [X26, X4] |
(103) 0x40a1b8 LDR D24, [X7, X5] |
(103) 0x40a1bc FMSUB D27, D23, D27, D24 |
(103) 0x40a1c0 STR D27, [X7, X5] |
(103) 0x40a1c4 LDP D26, D22, [X0, #8] |
(103) 0x40a1c8 FMSUB D29, D23, D29, D26 |
(103) 0x40a1cc FMSUB D30, D23, D30, D22 |
(103) 0x40a1d0 STP D29, D30, [X0, #8] |
(103) 0x40a1d4 B 40a0f4 |
(103) 0x40a1d8 FCMPE D0, #0 |
(103) 0x40a1dc B.GT 40a1e4 |
(103) 0x40a1e0 B 40a0c0 |
(103) 0x40a1e4 FDIV D28, D16, D0 |
(103) 0x40a1e8 FMUL D29, D8, D21 |
(103) 0x40a1ec LDP X7, X26, [X6, #40] |
(103) 0x40a1f0 ADD X2, X7, X5 |
(103) 0x40a1f4 FMUL D5, D28, D28 |
(103) 0x40a1f8 FMUL D25, D5, D28 |
(103) 0x40a1fc FMUL D23, D25, D18 |
(103) 0x40a200 FMADD D24, D23, D20, D19 |
(103) 0x40a204 FMUL D4, D29, D23 |
(103) 0x40a208 FSUB D26, D23, S16 |
(103) 0x40a20c FMUL D27, D4, D28 |
(103) 0x40a210 LDR D28, [X26, X4] |
(103) 0x40a214 FNMSUB D22, D23, D26, D17 |
(103) 0x40a218 FMADD D6, D22, D7, D6 |
(103) 0x40a21c FMADD D29, D22, D7, D28 |
(103) 0x40a220 FMUL D0, D27, D24 |
(103) 0x40a224 STR D29, [X26, X4] |
(103) 0x40a228 LDR D5, [X7, X5] |
(103) 0x40a22c FMSUB D30, D0, D30, D5 |
(103) 0x40a230 STR D30, [X7, X5] |
(103) 0x40a234 LDP D25, D23, [X2, #8] |
(103) 0x40a238 FMSUB D31, D0, D31, D25 |
(103) 0x40a23c FMSUB D1, D0, D1, D23 |
(103) 0x40a240 STP D31, D1, [X2, #8] |
(103) 0x40a244 B 40a0c0 |
/home/hbollore/qaas-runs/170-265-5545/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 172 - 216 |
-------------------------------------------------------------------------------- |
172: #pragma omp parallel for reduction(+:ePot) |
173: for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++) |
174: { |
175: int nIBox = s->boxes->nAtoms[iBox]; |
176: |
177: // loop over neighbors of iBox |
178: for (int jTmp=0; jTmp<nNbrBoxes; jTmp++) |
[...] |
187: for (int iOff=MAXATOMS*iBox; iOff<(iBox*MAXATOMS+nIBox); iOff++) |
188: { |
189: |
190: // loop over atoms in jBox |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►98.56+ | __kmp_GOMP_microtask_wrapper(i[...] | libomp.so | |
○ | __kmp_invoke_microtask | libomp.so | |
►1.44+ | GOMP_parallel | libomp.so | |
○ | ljForce | ljForce.c:172 | exec |
○ | timestep | timestep.c:51 | exec |
○ | main | CoMD.c:125 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | CoMD.c:266 | exec |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.87 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.95 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | micro-operation queue, |
Function | ljForce._omp_fn.1 |
Source | ljForce.c:172-172,ljForce.c:178-178,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.25 |
CQA cycles if no scalar integer | 0.67 |
CQA cycles if FP arith vectorized | 3.25 |
CQA cycles if fully vectorized | 0.66 |
Front-end cycles | 3.25 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 2.50 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 3.00 |
P4 cycles | 3.00 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 3.00 |
P10 cycles | 3.00 |
P11 cycles | 3.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 26.00 |
Nb uops | 26.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 112.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 22.92 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.67 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.87 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.95 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | micro-operation queue, |
Function | ljForce._omp_fn.1 |
Source | ljForce.c:172-172,ljForce.c:178-178,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.25 |
CQA cycles if no scalar integer | 0.67 |
CQA cycles if FP arith vectorized | 3.25 |
CQA cycles if fully vectorized | 0.66 |
Front-end cycles | 3.25 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 2.50 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 3.00 |
P4 cycles | 3.00 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 3.00 |
P10 cycles | 3.00 |
P11 cycles | 3.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 26.00 |
Nb uops | 26.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 112.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 22.92 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.67 |
Path / |
Function | ljForce._omp_fn.1 |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 26 |
loop length | 104 |
nb stack references | 0 |
front end | 3.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
cycles | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.25 |
Overall L1 | 3.25 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP W8, W11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 40a100 <ljForce._omp_fn.1+0x1dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X6, [X19, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X5, X4, X4,LSL #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [X6, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X3, X2, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X2, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, X3, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, X2, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X7, X3, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
TBZ W7, #3, 40a090 <ljForce._omp_fn.1+0x16c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X4, X4, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X12, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 40a028 <ljForce._omp_fn.1+0x104> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X14, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W30, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 409ff4 <ljForce._omp_fn.1+0xd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
ADD X20, X20, #40 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR D8, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | ljForce._omp_fn.1 |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 26 |
loop length | 104 |
nb stack references | 0 |
front end | 3.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
cycles | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.25 |
Overall L1 | 3.25 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP W8, W11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GE 40a100 <ljForce._omp_fn.1+0x1dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X6, [X19, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X5, X4, X4,LSL #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [X6, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X3, X2, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X2, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, X3, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, X2, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X7, X3, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
TBZ W7, #3, 40a090 <ljForce._omp_fn.1+0x16c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X4, X4, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X12, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 40a028 <ljForce._omp_fn.1+0x104> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X14, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W30, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 409ff4 <ljForce._omp_fn.1+0xd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
ADD X20, X20, #40 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR D8, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |