Loop Id: 99 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 2.21% |
---|
Loop Id: 99 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 2.21% |
---|
(101) 0x40975c LDR W17, [X21, X16,LSL #2] |
(101) 0x409760 CMP W30, #0 |
(101) 0x409764 B.LE 4098b8 |
0x4097c8 CMP W11, W8 |
0x4097cc B.LE 4098a0 |
0x4097d0 LDR X6, [X19, #32] |
0x4097d4 ADD X5, X4, X4,LSL #1 |
0x4097d8 LDR X2, [X6, #24] |
0x4097dc ADD X3, X2, #24 |
0x4097e0 ADD X0, X2, X10 |
0x4097e4 ADD X3, X3, X9 |
0x4097e8 ADD X1, X2, X5 |
0x4097ec SUB X7, X3, X0 |
0x4097f0 TBZ W7, #3, 409830 |
(100) 0x409830 LDP D5, D25, [X0] |
(100) 0x409834 LDP D23, D24, [X1] |
(100) 0x409838 LDR D4, [X0, #16] |
(100) 0x40983c LDR D27, [X1, #16] |
(100) 0x409840 FSUB D30, D23, S5 |
(100) 0x409844 FSUB D31, D24, S25 |
(100) 0x409848 FSUB D1, D27, S4 |
(100) 0x40984c FMADD D26, D30, D30, D3 |
(100) 0x409850 FMADD D22, D31, D31, D26 |
(100) 0x409854 FMADD D0, D1, D1, D22 |
(100) 0x409858 FCMPE D2, D0 |
(100) 0x40985c B.GE 409978 |
(100) 0x409860 LDP D26, D22, [X1] |
(100) 0x409864 ADD X2, X0, #24 |
(100) 0x409868 LDR D24, [X0, #24] |
(100) 0x40986c LDP D0, D4, [X2, #8] |
(100) 0x409870 LDR D28, [X1, #16] |
(100) 0x409874 FSUB D27, D26, S24 |
(100) 0x409878 FSUB D29, D22, S0 |
(100) 0x40987c FSUB D30, D28, S4 |
(100) 0x409880 FMADD D5, D27, D27, D3 |
(100) 0x409884 FMADD D25, D29, D29, D5 |
(100) 0x409888 FMADD D23, D30, D30, D25 |
(100) 0x40988c FCMPE D2, D23 |
(100) 0x409890 B.GE 409908 |
(100) 0x409894 ADD X0, X2, #24 |
(100) 0x409898 CMP X0, X3 |
(100) 0x40989c B.NE 409830 |
0x4098a0 ADD X4, X4, #8 |
0x4098a4 CMP X12, X4 |
0x4098a8 B.NE 4097c8 |
0x4098ac ADD X14, X14, #1 |
0x4098b0 CMP W30, W14 |
0x4098b4 B.GT 409794 |
(101) 0x4098b8 ADD X16, X16, #1 |
(101) 0x4098bc ADD W13, W13, #64 |
(101) 0x4098c0 CMP W15, W16 |
(101) 0x4098c4 B.GT 40975c |
0x4098c8 LDP X23, X24, [SP, #48] |
0x4098cc LDP X25, X26, [SP, #64] |
0x4098d0 ADD X20, X20, #40 |
0x4098d4 LDR X30, [X20] |
(102) 0x4098d8 ORR X19, XZR, X30 |
(102) 0x4098dc FMOV D8, X30 |
(102) 0x4098e0 FADD D2, D6, D8 |
(102) 0x4098e4 FMOV X22, D2 |
(102) 0x4098e8 CASAL X30, X22, [X20] |
(102) 0x4098ec CMP X19, X30 |
(102) 0x4098f0 B.NE 4098d8 |
0x4098f4 LDP X19, X20, [SP, #16] |
0x4098f8 LDP X21, X22, [SP, #32] |
0x4098fc LDR D8, [SP, #80] |
0x409900 LDP X29, X30, [SP], #96 |
0x409904 RET |
(100) 0x409908 FCMPE D23, #0 |
(100) 0x40990c B.GT 409914 |
(100) 0x409910 B 409894 |
(100) 0x409914 FDIV D31, D16, D23 |
(100) 0x409918 FMUL D1, D8, D21 |
(100) 0x40991c LDP X7, X26, [X6, #40] |
(100) 0x409920 ADD X0, X7, X5 |
(100) 0x409924 FMUL D24, D31, D31 |
(100) 0x409928 FMUL D26, D24, D31 |
(100) 0x40992c FMUL D22, D26, D18 |
(100) 0x409930 FMADD D28, D22, D20, D19 |
(100) 0x409934 FMUL D4, D1, D22 |
(100) 0x409938 FSUB D0, D22, S16 |
(100) 0x40993c FMUL D25, D4, D31 |
(100) 0x409940 LDR D31, [X26, X4] |
(100) 0x409944 FNMSUB D5, D22, D0, D17 |
(100) 0x409948 FMADD D6, D5, D7, D6 |
(100) 0x40994c FMADD D1, D5, D7, D31 |
(100) 0x409950 FMUL D23, D25, D28 |
(100) 0x409954 STR D1, [X26, X4] |
(100) 0x409958 LDR D24, [X7, X5] |
(100) 0x40995c FMSUB D27, D27, D23, D24 |
(100) 0x409960 STR D27, [X7, X5] |
(100) 0x409964 LDP D26, D22, [X0, #8] |
(100) 0x409968 FMSUB D29, D23, D29, D26 |
(100) 0x40996c FMSUB D30, D23, D30, D22 |
(100) 0x409970 STP D29, D30, [X0, #8] |
(100) 0x409974 B 409894 |
(100) 0x409978 FCMPE D0, #0 |
(100) 0x40997c B.GT 409984 |
(100) 0x409980 B 409860 |
(100) 0x409984 FDIV D28, D16, D0 |
(100) 0x409988 FMUL D29, D8, D21 |
(100) 0x40998c LDP X7, X26, [X6, #40] |
(100) 0x409990 ADD X2, X7, X5 |
(100) 0x409994 FMUL D5, D28, D28 |
(100) 0x409998 FMUL D25, D5, D28 |
(100) 0x40999c FMUL D23, D25, D18 |
(100) 0x4099a0 FMADD D24, D23, D20, D19 |
(100) 0x4099a4 FMUL D4, D29, D23 |
(100) 0x4099a8 FSUB D26, D23, S16 |
(100) 0x4099ac FMUL D27, D4, D28 |
(100) 0x4099b0 LDR D28, [X26, X4] |
(100) 0x4099b4 FNMSUB D22, D23, D26, D17 |
(100) 0x4099b8 FMADD D6, D22, D7, D6 |
(100) 0x4099bc FMADD D29, D22, D7, D28 |
(100) 0x4099c0 FMUL D0, D27, D24 |
(100) 0x4099c4 STR D29, [X26, X4] |
(100) 0x4099c8 LDR D5, [X7, X5] |
(100) 0x4099cc FMSUB D30, D30, D0, D5 |
(100) 0x4099d0 STR D30, [X7, X5] |
(100) 0x4099d4 LDP D25, D23, [X2, #8] |
(100) 0x4099d8 FMSUB D31, D0, D31, D25 |
(100) 0x4099dc FMSUB D1, D0, D1, D23 |
(100) 0x4099e0 STP D31, D1, [X2, #8] |
(100) 0x4099e4 B 409860 |
/home/hbollore/qaas/qaas-runs/169-814-5713/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 172 - 216 |
-------------------------------------------------------------------------------- |
172: #pragma omp parallel for reduction(+:ePot) |
173: for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++) |
174: { |
175: int nIBox = s->boxes->nAtoms[iBox]; |
176: |
177: // loop over neighbors of iBox |
178: for (int jTmp=0; jTmp<nNbrBoxes; jTmp++) |
[...] |
187: for (int iOff=MAXATOMS*iBox; iOff<(iBox*MAXATOMS+nIBox); iOff++) |
188: { |
189: |
190: // loop over atoms in jBox |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | GOMP_parallel | libomp.so | |
○ | ljForce | ljForce.c:172 | exec |
○ | timestep | timestep.c:51 | exec |
○ | main | CoMD.c:125 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | CoMD.c:150 | exec |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.87 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.95 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | micro-operation queue, |
Function | ljForce._omp_fn.1 |
Source | ljForce.c:172-172,ljForce.c:178-178,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.25 |
CQA cycles if no scalar integer | 0.67 |
CQA cycles if FP arith vectorized | 3.25 |
CQA cycles if fully vectorized | 0.66 |
Front-end cycles | 3.25 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 2.50 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 3.00 |
P4 cycles | 3.00 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 3.00 |
P10 cycles | 3.00 |
P11 cycles | 3.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 26.00 |
Nb uops | 26.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 112.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 22.92 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.67 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 4.87 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.95 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | micro-operation queue, |
Function | ljForce._omp_fn.1 |
Source | ljForce.c:172-172,ljForce.c:178-178,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.25 |
CQA cycles if no scalar integer | 0.67 |
CQA cycles if FP arith vectorized | 3.25 |
CQA cycles if fully vectorized | 0.66 |
Front-end cycles | 3.25 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 2.50 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 3.00 |
P4 cycles | 3.00 |
P5 cycles | 0.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 3.00 |
P10 cycles | 3.00 |
P11 cycles | 3.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 26.00 |
Nb uops | 26.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 112.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 22.92 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 25.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.67 |
Path / |
Function | ljForce._omp_fn.1 |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 26 |
loop length | 104 |
nb stack references | 0 |
front end | 3.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
cycles | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.25 |
Overall L1 | 3.25 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP W11, W8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4098a0 <ljForce._omp_fn.1+0x1dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X6, [X19, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X5, X4, X4,LSL #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [X6, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X3, X2, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X2, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, X3, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, X2, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X7, X3, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
TBZ W7, #3, 409830 <ljForce._omp_fn.1+0x16c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X4, X4, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X12, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 4097c8 <ljForce._omp_fn.1+0x104> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X14, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W30, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 409794 <ljForce._omp_fn.1+0xd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
ADD X20, X20, #40 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR D8, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | ljForce._omp_fn.1 |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 26 |
loop length | 104 |
nb stack references | 0 |
front end | 3.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
cycles | 2.50 | 2.50 | 3.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 | 3.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.25 |
Overall L1 | 3.25 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP W11, W8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 4098a0 <ljForce._omp_fn.1+0x1dc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X6, [X19, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X5, X4, X4,LSL #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X2, [X6, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X3, X2, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X2, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, X3, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X1, X2, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X7, X3, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
TBZ W7, #3, 409830 <ljForce._omp_fn.1+0x16c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X4, X4, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X12, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.NE 4097c8 <ljForce._omp_fn.1+0x104> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X14, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W30, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 409794 <ljForce._omp_fn.1+0xd0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
ADD X20, X20, #40 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X30, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR D8, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |