Loop Id: 121 | Module: exec | Source: timestep.c:85-94 | Coverage: 0.01% |
---|
Loop Id: 121 | Module: exec | Source: timestep.c:85-94 | Coverage: 0.01% |
---|
(123) 0x40c4f8 MADD W3, W1, W14, W2 |
(123) 0x40c4fc ADD W16, W1, W3 |
(123) 0x40c500 CMP W3, W16 |
(123) 0x40c504 B.GE 40c6a0 |
0x40c508 LDR X17, [X20] |
0x40c50c UBFM W15, W3, #26, #25 |
0x40c510 MOVZ W0, #24 |
0x40c514 FMOV D4, #1.0000000 |
0x40c518 SBFM X14, X3, #0, #31 |
0x40c51c LDR D0, [X20, #8] |
0x40c520 SMADDL X15, W15, W0, XZR |
0x40c524 LDR X4, [X17, #24] |
0x40c528 LDR X18, [X4, #120] |
0x40c52c LDR W5, [X18, X14,LSL #2] |
0x40c530 CMP W5, #0 |
0x40c534 B.LE 40c690 |
0x40c538 LDP X10, X13, [X17, #32] |
0x40c53c SUB W9, W5, #1 |
0x40c540 UBFM X7, X14, #56, #55 |
0x40c544 ADD X8, X9, X14,LSL #6 |
0x40c548 ORR X0, XZR, X15 |
0x40c54c LDP X6, X30, [X10, #16] |
0x40c550 LDR X20, [X10, #32] |
0x40c554 ADD X11, X6, #4 |
0x40c558 ADD X3, X6, X7 |
0x40c55c ADD X21, X11, X8,LSL #2 |
0x40c560 ADD X19, X30, #8 |
0x40c564 ADD X2, X30, #16 |
0x40c568 SUB X1, X21, X3 |
0x40c56c ADD X12, X20, #8 |
0x40c570 ADD X4, X20, #16 |
0x40c574 TBZ W1, #2, 40c5e0 |
(122) 0x40c5e0 ORR X8, XZR, X3 |
(122) 0x40c5e4 LDR D24, [X20, X0] |
(122) 0x40c5e8 ADD X10, X0, #24 |
(122) 0x40c5ec LDRSW X7, [X8], #4 |
(122) 0x40c5f0 LDR D25, [X30, X0] |
(122) 0x40c5f4 FMUL D26, D0, D24 |
(122) 0x40c5f8 LDRSW X6, [X3, #4] |
(122) 0x40c5fc ADD X11, X13, X7,LSL #4 |
(122) 0x40c600 ADD X3, X8, #4 |
(122) 0x40c604 LDR D27, [X11, #8] |
(122) 0x40c608 ADD X1, X13, X6,LSL #4 |
(122) 0x40c60c FDIV D28, D4, D27 |
(122) 0x40c610 FMADD D29, D28, D26, D25 |
(122) 0x40c614 STR D29, [X30, X0] |
(122) 0x40c618 LDR D30, [X12, X0] |
(122) 0x40c61c LDR D31, [X19, X0] |
(122) 0x40c620 FMUL D3, D0, D30 |
(122) 0x40c624 FMADD D2, D28, D3, D31 |
(122) 0x40c628 STR D2, [X19, X0] |
(122) 0x40c62c LDR D5, [X4, X0] |
(122) 0x40c630 LDR D1, [X2, X0] |
(122) 0x40c634 FMUL D6, D0, D5 |
(122) 0x40c638 FMADD D7, D28, D6, D1 |
(122) 0x40c63c STR D7, [X2, X0] |
(122) 0x40c640 ADD X0, X0, #48 |
(122) 0x40c644 LDR D19, [X1, #8] |
(122) 0x40c648 LDR D16, [X20, X10] |
(122) 0x40c64c LDR D17, [X30, X10] |
(122) 0x40c650 FDIV D20, D4, D19 |
(122) 0x40c654 FMUL D18, D0, D16 |
(122) 0x40c658 FMADD D21, D20, D18, D17 |
(122) 0x40c65c STR D21, [X30, X10] |
(122) 0x40c660 LDR D22, [X12, X10] |
(122) 0x40c664 LDR D23, [X19, X10] |
(122) 0x40c668 FMUL D24, D0, D22 |
(122) 0x40c66c FMADD D25, D20, D24, D23 |
(122) 0x40c670 STR D25, [X19, X10] |
(122) 0x40c674 LDR D26, [X4, X10] |
(122) 0x40c678 LDR D27, [X2, X10] |
(122) 0x40c67c FMUL D28, D0, D26 |
(122) 0x40c680 FMADD D29, D20, D28, D27 |
(122) 0x40c684 STR D29, [X2, X10] |
(122) 0x40c688 CMP X3, X21 |
(122) 0x40c68c B.NE 40c5e0 |
0x40c690 ADD X14, X14, #1 |
0x40c694 ADD X15, X15, #1536 |
0x40c698 CMP W16, W14 |
0x40c69c B.GT 40c52c |
(123) 0x40c6a0 LDP X19, X20, [SP, #16] |
(123) 0x40c6a4 LDR X21, [SP, #32] |
(123) 0x40c6a8 LDP X29, X30, [SP], #48 |
(123) 0x40c6ac RET |
(123) 0x40c6b0 ADD W1, W1, #1 |
(123) 0x40c6b4 MOVZ W2, #0 |
(123) 0x40c6b8 B 40c4f8 |
/home/hbollore/qaas/qaas-runs/169-814-5713/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 85 - 94 |
-------------------------------------------------------------------------------- |
85: #pragma omp parallel for |
86: for (int iBox=0; iBox<nBoxes; iBox++) |
87: { |
88: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
89: { |
90: int iSpecies = s->atoms->iSpecies[iOff]; |
91: real_t invMass = 1.0/s->species[iSpecies].mass; |
92: s->atoms->r[iOff][0] += dt*s->atoms->p[iOff][0]*invMass; |
93: s->atoms->r[iOff][1] += dt*s->atoms->p[iOff][1]*invMass; |
94: s->atoms->r[iOff][2] += dt*s->atoms->p[iOff][2]*invMass; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | GOMP_parallel | libomp.so | |
○ | timestep | timestep.c:85 | exec |
○ | main | CoMD.c:125 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | CoMD.c:150 | exec |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 10.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 5.33 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | P2, P3, P4, P5, |
Function | advancePosition._omp_fn.0 |
Source | timestep.c:85-85,timestep.c:88-88,timestep.c:91-92 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.00 |
CQA cycles if no scalar integer | 0.50 |
CQA cycles if FP arith vectorized | 5.00 |
CQA cycles if fully vectorized | 0.94 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 1.50 |
P1 cycles | 5.00 |
P2 cycles | 5.00 |
P3 cycles | 5.00 |
P4 cycles | 5.00 |
P5 cycles | 0.25 |
P6 cycles | 0.25 |
P7 cycles | 0.25 |
P8 cycles | 0.25 |
P9 cycles | 2.67 |
P10 cycles | 2.67 |
P11 cycles | 2.67 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 32.00 |
Nb uops | 32.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 15.20 |
Bytes prefetched | 0.00 |
Bytes loaded | 76.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 21.67 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 23.75 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.67 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 10.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 5.33 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | P2, P3, P4, P5, |
Function | advancePosition._omp_fn.0 |
Source | timestep.c:85-85,timestep.c:88-88,timestep.c:91-92 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.00 |
CQA cycles if no scalar integer | 0.50 |
CQA cycles if FP arith vectorized | 5.00 |
CQA cycles if fully vectorized | 0.94 |
Front-end cycles | 4.00 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 1.50 |
P1 cycles | 5.00 |
P2 cycles | 5.00 |
P3 cycles | 5.00 |
P4 cycles | 5.00 |
P5 cycles | 0.25 |
P6 cycles | 0.25 |
P7 cycles | 0.25 |
P8 cycles | 0.25 |
P9 cycles | 2.67 |
P10 cycles | 2.67 |
P11 cycles | 2.67 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 32.00 |
Nb uops | 32.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 15.20 |
Bytes prefetched | 0.00 |
Bytes loaded | 76.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 21.67 |
Vector-efficiency ratio load | 25.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 23.75 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.67 |
Path / |
Function | advancePosition._omp_fn.0 |
Source file and lines | timestep.c:85-94 |
Module | exec |
nb instructions | 32 |
loop length | 128 |
nb stack references | 0 |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.50 | 5.00 | 5.00 | 5.00 | 5.00 | 0.25 | 0.25 | 0.25 | 0.25 | 2.67 | 2.67 | 2.67 | 0.00 | 0.00 |
cycles | 1.50 | 1.50 | 5.00 | 5.00 | 5.00 | 5.00 | 0.25 | 0.25 | 0.25 | 0.25 | 2.67 | 2.67 | 2.67 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 4.00 |
Overall L1 | 5.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LDR X17, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM W15, W3, #26, #25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FMOV D4, #1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
SBFM X14, X3, #0, #31 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D0, [X20, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
SMADDL X15, W15, W0, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDR X4, [X17, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X18, [X4, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR W5, [X18, X14,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W5, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 40c690 <advancePosition._omp_fn.0+0x1d0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X10, X13, [X17, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
SUB W9, W5, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X7, X14, #56, #55 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X8, X9, X14,LSL #6 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ORR X0, XZR, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X6, X30, [X10, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X20, [X10, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X11, X6, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, X6, X7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X21, X11, X8,LSL #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X19, X30, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X30, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X1, X21, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X12, X20, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, X20, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
TBZ W1, #2, 40c5e0 <advancePosition._omp_fn.0+0x120> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X14, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X15, #1536 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W16, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 40c52c <advancePosition._omp_fn.0+0x6c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | advancePosition._omp_fn.0 |
Source file and lines | timestep.c:85-94 |
Module | exec |
nb instructions | 32 |
loop length | 128 |
nb stack references | 0 |
front end | 4.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.50 | 5.00 | 5.00 | 5.00 | 5.00 | 0.25 | 0.25 | 0.25 | 0.25 | 2.67 | 2.67 | 2.67 | 0.00 | 0.00 |
cycles | 1.50 | 1.50 | 5.00 | 5.00 | 5.00 | 5.00 | 0.25 | 0.25 | 0.25 | 0.25 | 2.67 | 2.67 | 2.67 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 4.00 |
Overall L1 | 5.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LDR X17, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
UBFM W15, W3, #26, #25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W0, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FMOV D4, #1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 |
SBFM X14, X3, #0, #31 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR D0, [X20, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
SMADDL X15, W15, W0, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDR X4, [X17, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X18, [X4, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR W5, [X18, X14,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP W5, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 40c690 <advancePosition._omp_fn.0+0x1d0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X10, X13, [X17, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
SUB W9, W5, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
UBFM X7, X14, #56, #55 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X8, X9, X14,LSL #6 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ORR X0, XZR, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDP X6, X30, [X10, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X20, [X10, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
ADD X11, X6, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X3, X6, X7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X21, X11, X8,LSL #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X19, X30, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X2, X30, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X1, X21, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X12, X20, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X4, X20, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
TBZ W1, #2, 40c5e0 <advancePosition._omp_fn.0+0x120> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD X14, X14, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X15, X15, #1536 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP W16, W14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.GT 40c52c <advancePosition._omp_fn.0+0x6c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |