Function: loadAtomsBuffer | Module: exec | Source: haloExchange.c:365-394 | Coverage: 0.14% |
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Function: loadAtomsBuffer | Module: exec | Source: haloExchange.c:365-394 | Coverage: 0.14% |
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/home/hbollore/qaas/qaas-runs/169-814-5713/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 365 - 394 |
-------------------------------------------------------------------------------- |
365: AtomMsg* buf = (AtomMsg*) charBuf; |
366: |
367: real_t* pbcFactor = parms->pbcFactor[face]; |
368: real3 shift; |
369: shift[0] = pbcFactor[0] * s->domain->globalExtent[0]; |
370: shift[1] = pbcFactor[1] * s->domain->globalExtent[1]; |
371: shift[2] = pbcFactor[2] * s->domain->globalExtent[2]; |
372: |
373: int nCells = parms->nCells[face]; |
374: int* cellList = parms->cellList[face]; |
375: int nBuf = 0; |
376: for (int iCell=0; iCell<nCells; ++iCell) |
377: { |
378: int iBox = cellList[iCell]; |
379: int iOff = iBox*MAXATOMS; |
380: for (int ii=iOff; ii<iOff+s->boxes->nAtoms[iBox]; ++ii) |
381: { |
382: buf[nBuf].gid = s->atoms->gid[ii]; |
383: buf[nBuf].type = s->atoms->iSpecies[ii]; |
384: buf[nBuf].rx = s->atoms->r[ii][0] + shift[0]; |
385: buf[nBuf].ry = s->atoms->r[ii][1] + shift[1]; |
386: buf[nBuf].rz = s->atoms->r[ii][2] + shift[2]; |
387: buf[nBuf].px = s->atoms->p[ii][0]; |
388: buf[nBuf].py = s->atoms->p[ii][1]; |
389: buf[nBuf].pz = s->atoms->p[ii][2]; |
390: ++nBuf; |
391: } |
392: } |
393: return nBuf*sizeof(AtomMsg); |
394: } |
0x405840 ADD X6, X0, W2,SXTW #3 |
0x405844 LDR X4, [X1, #16] |
0x405848 LDR X5, [X6, #72] |
0x40584c LDR W15, [X0, X2,SXTW #2] |
0x405850 LDP D0, D4, [X4, #72] |
0x405854 LDP D1, D2, [X5] |
0x405858 LDR D3, [X5, #16] |
0x40585c LDR D7, [X4, #88] |
0x405860 FMUL D5, D1, D0 |
0x405864 FMUL D6, D2, D4 |
0x405868 LDR X16, [X6, #24] |
0x40586c FMUL D16, D3, D7 |
0x405870 CMP W15, #0 |
0x405874 B.LE 405960 |
0x405878 LDR X0, [X1, #24] |
0x40587c MOVZ X13, #0 |
0x405880 MOVZ W11, #0 |
0x405884 MOVZ W18, #56 |
0x405888 MOVZ W17, #24 |
0x40588c LDR X14, [X0, #120] |
(36) 0x405890 LDR W8, [X16, X13,LSL #2] |
(36) 0x405894 ADD X9, X14, W8,SXTW #2 |
(36) 0x405898 LDR W2, [X14, X8,SXTW #2] |
(36) 0x40589c UBFM W8, W8, #26, #25 |
(36) 0x4058a0 CMP W2, #0 |
(36) 0x4058a4 B.LE 405948 |
(36) 0x4058a8 LDR X10, [X1, #32] |
(36) 0x4058ac SMADDL X7, W8, W17, XZR |
(36) 0x4058b0 ADD W12, W11, #1 |
(36) 0x4058b4 SMADDL X0, W11, W18, X3 |
(36) 0x4058b8 SBFM X2, X8, #0, #31 |
(36) 0x4058bc LDP X6, X4, [X10, #24] |
(36) 0x4058c0 LDR X11, [X10, #8] |
(36) 0x4058c4 ADD X5, X6, X7 |
(36) 0x4058c8 ADD X4, X4, X7 |
(36) 0x4058cc LDR X10, [X10, #16] |
(37) 0x4058d0 SUB W7, W2, W8 |
(37) 0x4058d4 ADD X5, X5, #24 |
(37) 0x4058d8 LDUR D17, [X5, #488] |
(37) 0x4058dc ADD W7, W12, W7 |
(37) 0x4058e0 ADD X4, X4, #24 |
(37) 0x4058e4 ADD X0, X0, #56 |
(37) 0x4058e8 LDR W6, [X11, X2,LSL #2] |
(37) 0x4058ec FADD D18, D17, D5 |
(37) 0x4058f0 STUR W6, [X0, #456] |
(37) 0x4058f4 LDR W6, [X10, X2,LSL #2] |
(37) 0x4058f8 ADD X2, X2, #1 |
(37) 0x4058fc STUR D18, [X0, #464] |
(37) 0x405900 LDUR D19, [X5, #496] |
(37) 0x405904 STUR W6, [X0, #460] |
(37) 0x405908 LDR W6, [X9] |
(37) 0x40590c FADD D20, D19, D6 |
(37) 0x405910 ADD W6, W8, W6 |
(37) 0x405914 STUR D20, [X0, #472] |
(37) 0x405918 LDUR D21, [X5, #504] |
(37) 0x40591c FADD D22, D21, D16 |
(37) 0x405920 STUR D22, [X0, #480] |
(37) 0x405924 LDUR D23, [X4, #488] |
(37) 0x405928 STUR D23, [X0, #488] |
(37) 0x40592c LDUR D24, [X4, #496] |
(37) 0x405930 STUR D24, [X0, #496] |
(37) 0x405934 LDUR D25, [X4, #504] |
(37) 0x405938 STUR D25, [X0, #504] |
(37) 0x40593c CMP W6, W2 |
(37) 0x405940 B.GT 4058d0 |
(36) 0x405944 ORR W11, WZR, W7 |
(36) 0x405948 ADD X13, X13, #1 |
(36) 0x40594c CMP W15, W13 |
(36) 0x405950 B.GT 405890 |
0x405954 MOVZ W1, #56 |
0x405958 MADD W0, W11, W1, WZR |
0x40595c RET |
0x405960 MOVZ W0, #0 |
0x405964 RET |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | redistributeAtoms | timestep.c:150 | exec |
○ | timestep | timestep.c:47 | exec |
○ | main | CoMD.c:125 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | CoMD.c:150 | exec |
Path / |
Source file and lines | haloExchange.c:365-394 |
Module | exec |
nb instructions | 25 |
loop length | 100 |
nb stack references | 0 |
front end | 3.13 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.50 | 2.25 | 2.25 | 2.25 | 2.25 | 0.75 | 0.75 | 0.75 | 0.75 | 3.33 | 3.33 | 3.33 | 0.00 | 0.00 |
cycles | 1.50 | 1.50 | 2.25 | 2.25 | 2.25 | 2.25 | 0.75 | 0.75 | 0.75 | 0.75 | 3.33 | 3.33 | 3.33 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.13 |
Overall L1 | 3.33 |
all | 25% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD X6, X0, W2,SXTW #3 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LDR X4, [X1, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [X6, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR W15, [X0, X2,SXTW #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP D0, D4, [X4, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDP D1, D2, [X5] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D3, [X5, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D7, [X4, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FMUL D5, D1, D0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
FMUL D6, D2, D4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
LDR X16, [X6, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D16, D3, D7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
CMP W15, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 405960 <loadAtomsBuffer+0x120> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X0, [X1, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ X13, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W11, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W18, #56 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W17, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X14, [X0, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #56 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD W0, W11, W1, WZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Source file and lines | haloExchange.c:365-394 |
Module | exec |
nb instructions | 25 |
loop length | 100 |
nb stack references | 0 |
front end | 3.13 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.50 | 2.25 | 2.25 | 2.25 | 2.25 | 0.75 | 0.75 | 0.75 | 0.75 | 3.33 | 3.33 | 3.33 | 0.00 | 0.00 |
cycles | 1.50 | 1.50 | 2.25 | 2.25 | 2.25 | 2.25 | 0.75 | 0.75 | 0.75 | 0.75 | 3.33 | 3.33 | 3.33 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 3.13 |
Overall L1 | 3.33 |
all | 25% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD X6, X0, W2,SXTW #3 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
LDR X4, [X1, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X5, [X6, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR W15, [X0, X2,SXTW #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP D0, D4, [X4, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDP D1, D2, [X5] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D3, [X5, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
LDR D7, [X4, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 |
FMUL D5, D1, D0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
FMUL D6, D2, D4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
LDR X16, [X6, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
FMUL D16, D3, D7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 |
CMP W15, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
B.LE 405960 <loadAtomsBuffer+0x120> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X0, [X1, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ X13, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W11, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W18, #56 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W17, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X14, [X0, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W1, #56 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MADD W0, W11, W1, WZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVZ W0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼loadAtomsBuffer– | 0.14 | 0.05 |
▼Loop 36 - haloExchange.c:376-390 - exec– | 0.01 | 0 |
○Loop 37 - haloExchange.c:380-389 - exec | 0.12 | 0.05 |