Function: advanceVelocity.extracted | Module: exec | Source: timestep.c:71-78 | Coverage: 2.72% |
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Function: advanceVelocity.extracted | Module: exec | Source: timestep.c:71-78 | Coverage: 2.72% |
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/scratch_na/users/xoserete/qaas_runs/171-172-4338/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 71 - 78 |
-------------------------------------------------------------------------------- |
71: #pragma omp parallel for |
72: for (int iBox=0; iBox<nBoxes; iBox++) |
73: { |
74: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
75: { |
76: s->atoms->p[iOff][0] += dt*s->atoms->f[iOff][0]; |
77: s->atoms->p[iOff][1] += dt*s->atoms->f[iOff][1]; |
78: s->atoms->p[iOff][2] += dt*s->atoms->f[iOff][2]; |
0x40e970 PUSH %RBP |
0x40e971 MOV %RSP,%RBP |
0x40e974 PUSH %R15 |
0x40e976 PUSH %R14 |
0x40e978 PUSH %R13 |
0x40e97a PUSH %R12 |
0x40e97c PUSH %RBX |
0x40e97d SUB $0x18,%RSP |
0x40e981 MOV %RCX,%R15 |
0x40e984 MOV %RDX,%RBX |
0x40e987 MOVL $0,-0x3c(%RBP) |
0x40e98e MOV (%RDI),%ESI |
0x40e990 MOVL $0,-0x30(%RBP) |
0x40e997 MOV %R9D,-0x2c(%RBP) |
0x40e99b MOVL $0x1,-0x38(%RBP) |
0x40e9a2 SUB $0x8,%RSP |
0x40e9a6 LEA -0x38(%RBP),%RAX |
0x40e9aa LEA -0x3c(%RBP),%RCX |
0x40e9ae LEA -0x30(%RBP),%R8 |
0x40e9b2 LEA -0x2c(%RBP),%R9 |
0x40e9b6 MOV $0x62c8f0,%EDI |
0x40e9bb MOV %ESI,-0x34(%RBP) |
0x40e9be MOV $0x22,%EDX |
0x40e9c3 PUSH $0x1 |
0x40e9c5 PUSH $0x1 |
0x40e9c7 PUSH %RAX |
0x40e9c8 CALL 402d40 <__kmpc_for_static_init_4@plt> |
0x40e9cd ADD $0x20,%RSP |
0x40e9d1 MOV -0x30(%RBP),%EAX |
0x40e9d4 MOV -0x2c(%RBP),%ECX |
0x40e9d7 CMP %ECX,%EAX |
0x40e9d9 JBE 40e9f9 |
0x40e9db MOV $0x62c910,%EDI |
0x40e9e0 MOV -0x34(%RBP),%ESI |
0x40e9e3 ADD $0x18,%RSP |
0x40e9e7 POP %RBX |
0x40e9e8 POP %R12 |
0x40e9ea POP %R13 |
0x40e9ec POP %R14 |
0x40e9ee POP %R15 |
0x40e9f0 POP %RBP |
0x40e9f1 VZEROUPPER |
0x40e9f4 JMP 402c00 |
0x40e9f9 VMOVQ %R15,%XMM0 |
0x40e9fe MOV 0x18(%RBX),%RDX |
0x40ea02 MOV 0x78(%RDX),%RDX |
0x40ea06 SUB %RAX,%RCX |
0x40ea09 VPBROADCASTQ %XMM0,%YMM1 |
0x40ea0e MOV %EAX,%ESI |
0x40ea10 SAL $0x6,%ESI |
0x40ea13 XOR %EDI,%EDI |
0x40ea15 VMOVUPD 0x138a1(%RIP),%YMM17 |
0x40ea1f VMOVUPD 0x137f7(%RIP),%YMM18 |
0x40ea29 VMOVUPD 0x1380d(%RIP),%YMM19 |
0x40ea33 VMOVUPD 0x13843(%RIP),%YMM20 |
0x40ea3d VMOVUPD 0x1385b(%RIP),%YMM6 |
0x40ea45 JMP 40ea63 |
0x40ea47 NOPW (%RAX,%RAX,1) |
(93) 0x40ea50 LEA 0x1(%RDI),%R8 |
(93) 0x40ea54 ADD $0x40,%ESI |
(93) 0x40ea57 CMP %RCX,%RDI |
(93) 0x40ea5a MOV %R8,%RDI |
(93) 0x40ea5d JE 40e9db |
(93) 0x40ea63 LEA (%RDI,%RAX,1),%R8 |
(93) 0x40ea67 MOV (%RDX,%R8,4),%R8D |
(93) 0x40ea6b TEST %R8D,%R8D |
(93) 0x40ea6e JLE 40ea50 |
(93) 0x40ea70 MOV %ESI,%R11D |
(93) 0x40ea73 SAL $0x3,%R11 |
(93) 0x40ea77 LEA (%RDI,%RAX,1),%R15D |
(93) 0x40ea7b SAL $0x6,%R15D |
(93) 0x40ea7f MOV 0x20(%RBX),%R10 |
(93) 0x40ea83 MOV 0x20(%R10),%R9 |
(93) 0x40ea87 MOV 0x28(%R10),%R10 |
(93) 0x40ea8b LEA -0x1(%R8),%R14D |
(93) 0x40ea8f MOVSXD %R14D,%R14 |
(93) 0x40ea92 ADD %R15,%R14 |
(93) 0x40ea95 SAL $0x3,%R14 |
(93) 0x40ea99 LEA (%R14,%R14,2),%R14 |
(93) 0x40ea9d LEA 0x10(%R10,%R14,1),%R12 |
(93) 0x40eaa2 SAL $0x3,%R15 |
(93) 0x40eaa6 LEA (%R15,%R15,2),%R15 |
(93) 0x40eaaa LEA (%R9,%R15,1),%R13 |
(93) 0x40eaae CMP %R13,%R12 |
(93) 0x40eab1 JB 40eb20 |
(93) 0x40eab3 ADD %R10,%R15 |
(93) 0x40eab6 LEA 0x10(%R9,%R14,1),%R14 |
(93) 0x40eabb CMP %R15,%R14 |
(93) 0x40eabe JB 40eb20 |
(93) 0x40eac0 LEA 0x10(%R11,%R11,2),%R11 |
(93) 0x40eac5 NOPW %CS:(%RAX,%RAX,1) |
(96) 0x40ead0 VMOVSD -0x10(%R10,%R11,1),%XMM2 |
(96) 0x40ead7 VFMADD213SD -0x10(%R9,%R11,1),%XMM0,%XMM2 |
(96) 0x40eade VMOVSD %XMM2,-0x10(%R9,%R11,1) |
(96) 0x40eae5 VMOVSD -0x8(%R10,%R11,1),%XMM2 |
(96) 0x40eaec VFMADD213SD -0x8(%R9,%R11,1),%XMM0,%XMM2 |
(96) 0x40eaf3 VMOVSD %XMM2,-0x8(%R9,%R11,1) |
(96) 0x40eafa VMOVSD (%R10,%R11,1),%XMM2 |
(96) 0x40eb00 VFMADD213SD (%R9,%R11,1),%XMM0,%XMM2 |
(96) 0x40eb06 VMOVSD %XMM2,(%R9,%R11,1) |
(96) 0x40eb0c ADD $0x18,%R11 |
(96) 0x40eb10 DEC %R8D |
(96) 0x40eb13 JNE 40ead0 |
(93) 0x40eb15 JMP 40ea50 |
0x40eb1a NOPW (%RAX,%RAX,1) |
(93) 0x40eb20 LEA (%R11,%R11,2),%R14 |
(93) 0x40eb24 MOV %R8D,%R15D |
(93) 0x40eb27 AND $-0x8,%R15D |
(93) 0x40eb2b JE 40ed52 |
(93) 0x40eb31 LEA -0x1(%R15),%R12D |
(93) 0x40eb35 XOR %R13D,%R13D |
(93) 0x40eb38 MOV %R14,%R11 |
(93) 0x40eb3b NOPL (%RAX,%RAX,1) |
(95) 0x40eb40 VMOVUPD 0x80(%R10,%R11,1),%YMM7 |
(95) 0x40eb4a VMOVUPD 0x20(%R10,%R11,1),%YMM8 |
(95) 0x40eb51 VMOVUPD 0x80(%R9,%R11,1),%YMM9 |
(95) 0x40eb5b VMOVUPD 0x20(%R9,%R11,1),%YMM10 |
(95) 0x40eb62 VMOVUPD 0x10(%R10,%R11,1),%XMM11 |
(95) 0x40eb69 VMOVUPD 0x70(%R10,%R11,1),%XMM12 |
(95) 0x40eb70 VBLENDPD $0x3,(%R10,%R11,1),%YMM8,%YMM13 |
(95) 0x40eb77 VBLENDPD $0x3,0x60(%R10,%R11,1),%YMM7,%YMM14 |
(95) 0x40eb7f VBLENDPD $0x3,(%R9,%R11,1),%YMM10,%YMM15 |
(95) 0x40eb86 VMOVUPD 0x10(%R9,%R11,1),%XMM16 |
(95) 0x40eb8e VBLENDPD $0x3,0x60(%R9,%R11,1),%YMM9,%YMM2 |
(95) 0x40eb96 VMOVUPD 0x20(%R10,%R11,1),%XMM3 |
(95) 0x40eb9d VMOVUPD 0x80(%R10,%R11,1),%XMM4 |
(95) 0x40eba7 VMOVUPD 0x20(%R9,%R11,1),%XMM5 |
(95) 0x40ebae VINSERTF128 $0x1,0x40(%R10,%R11,1),%YMM11,%YMM11 |
(95) 0x40ebb6 VBLENDPD $0xc,0x40(%R10,%R11,1),%YMM3,%YMM3 |
(95) 0x40ebbe VBLENDPD $0xa,%YMM3,%YMM11,%YMM3 |
(95) 0x40ebc4 VBLENDPD $0xa,%YMM11,%YMM13,%YMM11 |
(95) 0x40ebca VSHUFPD $0x5,%YMM8,%YMM13,%YMM8 |
(95) 0x40ebd0 VINSERTF128 $0x1,0xa0(%R10,%R11,1),%YMM12,%YMM12 |
(95) 0x40ebdb VBLENDPD $0xc,0xa0(%R10,%R11,1),%YMM4,%YMM4 |
(95) 0x40ebe6 VBLENDPD $0xa,%YMM4,%YMM12,%YMM4 |
(95) 0x40ebec VBLENDPD $0xa,%YMM12,%YMM14,%YMM12 |
(95) 0x40ebf2 VSHUFPD $0x5,%YMM7,%YMM14,%YMM13 |
(95) 0x40ebf7 VINSERTF32X4 $0x1,0x40(%R9,%R11,1),%YMM16,%YMM14 |
(95) 0x40ec00 VBLENDPD $0xc,0x40(%R9,%R11,1),%YMM5,%YMM5 |
(95) 0x40ec08 VMOVUPD 0x70(%R9,%R11,1),%XMM16 |
(95) 0x40ec10 VBLENDPD $0xa,%YMM5,%YMM14,%YMM7 |
(95) 0x40ec16 VBLENDPD $0xa,%YMM14,%YMM15,%YMM5 |
(95) 0x40ec1c VSHUFPD $0x5,%YMM10,%YMM15,%YMM10 |
(95) 0x40ec22 VBROADCASTSD 0x50(%R10,%R11,1),%YMM14 |
(95) 0x40ec29 VBLENDPD $0x8,%YMM14,%YMM8,%YMM14 |
(95) 0x40ec2f VBROADCASTSD 0xb0(%R10,%R11,1),%YMM8 |
(95) 0x40ec39 VBLENDPD $0x8,%YMM8,%YMM13,%YMM13 |
(95) 0x40ec3f VBROADCASTSD 0x50(%R9,%R11,1),%YMM8 |
(95) 0x40ec46 VBLENDPD $0x8,%YMM8,%YMM10,%YMM10 |
(95) 0x40ec4c VBROADCASTSD 0xb0(%R9,%R11,1),%YMM8 |
(95) 0x40ec56 VSHUFPD $0x5,%YMM9,%YMM2,%YMM9 |
(95) 0x40ec5c VBLENDPD $0x8,%YMM8,%YMM9,%YMM9 |
(95) 0x40ec62 VINSERTF32X4 $0x1,0xa0(%R9,%R11,1),%YMM16,%YMM15 |
(95) 0x40ec6b VBLENDPD $0xa,%YMM15,%YMM2,%YMM8 |
(95) 0x40ec71 VFMADD231PD %YMM12,%YMM1,%YMM8 |
(95) 0x40ec76 VFMADD231PD %YMM11,%YMM1,%YMM5 |
(95) 0x40ec7b VFMADD231PD %YMM13,%YMM1,%YMM9 |
(95) 0x40ec80 VFMADD231PD %YMM14,%YMM1,%YMM10 |
(95) 0x40ec85 VMOVUPD 0x80(%R9,%R11,1),%XMM2 |
(95) 0x40ec8f VBLENDPD $0xc,0xa0(%R9,%R11,1),%YMM2,%YMM2 |
(95) 0x40ec9a VBLENDPD $0xa,%YMM2,%YMM15,%YMM2 |
(95) 0x40eca0 VFMADD231PD %YMM4,%YMM1,%YMM2 |
(95) 0x40eca5 VFMADD231PD %YMM3,%YMM1,%YMM7 |
(95) 0x40ecaa VMOVAPD %YMM5,%YMM3 |
(95) 0x40ecae VPERMT2PD %YMM10,%YMM17,%YMM3 |
(95) 0x40ecb4 VMOVAPD %YMM9,%YMM4 |
(95) 0x40ecb8 VPERMT2PD %YMM8,%YMM18,%YMM4 |
(95) 0x40ecbe VMOVAPD %YMM9,%YMM11 |
(95) 0x40ecc3 VPERMT2PD %YMM8,%YMM19,%YMM11 |
(95) 0x40ecc9 VPERMT2PD %YMM9,%YMM17,%YMM8 |
(95) 0x40eccf VMOVAPD %YMM10,%YMM9 |
(95) 0x40ecd4 VPERMT2PD %YMM5,%YMM18,%YMM9 |
(95) 0x40ecda VPERMT2PD %YMM5,%YMM19,%YMM10 |
(95) 0x40ece0 VPERMT2PD %YMM2,%YMM20,%YMM8 |
(95) 0x40ece6 VBLENDPD $0x2,%YMM2,%YMM11,%YMM5 |
(95) 0x40ecec VPERMT2PD %YMM4,%YMM6,%YMM2 |
(95) 0x40ecf2 VBLENDPD $0x2,%YMM7,%YMM10,%YMM4 |
(95) 0x40ecf8 VPERMT2PD %YMM7,%YMM20,%YMM3 |
(95) 0x40ecfe VPERMT2PD %YMM9,%YMM6,%YMM7 |
(95) 0x40ed04 VMOVUPD %YMM5,0x80(%R9,%R11,1) |
(95) 0x40ed0e VMOVUPD %YMM4,0x20(%R9,%R11,1) |
(95) 0x40ed15 VMOVUPD %YMM7,0x40(%R9,%R11,1) |
(95) 0x40ed1c VMOVUPD %YMM2,0xa0(%R9,%R11,1) |
(95) 0x40ed26 VMOVUPD %YMM8,0x60(%R9,%R11,1) |
(95) 0x40ed2d VMOVUPD %YMM3,(%R9,%R11,1) |
(95) 0x40ed33 ADD $0x8,%R13D |
(95) 0x40ed37 ADD $0xc0,%R11 |
(95) 0x40ed3e CMP %R12D,%R13D |
(95) 0x40ed41 JLE 40eb40 |
(93) 0x40ed47 CMP %R15D,%R8D |
(93) 0x40ed4a JE 40ea50 |
(93) 0x40ed50 JMP 40ed55 |
(93) 0x40ed52 XOR %R15D,%R15D |
(93) 0x40ed55 SUB %R15D,%R8D |
(93) 0x40ed58 MOVSXD %R15D,%R11 |
(93) 0x40ed5b SAL $0x3,%R11 |
(93) 0x40ed5f LEA (%R11,%R11,2),%R11 |
(93) 0x40ed63 ADD %R11,%R9 |
(93) 0x40ed66 ADD %R11,%R10 |
(93) 0x40ed69 NOPL (%RAX) |
(94) 0x40ed70 VMOVUPD (%R10,%R14,1),%XMM2 |
(94) 0x40ed76 VFMADD213PD (%R9,%R14,1),%XMM1,%XMM2 |
(94) 0x40ed7c VMOVUPD %XMM2,(%R9,%R14,1) |
(94) 0x40ed82 VMOVSD 0x10(%R10,%R14,1),%XMM2 |
(94) 0x40ed89 VFMADD213SD 0x10(%R9,%R14,1),%XMM0,%XMM2 |
(94) 0x40ed90 VMOVSD %XMM2,0x10(%R9,%R14,1) |
(94) 0x40ed97 ADD $0x18,%R14 |
(94) 0x40ed9b DEC %R8D |
(94) 0x40ed9e JNE 40ed70 |
(93) 0x40eda0 JMP 40ea50 |
0x40eda5 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | timestep.c:71-78 |
Module | exec |
nb instructions | 60 |
nb uops | 62 |
loop length | 241 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 10.33 cycles |
front end | 10.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
cycles | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.12-10.16 |
Stall cycles | 0.00 |
Front-end | 10.33 |
Dispatch | 7.50 |
Overall L1 | 10.33 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 26% |
load | 71% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
all | 9% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 37% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x3c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c8f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402d40 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40e9f9 <advanceVelocity.extracted+0x89> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x62c910,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 402c00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x138a1(%RIP),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x137f7(%RIP),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x1380d(%RIP),%YMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x13843(%RIP),%YMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x1385b(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40ea63 <advanceVelocity.extracted+0xf3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | timestep.c:71-78 |
Module | exec |
nb instructions | 60 |
nb uops | 62 |
loop length | 241 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 10.33 cycles |
front end | 10.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
cycles | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.12-10.16 |
Stall cycles | 0.00 |
Front-end | 10.33 |
Dispatch | 7.50 |
Overall L1 | 10.33 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 26% |
load | 71% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
all | 9% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 37% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x3c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c8f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402d40 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40e9f9 <advanceVelocity.extracted+0x89> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x62c910,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 402c00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x138a1(%RIP),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x137f7(%RIP),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x1380d(%RIP),%YMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x13843(%RIP),%YMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x1385b(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40ea63 <advanceVelocity.extracted+0xf3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼advanceVelocity.extracted– | 2.72 | 0.72 |
▼Loop 93 - timestep.c:71-78 - exec– | 0.03 | 0.01 |
○Loop 95 - timestep.c:74-78 - exec | 2.36 | 0.62 |
○Loop 94 - timestep.c:74-78 - exec | 0.32 | 0.08 |
○Loop 96 - timestep.c:74-78 - exec | 0 | 0 |