Function: setTemperature.extracted | Module: exec | Source: initAtoms.c:174-181 | Coverage: 0.01% |
---|
Function: setTemperature.extracted | Module: exec | Source: initAtoms.c:174-181 | Coverage: 0.01% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-4338/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 174 - 181 |
-------------------------------------------------------------------------------- |
174: #pragma omp parallel for |
175: for (int iBox=0; iBox<s->boxes->nLocalBoxes; ++iBox) |
176: { |
177: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
178: { |
179: s->atoms->p[iOff][0] *= scaleFactor; |
180: s->atoms->p[iOff][1] *= scaleFactor; |
181: s->atoms->p[iOff][2] *= scaleFactor; |
0x409260 PUSH %RBP |
0x409261 MOV %RSP,%RBP |
0x409264 PUSH %R15 |
0x409266 PUSH %R14 |
0x409268 PUSH %R12 |
0x40926a PUSH %RBX |
0x40926b SUB $0x10,%RSP |
0x40926f MOV %RCX,%R15 |
0x409272 MOV %RDX,%RBX |
0x409275 MOVL $0,-0x30(%RBP) |
0x40927c MOV (%RDI),%R14D |
0x40927f MOVL $0,-0x28(%RBP) |
0x409286 MOV %R9D,-0x24(%RBP) |
0x40928a MOVL $0x1,-0x2c(%RBP) |
0x409291 SUB $0x8,%RSP |
0x409295 LEA -0x2c(%RBP),%RAX |
0x409299 LEA -0x30(%RBP),%RCX |
0x40929d LEA -0x28(%RBP),%R8 |
0x4092a1 LEA -0x24(%RBP),%R9 |
0x4092a5 MOV $0x62c630,%EDI |
0x4092aa MOV %R14D,%ESI |
0x4092ad MOV $0x22,%EDX |
0x4092b2 PUSH $0x1 |
0x4092b4 PUSH $0x1 |
0x4092b6 PUSH %RAX |
0x4092b7 CALL 402d40 <__kmpc_for_static_init_4@plt> |
0x4092bc ADD $0x20,%RSP |
0x4092c0 MOV -0x28(%RBP),%EAX |
0x4092c3 MOV -0x24(%RBP),%ECX |
0x4092c6 CMP %ECX,%EAX |
0x4092c8 JBE 4092e6 |
0x4092ca MOV $0x62c650,%EDI |
0x4092cf MOV %R14D,%ESI |
0x4092d2 ADD $0x10,%RSP |
0x4092d6 POP %RBX |
0x4092d7 POP %R12 |
0x4092d9 POP %R14 |
0x4092db POP %R15 |
0x4092dd POP %RBP |
0x4092de VZEROUPPER |
0x4092e1 JMP 402c00 |
0x4092e6 VMOVQ %R15,%XMM0 |
0x4092eb MOV 0x18(%RBX),%RDX |
0x4092ef MOV 0x78(%RDX),%RDX |
0x4092f3 SUB %RAX,%RCX |
0x4092f6 VPBROADCASTQ %XMM0,%YMM1 |
0x4092fb MOV %EAX,%ESI |
0x4092fd SAL $0x6,%ESI |
0x409300 XOR %EDI,%EDI |
0x409302 VMOVUPD 0x18f16(%RIP),%YMM2 |
0x40930a VMOVUPD 0x18f2e(%RIP),%YMM3 |
0x409312 VMOVUPD 0x18fa6(%RIP),%YMM4 |
0x40931a VMOVUPD 0x18f5e(%RIP),%YMM5 |
0x409322 VMOVUPD 0x18f76(%RIP),%YMM6 |
0x40932a JMP 40933f |
0x40932c NOPL (%RAX) |
(68) 0x409330 LEA 0x1(%RDI),%R8 |
(68) 0x409334 ADD $0x40,%ESI |
(68) 0x409337 CMP %RCX,%RDI |
(68) 0x40933a MOV %R8,%RDI |
(68) 0x40933d JE 4092ca |
(68) 0x40933f MOV %ESI,%ESI |
(68) 0x409341 LEA (%RDI,%RAX,1),%R8 |
(68) 0x409345 MOV (%RDX,%R8,4),%R8D |
(68) 0x409349 TEST %R8D,%R8D |
(68) 0x40934c JLE 409330 |
(68) 0x40934e MOV 0x20(%RBX),%R9 |
(68) 0x409352 MOV 0x20(%R9),%R9 |
(68) 0x409356 MOV %R8D,%R10D |
(68) 0x409359 AND $-0x8,%R10D |
(68) 0x40935d JE 4094d0 |
(68) 0x409363 LEA (,%RSI,8),%R11 |
(68) 0x40936b LEA (%R11,%R11,2),%R11 |
(68) 0x40936f LEA -0x1(%R10),%R15D |
(68) 0x409373 ADD %R9,%R11 |
(68) 0x409376 XOR %R12D,%R12D |
(68) 0x409379 NOPL (%RAX) |
(70) 0x409380 VMOVUPD 0x20(%R11),%YMM7 |
(70) 0x409386 VMOVUPD 0x80(%R11),%YMM8 |
(70) 0x40938f VMOVUPD 0x70(%R11),%XMM9 |
(70) 0x409395 VMOVUPD 0x10(%R11),%XMM10 |
(70) 0x40939b VBLENDPD $0x3,0x60(%R11),%YMM8,%YMM11 |
(70) 0x4093a2 VBLENDPD $0x3,(%R11),%YMM7,%YMM12 |
(70) 0x4093a8 VINSERTF128 $0x1,0xa0(%R11),%YMM9,%YMM9 |
(70) 0x4093b2 VINSERTF128 $0x1,0x40(%R11),%YMM10,%YMM10 |
(70) 0x4093b9 VBROADCASTSD 0xb0(%R11),%YMM13 |
(70) 0x4093c2 VBROADCASTSD 0x50(%R11),%YMM14 |
(70) 0x4093c8 VSHUFPD $0x5,%YMM8,%YMM11,%YMM15 |
(70) 0x4093ce VBLENDPD $0x8,%YMM13,%YMM15,%YMM13 |
(70) 0x4093d4 VBLENDPD $0xc,0x40(%R11),%YMM7,%YMM15 |
(70) 0x4093db VBLENDPD $0xc,0xa0(%R11),%YMM8,%YMM8 |
(70) 0x4093e5 VSHUFPD $0x5,%YMM7,%YMM12,%YMM7 |
(70) 0x4093ea VBLENDPD $0xa,%YMM9,%YMM11,%YMM11 |
(70) 0x4093f0 VBLENDPD $0xa,%YMM10,%YMM12,%YMM12 |
(70) 0x4093f6 VBLENDPD $0x8,%YMM14,%YMM7,%YMM7 |
(70) 0x4093fc VMULPD %YMM1,%YMM12,%YMM12 |
(70) 0x409400 VMULPD %YMM1,%YMM11,%YMM11 |
(70) 0x409404 VMULPD %YMM1,%YMM7,%YMM7 |
(70) 0x409408 VMULPD %YMM1,%YMM13,%YMM13 |
(70) 0x40940c VBLENDPD $0xa,%YMM15,%YMM10,%YMM10 |
(70) 0x409412 VBLENDPD $0xa,%YMM8,%YMM9,%YMM8 |
(70) 0x409418 VMULPD %YMM1,%YMM8,%YMM8 |
(70) 0x40941c VMULPD %YMM1,%YMM10,%YMM9 |
(70) 0x409420 VMOVAPD %YMM13,%YMM10 |
(70) 0x409425 VPERMT2PD %YMM11,%YMM2,%YMM10 |
(70) 0x40942b VMOVAPD %YMM13,%YMM14 |
(70) 0x409430 VPERMT2PD %YMM11,%YMM3,%YMM14 |
(70) 0x409436 VPERMT2PD %YMM13,%YMM4,%YMM11 |
(70) 0x40943c VMOVAPD %YMM7,%YMM13 |
(70) 0x409440 VPERMT2PD %YMM12,%YMM2,%YMM13 |
(70) 0x409446 VMOVAPD %YMM7,%YMM15 |
(70) 0x40944a VPERMT2PD %YMM12,%YMM3,%YMM15 |
(70) 0x409450 VPERMT2PD %YMM7,%YMM4,%YMM12 |
(70) 0x409456 VPERMT2PD %YMM9,%YMM5,%YMM12 |
(70) 0x40945c VBLENDPD $0x2,%YMM9,%YMM15,%YMM7 |
(70) 0x409462 VPERMT2PD %YMM13,%YMM6,%YMM9 |
(70) 0x409468 VPERMT2PD %YMM8,%YMM5,%YMM11 |
(70) 0x40946e VBLENDPD $0x2,%YMM8,%YMM14,%YMM13 |
(70) 0x409474 VPERMT2PD %YMM10,%YMM6,%YMM8 |
(70) 0x40947a VMOVUPD %YMM13,0x80(%R11) |
(70) 0x409483 VMOVUPD %YMM7,0x20(%R11) |
(70) 0x409489 VMOVUPD %YMM8,0xa0(%R11) |
(70) 0x409492 VMOVUPD %YMM11,0x60(%R11) |
(70) 0x409498 VMOVUPD %YMM9,0x40(%R11) |
(70) 0x40949e VMOVUPD %YMM12,(%R11) |
(70) 0x4094a3 ADD $0x8,%R12D |
(70) 0x4094a7 ADD $0xc0,%R11 |
(70) 0x4094ae CMP %R15D,%R12D |
(70) 0x4094b1 JLE 409380 |
(68) 0x4094b7 CMP %R10D,%R8D |
(68) 0x4094ba JE 409330 |
(68) 0x4094c0 JMP 4094d3 |
0x4094c2 NOPW %CS:(%RAX,%RAX,1) |
(68) 0x4094d0 XOR %R10D,%R10D |
(68) 0x4094d3 SUB %R10D,%R8D |
(68) 0x4094d6 MOVSXD %R10D,%R10 |
(68) 0x4094d9 ADD %RSI,%R10 |
(68) 0x4094dc LEA (%R10,%R10,2),%R10 |
(68) 0x4094e0 LEA 0x10(%R9,%R10,8),%R9 |
(68) 0x4094e5 NOPW %CS:(%RAX,%RAX,1) |
(69) 0x4094f0 VMULPD -0x10(%R9),%XMM1,%XMM7 |
(69) 0x4094f6 VMOVUPD %XMM7,-0x10(%R9) |
(69) 0x4094fc VMULSD (%R9),%XMM0,%XMM7 |
(69) 0x409501 VMOVSD %XMM7,(%R9) |
(69) 0x409506 ADD $0x18,%R9 |
(69) 0x40950a DEC %R8D |
(69) 0x40950d JNE 4094f0 |
(68) 0x40950f JMP 409330 |
0x409514 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | initAtoms.c:174-181 |
Module | exec |
nb instructions | 58 |
nb uops | 60 |
loop length | 234 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 10.00 cycles |
front end | 10.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 5.00 | 5.00 | 6.50 | 2.00 | 1.80 | 6.50 | 6.50 | 6.50 | 1.60 | 5.00 |
cycles | 1.80 | 1.80 | 5.00 | 5.00 | 6.50 | 2.00 | 1.80 | 6.50 | 6.50 | 6.50 | 1.60 | 5.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 9.79-9.83 |
Stall cycles | 0.00 |
Front-end | 10.00 |
Dispatch | 6.50 |
Overall L1 | 10.00 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 26% |
load | 83% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 9% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 42% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x28(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x24(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2c(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x24(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c630,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402d40 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x28(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x24(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4092e6 <setTemperature.extracted+0x86> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x62c650,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 402c00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x18f16(%RIP),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18f2e(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18fa6(%RIP),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18f5e(%RIP),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18f76(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40933f <setTemperature.extracted+0xdf> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | initAtoms.c:174-181 |
Module | exec |
nb instructions | 58 |
nb uops | 60 |
loop length | 234 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 10.00 cycles |
front end | 10.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 5.00 | 5.00 | 6.50 | 2.00 | 1.80 | 6.50 | 6.50 | 6.50 | 1.60 | 5.00 |
cycles | 1.80 | 1.80 | 5.00 | 5.00 | 6.50 | 2.00 | 1.80 | 6.50 | 6.50 | 6.50 | 1.60 | 5.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 9.79-9.83 |
Stall cycles | 0.00 |
Front-end | 10.00 |
Dispatch | 6.50 |
Overall L1 | 10.00 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 26% |
load | 83% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 9% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 42% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x28(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x24(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x2c(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x24(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c630,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402d40 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x28(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x24(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4092e6 <setTemperature.extracted+0x86> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x62c650,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 402c00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x18f16(%RIP),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18f2e(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18fa6(%RIP),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18f5e(%RIP),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x18f76(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40933f <setTemperature.extracted+0xdf> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼setTemperature.extracted– | 0.01 | 0 |
▼Loop 68 - initAtoms.c:174-181 - exec– | 0 | 0 |
○Loop 70 - initAtoms.c:177-181 - exec | 0.01 | 0 |
○Loop 69 - initAtoms.c:177-181 - exec | 0 | 0 |