Loop Id: 95 | Module: exec | Source: ljForce.c:191-216 [...] | Coverage: 40.92% |
---|
Loop Id: 95 | Module: exec | Source: ljForce.c:191-216 [...] | Coverage: 40.92% |
---|
0x40cd60 ADD $0x18,%RCX |
0x40cd64 DEC %R12 |
0x40cd67 JE 40cd40 |
0x40cd69 VMOVUPD (%RBX,%RDX,8),%XMM11 [4] |
0x40cd6e VSUBPD -0x10(%RCX),%XMM11,%XMM11 [1] |
0x40cd73 VMULPD %XMM11,%XMM11,%XMM12 |
0x40cd78 VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 |
0x40cd7e VADDSD %XMM12,%XMM13,%XMM13 |
0x40cd83 VMOVSD 0x10(%RBX,%RDX,8),%XMM12 [4] |
0x40cd89 VSUBSD (%RCX),%XMM12,%XMM12 [1] |
0x40cd8d VFMADD231SD %XMM12,%XMM12,%XMM13 |
0x40cd92 VUCOMISD %XMM2,%XMM13 |
0x40cd96 JA 40cd60 |
0x40cd98 VUCOMISD %XMM4,%XMM13 |
0x40cd9c JBE 40cd60 |
0x40cd9e VDIVSD %XMM13,%XMM6,%XMM13 |
0x40cda3 VMULSD %XMM13,%XMM13,%XMM14 |
0x40cda8 VMULSD %XMM1,%XMM13,%XMM15 |
0x40cdac VMULSD %XMM15,%XMM14,%XMM14 |
0x40cdb1 VADDSD %XMM7,%XMM14,%XMM15 |
0x40cdb5 VFNMADD213SD 0x10(%RBP),%XMM14,%XMM15 [5] |
0x40cdbb VMULSD %XMM8,%XMM15,%XMM15 |
0x40cdc0 MOV 0x30(%R13),%R10 [2] |
0x40cdc4 VADDSD (%R10,%R15,8),%XMM15,%XMM0 [6] |
0x40cdca VMOVSD %XMM0,(%R10,%R15,8) [6] |
0x40cdd0 VMOVAPD %XMM9,%XMM0 |
0x40cdd4 VFMADD213SD %XMM10,%XMM14,%XMM0 |
0x40cdd9 VMULSD %XMM3,%XMM13,%XMM13 |
0x40cddd VMULSD %XMM0,%XMM14,%XMM0 |
0x40cde1 VMULSD %XMM0,%XMM13,%XMM0 |
0x40cde5 MOV 0x28(%R13),%R10 [2] |
0x40cde9 VMOVDDUP %XMM0,%XMM13 |
0x40cded VFMADD213PD (%R10,%RDX,8),%XMM13,%XMM11 [3] |
0x40cdf3 VMOVUPD %XMM11,(%R10,%RDX,8) [3] |
0x40cdf9 VFMADD213SD 0x10(%R10,%RDX,8),%XMM0,%XMM12 [3] |
0x40ce00 VMOVSD %XMM12,0x10(%R10,%RDX,8) [3] |
0x40ce07 VADDSD %XMM5,%XMM15,%XMM5 |
0x40ce0b JMP 40cd60 |
/scratch_na/users/xoserete/qaas_runs/171-172-2581/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191 - 216 |
-------------------------------------------------------------------------------- |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 2.51 |
CQA speedup if fully vectorized | 5.18 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.17 |
CQA cycles if no scalar integer | 5.17 |
CQA cycles if FP arith vectorized | 2.06 |
CQA cycles if fully vectorized | 1.00 |
Front-end cycles | 3.83 |
DIV/SQRT cycles | 4.83 |
P0 cycles | 4.83 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.50 |
P4 cycles | 3.50 |
P5 cycles | 2.67 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 0.00 |
P10 cycles | 2.00 |
P11 cycles | 1.33 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 5.18 - 5.19 |
Stall cycles (UFS) | 0.71 - 0.71 |
Nb insns | 22.00 |
Nb uops | 22.00 |
Nb loads | 6.00 |
Nb stores | 1.00 |
Nb stack references | 0.33 |
FLOP/cycle | 2.90 |
Nb FLOP add-sub | 5.00 |
Nb FLOP mul | 4.33 |
Nb FLOP fma | 2.67 |
Nb FLOP div | 0.33 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 15.44 |
Bytes prefetched | 0.00 |
Bytes loaded | 66.67 |
Bytes stored | 10.67 |
Stride 0 | 1.67 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.67 |
Vectorization ratio all | 35.93 |
Vectorization ratio load | 45.83 |
Vectorization ratio store | 33.33 |
Vectorization ratio mul | 70.83 |
Vectorization ratio add_sub | 27.78 |
Vectorization ratio fma | 6.67 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 41.11 |
Vector-efficiency ratio all | 16.99 |
Vector-efficiency ratio load | 18.23 |
Vector-efficiency ratio store | 16.67 |
Vector-efficiency ratio mul | 21.35 |
Vector-efficiency ratio add_sub | 15.97 |
Vector-efficiency ratio fma | 13.33 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 17.64 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 2.10 |
CQA speedup if fully vectorized | 6.12 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.20 |
Bottlenecks | |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.00 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 1.43 |
CQA cycles if fully vectorized | 0.49 |
Front-end cycles | 2.17 |
DIV/SQRT cycles | 2.50 |
P0 cycles | 2.50 |
P1 cycles | 1.33 |
P2 cycles | 1.33 |
P3 cycles | 0.00 |
P4 cycles | 2.00 |
P5 cycles | 2.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 1.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 2.79 |
Stall cycles (UFS) | 0.00 |
Nb insns | 13.00 |
Nb uops | 13.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.67 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 48.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 44.44 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 33.33 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 18.06 |
Vector-efficiency ratio load | 18.75 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 25.00 |
Vector-efficiency ratio add_sub | 16.67 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 18.75 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 3.45 |
CQA speedup if fully vectorized | 4.75 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P1, |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.50 |
CQA cycles if no scalar integer | 9.50 |
CQA cycles if FP arith vectorized | 2.75 |
CQA cycles if fully vectorized | 2.00 |
Front-end cycles | 6.83 |
DIV/SQRT cycles | 9.00 |
P0 cycles | 9.50 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 1.50 |
P4 cycles | 6.00 |
P5 cycles | 3.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 0.00 |
P10 cycles | 3.33 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 9.57 - 9.60 |
Stall cycles (UFS) | 2.03 - 2.03 |
Nb insns | 38.00 |
Nb uops | 38.00 |
Nb loads | 10.00 |
Nb stores | 3.00 |
Nb stack references | 1.00 |
FLOP/cycle | 3.05 |
Nb FLOP add-sub | 7.00 |
Nb FLOP mul | 9.00 |
Nb FLOP fma | 6.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.32 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 32.00 |
Stride 0 | 3.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 2.00 |
Vectorization ratio all | 23.33 |
Vectorization ratio load | 37.50 |
Vectorization ratio store | 33.33 |
Vectorization ratio mul | 12.50 |
Vectorization ratio add_sub | 16.67 |
Vectorization ratio fma | 20.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 40.00 |
Vector-efficiency ratio all | 15.42 |
Vector-efficiency ratio load | 17.19 |
Vector-efficiency ratio store | 16.67 |
Vector-efficiency ratio mul | 14.06 |
Vector-efficiency ratio add_sub | 14.58 |
Vector-efficiency ratio fma | 15.00 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 17.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.50 |
CQA speedup if fully vectorized | 6.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.20 |
Bottlenecks | P0, P6, |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.00 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 2.00 |
CQA cycles if fully vectorized | 0.50 |
Front-end cycles | 2.50 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 2.50 |
P1 cycles | 1.33 |
P2 cycles | 1.33 |
P3 cycles | 0.00 |
P4 cycles | 2.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 1.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | 3.18 |
Stall cycles (UFS) | 0.09 |
Nb insns | 15.00 |
Nb uops | 15.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.67 |
Nb FLOP add-sub | 4.00 |
Nb FLOP mul | 2.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 48.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 40.00 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 33.33 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 33.33 |
Vector-efficiency ratio all | 17.50 |
Vector-efficiency ratio load | 18.75 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 25.00 |
Vector-efficiency ratio add_sub | 16.67 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 16.67 |
Path / |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 22 |
nb uops | 22 |
loop length | 98 |
used x86 registers | 5.33 |
used mmx registers | 0 |
used xmm registers | 8.33 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0.33 |
ADD-SUB / MUL ratio | 2.25 |
micro-operation queue | 3.83 cycles |
front end | 3.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.83 | 4.67 | 2.00 | 2.00 | 0.50 | 3.50 | 2.67 | 0.50 | 0.50 | 0.50 | 0.00 | 2.00 |
cycles | 4.83 | 4.83 | 2.00 | 2.00 | 0.50 | 3.50 | 2.67 | 0.50 | 0.50 | 0.50 | 0.00 | 2.00 |
Cycles executing div or sqrt instructions | 1.33 |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 5.18-5.19 |
Stall cycles | 0.71-0.71 |
RS full (events) | 1.93-1.87 |
Front-end | 3.83 |
Dispatch | 5.00 |
DIV/SQRT | 1.33 |
Data deps. | 3.00 |
Overall L1 | 5.17 |
all | 35% |
load | 45% |
store | 33% |
mul | 70% |
add-sub | 27% |
fma | 6% |
div/sqrt | 0% |
other | 41% |
all | 16% |
load | 18% |
store | 16% |
mul | 21% |
add-sub | 15% |
fma | 13% |
div/sqrt | 12% |
other | 17% |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 13 |
nb uops | 13 |
loop length | 56 |
used x86 registers | 4 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 3.00 |
micro-operation queue | 2.17 cycles |
front end | 2.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.50 | 2.50 | 1.33 | 1.33 | 0.00 | 2.00 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.33 |
cycles | 2.50 | 2.50 | 1.33 | 1.33 | 0.00 | 2.00 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 2.79 |
Stall cycles | 0.00 |
Front-end | 2.17 |
Dispatch | 2.50 |
Data deps. | 3.00 |
Overall L1 | 3.00 |
all | 44% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 33% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 18% |
load | 18% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 25% |
add-sub | 16% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x18,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
DEC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 40cd40 <ljForce.extracted+0x210> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD (%RBX,%RDX,8),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VSUBPD -0x10(%RCX),%XMM11,%XMM11 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD %XMM11,%XMM11,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM12,%XMM13,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%RBX,%RDX,8),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VSUBSD (%RCX),%XMM12,%XMM12 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231SD %XMM12,%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM2,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 40cd60 <ljForce.extracted+0x230> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 38 |
nb uops | 38 |
loop length | 176 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 0.75 |
micro-operation queue | 6.83 cycles |
front end | 6.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 9.00 | 9.00 | 3.33 | 3.33 | 1.50 | 6.00 | 3.00 | 1.50 | 1.50 | 1.50 | 0.00 | 3.33 |
cycles | 9.00 | 9.50 | 3.33 | 3.33 | 1.50 | 6.00 | 3.00 | 1.50 | 1.50 | 1.50 | 0.00 | 3.33 |
Cycles executing div or sqrt instructions | 4.00 |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 9.57-9.60 |
Stall cycles | 2.03-2.03 |
RS full (events) | 5.42-5.26 |
Front-end | 6.83 |
Dispatch | 9.50 |
DIV/SQRT | 4.00 |
Data deps. | 3.00 |
Overall L1 | 9.50 |
all | 23% |
load | 37% |
store | 33% |
mul | 12% |
add-sub | 16% |
fma | 20% |
div/sqrt | 0% |
other | 40% |
all | 15% |
load | 17% |
store | 16% |
mul | 14% |
add-sub | 14% |
fma | 15% |
div/sqrt | 12% |
other | 17% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x18,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
DEC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 40cd40 <ljForce.extracted+0x210> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD (%RBX,%RDX,8),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VSUBPD -0x10(%RCX),%XMM11,%XMM11 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD %XMM11,%XMM11,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM12,%XMM13,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%RBX,%RDX,8),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VSUBSD (%RCX),%XMM12,%XMM12 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231SD %XMM12,%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM2,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 40cd60 <ljForce.extracted+0x230> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VUCOMISD %XMM4,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 40cd60 <ljForce.extracted+0x230> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM13,%XMM6,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
VMULSD %XMM13,%XMM13,%XMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM1,%XMM13,%XMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM15,%XMM14,%XMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM7,%XMM14,%XMM15 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VFNMADD213SD 0x10(%RBP),%XMM14,%XMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD %XMM8,%XMM15,%XMM15 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x30(%R13),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%R10,%R15,8),%XMM15,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM0,(%R10,%R15,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVAPD %XMM9,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VFMADD213SD %XMM10,%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM3,%XMM13,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM0,%XMM14,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM0,%XMM13,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x28(%R13),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP %XMM0,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VFMADD213PD (%R10,%RDX,8),%XMM13,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %XMM11,(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VFMADD213SD 0x10(%R10,%RDX,8),%XMM0,%XMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM12,0x10(%R10,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM5,%XMM15,%XMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JMP 40cd60 <ljForce.extracted+0x230> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 15 |
nb uops | 15 |
loop length | 62 |
used x86 registers | 4 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 3.00 |
micro-operation queue | 2.50 cycles |
front end | 2.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 2.50 | 1.33 | 1.33 | 0.00 | 2.50 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.33 |
cycles | 3.00 | 2.50 | 1.33 | 1.33 | 0.00 | 2.50 | 3.00 | 0.00 | 0.00 | 0.00 | 0.00 | 1.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
FE+BE cycles | 3.18 |
Stall cycles | 0.09 |
RS full (events) | 0.36 |
Front-end | 2.50 |
Dispatch | 3.00 |
Data deps. | 3.00 |
Overall L1 | 3.00 |
all | 40% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 33% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 33% |
all | 17% |
load | 18% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 25% |
add-sub | 16% |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x18,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
DEC %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 40cd40 <ljForce.extracted+0x210> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVUPD (%RBX,%RDX,8),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VSUBPD -0x10(%RCX),%XMM11,%XMM11 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMULPD %XMM11,%XMM11,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM12,%XMM13,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVSD 0x10(%RBX,%RDX,8),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VSUBSD (%RCX),%XMM12,%XMM12 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231SD %XMM12,%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM2,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JA 40cd60 <ljForce.extracted+0x230> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VUCOMISD %XMM4,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JBE 40cd60 <ljForce.extracted+0x230> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |