Function: updateLinkCells | Module: exec | Source: linkCells.c:209-385 [...] | Coverage: 0.22% |
---|
Function: updateLinkCells | Module: exec | Source: linkCells.c:209-385 [...] | Coverage: 0.22% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-2581/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 209 - 385 |
-------------------------------------------------------------------------------- |
209: if (iz == gridSize[2]) |
210: { |
211: iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) + |
212: (gridSize[0]+2)*(gridSize[1]+2) + (gridSize[0]+2)*(iy+1) + (ix+1); |
213: } |
214: // Halo in Z- |
215: else if (iz == -1) |
216: { |
217: iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + 2*gridSize[2]*(gridSize[0]+2) + |
218: (gridSize[0]+2)*(iy+1) + (ix+1); |
219: } |
220: // Halo in Y+ |
221: else if (iy == gridSize[1]) |
[...] |
227: else if (iy == -1) |
228: { |
229: iBox = boxes->nLocalBoxes + 2*gridSize[2]*gridSize[1] + iz*(gridSize[0]+2) + (ix+1); |
230: } |
231: // Halo in X+ |
232: else if (ix == gridSize[0]) |
233: { |
234: iBox = boxes->nLocalBoxes + gridSize[1]*gridSize[2] + iz*gridSize[1] + iy; |
235: } |
236: // Halo in X- |
237: else if (ix == -1) |
238: { |
239: iBox = boxes->nLocalBoxes + iz*gridSize[1] + iy; |
240: } |
241: // local link celll. |
242: else |
243: { |
244: iBox = ix + gridSize[0]*iy + gridSize[0]*gridSize[1]*iz; |
245: } |
246: assert(iBox >= 0); |
247: assert(iBox < boxes->nTotalBoxes); |
[...] |
258: int nj = boxes->nAtoms[jBox]; |
259: copyAtom(boxes, atoms, iId, iBox, nj, jBox); |
260: boxes->nAtoms[jBox]++; |
261: |
262: assert(boxes->nAtoms[jBox] < MAXATOMS); |
263: |
264: boxes->nAtoms[iBox]--; |
265: int ni = boxes->nAtoms[iBox]; |
266: if (ni) copyAtom(boxes, atoms, ni, iBox, iId, iBox); |
267: |
268: if (jBox > boxes->nLocalBoxes) |
269: --atoms->nLocal; |
[...] |
288: { |
289: emptyHaloCells(boxes); |
290: |
291: for (int iBox=0; iBox<boxes->nLocalBoxes; ++iBox) |
292: { |
293: int iOff = iBox*MAXATOMS; |
294: int ii=0; |
295: while (ii < boxes->nAtoms[iBox]) |
296: { |
297: int jBox = getBoxFromCoord(boxes, atoms->r[iOff+ii]); |
298: if (jBox != iBox) |
299: moveAtom(boxes, atoms, ii, iBox, jBox); |
300: else |
301: ++ii; |
302: } |
303: } |
304: } |
[...] |
327: const int iOff = MAXATOMS*iBox+iAtom; |
328: const int jOff = MAXATOMS*jBox+jAtom; |
329: atoms->gid[jOff] = atoms->gid[iOff]; |
330: atoms->iSpecies[jOff] = atoms->iSpecies[iOff]; |
331: memcpy(atoms->r[jOff], atoms->r[iOff], sizeof(real3)); |
332: memcpy(atoms->p[jOff], atoms->p[iOff], sizeof(real3)); |
333: memcpy(atoms->f[jOff], atoms->f[iOff], sizeof(real3)); |
334: memcpy(atoms->U+jOff, atoms->U+iOff, sizeof(real_t)); |
[...] |
352: int ix = (int)(floor((rr[0] - localMin[0])*boxes->invBoxSize[0])); |
353: int iy = (int)(floor((rr[1] - localMin[1])*boxes->invBoxSize[1])); |
[...] |
359: if (rr[0] < localMax[0]) |
360: { |
361: if (ix == gridSize[0]) ix = gridSize[0] - 1; |
362: } |
363: else |
364: ix = gridSize[0]; // assign to halo cell |
365: if (rr[1] < localMax[1]) |
[...] |
371: if (rr[2] < localMax[2]) |
[...] |
384: for (int ii=boxes->nLocalBoxes; ii<boxes->nTotalBoxes; ++ii) |
385: boxes->nAtoms[ii] = 0; |
0x40a710 PUSH %RBP |
0x40a711 MOV %RSP,%RBP |
0x40a714 PUSH %R15 |
0x40a716 PUSH %R14 |
0x40a718 PUSH %R13 |
0x40a71a PUSH %R12 |
0x40a71c PUSH %RBX |
0x40a71d SUB $0x78,%RSP |
0x40a721 MOV %RSI,-0x48(%RBP) |
0x40a725 MOV 0xc(%RDI),%R14D |
0x40a729 MOV %RDI,-0x40(%RBP) |
0x40a72d MOV 0x14(%RDI),%EDI |
0x40a730 CMP %EDI,%R14D |
0x40a733 MOV %EDI,-0x38(%RBP) |
0x40a736 JGE 40a762 |
0x40a738 MOV %EDI,%ECX |
0x40a73a MOVSXD %R14D,%RDI |
0x40a73d SAL $0x2,%RDI |
0x40a741 MOV -0x40(%RBP),%RAX |
0x40a745 ADD 0x78(%RAX),%RDI |
0x40a749 MOV %R14D,%EAX |
0x40a74c NOT %EAX |
0x40a74e ADD %ECX,%EAX |
0x40a750 LEA 0x4(,%RAX,4),%RDX |
0x40a758 XOR %ESI,%ESI |
0x40a75a CALL 412860 <_intel_fast_memset> |
0x40a75f MOV -0x38(%RBP),%EDI |
0x40a762 TEST %R14D,%R14D |
0x40a765 JLE 40ab37 |
0x40a76b MOV -0x40(%RBP),%RAX |
0x40a76f MOV 0x78(%RAX),%RAX |
0x40a773 LEA 0x1(%R14),%ECX |
0x40a777 MOV %ECX,-0x2c(%RBP) |
0x40a77a XOR %R9D,%R9D |
0x40a77d VPCMPEQD %XMM0,%XMM0,%XMM0 |
0x40a781 MOV %RAX,-0x60(%RBP) |
0x40a785 MOV %R14,-0xa0(%RBP) |
0x40a78c JMP 40a79c |
0x40a78e XCHG %AX,%AX |
(81) 0x40a790 INC %R9 |
(81) 0x40a793 CMP %R14,%R9 |
(81) 0x40a796 JE 40ab37 |
(81) 0x40a79c CMPL $0,(%RAX,%R9,4) |
(81) 0x40a7a1 JLE 40a790 |
(81) 0x40a7a3 MOVSXD %R9D,%RCX |
(81) 0x40a7a6 SAL $0x6,%RCX |
(81) 0x40a7aa MOV %RCX,-0x88(%RBP) |
(81) 0x40a7b1 MOV -0x48(%RBP),%RCX |
(81) 0x40a7b5 MOV 0x18(%RCX),%R11 |
(81) 0x40a7b9 MOV -0x40(%RBP),%RAX |
(81) 0x40a7bd VMOVSD 0x30(%RAX),%XMM1 |
(81) 0x40a7c2 MOV (%RAX),%R13D |
(81) 0x40a7c5 LEA -0x1(%R13),%ECX |
(81) 0x40a7c9 MOV %ECX,-0x64(%RBP) |
(81) 0x40a7cc VMOVUPD 0x38(%RAX),%XMM2 |
(81) 0x40a7d1 VMOVUPD 0x20(%RAX),%XMM3 |
(81) 0x40a7d6 VMOVUPD 0x68(%RAX),%XMM4 |
(81) 0x40a7db MOV 0x4(%RAX),%RBX |
(81) 0x40a7df MOV -0x60(%RBP),%RAX |
(81) 0x40a7e3 VMOVQ %RBX,%XMM5 |
(81) 0x40a7e8 MOV %RBX,%RCX |
(81) 0x40a7eb SHR $0x20,%RCX |
(81) 0x40a7ef VPADDD %XMM0,%XMM5,%XMM6 |
(81) 0x40a7f3 MOV %RCX,-0x98(%RBP) |
(81) 0x40a7fa LEA (%RCX,%RCX,1),%EDX |
(81) 0x40a7fd MOV %RDX,%RCX |
(81) 0x40a800 MOV %RDX,-0x78(%RBP) |
(81) 0x40a804 IMUL %EBX,%ECX |
(81) 0x40a807 MOV %ECX,-0x34(%RBP) |
(81) 0x40a80a LEA 0x2(%R13),%ECX |
(81) 0x40a80e MOV %ECX,-0x30(%RBP) |
(81) 0x40a811 VPINSRD $0,%R14D,%XMM5,%XMM7 |
(81) 0x40a817 XOR %R15D,%R15D |
(81) 0x40a81a MOV %R13,-0x70(%RBP) |
(81) 0x40a81e MOV %RBX,-0x58(%RBP) |
(81) 0x40a822 MOV %R9,-0x50(%RBP) |
(81) 0x40a826 JMP 40a841 |
0x40a828 NOPL (%RAX,%RAX,1) |
(82) 0x40a830 INC %R15D |
(82) 0x40a833 MOV -0x58(%RBP),%RBX |
(82) 0x40a837 CMP (%RAX,%R9,4),%R15D |
(82) 0x40a83b JGE 40a790 |
(82) 0x40a841 MOV -0x88(%RBP),%RCX |
(82) 0x40a848 ADD %R15D,%ECX |
(82) 0x40a84b MOVSXD %ECX,%RCX |
(82) 0x40a84e MOV %RCX,-0x90(%RBP) |
(82) 0x40a855 LEA (%RCX,%RCX,2),%R12 |
(82) 0x40a859 VMOVSD (%R11,%R12,8),%XMM8 |
(82) 0x40a85f VUCOMISD %XMM8,%XMM1 |
(82) 0x40a864 MOV %R13D,%ECX |
(82) 0x40a867 JBE 40a88d |
(82) 0x40a869 MOV -0x40(%RBP),%RAX |
(82) 0x40a86d VSUBSD 0x18(%RAX),%XMM8,%XMM8 |
(82) 0x40a872 VMULSD 0x60(%RAX),%XMM8,%XMM8 |
(82) 0x40a877 MOV -0x60(%RBP),%RAX |
(82) 0x40a87b VROUNDSD $0x9,%XMM8,%XMM8,%XMM8 |
(82) 0x40a881 VCVTTSD2SI %XMM8,%ECX |
(82) 0x40a886 CMP %ECX,%R13D |
(82) 0x40a889 CMOVE -0x64(%RBP),%ECX |
(82) 0x40a88d VMOVUPD 0x8(%R11,%R12,8),%XMM9 |
(82) 0x40a894 VSUBPD %XMM3,%XMM9,%XMM8 |
(82) 0x40a898 VMULPD %XMM4,%XMM8,%XMM8 |
(82) 0x40a89c VROUNDPD $0x9,%XMM8,%XMM8 |
(82) 0x40a8a2 VCVTTPD2DQ %XMM8,%XMM8 |
(82) 0x40a8a7 VPCMPEQD %XMM8,%XMM5,%K1 |
(82) 0x40a8ad VCMPPD $0x2,%XMM9,%XMM2,%K0 |
(82) 0x40a8b4 KSHIFTRB $0x1,%K0,%K2 |
(82) 0x40a8ba KMOVD %K2,%R10D |
(82) 0x40a8be KMOVD %K0,%EDX |
(82) 0x40a8c2 VMOVDQA32 %XMM6,%XMM8{%K1} |
(82) 0x40a8c8 VMOVD %XMM8,%ESI |
(82) 0x40a8cc TEST $0x1,%DL |
(82) 0x40a8cf MOV %ESI,%R8D |
(82) 0x40a8d2 CMOVNE %EBX,%R8D |
(82) 0x40a8d6 TEST $0x1,%R10B |
(82) 0x40a8da JE 40a900 |
(82) 0x40a8dc ADD %EBX,%R8D |
(82) 0x40a8df MOV -0x78(%RBP),%RDX |
(82) 0x40a8e3 LEA 0x3(%RDX,%R8,1),%EDX |
(82) 0x40a8e8 IMUL -0x30(%RBP),%EDX |
(82) 0x40a8ec ADD -0x2c(%RBP),%ECX |
(82) 0x40a8ef ADD -0x34(%RBP),%ECX |
(82) 0x40a8f2 ADD %EDX,%ECX |
(82) 0x40a8f4 JMP 40a971 |
0x40a8f6 NOPW %CS:(%RAX,%RAX,1) |
(82) 0x40a900 MOV %R15,%R10 |
(82) 0x40a903 VPEXTRD $0x1,%XMM8,%R15D |
(82) 0x40a909 CMP $-0x1,%R15D |
(82) 0x40a90d JE 40a91d |
(82) 0x40a90f TEST $0x1,%DL |
(82) 0x40a912 JE 40a934 |
(82) 0x40a914 ADD -0x98(%RBP),%R15D |
(82) 0x40a91b JMP 40a960 |
(82) 0x40a91d MOV -0x78(%RBP),%RDX |
(82) 0x40a921 LEA 0x1(%R8,%RDX,1),%EDX |
(82) 0x40a926 IMUL -0x30(%RBP),%EDX |
(82) 0x40a92a ADD -0x2c(%RBP),%ECX |
(82) 0x40a92d ADD -0x34(%RBP),%ECX |
(82) 0x40a930 ADD %EDX,%ECX |
(82) 0x40a932 JMP 40a96e |
(82) 0x40a934 CMP $-0x1,%ESI |
(82) 0x40a937 JE 40a960 |
(82) 0x40a939 CMP %ECX,%R13D |
(82) 0x40a93c JNE 40ab15 |
(82) 0x40a942 VPADDD %XMM7,%XMM8,%XMM8 |
(82) 0x40a946 VPEXTRD $0x1,%XMM8,%EDX |
(82) 0x40a94c IMUL %EBX,%EDX |
(82) 0x40a94f VMOVD %XMM8,%ECX |
(82) 0x40a953 ADD %EDX,%ECX |
(82) 0x40a955 JMP 40a96e |
0x40a957 NOPW (%RAX,%RAX,1) |
(82) 0x40a960 IMUL -0x30(%RBP),%R15D |
(82) 0x40a965 ADD -0x2c(%RBP),%ECX |
(82) 0x40a968 ADD -0x34(%RBP),%ECX |
(82) 0x40a96b ADD %R15D,%ECX |
(82) 0x40a96e MOV %R10,%R15 |
(82) 0x40a971 TEST %ECX,%ECX |
(82) 0x40a973 JS 40ab46 |
(82) 0x40a979 CMP %EDI,%ECX |
(82) 0x40a97b JGE 40ab5f |
(82) 0x40a981 MOV %ECX,%EBX |
(82) 0x40a983 CMP %RBX,%R9 |
(82) 0x40a986 JE 40a830 |
(82) 0x40a98c MOV %R15,-0x80(%RBP) |
(82) 0x40a990 MOVSXD (%RAX,%RBX,4),%RSI |
(82) 0x40a994 MOVSXD %ECX,%RDX |
(82) 0x40a997 SAL $0x6,%RDX |
(82) 0x40a99b ADD %RSI,%RDX |
(82) 0x40a99e MOV -0x48(%RBP),%RAX |
(82) 0x40a9a2 MOV 0x8(%RAX),%R14 |
(82) 0x40a9a6 MOV -0x90(%RBP),%R13 |
(82) 0x40a9ad MOV (%R14,%R13,4),%ESI |
(82) 0x40a9b1 MOV %ESI,(%R14,%RDX,4) |
(82) 0x40a9b5 MOV %R11,%R8 |
(82) 0x40a9b8 MOV 0x10(%RAX),%R11 |
(82) 0x40a9bc MOV (%R11,%R13,4),%ESI |
(82) 0x40a9c0 MOV %ESI,(%R11,%RDX,4) |
(82) 0x40a9c4 LEA (%R8,%R12,8),%R12 |
(82) 0x40a9c8 LEA (,%RDX,8),%RSI |
(82) 0x40a9d0 LEA (%RSI,%RSI,2),%R10 |
(82) 0x40a9d4 MOV 0x10(%R12),%RSI |
(82) 0x40a9d9 MOV %RSI,0x10(%R8,%R10,1) |
(82) 0x40a9de VMOVUPS (%R12),%XMM8 |
(82) 0x40a9e4 MOV %R8,%RDI |
(82) 0x40a9e7 VMOVUPS %XMM8,(%R8,%R10,1) |
(82) 0x40a9ed MOV 0x20(%RAX),%RSI |
(82) 0x40a9f1 LEA (,%R13,8),%R8 |
(82) 0x40a9f9 LEA (%R8,%R8,2),%R15 |
(82) 0x40a9fd MOV 0x10(%RSI,%R15,1),%R8 |
(82) 0x40aa02 MOV %R8,0x10(%RSI,%R10,1) |
(82) 0x40aa07 VMOVUPS (%RSI,%R15,1),%XMM8 |
(82) 0x40aa0d VMOVUPS %XMM8,(%RSI,%R10,1) |
(82) 0x40aa13 MOV 0x28(%RAX),%R8 |
(82) 0x40aa17 MOV 0x10(%R8,%R15,1),%R9 |
(82) 0x40aa1c MOV %R9,0x10(%R8,%R10,1) |
(82) 0x40aa21 VMOVDQU (%R8,%R15,1),%XMM8 |
(82) 0x40aa27 VMOVDQU %XMM8,(%R8,%R10,1) |
(82) 0x40aa2d MOV 0x30(%RAX),%R10 |
(82) 0x40aa31 MOV -0x60(%RBP),%RAX |
(82) 0x40aa35 MOV (%R10,%R13,8),%R9 |
(82) 0x40aa39 MOV %R9,(%R10,%RDX,8) |
(82) 0x40aa3d MOV (%RAX,%RBX,4),%EDX |
(82) 0x40aa40 LEA 0x1(%RDX),%R9D |
(82) 0x40aa44 MOV %R9D,(%RAX,%RBX,4) |
(82) 0x40aa48 CMP $0x3f,%EDX |
(82) 0x40aa4b JGE 40ab78 |
(82) 0x40aa51 MOV -0x50(%RBP),%RDX |
(82) 0x40aa55 MOVSXD (%RAX,%RDX,4),%RBX |
(82) 0x40aa59 DEC %RBX |
(82) 0x40aa5c MOV %EBX,(%RAX,%RDX,4) |
(82) 0x40aa5f TEST %EBX,%EBX |
(82) 0x40aa61 JE 40aadc |
(82) 0x40aa63 LEA (%RSI,%R15,1),%RDX |
(82) 0x40aa67 ADD -0x88(%RBP),%RBX |
(82) 0x40aa6e MOV (%R14,%RBX,4),%R9D |
(82) 0x40aa72 MOV -0x90(%RBP),%R13 |
(82) 0x40aa79 MOV %R9D,(%R14,%R13,4) |
(82) 0x40aa7d MOV (%R11,%RBX,4),%R9D |
(82) 0x40aa81 MOV %R9D,(%R11,%R13,4) |
(82) 0x40aa85 ADD %R8,%R15 |
(82) 0x40aa88 LEA (,%RBX,8),%R9 |
(82) 0x40aa90 LEA (%R9,%R9,2),%R9 |
(82) 0x40aa94 MOV %RDI,%R14 |
(82) 0x40aa97 MOV 0x10(%RDI,%R9,1),%R11 |
(82) 0x40aa9c MOV %R11,0x10(%R12) |
(82) 0x40aaa1 VMOVUPS (%RDI,%R9,1),%XMM8 |
(82) 0x40aaa7 VMOVUPS %XMM8,(%R12) |
(82) 0x40aaad MOV 0x10(%RSI,%R9,1),%R11 |
(82) 0x40aab2 MOV %R11,0x10(%RDX) |
(82) 0x40aab6 VMOVUPS (%RSI,%R9,1),%XMM8 |
(82) 0x40aabc VMOVUPS %XMM8,(%RDX) |
(82) 0x40aac0 MOV 0x10(%R8,%R9,1),%RDX |
(82) 0x40aac5 MOV %RDX,0x10(%R15) |
(82) 0x40aac9 VMOVDQU (%R8,%R9,1),%XMM8 |
(82) 0x40aacf VMOVDQU %XMM8,(%R15) |
(82) 0x40aad4 MOV (%R10,%RBX,8),%RDX |
(82) 0x40aad8 MOV %RDX,(%R10,%R13,8) |
(82) 0x40aadc MOV -0xa0(%RBP),%R14 |
(82) 0x40aae3 CMP %ECX,%R14D |
(82) 0x40aae6 JGE 40aaee |
(82) 0x40aae8 MOV -0x48(%RBP),%RCX |
(82) 0x40aaec DECL (%RCX) |
(82) 0x40aaee MOV -0x38(%RBP),%ECX |
(82) 0x40aaf1 MOV -0x50(%RBP),%R9 |
(82) 0x40aaf5 MOV %RDI,%R11 |
(82) 0x40aaf8 MOV %ECX,%EDI |
(82) 0x40aafa MOV -0x70(%RBP),%R13 |
(82) 0x40aafe MOV -0x58(%RBP),%RBX |
(82) 0x40ab02 MOV -0x80(%RBP),%R15 |
(82) 0x40ab06 CMP (%RAX,%R9,4),%R15D |
(82) 0x40ab0a JL 40a841 |
(81) 0x40ab10 JMP 40a790 |
(82) 0x40ab15 IMUL %EBX,%R15D |
(82) 0x40ab19 CMP $-0x1,%ECX |
(82) 0x40ab1c JE 40ab2a |
(82) 0x40ab1e ADD %ESI,%R15D |
(82) 0x40ab21 IMUL %R13D,%R15D |
(82) 0x40ab25 JMP 40a96b |
(82) 0x40ab2a ADD %R14D,%ESI |
(82) 0x40ab2d ADD %R15D,%ESI |
(82) 0x40ab30 MOV %ESI,%ECX |
(82) 0x40ab32 JMP 40a96e |
0x40ab37 ADD $0x78,%RSP |
0x40ab3b POP %RBX |
0x40ab3c POP %R12 |
0x40ab3e POP %R13 |
0x40ab40 POP %R14 |
0x40ab42 POP %R15 |
0x40ab44 POP %RBP |
0x40ab45 RET |
0x40ab46 MOV $0x4229e2,%EDI |
0x40ab4b MOV $0x422903,%ESI |
0x40ab50 MOV $0x4229ec,%ECX |
0x40ab55 MOV $0xf6,%EDX |
0x40ab5a CALL 402bc0 <__assert_fail@plt> |
0x40ab5f MOV $0x422a1b,%EDI |
0x40ab64 MOV $0x422903,%ESI |
0x40ab69 MOV $0x4229ec,%ECX |
0x40ab6e MOV $0xf7,%EDX |
0x40ab73 CALL 402bc0 <__assert_fail@plt> |
0x40ab78 MOV $0x422a35,%EDI |
0x40ab7d MOV $0x422903,%ESI |
0x40ab82 MOV $0x422a54,%ECX |
0x40ab87 MOV $0x106,%EDX |
0x40ab8c CALL 402bc0 <__assert_fail@plt> |
0x40ab91 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | linkCells.c:209-385 |
Module | exec |
nb instructions | 66 |
nb uops | 70 |
loop length | 260 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 11.67 cycles |
front end | 11.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.80 | 4.80 | 4.67 | 4.67 | 8.00 | 4.87 | 4.80 | 8.00 | 8.00 | 8.00 | 4.73 | 4.67 |
cycles | 4.80 | 4.80 | 4.67 | 4.67 | 8.00 | 4.87 | 4.80 | 8.00 | 8.00 | 8.00 | 4.73 | 4.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.13 |
Stall cycles | 0.00 |
Front-end | 11.67 |
Dispatch | 8.00 |
Overall L1 | 11.67 |
all | 4% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
all | 8% |
load | NA (no load vectorizable/vectorized instructions) |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc(%RDI),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x14(%RDI),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %EDI,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 40a762 <updateLinkCells+0x52> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD %R14D,%RDI | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
SAL $0x2,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD 0x78(%RAX),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(,%RAX,4),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 412860 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R14D,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40ab37 <updateLinkCells+0x427> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R14),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQD %XMM0,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 40a79c <updateLinkCells+0x8c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV $0x4229e2,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422903,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4229ec,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xf6,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bc0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x422a1b,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422903,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4229ec,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xf7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bc0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x422a35,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422903,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422a54,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x106,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bc0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | linkCells.c:209-385 |
Module | exec |
nb instructions | 66 |
nb uops | 70 |
loop length | 260 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 11.67 cycles |
front end | 11.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.80 | 4.80 | 4.67 | 4.67 | 8.00 | 4.87 | 4.80 | 8.00 | 8.00 | 8.00 | 4.73 | 4.67 |
cycles | 4.80 | 4.80 | 4.67 | 4.67 | 8.00 | 4.87 | 4.80 | 8.00 | 8.00 | 8.00 | 4.73 | 4.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.13 |
Stall cycles | 0.00 |
Front-end | 11.67 |
Dispatch | 8.00 |
Overall L1 | 11.67 |
all | 4% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
all | 8% |
load | NA (no load vectorizable/vectorized instructions) |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RSI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc(%RDI),%R14D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x14(%RDI),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %EDI,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 40a762 <updateLinkCells+0x52> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD %R14D,%RDI | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
SAL $0x2,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD 0x78(%RAX),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(,%RAX,4),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 412860 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x38(%RBP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R14D,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40ab37 <updateLinkCells+0x427> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R14),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQD %XMM0,%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 40a79c <updateLinkCells+0x8c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x78,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV $0x4229e2,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422903,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4229ec,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xf6,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bc0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x422a1b,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422903,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4229ec,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xf7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bc0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0x422a35,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422903,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x422a54,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x106,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bc0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼updateLinkCells– | 0.22 | 0.06 |
▼Loop 81 - linkCells.c:209-371 - exec– | 0 | 0.03 |
○Loop 82 - linkCells.c:209-371 - exec | 0.21 | 3.14 |