Loop Id: 69 | Module: exec | Source: initAtoms.c:126-133 | Coverage: 0.01% |
---|
Loop Id: 69 | Module: exec | Source: initAtoms.c:126-133 | Coverage: 0.01% |
---|
0x40a260 MOVSXD (%R15,%RBX,4),%RAX [1] |
0x40a264 MOVSXD 0x4(%R15,%RBX,4),%R14 [1] |
0x40a269 MOVSXD 0x8(%R15,%RBX,4),%RCX [1] |
0x40a26e MOVSXD 0xc(%R15,%RBX,4),%R10 [1] |
0x40a273 SAL $0x4,%RAX |
0x40a277 SAL $0x4,%RCX |
0x40a27b SAL $0x4,%R10 |
0x40a27f VMOVSD 0x8(%R9,%RCX,1),%XMM5 [5] |
0x40a286 VMOVHPD 0x8(%R9,%R10,1),%XMM5,%XMM5 [4] |
0x40a28d SAL $0x4,%R14 |
0x40a291 VMOVSD 0x8(%R9,%RAX,1),%XMM6 [6] |
0x40a298 VMOVHPD 0x8(%R9,%R14,1),%XMM6,%XMM6 [2] |
0x40a29f VMOVUPD 0x20(%R13),%YMM7 [3] |
0x40a2a5 VBLENDPD $0x3,(%R13),%YMM7,%YMM8 [3] |
0x40a2ac VINSERTF128 $0x1,%XMM5,%YMM6,%YMM5 |
0x40a2b2 VMOVUPD 0x10(%R13),%XMM6 [3] |
0x40a2b8 VINSERTF128 $0x1,0x40(%R13),%YMM6,%YMM6 [3] |
0x40a2bf VMOVUPD 0x20(%R13),%XMM9 [3] |
0x40a2c5 VBLENDPD $0xa,%YMM6,%YMM8,%YMM10 |
0x40a2cb VSHUFPD $0x5,%YMM7,%YMM8,%YMM7 |
0x40a2d0 VBROADCASTSD 0x50(%R13),%YMM8 [3] |
0x40a2d6 VBLENDPD $0x8,%YMM8,%YMM7,%YMM7 |
0x40a2dc VBLENDPD $0xc,0x40(%R13),%YMM9,%YMM8 [3] |
0x40a2e3 VBLENDPD $0xa,%YMM8,%YMM6,%YMM6 |
0x40a2e9 VFMADD231PD %YMM5,%YMM2,%YMM10 |
0x40a2ee VFMADD231PD %YMM5,%YMM3,%YMM7 |
0x40a2f3 VFMADD231PD %YMM5,%YMM4,%YMM6 |
0x40a2f8 VSHUFPD $0x1,%YMM7,%YMM7,%YMM5 |
0x40a2fd VBLENDPD $0x4,%YMM10,%YMM5,%YMM5 |
0x40a303 VMOVDDUP %XMM7,%XMM8 |
0x40a307 VPERM2F128 $0x20,%YMM10,%YMM8,%YMM8 |
0x40a30d VSHUFPD $0x4,%YMM7,%YMM7,%YMM7 |
0x40a312 VINSERTF128 $0x1,%XMM6,%YMM10,%YMM9 |
0x40a318 VBLENDPD $0xa,%YMM8,%YMM9,%YMM8 |
0x40a31e VPERM2F128 $0x31,%YMM6,%YMM10,%YMM9 |
0x40a324 VPERM2F128 $0x31,%YMM7,%YMM6,%YMM7 |
0x40a32a VBLENDPD $0xa,%YMM9,%YMM7,%YMM7 |
0x40a330 VBLENDPD $0x2,%YMM6,%YMM5,%YMM5 |
0x40a336 VMOVUPD %YMM5,0x20(%R13) [3] |
0x40a33c VMOVUPD %YMM7,0x40(%R13) [3] |
0x40a342 VMOVUPD %YMM8,(%R13) [3] |
0x40a348 ADD $0x60,%R13 |
0x40a34c ADD $0x4,%RBX |
0x40a350 CMP %EDX,%EBX |
0x40a352 JLE 40a260 |
/scratch_na/users/xoserete/qaas_runs/171-172-2581/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 126 - 133 |
-------------------------------------------------------------------------------- |
126: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
127: { |
128: int iSpecies = s->atoms->iSpecies[iOff]; |
129: real_t mass = s->species[iSpecies].mass; |
130: |
131: s->atoms->p[iOff][0] += mass * vShift[0]; |
132: s->atoms->p[iOff][1] += mass * vShift[1]; |
133: s->atoms->p[iOff][2] += mass * vShift[2]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.08 |
CQA speedup if FP arith vectorized | 1.12 |
CQA speedup if fully vectorized | 2.67 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P0, P1, P5, |
Function | setVcm.extracted |
Source | initAtoms.c:126-133 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 8.67 |
CQA cycles if no scalar integer | 8.00 |
CQA cycles if FP arith vectorized | 7.75 |
CQA cycles if fully vectorized | 3.25 |
Front-end cycles | 8.17 |
DIV/SQRT cycles | 8.67 |
P0 cycles | 8.67 |
P1 cycles | 5.00 |
P2 cycles | 5.00 |
P3 cycles | 1.50 |
P4 cycles | 8.67 |
P5 cycles | 3.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 0.00 |
P10 cycles | 5.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 8.60 - 8.70 |
Stall cycles (UFS) | 0.00 |
Nb insns | 45.00 |
Nb uops | 47.00 |
Nb loads | 15.00 |
Nb stores | 3.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.77 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.15 |
Bytes prefetched | 0.00 |
Bytes loaded | 200.00 |
Bytes stored | 96.00 |
Stride 0 | 0.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 1.00 |
Stride indirect | 4.00 |
Vectorization ratio all | 81.82 |
Vectorization ratio load | 54.55 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 90.00 |
Vector-efficiency ratio all | 37.12 |
Vector-efficiency ratio load | 26.14 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 38.75 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.08 |
CQA speedup if FP arith vectorized | 1.12 |
CQA speedup if fully vectorized | 2.67 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P0, P1, P5, |
Function | setVcm.extracted |
Source | initAtoms.c:126-133 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 8.67 |
CQA cycles if no scalar integer | 8.00 |
CQA cycles if FP arith vectorized | 7.75 |
CQA cycles if fully vectorized | 3.25 |
Front-end cycles | 8.17 |
DIV/SQRT cycles | 8.67 |
P0 cycles | 8.67 |
P1 cycles | 5.00 |
P2 cycles | 5.00 |
P3 cycles | 1.50 |
P4 cycles | 8.67 |
P5 cycles | 3.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 0.00 |
P10 cycles | 5.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 8.60 - 8.70 |
Stall cycles (UFS) | 0.00 |
Nb insns | 45.00 |
Nb uops | 47.00 |
Nb loads | 15.00 |
Nb stores | 3.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.77 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 12.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.15 |
Bytes prefetched | 0.00 |
Bytes loaded | 200.00 |
Bytes stored | 96.00 |
Stride 0 | 0.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 1.00 |
Stride indirect | 4.00 |
Vectorization ratio all | 81.82 |
Vectorization ratio load | 54.55 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 90.00 |
Vector-efficiency ratio all | 37.12 |
Vector-efficiency ratio load | 26.14 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 38.75 |
Path / |
Function | setVcm.extracted |
Source file and lines | initAtoms.c:126-133 |
Module | exec |
nb instructions | 45 |
nb uops | 47 |
loop length | 248 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 9 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 8.17 cycles |
front end | 8.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.67 | 8.67 | 5.00 | 5.00 | 1.50 | 8.67 | 3.00 | 1.50 | 1.50 | 1.50 | 0.00 | 5.00 |
cycles | 8.67 | 8.67 | 5.00 | 5.00 | 1.50 | 8.67 | 3.00 | 1.50 | 1.50 | 1.50 | 0.00 | 5.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 8.60-8.70 |
Stall cycles | 0.00 |
Front-end | 8.17 |
Dispatch | 8.67 |
Data deps. | 1.00 |
Overall L1 | 8.67 |
all | 81% |
load | 54% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 90% |
all | 37% |
load | 26% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 38% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOVSXD (%R15,%RBX,4),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x4(%R15,%RBX,4),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x8(%R15,%RBX,4),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0xc(%R15,%RBX,4),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x4,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VMOVSD 0x8(%R9,%RCX,1),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVHPD 0x8(%R9,%R10,1),%XMM5,%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VMOVSD 0x8(%R9,%RAX,1),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVHPD 0x8(%R9,%R14,1),%XMM6,%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VMOVUPD 0x20(%R13),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0x3,(%R13),%YMM7,%YMM8 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VINSERTF128 $0x1,%XMM5,%YMM6,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x10(%R13),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VINSERTF128 $0x1,0x40(%R13),%YMM6,%YMM6 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VMOVUPD 0x20(%R13),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0xa,%YMM6,%YMM8,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM7,%YMM8,%YMM7 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD 0x50(%R13),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM8,%YMM7,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xc,0x40(%R13),%YMM9,%YMM8 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM8,%YMM6,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231PD %YMM5,%YMM2,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM5,%YMM4,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%YMM7,%YMM7,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBLENDPD $0x4,%YMM10,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDDUP %XMM7,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPERM2F128 $0x20,%YMM10,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSHUFPD $0x4,%YMM7,%YMM7,%YMM7 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF128 $0x1,%XMM6,%YMM10,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0xa,%YMM8,%YMM9,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPERM2F128 $0x31,%YMM6,%YMM10,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERM2F128 $0x31,%YMM7,%YMM6,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0xa,%YMM9,%YMM7,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0x2,%YMM6,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVUPD %YMM5,0x20(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM7,0x40(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM8,(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x60,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 40a260 <setVcm.extracted+0x140> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | setVcm.extracted |
Source file and lines | initAtoms.c:126-133 |
Module | exec |
nb instructions | 45 |
nb uops | 47 |
loop length | 248 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 9 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 8.17 cycles |
front end | 8.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.67 | 8.67 | 5.00 | 5.00 | 1.50 | 8.67 | 3.00 | 1.50 | 1.50 | 1.50 | 0.00 | 5.00 |
cycles | 8.67 | 8.67 | 5.00 | 5.00 | 1.50 | 8.67 | 3.00 | 1.50 | 1.50 | 1.50 | 0.00 | 5.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 8.60-8.70 |
Stall cycles | 0.00 |
Front-end | 8.17 |
Dispatch | 8.67 |
Data deps. | 1.00 |
Overall L1 | 8.67 |
all | 81% |
load | 54% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 90% |
all | 37% |
load | 26% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 38% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOVSXD (%R15,%RBX,4),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x4(%R15,%RBX,4),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x8(%R15,%RBX,4),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0xc(%R15,%RBX,4),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x4,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x4,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x4,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VMOVSD 0x8(%R9,%RCX,1),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVHPD 0x8(%R9,%R10,1),%XMM5,%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VMOVSD 0x8(%R9,%RAX,1),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVHPD 0x8(%R9,%R14,1),%XMM6,%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VMOVUPD 0x20(%R13),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0x3,(%R13),%YMM7,%YMM8 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VINSERTF128 $0x1,%XMM5,%YMM6,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x10(%R13),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VINSERTF128 $0x1,0x40(%R13),%YMM6,%YMM6 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VMOVUPD 0x20(%R13),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0xa,%YMM6,%YMM8,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM7,%YMM8,%YMM7 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD 0x50(%R13),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM8,%YMM7,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xc,0x40(%R13),%YMM9,%YMM8 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM8,%YMM6,%YMM6 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231PD %YMM5,%YMM2,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM5,%YMM4,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VSHUFPD $0x1,%YMM7,%YMM7,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBLENDPD $0x4,%YMM10,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVDDUP %XMM7,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPERM2F128 $0x20,%YMM10,%YMM8,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VSHUFPD $0x4,%YMM7,%YMM7,%YMM7 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF128 $0x1,%XMM6,%YMM10,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0xa,%YMM8,%YMM9,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPERM2F128 $0x31,%YMM6,%YMM10,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERM2F128 $0x31,%YMM7,%YMM6,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0xa,%YMM9,%YMM7,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0x2,%YMM6,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VMOVUPD %YMM5,0x20(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM7,0x40(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM8,(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x60,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 40a260 <setVcm.extracted+0x140> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |