Function: kineticEnergy._omp_fn.0 | Module: exec | Source: timestep.c:107-116 | Coverage: 0.23% |
---|
Function: kineticEnergy._omp_fn.0 | Module: exec | Source: timestep.c:107-116 | Coverage: 0.23% |
---|
/scratch_na/users/xoserete/qaas_runs/171-172-2581/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 107 - 116 |
-------------------------------------------------------------------------------- |
107: #pragma omp parallel for reduction(+:kenergy) |
108: for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++) |
109: { |
110: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
111: { |
112: int iSpecies = s->atoms->iSpecies[iOff]; |
113: real_t invMass = 0.5/s->species[iSpecies].mass; |
114: kenergy += ( s->atoms->p[iOff][0] * s->atoms->p[iOff][0] + |
115: s->atoms->p[iOff][1] * s->atoms->p[iOff][1] + |
116: s->atoms->p[iOff][2] * s->atoms->p[iOff][2] )*invMass; |
0x40e4b0 PUSH %RBP |
0x40e4b1 MOV %RSP,%RBP |
0x40e4b4 PUSH %R14 |
0x40e4b6 PUSH %R13 |
0x40e4b8 PUSH %R12 |
0x40e4ba MOV %RDI,%R12 |
0x40e4bd PUSH %RBX |
0x40e4be MOV (%RDI),%RBX |
0x40e4c1 CALL 403070 <omp_get_num_threads@plt> |
0x40e4c6 MOV 0x18(%RBX),%R14 |
0x40e4ca MOV %EAX,%R13D |
0x40e4cd CALL 403160 <omp_get_thread_num@plt> |
0x40e4d2 MOV %EAX,%R8D |
0x40e4d5 MOV 0xc(%R14),%EAX |
0x40e4d9 CLTD |
0x40e4da IDIV %R13D |
0x40e4dd CMP %EDX,%R8D |
0x40e4e0 JL 40e740 |
0x40e4e6 IMUL %EAX,%R8D |
0x40e4ea VXORPD %XMM0,%XMM0,%XMM0 |
0x40e4ee ADD %EDX,%R8D |
0x40e4f1 ADD %R8D,%EAX |
0x40e4f4 CMP %EAX,%R8D |
0x40e4f7 JGE 40e718 |
0x40e4fd MOVSXD %R8D,%R9 |
0x40e500 MOV 0x78(%R14),%R13 |
0x40e504 VMOVSD 0x15dc(%RIP),%XMM3 |
0x40e50c SAL $0x6,%R8D |
0x40e510 LEA (%R9,%R9,2),%R11 |
0x40e514 SAL $0x9,%R11 |
0x40e518 NOPL (%RAX,%RAX,1) |
(96) 0x40e520 MOVSXD (%R13,%R9,4),%RSI |
(96) 0x40e525 TEST %ESI,%ESI |
(96) 0x40e527 JLE 40e701 |
(96) 0x40e52d MOV 0x20(%RBX),%R10 |
(96) 0x40e531 MOVSXD %R8D,%RCX |
(96) 0x40e534 MOV 0x28(%RBX),%RDI |
(96) 0x40e538 MOV 0x10(%R10),%R14 |
(96) 0x40e53c MOV 0x20(%R10),%RDX |
(96) 0x40e540 MOV %R9,%R10 |
(96) 0x40e543 SAL $0x6,%R10 |
(96) 0x40e547 ADD %RSI,%R10 |
(96) 0x40e54a LEA (%R14,%RCX,4),%RCX |
(96) 0x40e54e ADD %R11,%RDX |
(96) 0x40e551 LEA (%R14,%R10,4),%R14 |
(96) 0x40e555 MOV %R14,%RSI |
(96) 0x40e558 SUB %RCX,%RSI |
(96) 0x40e55b SUB $0x4,%RSI |
(96) 0x40e55f SHR $0x2,%RSI |
(96) 0x40e563 INC %RSI |
(96) 0x40e566 AND $0x3,%ESI |
(96) 0x40e569 JE 40e62d |
(96) 0x40e56f CMP $0x1,%RSI |
(96) 0x40e573 JE 40e5eb |
(96) 0x40e575 CMP $0x2,%RSI |
(96) 0x40e579 JE 40e5b3 |
(96) 0x40e57b VMOVSD 0x8(%RDX),%XMM2 |
(96) 0x40e580 VMOVSD (%RDX),%XMM1 |
(96) 0x40e584 ADD $0x4,%RCX |
(96) 0x40e588 ADD $0x18,%RDX |
(96) 0x40e58c VMOVSD -0x8(%RDX),%XMM5 |
(96) 0x40e591 MOVSXD -0x4(%RCX),%R10 |
(96) 0x40e595 VMULSD %XMM2,%XMM2,%XMM4 |
(96) 0x40e599 SAL $0x4,%R10 |
(96) 0x40e59d VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM6 |
(96) 0x40e5a4 VFMADD231SD %XMM1,%XMM1,%XMM4 |
(96) 0x40e5a9 VFMADD132SD %XMM5,%XMM4,%XMM5 |
(96) 0x40e5ae VFMADD231SD %XMM5,%XMM6,%XMM0 |
(96) 0x40e5b3 VMOVSD 0x8(%RDX),%XMM8 |
(96) 0x40e5b8 VMOVSD (%RDX),%XMM7 |
(96) 0x40e5bc ADD $0x4,%RCX |
(96) 0x40e5c0 ADD $0x18,%RDX |
(96) 0x40e5c4 VMOVSD -0x8(%RDX),%XMM10 |
(96) 0x40e5c9 MOVSXD -0x4(%RCX),%RSI |
(96) 0x40e5cd VMULSD %XMM8,%XMM8,%XMM9 |
(96) 0x40e5d2 SAL $0x4,%RSI |
(96) 0x40e5d6 VDIVSD 0x8(%RDI,%RSI,1),%XMM3,%XMM11 |
(96) 0x40e5dc VFMADD231SD %XMM7,%XMM7,%XMM9 |
(96) 0x40e5e1 VFMADD132SD %XMM10,%XMM9,%XMM10 |
(96) 0x40e5e6 VFMADD231SD %XMM10,%XMM11,%XMM0 |
(96) 0x40e5eb VMOVSD 0x8(%RDX),%XMM13 |
(96) 0x40e5f0 VMOVSD (%RDX),%XMM12 |
(96) 0x40e5f4 ADD $0x4,%RCX |
(96) 0x40e5f8 ADD $0x18,%RDX |
(96) 0x40e5fc VMOVSD -0x8(%RDX),%XMM15 |
(96) 0x40e601 MOVSXD -0x4(%RCX),%R10 |
(96) 0x40e605 VMULSD %XMM13,%XMM13,%XMM14 |
(96) 0x40e60a SAL $0x4,%R10 |
(96) 0x40e60e VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM1 |
(96) 0x40e615 VFMADD231SD %XMM12,%XMM12,%XMM14 |
(96) 0x40e61a VFMADD132SD %XMM15,%XMM14,%XMM15 |
(96) 0x40e61f VFMADD231SD %XMM15,%XMM1,%XMM0 |
(96) 0x40e624 CMP %RCX,%R14 |
(96) 0x40e627 JE 40e701 |
(97) 0x40e62d VMOVSD 0x8(%RDX),%XMM2 |
(97) 0x40e632 VMOVSD (%RDX),%XMM4 |
(97) 0x40e636 ADD $0x10,%RCX |
(97) 0x40e63a ADD $0x60,%RDX |
(97) 0x40e63e VMOVSD -0x50(%RDX),%XMM6 |
(97) 0x40e643 VMOVSD -0x40(%RDX),%XMM8 |
(97) 0x40e648 VMULSD %XMM2,%XMM2,%XMM5 |
(97) 0x40e64c MOVSXD -0x10(%RCX),%RSI |
(97) 0x40e650 VMOVSD -0x28(%RDX),%XMM13 |
(97) 0x40e655 VMULSD %XMM8,%XMM8,%XMM9 |
(97) 0x40e65a VMOVSD -0x38(%RDX),%XMM10 |
(97) 0x40e65f VMOVSD -0x30(%RDX),%XMM12 |
(97) 0x40e664 VMULSD %XMM13,%XMM13,%XMM14 |
(97) 0x40e669 SAL $0x4,%RSI |
(97) 0x40e66d VMOVSD -0x10(%RDX),%XMM1 |
(97) 0x40e672 MOVSXD -0xc(%RCX),%R10 |
(97) 0x40e676 VDIVSD 0x8(%RDI,%RSI,1),%XMM3,%XMM7 |
(97) 0x40e67c VMOVSD -0x20(%RDX),%XMM15 |
(97) 0x40e681 VMOVSD -0x18(%RDX),%XMM2 |
(97) 0x40e686 SAL $0x4,%R10 |
(97) 0x40e68a MOVSXD -0x8(%RCX),%RSI |
(97) 0x40e68e VFMADD231SD %XMM4,%XMM4,%XMM5 |
(97) 0x40e693 VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM11 |
(97) 0x40e69a MOVSXD -0x4(%RCX),%R10 |
(97) 0x40e69e SAL $0x4,%RSI |
(97) 0x40e6a2 VFMADD231SD %XMM12,%XMM12,%XMM14 |
(97) 0x40e6a7 VDIVSD 0x8(%RDI,%RSI,1),%XMM3,%XMM4 |
(97) 0x40e6ad SAL $0x4,%R10 |
(97) 0x40e6b1 VFMADD132SD %XMM6,%XMM5,%XMM6 |
(97) 0x40e6b6 VMULSD %XMM1,%XMM1,%XMM5 |
(97) 0x40e6ba VFMADD132SD %XMM15,%XMM14,%XMM15 |
(97) 0x40e6bf VFMADD132SD %XMM6,%XMM0,%XMM7 |
(97) 0x40e6c4 VMOVSD -0x48(%RDX),%XMM0 |
(97) 0x40e6c9 VMOVSD -0x8(%RDX),%XMM6 |
(97) 0x40e6ce VFMADD231SD %XMM2,%XMM2,%XMM5 |
(97) 0x40e6d3 VFMADD231SD %XMM0,%XMM0,%XMM9 |
(97) 0x40e6d8 VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM0 |
(97) 0x40e6df VFMADD231SD %XMM6,%XMM6,%XMM5 |
(97) 0x40e6e4 VFMADD132SD %XMM10,%XMM9,%XMM10 |
(97) 0x40e6e9 VFMADD132SD %XMM10,%XMM7,%XMM11 |
(97) 0x40e6ee VFMADD132SD %XMM15,%XMM11,%XMM4 |
(97) 0x40e6f3 VFMADD132SD %XMM5,%XMM4,%XMM0 |
(97) 0x40e6f8 CMP %RCX,%R14 |
(97) 0x40e6fb JNE 40e62d |
(96) 0x40e701 INC %R9 |
(96) 0x40e704 ADD $0x40,%R8D |
(96) 0x40e708 ADD $0x600,%R11 |
(96) 0x40e70f CMP %R9D,%EAX |
(96) 0x40e712 JG 40e520 |
0x40e718 MOV 0x8(%R12),%RAX |
0x40e71d LEA 0x8(%R12),%RBX |
(95) 0x40e722 VMOVQ %RAX,%XMM3 |
(95) 0x40e727 VADDSD %XMM3,%XMM0,%XMM7 |
(95) 0x40e72b VMOVQ %XMM7,%R12 |
(95) 0x40e730 LOCK CMPXCHG %R12,(%RBX) |
(95) 0x40e735 JNE 40e722 |
0x40e737 POP %RBX |
0x40e738 POP %R12 |
0x40e73a POP %R13 |
0x40e73c POP %R14 |
0x40e73e POP %RBP |
0x40e73f RET |
0x40e740 INC %EAX |
0x40e742 XOR %EDX,%EDX |
0x40e744 JMP 40e4e6 |
0x40e749 NOPL (%RAX) |
Path / |
Source file and lines | timestep.c:107-116 |
Module | exec |
nb instructions | 43 |
nb uops | 48 |
loop length | 147 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 8.00 cycles |
front end | 8.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 4.00 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
cycles | 3.00 | 5.33 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 7.71 |
Stall cycles | 0.00 |
Front-end | 8.00 |
Dispatch | 5.33 |
DIV/SQRT | 6.00 |
Overall L1 | 8.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 6% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 10% |
all | 7% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 7% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 9% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403070 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403160 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 40e740 <kineticEnergy._omp_fn.0+0x290> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 40e718 <kineticEnergy._omp_fn.0+0x268> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD %R8D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%R14),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x15dc(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x6,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%R9,%R9,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x9,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x8(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%R12),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40e4e6 <kineticEnergy._omp_fn.0+0x36> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | timestep.c:107-116 |
Module | exec |
nb instructions | 43 |
nb uops | 48 |
loop length | 147 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 8.00 cycles |
front end | 8.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 4.00 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
cycles | 3.00 | 5.33 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 7.71 |
Stall cycles | 0.00 |
Front-end | 8.00 |
Dispatch | 5.33 |
DIV/SQRT | 6.00 |
Overall L1 | 8.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 50% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 6% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 10% |
all | 7% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 7% |
all | 18% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 9% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403070 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403160 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 40e740 <kineticEnergy._omp_fn.0+0x290> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 40e718 <kineticEnergy._omp_fn.0+0x268> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD %R8D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%R14),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x15dc(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x6,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%R9,%R9,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x9,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x8(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%R12),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40e4e6 <kineticEnergy._omp_fn.0+0x36> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼kineticEnergy._omp_fn.0– | 0.23 | 0.04 |
▼Loop 96 - timestep.c:110-116 - exec– | 0.07 | 0.01 |
○Loop 97 - timestep.c:110-116 - exec | 0.16 | 0.02 |
○Loop 95 - timestep.c:107-107 - exec | 0 | 0 |