Function: randomDisplacements._omp_fn.0 | Module: exec | Source: initAtoms.c:194-202 [...] | Coverage: 0.03% |
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Function: randomDisplacements._omp_fn.0 | Module: exec | Source: initAtoms.c:194-202 [...] | Coverage: 0.03% |
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/home/eoseret/qaas_runs_CPU_9468/171-110-4860/intel/CoMD/build/CoMD/CoMD/src-openmp/random.c: 45 - 70 |
-------------------------------------------------------------------------------- |
45: *seed *= UINT64_C(437799614237992725); |
46: *seed %= UINT64_C(2305843009213693951); |
47: |
48: return *seed*convertToDouble; |
[...] |
68: uint32_t s2 = (id+callSite) * UINT32_C(2654435761); |
69: |
70: uint64_t iSeed = (UINT64_C(0x100000000) * s1) + s2; |
/home/eoseret/qaas_runs_CPU_9468/171-110-4860/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 194 - 202 |
-------------------------------------------------------------------------------- |
194: #pragma omp parallel for |
195: for (int iBox=0; iBox<s->boxes->nLocalBoxes; ++iBox) |
196: { |
197: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
198: { |
199: uint64_t seed = mkSeed(s->atoms->gid[iOff], 457); |
200: s->atoms->r[iOff][0] += (2.0*lcg61(&seed)-1.0) * delta; |
201: s->atoms->r[iOff][1] += (2.0*lcg61(&seed)-1.0) * delta; |
202: s->atoms->r[iOff][2] += (2.0*lcg61(&seed)-1.0) * delta; |
0x4053e0 PUSH %RBP |
0x4053e1 MOV %RSP,%RBP |
0x4053e4 PUSH %R15 |
0x4053e6 MOV %RDI,%R15 |
0x4053e9 PUSH %R14 |
0x4053eb PUSH %R13 |
0x4053ed PUSH %R12 |
0x4053ef PUSH %RBX |
0x4053f0 SUB $0x8,%RSP |
0x4053f4 MOV (%RDI),%R12 |
0x4053f7 CALL 403060 <omp_get_num_threads@plt> |
0x4053fc MOV 0x18(%R12),%R13 |
0x405401 MOV %EAX,%R14D |
0x405404 CALL 403150 <omp_get_thread_num@plt> |
0x405409 MOV %EAX,%EBX |
0x40540b MOV 0xc(%R13),%EAX |
0x40540f CLTD |
0x405410 IDIV %R14D |
0x405413 CMP %EDX,%EBX |
0x405415 JL 40573f |
0x40541b IMUL %EAX,%EBX |
0x40541e ADD %EDX,%EBX |
0x405420 LEA (%RAX,%RBX,1),%R14D |
0x405424 CMP %R14D,%EBX |
0x405427 JGE 405730 |
0x40542d MOVSXD %EBX,%R11 |
0x405430 VXORPS %XMM4,%XMM4,%XMM4 |
0x405434 SAL $0x6,%EBX |
0x405437 VMOVSD 0x8(%R15),%XMM3 |
0x40543d VMOVSD 0xd7cb(%RIP),%XMM2 |
0x405445 MOV 0x78(%R13),%R15 |
0x405449 LEA (%R11,%R11,2),%R13 |
0x40544d MOV $0x613606df9756715,%RDI |
0x405457 VMOVSD 0xd7b9(%RIP),%XMM1 |
0x40545f SAL $0x9,%R13 |
0x405463 MOV $0x9,%ESI |
0x405468 NOPL (%RAX,%RAX,1) |
(14) 0x405470 MOVSXD (%R15,%R11,4),%R10 |
(14) 0x405474 TEST %R10D,%R10D |
(14) 0x405477 JLE 40571a |
(14) 0x40547d MOV 0x20(%R12),%RAX |
(14) 0x405482 MOVSXD %EBX,%R8 |
(14) 0x405485 MOV %R11,%RDX |
(14) 0x405488 SAL $0x6,%RDX |
(14) 0x40548c MOV 0x8(%RAX),%RCX |
(14) 0x405490 ADD %R10,%RDX |
(14) 0x405493 LEA (%RCX,%R8,4),%R9 |
(14) 0x405497 MOV 0x18(%RAX),%R8 |
(14) 0x40549b LEA (%RCX,%RDX,4),%R10 |
(14) 0x40549f ADD %R13,%R8 |
(14) 0x4054a2 NOPW (%RAX,%RAX,1) |
(15) 0x4054a8 MOV (%R9),%EAX |
(15) 0x4054ab IMUL $-0x61c8864f,%EAX,%ECX |
(15) 0x4054b1 ADD $0x1c9,%EAX |
(15) 0x4054b6 IMUL $-0x61c8864f,%EAX,%EDX |
(15) 0x4054bc SAL $0x20,%RCX |
(15) 0x4054c0 ADD %RDX,%RCX |
(15) 0x4054c3 IMUL %RDI,%RCX |
(15) 0x4054c7 MOV %RCX,%RAX |
(15) 0x4054ca MUL %RSI |
(15) 0x4054cd MOV %RCX,%RAX |
(15) 0x4054d0 SUB %RDX,%RAX |
(15) 0x4054d3 SHR $0x1,%RAX |
(15) 0x4054d6 ADD %RAX,%RDX |
(15) 0x4054d9 SHR $0x3c,%RDX |
(15) 0x4054dd MOV %RDX,%RAX |
(15) 0x4054e0 SAL $0x3d,%RAX |
(15) 0x4054e4 SUB %RDX,%RAX |
(15) 0x4054e7 SUB %RAX,%RCX |
(15) 0x4054ea IMUL %RDI,%RCX |
(15) 0x4054ee MOV %RCX,%RAX |
(15) 0x4054f1 MUL %RSI |
(15) 0x4054f4 MOV %RCX,%RAX |
(15) 0x4054f7 SUB %RDX,%RAX |
(15) 0x4054fa SHR $0x1,%RAX |
(15) 0x4054fd ADD %RAX,%RDX |
(15) 0x405500 SHR $0x3c,%RDX |
(15) 0x405504 MOV %RDX,%RAX |
(15) 0x405507 SAL $0x3d,%RAX |
(15) 0x40550b SUB %RDX,%RAX |
(15) 0x40550e SUB %RAX,%RCX |
(15) 0x405511 IMUL %RDI,%RCX |
(15) 0x405515 MOV %RCX,%RAX |
(15) 0x405518 MUL %RSI |
(15) 0x40551b MOV %RCX,%RAX |
(15) 0x40551e SUB %RDX,%RAX |
(15) 0x405521 SHR $0x1,%RAX |
(15) 0x405524 ADD %RAX,%RDX |
(15) 0x405527 SHR $0x3c,%RDX |
(15) 0x40552b MOV %RDX,%RAX |
(15) 0x40552e SAL $0x3d,%RAX |
(15) 0x405532 SUB %RDX,%RAX |
(15) 0x405535 SUB %RAX,%RCX |
(15) 0x405538 IMUL %RDI,%RCX |
(15) 0x40553c MOV %RCX,%RAX |
(15) 0x40553f MUL %RSI |
(15) 0x405542 MOV %RCX,%RAX |
(15) 0x405545 SUB %RDX,%RAX |
(15) 0x405548 SHR $0x1,%RAX |
(15) 0x40554b ADD %RAX,%RDX |
(15) 0x40554e SHR $0x3c,%RDX |
(15) 0x405552 MOV %RDX,%RAX |
(15) 0x405555 SAL $0x3d,%RAX |
(15) 0x405559 SUB %RDX,%RAX |
(15) 0x40555c SUB %RAX,%RCX |
(15) 0x40555f IMUL %RDI,%RCX |
(15) 0x405563 MOV %RCX,%RAX |
(15) 0x405566 MUL %RSI |
(15) 0x405569 MOV %RCX,%RAX |
(15) 0x40556c SUB %RDX,%RAX |
(15) 0x40556f SHR $0x1,%RAX |
(15) 0x405572 ADD %RAX,%RDX |
(15) 0x405575 SHR $0x3c,%RDX |
(15) 0x405579 MOV %RDX,%RAX |
(15) 0x40557c SAL $0x3d,%RAX |
(15) 0x405580 SUB %RDX,%RAX |
(15) 0x405583 SUB %RAX,%RCX |
(15) 0x405586 IMUL %RDI,%RCX |
(15) 0x40558a MOV %RCX,%RAX |
(15) 0x40558d MUL %RSI |
(15) 0x405590 MOV %RCX,%RAX |
(15) 0x405593 SUB %RDX,%RAX |
(15) 0x405596 SHR $0x1,%RAX |
(15) 0x405599 ADD %RAX,%RDX |
(15) 0x40559c SHR $0x3c,%RDX |
(15) 0x4055a0 MOV %RDX,%RAX |
(15) 0x4055a3 SAL $0x3d,%RAX |
(15) 0x4055a7 SUB %RDX,%RAX |
(15) 0x4055aa SUB %RAX,%RCX |
(15) 0x4055ad IMUL %RDI,%RCX |
(15) 0x4055b1 MOV %RCX,%RAX |
(15) 0x4055b4 MUL %RSI |
(15) 0x4055b7 MOV %RCX,%RAX |
(15) 0x4055ba SUB %RDX,%RAX |
(15) 0x4055bd SHR $0x1,%RAX |
(15) 0x4055c0 ADD %RAX,%RDX |
(15) 0x4055c3 SHR $0x3c,%RDX |
(15) 0x4055c7 MOV %RDX,%RAX |
(15) 0x4055ca SAL $0x3d,%RAX |
(15) 0x4055ce SUB %RDX,%RAX |
(15) 0x4055d1 SUB %RAX,%RCX |
(15) 0x4055d4 IMUL %RDI,%RCX |
(15) 0x4055d8 MOV %RCX,%RAX |
(15) 0x4055db MUL %RSI |
(15) 0x4055de MOV %RCX,%RAX |
(15) 0x4055e1 SUB %RDX,%RAX |
(15) 0x4055e4 SHR $0x1,%RAX |
(15) 0x4055e7 ADD %RAX,%RDX |
(15) 0x4055ea SHR $0x3c,%RDX |
(15) 0x4055ee MOV %RDX,%RAX |
(15) 0x4055f1 SAL $0x3d,%RAX |
(15) 0x4055f5 SUB %RDX,%RAX |
(15) 0x4055f8 SUB %RAX,%RCX |
(15) 0x4055fb IMUL %RDI,%RCX |
(15) 0x4055ff MOV %RCX,%RAX |
(15) 0x405602 MUL %RSI |
(15) 0x405605 MOV %RCX,%RAX |
(15) 0x405608 SUB %RDX,%RAX |
(15) 0x40560b SHR $0x1,%RAX |
(15) 0x40560e ADD %RAX,%RDX |
(15) 0x405611 SHR $0x3c,%RDX |
(15) 0x405615 MOV %RDX,%RAX |
(15) 0x405618 SAL $0x3d,%RAX |
(15) 0x40561c SUB %RDX,%RAX |
(15) 0x40561f SUB %RAX,%RCX |
(15) 0x405622 IMUL %RDI,%RCX |
(15) 0x405626 MOV %RCX,%RAX |
(15) 0x405629 MUL %RSI |
(15) 0x40562c MOV %RCX,%RAX |
(15) 0x40562f SUB %RDX,%RAX |
(15) 0x405632 SHR $0x1,%RAX |
(15) 0x405635 ADD %RAX,%RDX |
(15) 0x405638 SHR $0x3c,%RDX |
(15) 0x40563c MOV %RDX,%RAX |
(15) 0x40563f SAL $0x3d,%RAX |
(15) 0x405643 SUB %RDX,%RAX |
(15) 0x405646 SUB %RAX,%RCX |
(15) 0x405649 IMUL %RDI,%RCX |
(15) 0x40564d MOV %RCX,%RAX |
(15) 0x405650 MUL %RSI |
(15) 0x405653 MOV %RCX,%RAX |
(15) 0x405656 ADD $0x4,%R9 |
(15) 0x40565a ADD $0x18,%R8 |
(15) 0x40565e SUB %RDX,%RAX |
(15) 0x405661 SHR $0x1,%RAX |
(15) 0x405664 ADD %RAX,%RDX |
(15) 0x405667 SHR $0x3c,%RDX |
(15) 0x40566b MOV %RDX,%RAX |
(15) 0x40566e SAL $0x3d,%RAX |
(15) 0x405672 SUB %RDX,%RAX |
(15) 0x405675 SUB %RAX,%RCX |
(15) 0x405678 VCVTSI2SD %RCX,%XMM4,%XMM0 |
(15) 0x40567d IMUL %RDI,%RCX |
(15) 0x405681 MOV %RCX,%RAX |
(15) 0x405684 VFMADD132SD %XMM2,%XMM1,%XMM0 |
(15) 0x405689 MUL %RSI |
(15) 0x40568c VFMADD213SD -0x18(%R8),%XMM3,%XMM0 |
(15) 0x405692 MOV %RCX,%RAX |
(15) 0x405695 SUB %RDX,%RAX |
(15) 0x405698 SHR $0x1,%RAX |
(15) 0x40569b ADD %RAX,%RDX |
(15) 0x40569e VMOVSD %XMM0,-0x18(%R8) |
(15) 0x4056a4 MOV %RDX,%RAX |
(15) 0x4056a7 SHR $0x3c,%RAX |
(15) 0x4056ab MOV %RAX,%RDX |
(15) 0x4056ae SAL $0x3d,%RDX |
(15) 0x4056b2 SUB %RAX,%RDX |
(15) 0x4056b5 MOV %RCX,%RAX |
(15) 0x4056b8 SUB %RDX,%RAX |
(15) 0x4056bb VCVTSI2SD %RAX,%XMM4,%XMM5 |
(15) 0x4056c0 IMUL %RDI,%RAX |
(15) 0x4056c4 MOV %RAX,%RCX |
(15) 0x4056c7 MUL %RSI |
(15) 0x4056ca MOV %RCX,%RAX |
(15) 0x4056cd VFMADD132SD %XMM2,%XMM1,%XMM5 |
(15) 0x4056d2 VFMADD213SD -0x10(%R8),%XMM3,%XMM5 |
(15) 0x4056d8 SUB %RDX,%RAX |
(15) 0x4056db SHR $0x1,%RAX |
(15) 0x4056de ADD %RAX,%RDX |
(15) 0x4056e1 MOV %RDX,%RAX |
(15) 0x4056e4 SHR $0x3c,%RAX |
(15) 0x4056e8 VMOVSD %XMM5,-0x10(%R8) |
(15) 0x4056ee MOV %RAX,%RDX |
(15) 0x4056f1 SAL $0x3d,%RDX |
(15) 0x4056f5 SUB %RAX,%RDX |
(15) 0x4056f8 SUB %RDX,%RCX |
(15) 0x4056fb VCVTSI2SD %RCX,%XMM4,%XMM6 |
(15) 0x405700 VFMADD132SD %XMM2,%XMM1,%XMM6 |
(15) 0x405705 VFMADD213SD -0x8(%R8),%XMM3,%XMM6 |
(15) 0x40570b VMOVSD %XMM6,-0x8(%R8) |
(15) 0x405711 CMP %R9,%R10 |
(15) 0x405714 JNE 4054a8 |
(14) 0x40571a INC %R11 |
(14) 0x40571d ADD $0x40,%EBX |
(14) 0x405720 ADD $0x600,%R13 |
(14) 0x405727 CMP %R11D,%R14D |
(14) 0x40572a JG 405470 |
0x405730 ADD $0x8,%RSP |
0x405734 POP %RBX |
0x405735 POP %R12 |
0x405737 POP %R13 |
0x405739 POP %R14 |
0x40573b POP %R15 |
0x40573d POP %RBP |
0x40573e RET |
0x40573f INC %EAX |
0x405741 XOR %EDX,%EDX |
0x405743 JMP 40541b |
0x405748 NOPL (%RAX,%RAX,1) |
Path / |
Source file and lines | initAtoms.c:194-202 |
Module | exec |
nb instructions | 49 |
nb uops | 54 |
loop length | 176 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 9.00 cycles |
front end | 9.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.60 | 4.00 | 4.67 | 4.67 | 4.00 | 3.47 | 3.40 | 4.00 | 4.00 | 4.00 | 3.53 | 4.67 |
cycles | 3.60 | 5.73 | 4.67 | 4.67 | 4.00 | 3.47 | 3.40 | 4.00 | 4.00 | 4.00 | 3.53 | 4.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 8.72-8.74 |
Stall cycles | 0.00 |
Front-end | 9.00 |
Dispatch | 5.73 |
DIV/SQRT | 6.00 |
Overall L1 | 9.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 7% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 7% |
all | 15% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403060 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403150 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R13),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 40573f <randomDisplacements._omp_fn.0+0x35f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%EBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RAX,%RBX,1),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 405730 <randomDisplacements._omp_fn.0+0x350> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD %EBX,%R11 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
VXORPS %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%EBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VMOVSD 0x8(%R15),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xd7cb(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%R13),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%R11,2),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x613606df9756715,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
VMOVSD 0xd7b9(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x9,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x9,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40541b <randomDisplacements._omp_fn.0+0x3b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | initAtoms.c:194-202 |
Module | exec |
nb instructions | 49 |
nb uops | 54 |
loop length | 176 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 9.00 cycles |
front end | 9.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.60 | 4.00 | 4.67 | 4.67 | 4.00 | 3.47 | 3.40 | 4.00 | 4.00 | 4.00 | 3.53 | 4.67 |
cycles | 3.60 | 5.73 | 4.67 | 4.67 | 4.00 | 3.47 | 3.40 | 4.00 | 4.00 | 4.00 | 3.53 | 4.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 8.72-8.74 |
Stall cycles | 0.00 |
Front-end | 9.00 |
Dispatch | 5.73 |
DIV/SQRT | 6.00 |
Overall L1 | 9.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 7% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 7% |
all | 15% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%RDI),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403060 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x18(%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EAX,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403150 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R13),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R14D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 40573f <randomDisplacements._omp_fn.0+0x35f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%EBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RAX,%RBX,1),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R14D,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 405730 <randomDisplacements._omp_fn.0+0x350> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD %EBX,%R11 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
VXORPS %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%EBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VMOVSD 0x8(%R15),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xd7cb(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%R13),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%R11,2),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x613606df9756715,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
VMOVSD 0xd7b9(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x9,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV $0x9,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40541b <randomDisplacements._omp_fn.0+0x3b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼randomDisplacements._omp_fn.0– | 0.03 | 0 |
▼Loop 14 - initAtoms.c:197-202 - exec– | 0 | 0 |
○Loop 15 - initAtoms.c:197-202 - exec | 0.03 | 0 |