Loop Id: 90 | Module: exec | Source: ljForce.c:178-216 [...] | Coverage: 0.11% |
---|
Loop Id: 90 | Module: exec | Source: ljForce.c:178-216 [...] | Coverage: 0.11% |
---|
0x40bd00 LEA 0x1(%R14),%RAX |
0x40bd04 CMP $0x1a,%R14 |
0x40bd08 MOV %RAX,%R14 |
0x40bd0b JE 40bca0 |
0x40bd0d MOV -0x88(%RBP),%RAX |
0x40bd14 MOV (%RAX,%R14,4),%EAX |
0x40bd18 TEST %EAX,%EAX |
0x40bd1a JS 40be64 |
0x40bd20 TEST %R10D,%R10D |
0x40bd23 JLE 40bd00 |
0x40bd25 MOV -0x68(%RBP),%RCX |
0x40bd29 MOVSXD (%RCX,%RAX,4),%RDX |
0x40bd2d TEST %RDX,%RDX |
0x40bd30 JLE 40bd00 |
0x40bd32 SAL $0x6,%EAX |
0x40bd35 CLTQ |
0x40bd37 MOV -0x60(%RBP),%RCX |
0x40bd3b MOV 0x20(%RCX),%R13 |
0x40bd3f SAL $0x3,%RAX |
0x40bd43 LEA (%RAX,%RAX,2),%RBX |
0x40bd47 XOR %ESI,%ESI |
0x40bd49 JMP 40bd5c |
(91) 0x40bd50 LEA 0x1(%RSI),%RAX |
(91) 0x40bd54 CMP %R9,%RSI |
(91) 0x40bd57 MOV %RAX,%RSI |
(91) 0x40bd5a JE 40bd00 |
(91) 0x40bd5c MOV 0x18(%R13),%R15 |
(91) 0x40bd60 LEA (%RSI,%R8,1),%RCX |
(91) 0x40bd64 LEA (%RCX,%RCX,2),%RAX |
(91) 0x40bd68 LEA (%R15,%RAX,8),%RDI |
(91) 0x40bd6c ADD %RBX,%R15 |
(91) 0x40bd6f ADD $0x10,%R15 |
(91) 0x40bd73 MOV %RDX,%R12 |
(91) 0x40bd76 JMP 40bd89 |
(92) 0x40bd80 ADD $0x18,%R15 |
(92) 0x40bd84 DEC %R12 |
(92) 0x40bd87 JE 40bd50 |
(92) 0x40bd89 VMOVUPD (%RDI),%XMM11 |
(92) 0x40bd8d VSUBPD -0x10(%R15),%XMM11,%XMM11 |
(92) 0x40bd93 VMULPD %XMM11,%XMM11,%XMM12 |
(92) 0x40bd98 VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 |
(92) 0x40bd9e VADDSD %XMM12,%XMM13,%XMM13 |
(92) 0x40bda3 VMOVSD 0x10(%RDI),%XMM12 |
(92) 0x40bda8 VSUBSD (%R15),%XMM12,%XMM12 |
(92) 0x40bdad VFMADD231SD %XMM12,%XMM12,%XMM13 |
(92) 0x40bdb2 VUCOMISD %XMM2,%XMM13 |
(92) 0x40bdb6 JA 40bd80 |
(92) 0x40bdb8 VUCOMISD %XMM4,%XMM13 |
(92) 0x40bdbc JBE 40bd80 |
(92) 0x40bdbe VDIVSD %XMM13,%XMM6,%XMM13 |
(92) 0x40bdc3 VMULSD %XMM13,%XMM13,%XMM14 |
(92) 0x40bdc8 VMULSD %XMM1,%XMM13,%XMM15 |
(92) 0x40bdcc VMULSD %XMM15,%XMM14,%XMM14 |
(92) 0x40bdd1 VADDSD %XMM7,%XMM14,%XMM15 |
(92) 0x40bdd5 VFNMADD213SD 0x10(%RBP),%XMM14,%XMM15 |
(92) 0x40bddb VMULSD %XMM8,%XMM15,%XMM15 |
(92) 0x40bde0 MOV 0x30(%R13),%R11 |
(92) 0x40bde4 VADDSD (%R11,%RCX,8),%XMM15,%XMM0 |
(92) 0x40bdea VMOVSD %XMM0,(%R11,%RCX,8) |
(92) 0x40bdf0 VMOVAPD %XMM9,%XMM0 |
(92) 0x40bdf4 VFMADD213SD %XMM10,%XMM14,%XMM0 |
(92) 0x40bdf9 VMULSD %XMM3,%XMM13,%XMM13 |
(92) 0x40bdfd VMULSD %XMM0,%XMM14,%XMM0 |
(92) 0x40be01 VMULSD %XMM0,%XMM13,%XMM0 |
(92) 0x40be05 MOV 0x28(%R13),%R11 |
(92) 0x40be09 VMOVDDUP %XMM0,%XMM13 |
(92) 0x40be0d VFMADD213PD (%R11,%RAX,8),%XMM13,%XMM11 |
(92) 0x40be13 VMOVUPD %XMM11,(%R11,%RAX,8) |
(92) 0x40be19 VFMADD213SD 0x10(%R11,%RAX,8),%XMM0,%XMM12 |
(92) 0x40be20 VMOVSD %XMM12,0x10(%R11,%RAX,8) |
(92) 0x40be27 VADDSD %XMM5,%XMM15,%XMM5 |
(92) 0x40be2b JMP 40bd80 |
/scratch_na/users/xoserete/qaas_runs/171-419-7821/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 178 - 216 |
-------------------------------------------------------------------------------- |
178: for (int jTmp=0; jTmp<nNbrBoxes; jTmp++) |
179: { |
180: int jBox = s->boxes->nbrBoxes[iBox][jTmp]; |
181: |
182: assert(jBox>=0); |
183: |
184: int nJBox = s->boxes->nAtoms[jBox]; |
185: |
186: // loop over atoms in iBox |
187: for (int iOff=MAXATOMS*iBox; iOff<(iBox*MAXATOMS+nIBox); iOff++) |
188: { |
189: |
190: // loop over atoms in jBox |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.08 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.22 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:178-184,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.67 |
CQA cycles if no scalar integer | 3.67 |
CQA cycles if FP arith vectorized | 3.67 |
CQA cycles if fully vectorized | 0.26 |
Front-end cycles | 3.67 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 1.70 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.00 |
P4 cycles | 1.70 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.60 |
P10 cycles | 2.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 7.58 - 9.63 |
Stall cycles (UFS) | 3.41 - 5.43 |
Nb insns | 22.00 |
Nb uops | 22.00 |
Nb loads | 6.00 |
Nb stores | 0.00 |
Nb stack references | 3.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.91 |
Bytes prefetched | 0.00 |
Bytes loaded | 40.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 9.38 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 8.75 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.08 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.22 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:178-184,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.67 |
CQA cycles if no scalar integer | 3.67 |
CQA cycles if FP arith vectorized | 3.67 |
CQA cycles if fully vectorized | 0.26 |
Front-end cycles | 3.67 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 1.70 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.00 |
P4 cycles | 1.70 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 1.60 |
P10 cycles | 2.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 7.58 - 9.63 |
Stall cycles (UFS) | 3.41 - 5.43 |
Nb insns | 22.00 |
Nb uops | 22.00 |
Nb loads | 6.00 |
Nb stores | 0.00 |
Nb stack references | 3.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 10.91 |
Bytes prefetched | 0.00 |
Bytes loaded | 40.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 9.38 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 8.75 |
Path / |
Function | ljForce.extracted |
Source file and lines | ljForce.c:178-216 |
Module | exec |
nb instructions | 22 |
nb uops | 22 |
loop length | 75 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 3 |
micro-operation queue | 3.67 cycles |
front end | 3.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 1.70 | 2.00 | 2.00 | 0.00 | 1.70 | 3.00 | 0.00 | 0.00 | 0.00 | 1.60 | 2.00 |
cycles | 3.00 | 1.70 | 2.00 | 2.00 | 0.00 | 1.70 | 3.00 | 0.00 | 0.00 | 0.00 | 1.60 | 2.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 7.58-9.63 |
Stall cycles | 3.41-5.43 |
LM full (events) | 4.82-7.48 |
Front-end | 3.67 |
Dispatch | 3.00 |
Overall L1 | 3.67 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 9% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R14),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x1a,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 40bca0 <ljForce.extracted+0x170> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R14,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 40be64 <ljForce.extracted+0x334> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R10D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40bd00 <ljForce.extracted+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RCX,%RAX,4),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40bd00 <ljForce.extracted+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x6,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RCX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RAX,%RAX,2),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40bd5c <ljForce.extracted+0x22c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:178-216 |
Module | exec |
nb instructions | 22 |
nb uops | 22 |
loop length | 75 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 3 |
micro-operation queue | 3.67 cycles |
front end | 3.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 1.70 | 2.00 | 2.00 | 0.00 | 1.70 | 3.00 | 0.00 | 0.00 | 0.00 | 1.60 | 2.00 |
cycles | 3.00 | 1.70 | 2.00 | 2.00 | 0.00 | 1.70 | 3.00 | 0.00 | 0.00 | 0.00 | 1.60 | 2.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 7.58-9.63 |
Stall cycles | 3.41-5.43 |
LM full (events) | 4.82-7.48 |
Front-end | 3.67 |
Dispatch | 3.00 |
Overall L1 | 3.67 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 9% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R14),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x1a,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JE 40bca0 <ljForce.extracted+0x170> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%R14,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 40be64 <ljForce.extracted+0x334> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
TEST %R10D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40bd00 <ljForce.extracted+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD (%RCX,%RAX,4),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40bd00 <ljForce.extracted+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x6,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RCX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RAX,%RAX,2),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40bd5c <ljForce.extracted+0x22c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |