Function: ljForce.extracted | Module: exec | Source: ljForce.c:172-222 [...] | Coverage: 50.96% |
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Function: ljForce.extracted | Module: exec | Source: ljForce.c:172-222 [...] | Coverage: 50.96% |
---|
/scratch_na/users/xoserete/qaas_runs/171-419-7821/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 172 - 222 |
-------------------------------------------------------------------------------- |
172: #pragma omp parallel for reduction(+:ePot) |
173: for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++) |
174: { |
175: int nIBox = s->boxes->nAtoms[iBox]; |
176: |
177: // loop over neighbors of iBox |
178: for (int jTmp=0; jTmp<nNbrBoxes; jTmp++) |
179: { |
180: int jBox = s->boxes->nbrBoxes[iBox][jTmp]; |
181: |
182: assert(jBox>=0); |
183: |
184: int nJBox = s->boxes->nAtoms[jBox]; |
185: |
186: // loop over atoms in iBox |
187: for (int iOff=MAXATOMS*iBox; iOff<(iBox*MAXATOMS+nIBox); iOff++) |
188: { |
189: |
190: // loop over atoms in jBox |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
[...] |
222: } // loop over local boxes in system |
0x40aea0 PUSH %RBP |
0x40aea1 MOV %RSP,%RBP |
0x40aea4 PUSH %R15 |
0x40aea6 PUSH %R14 |
0x40aea8 PUSH %R13 |
0x40aeaa PUSH %R12 |
0x40aeac PUSH %RBX |
0x40aead SUB $0x58,%RSP |
0x40aeb1 MOV %R9,%R14 |
0x40aeb4 MOV %R8,%R13 |
0x40aeb7 MOV %RCX,%R12 |
0x40aeba MOV %RDX,-0x58(%RBP) |
0x40aebe MOV 0x28(%RBP),%EAX |
0x40aec1 MOVL $0,-0x44(%RBP) |
0x40aec8 MOV %RDI,-0x68(%RBP) |
0x40aecc MOV (%RDI),%ESI |
0x40aece MOVL $0,-0x30(%RBP) |
0x40aed5 MOV %EAX,-0x2c(%RBP) |
0x40aed8 MOVL $0x1,-0x40(%RBP) |
0x40aedf SUB $0x8,%RSP |
0x40aee3 LEA -0x40(%RBP),%RAX |
0x40aee7 LEA -0x44(%RBP),%RCX |
0x40aeeb LEA -0x30(%RBP),%R8 |
0x40aeef LEA -0x2c(%RBP),%R9 |
0x40aef3 MOV $0x62c750,%EDI |
0x40aef8 MOV %ESI,-0x3c(%RBP) |
0x40aefb MOV $0x22,%EDX |
0x40af00 PUSH $0x1 |
0x40af02 PUSH $0x1 |
0x40af04 PUSH %RAX |
0x40af05 CALL 402d60 <__kmpc_for_static_init_4@plt> |
0x40af0a ADD $0x20,%RSP |
0x40af0e MOV -0x30(%RBP),%ECX |
0x40af11 MOV -0x2c(%RBP),%EAX |
0x40af14 VXORPD %XMM5,%XMM5,%XMM5 |
0x40af18 MOV %RAX,-0x50(%RBP) |
0x40af1c CMP %EAX,%ECX |
0x40af1e JBE 40af9e |
0x40af20 MOV 0x30(%RBP),%R15 |
0x40af24 VMOVSD %XMM5,-0x38(%RBP) |
0x40af29 MOV $0x62c770,%EDI |
0x40af2e MOV -0x3c(%RBP),%ESI |
0x40af31 CALL 402c10 <__kmpc_for_static_fini@plt> |
0x40af36 MOV -0x68(%RBP),%RBX |
0x40af3a MOV (%RBX),%ESI |
0x40af3c SUB $0x8,%RSP |
0x40af40 MOV $0x62dc10,%RAX |
0x40af47 LEA -0x38(%RBP),%R8 |
0x40af4b MOV $0x62c7b0,%EDI |
0x40af50 MOV $0x40ae90,%R9D |
0x40af56 MOV $0x1,%EDX |
0x40af5b MOV $0x8,%ECX |
0x40af60 PUSH %RAX |
0x40af61 CALL 402e60 <__kmpc_reduce@plt> |
0x40af66 ADD $0x10,%RSP |
0x40af6a CMP $0x2,%EAX |
0x40af6d JE 40b276 |
0x40af73 CMP $0x1,%EAX |
0x40af76 JNE 40b29d |
0x40af7c VMOVSD -0x38(%RBP),%XMM0 |
0x40af81 VADDSD (%R15),%XMM0,%XMM0 |
0x40af86 VMOVSD %XMM0,(%R15) |
0x40af8b MOV (%RBX),%ESI |
0x40af8d MOV $0x62dc10,%RDX |
0x40af94 MOV $0x62c7d0,%EDI |
0x40af99 JMP 40b298 |
0x40af9e VMOVSD 0x10(%RBP),%XMM0 |
0x40afa3 VMOVQ %R14,%XMM1 |
0x40afa8 VMOVQ %R13,%XMM2 |
0x40afad VMOVQ %R12,%XMM3 |
0x40afb2 MOV -0x58(%RBP),%RAX |
0x40afb6 MOV 0x18(%RAX),%RAX |
0x40afba MOV 0x78(%RAX),%RDX |
0x40afbe MOV %RDX,-0x60(%RBP) |
0x40afc2 MOV 0x80(%RAX),%RAX |
0x40afc9 MOV %RAX,-0x70(%RBP) |
0x40afcd VMULSD 0x17efb(%RIP),%XMM3,%XMM3 |
0x40afd5 MOV %ECX,%EDI |
0x40afd7 SAL $0x6,%EDI |
0x40afda INCQ -0x50(%RBP) |
0x40afde VXORPD %XMM4,%XMM4,%XMM4 |
0x40afe2 VMOVSD 0x164be(%RIP),%XMM6 |
0x40afea VMOVSD 0x1763e(%RIP),%XMM7 |
0x40aff2 VMOVSD 0x17ede(%RIP),%XMM8 |
0x40affa VMOVSD 0x17ede(%RIP),%XMM9 |
0x40b002 VMOVSD 0x17ede(%RIP),%XMM10 |
0x40b00a JMP 40b024 |
0x40b00c NOPL (%RAX) |
(86) 0x40b010 MOV -0x78(%RBP),%RCX |
(86) 0x40b014 INC %RCX |
(86) 0x40b017 ADD $0x40,%EDI |
(86) 0x40b01a CMP -0x50(%RBP),%RCX |
(86) 0x40b01e JE 40af20 |
(86) 0x40b024 MOV %EDI,%EDI |
(86) 0x40b026 MOV -0x60(%RBP),%RAX |
(86) 0x40b02a MOV (%RAX,%RCX,4),%EAX |
(86) 0x40b02d MOV -0x70(%RBP),%RDX |
(86) 0x40b031 MOV (%RDX,%RCX,8),%RDX |
(86) 0x40b035 TEST %EAX,%EAX |
(86) 0x40b037 MOV %RCX,-0x78(%RBP) |
(86) 0x40b03b JLE 40b1a0 |
(86) 0x40b041 SAL $0x6,%ECX |
(86) 0x40b044 ADD %ECX,%EAX |
(86) 0x40b046 LEA 0x1(%RDI),%ECX |
(86) 0x40b049 CMP %ECX,%EAX |
(86) 0x40b04b CMOVLE %ECX,%EAX |
(86) 0x40b04e MOV %EDI,%R9D |
(86) 0x40b051 NOT %R9D |
(86) 0x40b054 ADD %EAX,%R9D |
(86) 0x40b057 XOR %R10D,%R10D |
(86) 0x40b05a MOV %RDX,-0x80(%RBP) |
(86) 0x40b05e JMP 40b06d |
(87) 0x40b060 INC %R10 |
(87) 0x40b063 CMP $0x1b,%R10 |
(87) 0x40b067 MOV -0x80(%RBP),%RDX |
(87) 0x40b06b JE 40b010 |
(87) 0x40b06d MOV (%RDX,%R10,4),%EAX |
(87) 0x40b071 TEST %EAX,%EAX |
(87) 0x40b073 JS 40b25d |
(87) 0x40b079 MOV -0x60(%RBP),%RCX |
(87) 0x40b07d MOV (%RCX,%RAX,4),%ECX |
(87) 0x40b080 TEST %ECX,%ECX |
(87) 0x40b082 JLE 40b060 |
(87) 0x40b084 SAL $0x6,%EAX |
(87) 0x40b087 ADD %EAX,%ECX |
(87) 0x40b089 MOV -0x58(%RBP),%RDX |
(87) 0x40b08d MOV 0x20(%RDX),%R11 |
(87) 0x40b091 MOV 0x18(%R11),%R14 |
(87) 0x40b095 CLTQ |
(87) 0x40b097 MOVSXD %ECX,%RCX |
(87) 0x40b09a LEA 0x1(%RAX),%RDX |
(87) 0x40b09e CMP %RDX,%RCX |
(87) 0x40b0a1 CMOVG %RCX,%RDX |
(87) 0x40b0a5 SUB %RAX,%RDX |
(87) 0x40b0a8 LEA (%RAX,%RAX,2),%RAX |
(87) 0x40b0ac LEA 0x10(%R14,%RAX,8),%R15 |
(87) 0x40b0b1 XOR %EBX,%EBX |
(87) 0x40b0b3 JMP 40b0cc |
0x40b0b5 NOPW %CS:(%RAX,%RAX,1) |
(88) 0x40b0c0 LEA 0x1(%RBX),%RAX |
(88) 0x40b0c4 CMP %R9,%RBX |
(88) 0x40b0c7 MOV %RAX,%RBX |
(88) 0x40b0ca JE 40b060 |
(88) 0x40b0cc LEA (%RBX,%RDI,1),%RSI |
(88) 0x40b0d0 LEA (%RSI,%RSI,2),%RCX |
(88) 0x40b0d4 LEA (%R14,%RCX,8),%RAX |
(88) 0x40b0d8 MOV %R15,%R13 |
(88) 0x40b0db MOV %RDX,%R12 |
(88) 0x40b0de JMP 40b0e9 |
(89) 0x40b0e0 ADD $0x18,%R13 |
(89) 0x40b0e4 DEC %R12 |
(89) 0x40b0e7 JE 40b0c0 |
(89) 0x40b0e9 VMOVUPD (%RAX),%XMM11 |
(89) 0x40b0ed VSUBPD -0x10(%R13),%XMM11,%XMM11 |
(89) 0x40b0f3 VMULPD %XMM11,%XMM11,%XMM12 |
(89) 0x40b0f8 VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 |
(89) 0x40b0fe VADDSD %XMM12,%XMM13,%XMM13 |
(89) 0x40b103 VMOVSD 0x10(%RAX),%XMM12 |
(89) 0x40b108 VSUBSD (%R13),%XMM12,%XMM12 |
(89) 0x40b10e VFMADD231SD %XMM12,%XMM12,%XMM13 |
(89) 0x40b113 VUCOMISD %XMM2,%XMM13 |
(89) 0x40b117 JA 40b0e0 |
(89) 0x40b119 VUCOMISD %XMM4,%XMM13 |
(89) 0x40b11d JBE 40b0e0 |
(89) 0x40b11f VDIVSD %XMM13,%XMM6,%XMM13 |
(89) 0x40b124 VMULSD %XMM13,%XMM13,%XMM14 |
(89) 0x40b129 VMULSD %XMM1,%XMM13,%XMM15 |
(89) 0x40b12d VMULSD %XMM15,%XMM14,%XMM14 |
(89) 0x40b132 VADDSD %XMM7,%XMM14,%XMM15 |
(89) 0x40b136 VFNMADD213SD %XMM0,%XMM14,%XMM15 |
(89) 0x40b13b VMULSD %XMM8,%XMM15,%XMM15 |
(89) 0x40b140 MOV 0x30(%R11),%R8 |
(89) 0x40b144 VADDSD (%R8,%RSI,8),%XMM15,%XMM16 |
(89) 0x40b14b VMOVSD %XMM16,(%R8,%RSI,8) |
(89) 0x40b152 VMOVAPD %XMM9,%XMM16 |
(89) 0x40b158 VFMADD213SD %XMM10,%XMM14,%XMM16 |
(89) 0x40b15e VMULSD %XMM3,%XMM13,%XMM13 |
(89) 0x40b162 VMULSD %XMM14,%XMM16,%XMM14 |
(89) 0x40b168 VMULSD %XMM13,%XMM14,%XMM13 |
(89) 0x40b16d MOV 0x28(%R11),%R8 |
(89) 0x40b171 VMOVDDUP %XMM13,%XMM14 |
(89) 0x40b176 VFMADD213PD (%R8,%RCX,8),%XMM14,%XMM11 |
(89) 0x40b17c VMOVUPD %XMM11,(%R8,%RCX,8) |
(89) 0x40b182 VFMADD213SD 0x10(%R8,%RCX,8),%XMM13,%XMM12 |
(89) 0x40b189 VMOVSD %XMM12,0x10(%R8,%RCX,8) |
(89) 0x40b190 VADDSD %XMM5,%XMM15,%XMM5 |
(89) 0x40b194 JMP 40b0e0 |
0x40b199 NOPL (%RAX) |
(86) 0x40b1a0 CMPL $0,(%RDX) |
(86) 0x40b1a3 JS 40b25d |
(86) 0x40b1a9 CMPL $0,0x4(%RDX) |
(86) 0x40b1ad JS 40b25d |
(86) 0x40b1b3 CMPL $0,0x8(%RDX) |
(86) 0x40b1b7 JS 40b25d |
(86) 0x40b1bd CMPL $0,0xc(%RDX) |
(86) 0x40b1c1 JS 40b25d |
(86) 0x40b1c7 CMPL $0,0x10(%RDX) |
(86) 0x40b1cb JS 40b25d |
(86) 0x40b1d1 CMPL $0,0x14(%RDX) |
(86) 0x40b1d5 JS 40b25d |
(86) 0x40b1db CMPL $0,0x18(%RDX) |
(86) 0x40b1df JS 40b25d |
(86) 0x40b1e1 CMPL $0,0x1c(%RDX) |
(86) 0x40b1e5 JS 40b25d |
(86) 0x40b1e7 CMPL $0,0x20(%RDX) |
(86) 0x40b1eb JS 40b25d |
(86) 0x40b1ed CMPL $0,0x24(%RDX) |
(86) 0x40b1f1 JS 40b25d |
(86) 0x40b1f3 CMPL $0,0x28(%RDX) |
(86) 0x40b1f7 JS 40b25d |
(86) 0x40b1f9 CMPL $0,0x2c(%RDX) |
(86) 0x40b1fd JS 40b25d |
(86) 0x40b1ff CMPL $0,0x30(%RDX) |
(86) 0x40b203 JS 40b25d |
(86) 0x40b205 CMPL $0,0x34(%RDX) |
(86) 0x40b209 JS 40b25d |
(86) 0x40b20b CMPL $0,0x38(%RDX) |
(86) 0x40b20f JS 40b25d |
(86) 0x40b211 CMPL $0,0x3c(%RDX) |
(86) 0x40b215 JS 40b25d |
(86) 0x40b217 CMPL $0,0x40(%RDX) |
(86) 0x40b21b JS 40b25d |
(86) 0x40b21d CMPL $0,0x44(%RDX) |
(86) 0x40b221 JS 40b25d |
(86) 0x40b223 CMPL $0,0x48(%RDX) |
(86) 0x40b227 JS 40b25d |
(86) 0x40b229 CMPL $0,0x4c(%RDX) |
(86) 0x40b22d JS 40b25d |
(86) 0x40b22f CMPL $0,0x50(%RDX) |
(86) 0x40b233 JS 40b25d |
(86) 0x40b235 CMPL $0,0x54(%RDX) |
(86) 0x40b239 JS 40b25d |
(86) 0x40b23b CMPL $0,0x58(%RDX) |
(86) 0x40b23f JS 40b25d |
(86) 0x40b241 CMPL $0,0x5c(%RDX) |
(86) 0x40b245 JS 40b25d |
(86) 0x40b247 CMPL $0,0x60(%RDX) |
(86) 0x40b24b JS 40b25d |
(86) 0x40b24d CMPL $0,0x64(%RDX) |
(86) 0x40b251 JS 40b25d |
(86) 0x40b253 CMPL $0,0x68(%RDX) |
(86) 0x40b257 JNS 40b010 |
0x40b25d MOV $0x423134,%EDI |
0x40b262 MOV $0x42313c,%ESI |
0x40b267 MOV $0x42319e,%ECX |
0x40b26c MOV $0xb6,%EDX |
0x40b271 CALL 402bd0 <__assert_fail@plt> |
0x40b276 VMOVSD -0x38(%RBP),%XMM0 |
0x40b27b MOV (%RBX),%ESI |
0x40b27d MOV $0x62c790,%EDI |
0x40b282 MOV %R15,%RDX |
0x40b285 CALL 402c70 <__kmpc_atomic_float8_add@plt> |
0x40b28a MOV (%RBX),%ESI |
0x40b28c MOV $0x62dc10,%RDX |
0x40b293 MOV $0x62c7f0,%EDI |
0x40b298 CALL 402eb0 <__kmpc_end_reduce@plt> |
0x40b29d ADD $0x58,%RSP |
0x40b2a1 POP %RBX |
0x40b2a2 POP %R12 |
0x40b2a4 POP %R13 |
0x40b2a6 POP %R14 |
0x40b2a8 POP %R15 |
0x40b2aa POP %RBP |
0x40b2ab RET |
0x40b2ac NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | ljForce.c:172-222 |
Module | exec |
nb instructions | 113 |
nb uops | 121 |
loop length | 469 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 14 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 20.17 cycles |
front end | 20.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.20 | 6.30 | 11.00 | 11.00 | 14.50 | 6.20 | 6.10 | 14.50 | 14.50 | 14.50 | 6.20 | 11.00 |
cycles | 6.20 | 6.30 | 11.00 | 11.00 | 14.50 | 6.20 | 6.10 | 14.50 | 14.50 | 14.50 | 6.20 | 11.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 19.36 |
Stall cycles | 0.00 |
Front-end | 20.17 |
Dispatch | 14.50 |
Overall L1 | 20.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 14% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
all | 8% |
load | 7% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 14% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 10% |
store | 10% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x58,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x40(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x44(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c750,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402d60 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40af9e <ljForce.extracted+0xfe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM5,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x62c770,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x3c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402c10 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x62dc10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x38(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c7b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x40ae90,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402e60 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 40b276 <ljForce.extracted+0x3d6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 40b29d <ljForce.extracted+0x3fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD -0x38(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%R15),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM0,(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x62dc10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x62c7d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 40b298 <ljForce.extracted+0x3f8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVSD 0x10(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ %R14,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R13,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R12,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMULSD 0x17efb(%RIP),%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV %ECX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INCQ -0x50(%RBP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0x164be(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x1763e(%RIP),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x17ede(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x17ede(%RIP),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x17ede(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40b024 <ljForce.extracted+0x184> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x423134,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x42313c,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x42319e,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xb6,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bd0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0x38(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x62c790,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402c70 <__kmpc_atomic_float8_add@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x62dc10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x62c7f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402eb0 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x58,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | ljForce.c:172-222 |
Module | exec |
nb instructions | 113 |
nb uops | 121 |
loop length | 469 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 11 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 14 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 20.17 cycles |
front end | 20.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.20 | 6.30 | 11.00 | 11.00 | 14.50 | 6.20 | 6.10 | 14.50 | 14.50 | 14.50 | 6.20 | 11.00 |
cycles | 6.20 | 6.30 | 11.00 | 11.00 | 14.50 | 6.20 | 6.10 | 14.50 | 14.50 | 14.50 | 6.20 | 11.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 19.36 |
Stall cycles | 0.00 |
Front-end | 20.17 |
Dispatch | 14.50 |
Overall L1 | 20.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 14% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
all | 8% |
load | 7% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 14% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 10% |
store | 10% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x58,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EAX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x40(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x44(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c750,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402d60 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40af9e <ljForce.extracted+0xfe> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x30(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM5,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x62c770,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x3c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 402c10 <__kmpc_for_static_fini@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x68(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x62dc10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x38(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x62c7b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x40ae90,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x8,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402e60 <__kmpc_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x10,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x2,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 40b276 <ljForce.extracted+0x3d6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 40b29d <ljForce.extracted+0x3fd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD -0x38(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%R15),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM0,(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x62dc10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x62c7d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 40b298 <ljForce.extracted+0x3f8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVSD 0x10(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ %R14,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R13,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VMOVQ %R12,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMULSD 0x17efb(%RIP),%XMM3,%XMM3 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV %ECX,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%EDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INCQ -0x50(%RBP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0x164be(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x1763e(%RIP),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x17ede(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x17ede(%RIP),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x17ede(%RIP),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40b024 <ljForce.extracted+0x184> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x423134,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x42313c,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x42319e,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0xb6,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402bd0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVSD -0x38(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x62c790,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 402c70 <__kmpc_atomic_float8_add@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV (%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x62dc10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x62c7f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 402eb0 <__kmpc_end_reduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x58,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼ljForce.extracted– | 50.96 | 10.82 |
▼Loop 86 - ljForce.c:172-222 - exec– | 0.01 | 0 |
▼Loop 87 - ljForce.c:178-216 - exec– | 0.13 | 0.03 |
▼Loop 88 - ljForce.c:187-216 - exec– | 0.33 | 0.07 |
○Loop 89 - ljForce.c:191-216 - exec | 50.49 | 10.67 |