Loop Id: 96 | Module: exec | Source: timestep.c:74-78 | Coverage: 3% |
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Loop Id: 96 | Module: exec | Source: timestep.c:74-78 | Coverage: 3% |
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0x40eab0 VMOVUPD 0x80(%R10,%R11,1),%YMM7 [1] |
0x40eaba VMOVUPD 0x20(%R10,%R11,1),%YMM10 [1] |
0x40eac1 VMOVUPD 0x80(%R9,%R11,1),%YMM8 [2] |
0x40eacb VMOVUPD 0x20(%R9,%R11,1),%YMM12 [2] |
0x40ead2 VMOVUPD 0x10(%R10,%R11,1),%XMM9 [1] |
0x40ead9 VMOVUPD 0x70(%R10,%R11,1),%XMM11 [1] |
0x40eae0 VBLENDPD $0x3,(%R10,%R11,1),%YMM10,%YMM15 [1] |
0x40eae7 VBLENDPD $0x3,0x60(%R10,%R11,1),%YMM7,%YMM3 [1] |
0x40eaef VBLENDPD $0x3,(%R9,%R11,1),%YMM12,%YMM2 [2] |
0x40eaf6 VMOVUPD 0x10(%R9,%R11,1),%XMM18 [2] |
0x40eafe VBLENDPD $0x3,0x60(%R9,%R11,1),%YMM8,%YMM14 [2] |
0x40eb06 VMOVUPD 0x20(%R10,%R11,1),%XMM13 [1] |
0x40eb0d VMOVUPD 0x80(%R10,%R11,1),%XMM4 [1] |
0x40eb17 VMOVUPD 0x20(%R9,%R11,1),%XMM5 [2] |
0x40eb1e VINSERTF128 $0x1,0x40(%R10,%R11,1),%YMM9,%YMM6 [1] |
0x40eb26 VBLENDPD $0xc,0x40(%R10,%R11,1),%YMM13,%YMM9 [1] |
0x40eb2e VBLENDPD $0xa,%YMM9,%YMM6,%YMM9 |
0x40eb34 VBLENDPD $0xa,%YMM6,%YMM15,%YMM13 |
0x40eb3a VSHUFPD $0x5,%YMM10,%YMM15,%YMM6 |
0x40eb40 VINSERTF128 $0x1,0xa0(%R10,%R11,1),%YMM11,%YMM11 [1] |
0x40eb4b VBLENDPD $0xc,0xa0(%R10,%R11,1),%YMM4,%YMM4 [1] |
0x40eb56 VBLENDPD $0xa,%YMM4,%YMM11,%YMM10 |
0x40eb5c VBLENDPD $0xa,%YMM11,%YMM3,%YMM15 |
0x40eb62 VSHUFPD $0x5,%YMM7,%YMM3,%YMM3 |
0x40eb67 VINSERTF32X4 $0x1,0x40(%R9,%R11,1),%YMM18,%YMM4 [2] |
0x40eb70 VBLENDPD $0xc,0x40(%R9,%R11,1),%YMM5,%YMM5 [2] |
0x40eb78 VMOVUPD 0x70(%R9,%R11,1),%XMM18 [2] |
0x40eb80 VBLENDPD $0xa,%YMM5,%YMM4,%YMM7 |
0x40eb86 VBLENDPD $0xa,%YMM4,%YMM2,%YMM11 |
0x40eb8c VSHUFPD $0x5,%YMM12,%YMM2,%YMM2 |
0x40eb92 VBROADCASTSD 0x50(%R10,%R11,1),%YMM4 [1] |
0x40eb99 VBLENDPD $0x8,%YMM4,%YMM6,%YMM4 |
0x40eb9f VBROADCASTSD 0xb0(%R10,%R11,1),%YMM5 [1] |
0x40eba9 VBLENDPD $0x8,%YMM5,%YMM3,%YMM3 |
0x40ebaf VBROADCASTSD 0x50(%R9,%R11,1),%YMM5 [2] |
0x40ebb6 VBLENDPD $0x8,%YMM5,%YMM2,%YMM12 |
0x40ebbc VBROADCASTSD 0xb0(%R9,%R11,1),%YMM2 [2] |
0x40ebc6 VSHUFPD $0x5,%YMM8,%YMM14,%YMM5 |
0x40ebcc VBLENDPD $0x8,%YMM2,%YMM5,%YMM2 |
0x40ebd2 VINSERTF32X4 $0x1,0xa0(%R9,%R11,1),%YMM18,%YMM5 [2] |
0x40ebdb VBLENDPD $0xa,%YMM5,%YMM14,%YMM8 |
0x40ebe1 VFMADD231PD %YMM15,%YMM1,%YMM8 |
0x40ebe6 VFMADD231PD %YMM13,%YMM1,%YMM11 |
0x40ebeb VFMADD231PD %YMM3,%YMM1,%YMM2 |
0x40ebf0 VFMADD231PD %YMM4,%YMM1,%YMM12 |
0x40ebf5 VMOVUPD 0x80(%R9,%R11,1),%XMM3 [2] |
0x40ebff VBLENDPD $0xc,0xa0(%R9,%R11,1),%YMM3,%YMM3 [2] |
0x40ec0a VBLENDPD $0xa,%YMM3,%YMM5,%YMM13 |
0x40ec10 VFMADD231PD %YMM10,%YMM1,%YMM13 |
0x40ec15 VFMADD231PD %YMM9,%YMM1,%YMM7 |
0x40ec1a VMOVAPD %YMM11,%YMM3 |
0x40ec1e VPERMT2PD %YMM12,%YMM16,%YMM3 |
0x40ec24 VMOVAPD %YMM2,%YMM4 |
0x40ec28 VPERMT2PD %YMM8,%YMM17,%YMM4 |
0x40ec2e VMOVAPD %YMM2,%YMM5 |
0x40ec32 VPERMT2PD %YMM8,%YMM19,%YMM5 |
0x40ec38 VPERMT2PD %YMM2,%YMM16,%YMM8 |
0x40ec3e VMOVAPD %YMM12,%YMM2 |
0x40ec42 VPERMT2PD %YMM11,%YMM17,%YMM2 |
0x40ec48 VPERMT2PD %YMM11,%YMM19,%YMM12 |
0x40ec4e VPERMT2PD %YMM13,%YMM20,%YMM8 |
0x40ec54 VBLENDPD $0x2,%YMM13,%YMM5,%YMM5 |
0x40ec5a VPERMT2PD %YMM4,%YMM21,%YMM13 |
0x40ec60 VBLENDPD $0x2,%YMM7,%YMM12,%YMM4 |
0x40ec66 VPERMT2PD %YMM7,%YMM20,%YMM3 |
0x40ec6c VPERMT2PD %YMM2,%YMM21,%YMM7 |
0x40ec72 VMOVUPD %YMM5,0x80(%R9,%R11,1) [2] |
0x40ec7c VMOVUPD %YMM4,0x20(%R9,%R11,1) [2] |
0x40ec83 VMOVUPD %YMM7,0x40(%R9,%R11,1) [2] |
0x40ec8a VMOVUPD %YMM13,0xa0(%R9,%R11,1) [2] |
0x40ec94 VMOVUPD %YMM8,0x60(%R9,%R11,1) [2] |
0x40ec9b VMOVUPD %YMM3,(%R9,%R11,1) [2] |
0x40eca1 ADD $0x8,%R13D |
0x40eca5 ADD $0xc0,%R11 |
0x40ecac CMP %R12D,%R13D |
0x40ecaf JLE 40eab0 |
/scratch_na/users/xoserete/qaas_runs/171-419-7821/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74 - 78 |
-------------------------------------------------------------------------------- |
74: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
75: { |
76: s->atoms->p[iOff][0] += dt*s->atoms->f[iOff][0]; |
77: s->atoms->p[iOff][1] += dt*s->atoms->f[iOff][1]; |
78: s->atoms->p[iOff][2] += dt*s->atoms->f[iOff][2]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.07 |
CQA speedup if fully vectorized | 2.09 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P0, P1, P5, |
Function | advanceVelocity.extracted |
Source | timestep.c:74-78 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 15.33 |
CQA cycles if no scalar integer | 15.33 |
CQA cycles if FP arith vectorized | 14.33 |
CQA cycles if fully vectorized | 7.33 |
Front-end cycles | 14.50 |
DIV/SQRT cycles | 15.33 |
P0 cycles | 15.33 |
P1 cycles | 9.33 |
P2 cycles | 9.33 |
P3 cycles | 3.00 |
P4 cycles | 15.33 |
P5 cycles | 1.60 |
P6 cycles | 3.00 |
P7 cycles | 3.00 |
P8 cycles | 3.00 |
P9 cycles | 1.40 |
P10 cycles | 9.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 15.69 |
Stall cycles (UFS) | 0.53 |
Nb insns | 76.00 |
Nb uops | 87.00 |
Nb loads | 28.00 |
Nb stores | 6.00 |
Nb stack references | 0.00 |
FLOP/cycle | 3.13 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 52.17 |
Bytes prefetched | 0.00 |
Bytes loaded | 608.00 |
Bytes stored | 192.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 1.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 94.44 |
Vectorization ratio load | 85.71 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 91.67 |
Vector-efficiency ratio all | 43.75 |
Vector-efficiency ratio load | 33.93 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 44.79 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.07 |
CQA speedup if fully vectorized | 2.09 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P0, P1, P5, |
Function | advanceVelocity.extracted |
Source | timestep.c:74-78 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 15.33 |
CQA cycles if no scalar integer | 15.33 |
CQA cycles if FP arith vectorized | 14.33 |
CQA cycles if fully vectorized | 7.33 |
Front-end cycles | 14.50 |
DIV/SQRT cycles | 15.33 |
P0 cycles | 15.33 |
P1 cycles | 9.33 |
P2 cycles | 9.33 |
P3 cycles | 3.00 |
P4 cycles | 15.33 |
P5 cycles | 1.60 |
P6 cycles | 3.00 |
P7 cycles | 3.00 |
P8 cycles | 3.00 |
P9 cycles | 1.40 |
P10 cycles | 9.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 15.69 |
Stall cycles (UFS) | 0.53 |
Nb insns | 76.00 |
Nb uops | 87.00 |
Nb loads | 28.00 |
Nb stores | 6.00 |
Nb stack references | 0.00 |
FLOP/cycle | 3.13 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 52.17 |
Bytes prefetched | 0.00 |
Bytes loaded | 608.00 |
Bytes stored | 192.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 1.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 94.44 |
Vectorization ratio load | 85.71 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 91.67 |
Vector-efficiency ratio all | 43.75 |
Vector-efficiency ratio load | 33.93 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 44.79 |
Path / |
Function | advanceVelocity.extracted |
Source file and lines | timestep.c:74-78 |
Module | exec |
nb instructions | 76 |
nb uops | 87 |
loop length | 517 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 21 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 14.50 cycles |
front end | 14.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.33 | 15.33 | 9.33 | 9.33 | 3.00 | 15.33 | 1.60 | 3.00 | 3.00 | 3.00 | 1.40 | 9.33 |
cycles | 15.33 | 15.33 | 9.33 | 9.33 | 3.00 | 15.33 | 1.60 | 3.00 | 3.00 | 3.00 | 1.40 | 9.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 15.69 |
Stall cycles | 0.53 |
RS full (events) | 1.49 |
Front-end | 14.50 |
Dispatch | 15.33 |
Data deps. | 1.00 |
Overall L1 | 15.33 |
all | 94% |
load | 85% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 91% |
all | 43% |
load | 33% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 44% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD 0x80(%R10,%R11,1),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x20(%R10,%R11,1),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x80(%R9,%R11,1),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x20(%R9,%R11,1),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x10(%R10,%R11,1),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x70(%R10,%R11,1),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0x3,(%R10,%R11,1),%YMM10,%YMM15 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0x3,0x60(%R10,%R11,1),%YMM7,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0x3,(%R9,%R11,1),%YMM12,%YMM2 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVUPD 0x10(%R9,%R11,1),%XMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0x3,0x60(%R9,%R11,1),%YMM8,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVUPD 0x20(%R10,%R11,1),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x80(%R10,%R11,1),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x20(%R9,%R11,1),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VINSERTF128 $0x1,0x40(%R10,%R11,1),%YMM9,%YMM6 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xc,0x40(%R10,%R11,1),%YMM13,%YMM9 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM9,%YMM6,%YMM9 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xa,%YMM6,%YMM15,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM10,%YMM15,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF128 $0x1,0xa0(%R10,%R11,1),%YMM11,%YMM11 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xc,0xa0(%R10,%R11,1),%YMM4,%YMM4 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM4,%YMM11,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xa,%YMM11,%YMM3,%YMM15 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM7,%YMM3,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF32X4 $0x1,0x40(%R9,%R11,1),%YMM18,%YMM4 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xc,0x40(%R9,%R11,1),%YMM5,%YMM5 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVUPD 0x70(%R9,%R11,1),%XMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0xa,%YMM5,%YMM4,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xa,%YMM4,%YMM2,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM12,%YMM2,%YMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD 0x50(%R10,%R11,1),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM4,%YMM6,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0xb0(%R10,%R11,1),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM5,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x50(%R9,%R11,1),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM5,%YMM2,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0xb0(%R9,%R11,1),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VSHUFPD $0x5,%YMM8,%YMM14,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBLENDPD $0x8,%YMM2,%YMM5,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VINSERTF32X4 $0x1,0xa0(%R9,%R11,1),%YMM18,%YMM5 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xa,%YMM5,%YMM14,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231PD %YMM15,%YMM1,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM13,%YMM1,%YMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM3,%YMM1,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM4,%YMM1,%YMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x80(%R9,%R11,1),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0xc,0xa0(%R9,%R11,1),%YMM3,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM3,%YMM5,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231PD %YMM10,%YMM1,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM9,%YMM1,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM11,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM12,%YMM16,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM2,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM8,%YMM17,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM2,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM8,%YMM19,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM2,%YMM16,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM12,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM11,%YMM17,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM11,%YMM19,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM13,%YMM20,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0x2,%YMM13,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPERMT2PD %YMM4,%YMM21,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0x2,%YMM7,%YMM12,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPERMT2PD %YMM7,%YMM20,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM2,%YMM21,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM5,0x80(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM4,0x20(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM7,0x40(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM13,0xa0(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM8,0x60(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM3,(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x8,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD $0xc0,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R12D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 40eab0 <advanceVelocity.extracted+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | advanceVelocity.extracted |
Source file and lines | timestep.c:74-78 |
Module | exec |
nb instructions | 76 |
nb uops | 87 |
loop length | 517 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 21 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 14.50 cycles |
front end | 14.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.33 | 15.33 | 9.33 | 9.33 | 3.00 | 15.33 | 1.60 | 3.00 | 3.00 | 3.00 | 1.40 | 9.33 |
cycles | 15.33 | 15.33 | 9.33 | 9.33 | 3.00 | 15.33 | 1.60 | 3.00 | 3.00 | 3.00 | 1.40 | 9.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 15.69 |
Stall cycles | 0.53 |
RS full (events) | 1.49 |
Front-end | 14.50 |
Dispatch | 15.33 |
Data deps. | 1.00 |
Overall L1 | 15.33 |
all | 94% |
load | 85% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 91% |
all | 43% |
load | 33% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 44% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD 0x80(%R10,%R11,1),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x20(%R10,%R11,1),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x80(%R9,%R11,1),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x20(%R9,%R11,1),%YMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x10(%R10,%R11,1),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x70(%R10,%R11,1),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0x3,(%R10,%R11,1),%YMM10,%YMM15 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0x3,0x60(%R10,%R11,1),%YMM7,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0x3,(%R9,%R11,1),%YMM12,%YMM2 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVUPD 0x10(%R9,%R11,1),%XMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0x3,0x60(%R9,%R11,1),%YMM8,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVUPD 0x20(%R10,%R11,1),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x80(%R10,%R11,1),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x20(%R9,%R11,1),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VINSERTF128 $0x1,0x40(%R10,%R11,1),%YMM9,%YMM6 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xc,0x40(%R10,%R11,1),%YMM13,%YMM9 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM9,%YMM6,%YMM9 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xa,%YMM6,%YMM15,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM10,%YMM15,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF128 $0x1,0xa0(%R10,%R11,1),%YMM11,%YMM11 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xc,0xa0(%R10,%R11,1),%YMM4,%YMM4 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM4,%YMM11,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xa,%YMM11,%YMM3,%YMM15 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM7,%YMM3,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VINSERTF32X4 $0x1,0x40(%R9,%R11,1),%YMM18,%YMM4 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xc,0x40(%R9,%R11,1),%YMM5,%YMM5 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VMOVUPD 0x70(%R9,%R11,1),%XMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0xa,%YMM5,%YMM4,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBLENDPD $0xa,%YMM4,%YMM2,%YMM11 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VSHUFPD $0x5,%YMM12,%YMM2,%YMM2 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD 0x50(%R10,%R11,1),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM4,%YMM6,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0xb0(%R10,%R11,1),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM5,%YMM3,%YMM3 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0x50(%R9,%R11,1),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0x8,%YMM5,%YMM2,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VBROADCASTSD 0xb0(%R9,%R11,1),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VSHUFPD $0x5,%YMM8,%YMM14,%YMM5 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VBLENDPD $0x8,%YMM2,%YMM5,%YMM2 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VINSERTF32X4 $0x1,0xa0(%R9,%R11,1),%YMM18,%YMM5 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBLENDPD $0xa,%YMM5,%YMM14,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231PD %YMM15,%YMM1,%YMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM13,%YMM1,%YMM11 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM3,%YMM1,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM4,%YMM1,%YMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVUPD 0x80(%R9,%R11,1),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBLENDPD $0xc,0xa0(%R9,%R11,1),%YMM3,%YMM3 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
VBLENDPD $0xa,%YMM3,%YMM5,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VFMADD231PD %YMM10,%YMM1,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VFMADD231PD %YMM9,%YMM1,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVAPD %YMM11,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM12,%YMM16,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM2,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM8,%YMM17,%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM2,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM8,%YMM19,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM2,%YMM16,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %YMM12,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VPERMT2PD %YMM11,%YMM17,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM11,%YMM19,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM13,%YMM20,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0x2,%YMM13,%YMM5,%YMM5 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPERMT2PD %YMM4,%YMM21,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBLENDPD $0x2,%YMM7,%YMM12,%YMM4 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VPERMT2PD %YMM7,%YMM20,%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %YMM2,%YMM21,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %YMM5,0x80(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM4,0x20(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM7,0x40(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM13,0xa0(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM8,0x60(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVUPD %YMM3,(%R9,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x8,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD $0xc0,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R12D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 40eab0 <advanceVelocity.extracted+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |