Function: updateLinkCells | Module: exec | Source: linkCells.c:288-385 [...] | Coverage: 0.02% |
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Function: updateLinkCells | Module: exec | Source: linkCells.c:288-385 [...] | Coverage: 0.02% |
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/scratch_na/users/xoserete/qaas_runs/171-419-7821/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 288 - 385 |
-------------------------------------------------------------------------------- |
288: { |
289: emptyHaloCells(boxes); |
290: |
291: for (int iBox=0; iBox<boxes->nLocalBoxes; ++iBox) |
292: { |
293: int iOff = iBox*MAXATOMS; |
294: int ii=0; |
295: while (ii < boxes->nAtoms[iBox]) |
296: { |
297: int jBox = getBoxFromCoord(boxes, atoms->r[iOff+ii]); |
298: if (jBox != iBox) |
299: moveAtom(boxes, atoms, ii, iBox, jBox); |
300: else |
301: ++ii; |
302: } |
303: } |
304: } |
[...] |
384: for (int ii=boxes->nLocalBoxes; ii<boxes->nTotalBoxes; ++ii) |
385: boxes->nAtoms[ii] = 0; |
0x40c090 PUSH %RBP |
0x40c091 MOV %RSP,%RBP |
0x40c094 PUSH %R15 |
0x40c096 PUSH %R14 |
0x40c098 MOV %RSI,%R14 |
0x40c09b PUSH %R13 |
0x40c09d PUSH %R12 |
0x40c09f MOV %RDI,%R12 |
0x40c0a2 PUSH %RBX |
0x40c0a3 SUB $0x18,%RSP |
0x40c0a7 MOVSXD 0xc(%RDI),%RAX |
0x40c0ab CMP 0x14(%RDI),%EAX |
0x40c0ae JGE 40c0ce |
0x40c0b0 MOV 0x78(%RDI),%RDX |
0x40c0b4 NOPL (%RAX) |
(84) 0x40c0b8 MOVL $0,(%RDX,%RAX,4) |
(84) 0x40c0bf INC %RAX |
(84) 0x40c0c2 CMP %EAX,0x14(%R12) |
(84) 0x40c0c7 JG 40c0b8 |
0x40c0c9 MOV 0xc(%R12),%EAX |
0x40c0ce TEST %EAX,%EAX |
0x40c0d0 JLE 40c15d |
0x40c0d6 MOV 0x78(%R12),%R9 |
0x40c0db XOR %R13D,%R13D |
0x40c0de XCHG %AX,%AX |
(82) 0x40c0e0 MOV %R13D,%ECX |
(82) 0x40c0e3 MOV (%R9,%R13,4),%ESI |
(82) 0x40c0e7 MOV %R13D,-0x38(%RBP) |
(82) 0x40c0eb LEA (,%R13,4),%R15 |
(82) 0x40c0f3 SAL $0x6,%ECX |
(82) 0x40c0f6 XOR %EBX,%EBX |
(82) 0x40c0f8 MOV %ECX,-0x34(%RBP) |
(82) 0x40c0fb TEST %ESI,%ESI |
(82) 0x40c0fd JG 40c126 |
(82) 0x40c0ff JMP 40c153 |
0x40c101 NOPL (%RAX) |
(83) 0x40c108 MOV -0x38(%RBP),%ECX |
(83) 0x40c10b MOV %EAX,%R8D |
(83) 0x40c10e MOV %EBX,%EDX |
(83) 0x40c110 MOV %R14,%RSI |
(83) 0x40c113 MOV %R12,%RDI |
(83) 0x40c116 CALL 40bfd0 <moveAtom> |
(83) 0x40c11b MOV 0x78(%R12),%R9 |
(83) 0x40c120 CMP %EBX,(%R9,%R15,1) |
(83) 0x40c124 JLE 40c153 |
(83) 0x40c126 MOV -0x34(%RBP),%EAX |
(83) 0x40c129 MOV 0x18(%R14),%R8 |
(83) 0x40c12d ADD %EBX,%EAX |
(83) 0x40c12f CLTQ |
(83) 0x40c131 LEA (%RAX,%RAX,2),%RDI |
(83) 0x40c135 LEA (%R8,%RDI,8),%RSI |
(83) 0x40c139 MOV %R12,%RDI |
(83) 0x40c13c CALL 40bd20 <getBoxFromCoord> |
(83) 0x40c141 CMP %R13D,%EAX |
(83) 0x40c144 JNE 40c108 |
(83) 0x40c146 MOV 0x78(%R12),%R9 |
(83) 0x40c14b INC %EBX |
(83) 0x40c14d CMP %EBX,(%R9,%R15,1) |
(83) 0x40c151 JG 40c126 |
(82) 0x40c153 INC %R13 |
(82) 0x40c156 CMP %R13D,0xc(%R12) |
(82) 0x40c15b JG 40c0e0 |
0x40c15d ADD $0x18,%RSP |
0x40c161 POP %RBX |
0x40c162 POP %R12 |
0x40c164 POP %R13 |
0x40c166 POP %R14 |
0x40c168 POP %R15 |
0x40c16a POP %RBP |
0x40c16b RET |
0x40c16c NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | redistributeAtoms | performanceTimers.c:92 | exec |
○ | timestep | timestep.c:47 | exec |
○ | main | CoMD.c:125 | exec |
○ | __libc_start_main | libc-2.28.so |
Path / |
Source file and lines | linkCells.c:288-385 |
Module | exec |
nb instructions | 31 |
nb uops | 31 |
loop length | 89 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 5.17 cycles |
front end | 5.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 0.80 | 4.00 | 4.00 | 3.00 | 0.60 | 1.50 | 3.00 | 3.00 | 3.00 | 0.60 | 4.00 |
cycles | 1.50 | 0.80 | 4.00 | 4.00 | 3.00 | 0.60 | 1.50 | 3.00 | 3.00 | 3.00 | 0.60 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.27-5.28 |
Stall cycles | 0.00 |
Front-end | 5.17 |
Dispatch | 4.00 |
Overall L1 | 5.17 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 9% |
load | 10% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD 0xc(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x14(%RDI),%EAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 40c0ce <updateLinkCells+0x3e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc(%R12),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40c15d <updateLinkCells+0xcd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | linkCells.c:288-385 |
Module | exec |
nb instructions | 31 |
nb uops | 31 |
loop length | 89 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 5.17 cycles |
front end | 5.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 0.80 | 4.00 | 4.00 | 3.00 | 0.60 | 1.50 | 3.00 | 3.00 | 3.00 | 0.60 | 4.00 |
cycles | 1.50 | 0.80 | 4.00 | 4.00 | 3.00 | 0.60 | 1.50 | 3.00 | 3.00 | 3.00 | 0.60 | 4.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.27-5.28 |
Stall cycles | 0.00 |
Front-end | 5.17 |
Dispatch | 4.00 |
Overall L1 | 5.17 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 9% |
load | 10% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVSXD 0xc(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP 0x14(%RDI),%EAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 40c0ce <updateLinkCells+0x3e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%RDI),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc(%R12),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40c15d <updateLinkCells+0xcd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x78(%R12),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼updateLinkCells– | 0.02 | 0 |
▼Loop 82 - linkCells.c:291-301 - exec– | 0 | 0.01 |
○Loop 83 - linkCells.c:295-301 - exec | 0.02 | 0.12 |
○Loop 84 - linkCells.c:384-385 - exec | 0 | 0 |