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- r0: 8x1
- r1: 8x12
- r2: 8x16
- r3: 8x20
- r4: 8x24
- r5: 8x28
- r6: 8x32
Metric | r0 | r1 | r2 | r3 | r4 | r5 | r6 |
---|
Total Time (s) | 498.49 | 50.28 | 39.46 | 35.74 | 31.66 | 29.59 | 28.02 |
Max (Thread Active Time) (s) | 498.50 | 49.54 | 38.76 | 34.94 | 30.88 | 28.73 | 27.14 |
Average Active Time (s) | 498.22 | 49.44 | 38.67 | 34.83 | 30.76 | 28.62 | 27.05 |
Activity Ratio (%) | 99.9 | 99.4 | 99.4 | 99.1 | 99.0 | 98.7 | 98.6 |
Average number of active threads | 7.996 | 94.403 | 125.412 | 155.957 | 186.548 | 216.698 | 247.117 |
Affinity Stability (%) | 99.9 | 99.9 | 99.9 | 99.9 | 99.9 | 99.8 | 99.8 |
Time in analyzed loops (%) | 96.1 | 83.8 | 82.0 | 74.5 | 74.1 | 72.2 | 69.6 |
Time in analyzed innermost loops (%) | 92.9 | 80.8 | 79.2 | 71.8 | 71.4 | 69.5 | 67.2 |
Time in user code (%) | 96.5 | 84.1 | 82.3 | 74.8 | 74.4 | 72.4 | 69.8 |
Compilation Options Score (%) | 66.7 | 66.7 | 66.7 | 66.7 | 66.7 | 66.7 | 66.7 |
Array Access Efficiency (%) | 92.8 | 92.9 | 92.9 | 92.9 | 92.9 | 92.9 | 92.9 |
|
Potential Speedups |
Perfect Flow Complexity | 4.43 | 2.92 | 2.76 | 2.34 | 2.30 | 2.21 | 2.10 |
Perfect OpenMP + MPI + Pthread | 1.00 | 1.08 | 1.03 | 1.09 | 1.07 | 1.12 | 1.17 |
Perfect OpenMP + MPI + Pthread + Perfect Load Distribution | 1.03 | 1.17 | 1.20 | 1.31 | 1.32 | 1.35 | 1.40 |
Scalability - Gap | 1.00 | 1.21 | 1.27 | 1.43 | 1.52 | 1.66 | 1.80 |
No Scalar Integer | Potential Speedup | 1.01 | 1.01 | 1.01 | 1.00 | 1.00 | 1.00 | 1.00 |
Nb Loops to get 80% | 2 | 2 | 2 | 2 | 2 | 3 | 2 |
FP Vectorised | Potential Speedup | 2.12 | 1.81 | 1.77 | 1.64 | 1.63 | 1.59 | 1.55 |
Nb Loops to get 80% | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Fully Vectorised | Potential Speedup | 4.90 | 3.19 | 3.02 | 2.53 | 2.49 | 2.39 | 2.26 |
Nb Loops to get 80% | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Only FP Arithmetic | Potential Speedup | 1.10 | 1.10 | 1.10 | 1.10 | 1.10 | 1.11 | 1.11 |
Nb Loops to get 80% | 5 | 6 | 6 | 6 | 6 | 6 | 6 |
Source Object | Issue |
▼exec– | |
▼haloExchange.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼ljForce.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼timestep.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼random.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼linkCells.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
Source Object | Issue |
▼exec– | |
▼haloExchange.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼ljForce.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼timestep.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼random.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼linkCells.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
Source Object | Issue |
▼exec– | |
▼haloExchange.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼ljForce.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼timestep.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼random.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼linkCells.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
Source Object | Issue |
▼exec– | |
▼haloExchange.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼ljForce.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼timestep.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼random.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼linkCells.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
Source Object | Issue |
▼exec– | |
▼haloExchange.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼ljForce.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼timestep.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼random.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼linkCells.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
Source Object | Issue |
▼exec– | |
▼haloExchange.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼ljForce.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼timestep.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼random.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼linkCells.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
Source Object | Issue |
▼exec– | |
▼haloExchange.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼ljForce.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼timestep.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼random.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
▼linkCells.c– | |
○ | -xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2 |
| r0 | r1 | r2 | r3 | r4 | r5 | r6 |
Application | /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/run/base_runs/defaults/icx/exec | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Timestamp | 2025-02-25 00:13:21 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Experiment Type | MPI; | MPI; OpenMP; | same as r1 | same as r1 | same as r1 | same as r1 | same as r1 |
Machine | gmz10.benchmarkcenter.megware.com | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Architecture | x86_64 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Micro Architecture | ZEN_V5 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Model Name | AMD EPYC 9745 128-Core Processor | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Cache Size | 1024 KB | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Number of Cores | 128 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Maximal Frequency | 3.707812 GHz | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
OS Version | Linux 5.14.0-503.19.1.el9_5.x86_64 #1 SMP PREEMPT_DYNAMIC Tue Jan 7 17:08:27 EST 2025 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Architecture used during static analysis | x86_64 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Micro Architecture used during static analysis | ZEN_V5 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Compilation Options |
exec: clang based Intel(R) oneAPI DPC++/C++ Compiler 2024.0.0 (2024.0.0.20231017) /cluster/intel/oneapi/2024.0.0/compiler/2024.0/bin/compiler/clang --intel -I /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp -I /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/icx -I /cluster/intel/oneapi/2024.0.0/mpi/2021.11/include -O3 -march=native -D DO_MPI -g -fno-omit-frame-pointer -fcf-protection=none -nopie -grecord-command-line -fiopenmp -MD -MT CMakeFiles/CoMD-openmp-mpi.dir/CoMD/src-openmp/ljForce.c.o -MF CMakeFiles/CoMD-openmp-mpi.dir/CoMD/src-openmp/ljForce.c.o.d -o CMakeFiles/CoMD-openmp-mpi.dir/CoMD/src-openmp/ljForce.c.o -c /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c -fveclib=SVML -fheinous-gnu-extensions --intel -I /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp -I /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/icx -I /cluster/intel/oneapi/2024.0.0/mpi/2021.11/include -O3 -march=native -D DO_MPI -g -fno-omit-frame-pointer -fcf-protection=none -nopie -grecord-command-line -fiopenmp -MD -MT CMakeFiles/CoMD-openmp-mpi.dir/CoMD/src-openmp/ljForce.c.o -MF CMakeFiles/CoMD-openmp-mpi.dir/CoMD/src-openmp/ljForce.c.o.d -o CMakeFiles/CoMD-openmp-mpi.dir/CoMD/src-openmp/ljForce.c.o -c /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c -fveclib=SVML -fheinous-gnu-extensions | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Number of processes observed | 8 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Number of threads observed | 8 | 96 | 128 | 160 | 192 | 224 | 256 |
Frequency Driver | acpi-cpufreq | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Frequency Governor | performance | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Huge Pages | always | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Hyperthreading | on | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Number of sockets | 2 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Number of cores per socket | 128 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
MAQAO version | 2.21.1 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
MAQAO build | 8271f65b618decdd516f3bd4a943e5566ffabed6::20250211-191351 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |
Comments | OV scalability run using icx | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 | same as r0 |