Loop Id: 4 | Module: exec | Source: Step10_orig.c:19-31 | Coverage: 96.47% |
---|
Loop Id: 4 | Module: exec | Source: Step10_orig.c:19-31 | Coverage: 96.47% |
---|
0x40130c LD1W {Z3.S}, P1/Z, [X2, X8,LSL #2] [1] |
0x401310 LD1W {Z4.S}, P1/Z, [X1, X8,LSL #2] [4] |
0x401314 LD1W {Z2.S}, P1/Z, [X3, X8,LSL #2] [2] |
0x401318 FSUB Z3.S, Z3.S, Z20.S |
0x40131c FSUB Z4.S, Z4.S, Z21.S |
0x401320 FMUL Z29.S, Z3.S, Z3.S |
0x401324 FSUB Z2.S, Z2.S, Z19.S |
0x401328 FMLA Z29.S, P0/M, Z4.S, Z4.S |
0x40132c FMLA Z29.S, P0/M, Z2.S, Z2.S |
0x401330 FADD Z0.S, Z29.S, Z17.S |
0x401334 ZIP2 Z1.S, Z0.S, Z0.S |
0x401338 ZIP1 Z0.S, Z0.S, Z0.S |
0x40133c FCVT Z1.D, P0/M, Z1.S |
0x401340 FCVT Z0.D, P0/M, Z0.S |
0x401344 MOVPRFX Z9, Z1 |
0x401348 FSQRT Z9.D, P0/M, Z1.D |
0x40134c MOVPRFX Z8, Z0 |
0x401350 FSQRT Z8.D, P0/M, Z0.D |
0x401354 FMUL Z1.D, Z1.D, Z9.D |
0x401358 FDIVR Z1.D, P0/M, Z1.D, Z16.D |
0x40135c FCMGT P2.S, P0/Z, Z29.S, #0 |
0x401360 FCMGT P3.S, P1/Z, Z18.S, Z29.S |
0x401364 MOVPRFX Z30, Z27 |
0x401368 FMLA Z30.S, P0/M, Z29.S, Z28.S |
0x40136c FMUL Z0.D, Z0.D, Z8.D |
0x401370 FMAD Z30.S, P0/M, Z29.S, Z26.S |
0x401374 LD1W {Z8.S}, P3/Z, [X4, X8,LSL #2] [3] |
0x401378 FMAD Z30.S, P0/M, Z29.S, Z25.S |
0x40137c ADD X8, X8, X9 |
0x401380 FMAD Z30.S, P0/M, Z29.S, Z24.S |
0x401384 FDIVR Z0.D, P0/M, Z0.D, Z16.D |
0x401388 FMAD Z30.S, P0/M, Z29.S, Z23.S |
0x40138c SEL Z29.S, P3, Z8.S, Z22.S |
0x401390 ZIP2 Z31.S, Z30.S, Z30.S |
0x401394 ZIP1 Z30.S, Z30.S, Z30.S |
0x401398 FCVT Z31.D, P0/M, Z31.S |
0x40139c FCVT Z30.D, P0/M, Z30.S |
0x4013a0 FADD Z31.D, Z1.D, Z31.D |
0x4013a4 FADD Z30.D, Z0.D, Z30.D |
0x4013a8 FCVT Z31.S, P0/M, Z31.D |
0x4013ac FCVT Z30.S, P0/M, Z30.D |
0x4013b0 UZP1 Z9.S, Z31.S, Z30.S |
0x4013b4 FMUL Z1.S, Z9.S, Z29.S |
0x4013b8 MOVPRFX Z4.S, P2/Z, Z4.S |
0x4013bc FMUL Z4.S, P2/M, Z4.S, Z1.S |
0x4013c0 MOVPRFX Z3.S, P2/Z, Z3.S |
0x4013c4 FMUL Z3.S, P2/M, Z3.S, Z1.S |
0x4013c8 FADD Z7.S, P1/M, Z7.S, Z4.S |
0x4013cc FADD Z6.S, P1/M, Z6.S, Z3.S |
0x4013d0 MOVPRFX Z2.S, P2/Z, Z2.S |
0x4013d4 FMUL Z2.S, P2/M, Z2.S, Z1.S |
0x4013d8 FADD Z5.S, P1/M, Z5.S, Z2.S |
0x4013dc WHILELO P1.S, W8, W0 |
0x4013e0 B.NE 40130c |
/home/hbollore/qaas-runs/170-256-3563/intel/HACCmk/build/HACCmk/src/Step10_orig.c: 19 - 31 |
-------------------------------------------------------------------------------- |
19: for ( j = 0; j < count1; j++ ) |
20: { |
21: dxc = xx1[j] - xxi; |
22: dyc = yy1[j] - yyi; |
23: dzc = zz1[j] - zzi; |
24: |
25: r2 = dxc * dxc + dyc * dyc + dzc * dzc; |
26: |
27: m = ( r2 < fsrrmax2 ) ? mass1[j] : 0.0f; |
28: |
29: f = pow( r2 + mp_rsm2, -1.5 ) - ( ma0 + r2*(ma1 + r2*(ma2 + r2*(ma3 + r2*(ma4 + r2*ma5))))); |
30: |
31: f = ( r2 > 0.0f ) ? m * f : 0.0f; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►98.43+ | __kmp_GOMP_microtask_wrapper(i[...] | libomp.so | |
○ | __kmp_invoke_microtask | libomp.so | |
►1.57+ | GOMP_parallel | libomp.so | |
○ | main | main.c:152 | exec |
○ | __libc_start_main | libc-2.31.so | |
○ | _start | main.c:192 | exec |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.04 |
Bottlenecks | P6, P7, |
Function | Step10_orig |
Source | Step10_orig.c:19-31 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 23.50 |
CQA cycles if no scalar integer | 23.50 |
CQA cycles if FP arith vectorized | 23.50 |
CQA cycles if fully vectorized | 23.50 |
Front-end cycles | 6.75 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.50 |
P2 cycles | 0.25 |
P3 cycles | 1.00 |
P4 cycles | 0.25 |
P5 cycles | 23.50 |
P6 cycles | 23.50 |
P7 cycles | 11.50 |
P8 cycles | 11.50 |
P9 cycles | 2.00 |
P10 cycles | 2.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 4.00 - 2.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 54.00 |
Nb uops | 54.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 10.21 |
Nb FLOP add-sub | 64.00 |
Nb FLOP mul | 48.00 |
Nb FLOP fma | 56.00 |
Nb FLOP div | 8.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 8.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 5.45 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 94.12 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 85.00 |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 100.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.04 |
Bottlenecks | P6, P7, |
Function | Step10_orig |
Source | Step10_orig.c:19-31 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 23.50 |
CQA cycles if no scalar integer | 23.50 |
CQA cycles if FP arith vectorized | 23.50 |
CQA cycles if fully vectorized | 23.50 |
Front-end cycles | 6.75 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.50 |
P2 cycles | 0.25 |
P3 cycles | 1.00 |
P4 cycles | 0.25 |
P5 cycles | 23.50 |
P6 cycles | 23.50 |
P7 cycles | 11.50 |
P8 cycles | 11.50 |
P9 cycles | 2.00 |
P10 cycles | 2.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 0.00 |
P14 cycles | 4.00 - 2.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 54.00 |
Nb uops | 54.00 |
Nb loads | NA |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 10.21 |
Nb FLOP add-sub | 64.00 |
Nb FLOP mul | 48.00 |
Nb FLOP fma | 56.00 |
Nb FLOP div | 8.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 8.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 5.45 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 94.12 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 85.00 |
Vector-efficiency ratio all | 100.00 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 100.00 |
Path / |
Function | Step10_orig |
Source file and lines | Step10_orig.c:19-31 |
Module | exec |
nb instructions | 54 |
loop length | 216 |
nb stack references | 0 |
front end | 6.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 23.50 | 23.50 | 0.00 | 0.00 | 2.00 | 2.00 | 0.00 | 0.00 | 0.00 |
cycles | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 23.50 | 23.50 | 11.50 | 11.50 | 2.00 | 2.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 4.00-2.00 |
Longest recurrence chain latency (RecMII) | 2.00 |
Front-end | 6.75 |
Data deps. | 2.00 |
Overall L1 | 23.50 |
all | 81% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 75% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 94% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 85% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LD1W {Z3.S}, P1/Z, [X2, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1W {Z4.S}, P1/Z, [X1, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1W {Z2.S}, P1/Z, [X3, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FSUB Z3.S, Z3.S, Z20.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FSUB Z4.S, Z4.S, Z21.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z29.S, Z3.S, Z3.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FSUB Z2.S, Z2.S, Z19.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMLA Z29.S, P0/M, Z4.S, Z4.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FMLA Z29.S, P0/M, Z2.S, Z2.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FADD Z0.S, Z29.S, Z17.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP2 Z1.S, Z0.S, Z0.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP1 Z0.S, Z0.S, Z0.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FCVT Z1.D, P0/M, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FCVT Z0.D, P0/M, Z0.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVPRFX Z9, Z1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FSQRT Z9.D, P0/M, Z1.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-16 | 1-0.50 |
MOVPRFX Z8, Z0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FSQRT Z8.D, P0/M, Z0.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-16 | 1-0.50 |
FMUL Z1.D, Z1.D, Z9.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FDIVR Z1.D, P0/M, Z1.D, Z16.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
FCMGT P2.S, P0/Z, Z29.S, #0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
FCMGT P3.S, P1/Z, Z18.S, Z29.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVPRFX Z30, Z27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMLA Z30.S, P0/M, Z29.S, Z28.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FMUL Z0.D, Z0.D, Z8.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FMAD Z30.S, P0/M, Z29.S, Z26.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LD1W {Z8.S}, P3/Z, [X4, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMAD Z30.S, P0/M, Z29.S, Z25.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD X8, X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FMAD Z30.S, P0/M, Z29.S, Z24.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FDIVR Z0.D, P0/M, Z0.D, Z16.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
FMAD Z30.S, P0/M, Z29.S, Z23.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SEL Z29.S, P3, Z8.S, Z22.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP2 Z31.S, Z30.S, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP1 Z30.S, Z30.S, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FCVT Z31.D, P0/M, Z31.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FCVT Z30.D, P0/M, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FADD Z31.D, Z1.D, Z31.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FADD Z30.D, Z0.D, Z30.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FCVT Z31.S, P0/M, Z31.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FCVT Z30.S, P0/M, Z30.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
UZP1 Z9.S, Z31.S, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z1.S, Z9.S, Z29.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVPRFX Z4.S, P2/Z, Z4.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z4.S, P2/M, Z4.S, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVPRFX Z3.S, P2/Z, Z3.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z3.S, P2/M, Z3.S, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FADD Z7.S, P1/M, Z7.S, Z4.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FADD Z6.S, P1/M, Z6.S, Z3.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z2.S, P2/Z, Z2.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z2.S, P2/M, Z2.S, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FADD Z5.S, P1/M, Z5.S, Z2.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
WHILELO P1.S, W8, W0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 2 |
B.NE 40130c <Step10_orig+0x8c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
Function | Step10_orig |
Source file and lines | Step10_orig.c:19-31 |
Module | exec |
nb instructions | 54 |
loop length | 216 |
nb stack references | 0 |
front end | 6.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 23.50 | 23.50 | 0.00 | 0.00 | 2.00 | 2.00 | 0.00 | 0.00 | 0.00 |
cycles | 0.50 | 0.50 | 0.50 | 0.25 | 1.00 | 0.25 | 23.50 | 23.50 | 11.50 | 11.50 | 2.00 | 2.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 4.00-2.00 |
Longest recurrence chain latency (RecMII) | 2.00 |
Front-end | 6.75 |
Data deps. | 2.00 |
Overall L1 | 23.50 |
all | 81% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 75% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 94% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 85% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
LD1W {Z3.S}, P1/Z, [X2, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1W {Z4.S}, P1/Z, [X1, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
LD1W {Z2.S}, P1/Z, [X3, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FSUB Z3.S, Z3.S, Z20.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FSUB Z4.S, Z4.S, Z21.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z29.S, Z3.S, Z3.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FSUB Z2.S, Z2.S, Z19.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMLA Z29.S, P0/M, Z4.S, Z4.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FMLA Z29.S, P0/M, Z2.S, Z2.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FADD Z0.S, Z29.S, Z17.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP2 Z1.S, Z0.S, Z0.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP1 Z0.S, Z0.S, Z0.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FCVT Z1.D, P0/M, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FCVT Z0.D, P0/M, Z0.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOVPRFX Z9, Z1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FSQRT Z9.D, P0/M, Z1.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-16 | 1-0.50 |
MOVPRFX Z8, Z0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FSQRT Z8.D, P0/M, Z0.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-16 | 1-0.50 |
FMUL Z1.D, Z1.D, Z9.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FDIVR Z1.D, P0/M, Z1.D, Z16.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
FCMGT P2.S, P0/Z, Z29.S, #0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
FCMGT P3.S, P1/Z, Z18.S, Z29.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MOVPRFX Z30, Z27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMLA Z30.S, P0/M, Z29.S, Z28.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FMUL Z0.D, Z0.D, Z8.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FMAD Z30.S, P0/M, Z29.S, Z26.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LD1W {Z8.S}, P3/Z, [X4, X8,LSL #2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
FMAD Z30.S, P0/M, Z29.S, Z25.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD X8, X8, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
FMAD Z30.S, P0/M, Z29.S, Z24.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
FDIVR Z0.D, P0/M, Z0.D, Z16.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7-15 | 1-0.50 |
FMAD Z30.S, P0/M, Z29.S, Z23.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SEL Z29.S, P3, Z8.S, Z22.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP2 Z31.S, Z30.S, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
ZIP1 Z30.S, Z30.S, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FCVT Z31.D, P0/M, Z31.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FCVT Z30.D, P0/M, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FADD Z31.D, Z1.D, Z31.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FADD Z30.D, Z0.D, Z30.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FCVT Z31.S, P0/M, Z31.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
FCVT Z30.S, P0/M, Z30.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
UZP1 Z9.S, Z31.S, Z30.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z1.S, Z9.S, Z29.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVPRFX Z4.S, P2/Z, Z4.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z4.S, P2/M, Z4.S, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVPRFX Z3.S, P2/Z, Z3.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z3.S, P2/M, Z3.S, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FADD Z7.S, P1/M, Z7.S, Z4.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FADD Z6.S, P1/M, Z6.S, Z3.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
MOVPRFX Z2.S, P2/Z, Z2.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
FMUL Z2.S, P2/M, Z2.S, Z1.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
FADD Z5.S, P1/M, Z5.S, Z2.S | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 |
WHILELO P1.S, W8, W0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 2 |
B.NE 40130c <Step10_orig+0x8c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |