Loop Id: 4 | Module: exec | Source: Step10_orig.c:19-31 | Coverage: 99.42% |
---|
Loop Id: 4 | Module: exec | Source: Step10_orig.c:19-31 | Coverage: 99.42% |
---|
0x401a90 VMOVUPS (%RDX,%R11,1),%ZMM0 [1] |
0x401a97 VMOVUPS (%RSI,%R11,1),%ZMM6 [3] |
0x401a9e VMOVUPS (%RCX,%R11,1),%ZMM5 [2] |
0x401aa5 VSUBPS %ZMM25,%ZMM0,%ZMM8 |
0x401aab VSUBPS %ZMM26,%ZMM6,%ZMM9 |
0x401ab1 VSUBPS %ZMM24,%ZMM5,%ZMM30 |
0x401ab7 VMULPS %ZMM8,%ZMM8,%ZMM28 |
0x401abd VFMADD231PS %ZMM9,%ZMM9,%ZMM28 |
0x401ac3 VFMADD231PS %ZMM30,%ZMM30,%ZMM28 |
0x401ac9 VCMPPS $0xe,%ZMM15,%ZMM28,%K2 |
0x401ad0 VCMPPS $0x1,%ZMM23,%ZMM28,%K1 |
0x401ad7 VADDPS %ZMM22,%ZMM28,%ZMM0 |
0x401add VCVTPS2PD %YMM0,%ZMM6 |
0x401ae3 VEXTRACTF32X8 $0x1,%ZMM0,%YMM5 |
0x401aea VMOVAPS %ZMM28,%ZMM0 |
0x401af0 VSQRTPD %ZMM6,%ZMM29 |
0x401af6 VCVTPS2PD %YMM5,%ZMM5 |
0x401afc VMULPD %ZMM29,%ZMM6,%ZMM6 |
0x401b02 VFMADD132PS %ZMM21,%ZMM20,%ZMM0 |
0x401b08 VSQRTPD %ZMM5,%ZMM31 |
0x401b0e VMULPD %ZMM31,%ZMM5,%ZMM5 |
0x401b14 VMOVUPS (%R8,%R11,1),%ZMM13{%K1} [4] |
0x401b1b ADD $0x40,%R11 |
0x401b1f VMOVAPS %ZMM13,%ZMM27{%K1}{z} |
0x401b25 VFMADD132PS %ZMM28,%ZMM19,%ZMM0 |
0x401b2b VDIVPD %ZMM6,%ZMM14,%ZMM6 |
0x401b31 VDIVPD %ZMM5,%ZMM14,%ZMM5 |
0x401b37 VFMADD132PS %ZMM28,%ZMM18,%ZMM0 |
0x401b3d VFMADD132PS %ZMM28,%ZMM17,%ZMM0 |
0x401b43 VFMADD132PS %ZMM28,%ZMM16,%ZMM0 |
0x401b49 VCVTPS2PD %YMM0,%ZMM28 |
0x401b4f VEXTRACTF32X8 $0x1,%ZMM0,%YMM0 |
0x401b56 VADDPD %ZMM28,%ZMM6,%ZMM6 |
0x401b5c VCVTPS2PD %YMM0,%ZMM0 |
0x401b62 VADDPD %ZMM0,%ZMM5,%ZMM5 |
0x401b68 VCVTPD2PS %ZMM6,%YMM6 |
0x401b6e VCVTPD2PS %ZMM5,%YMM0 |
0x401b74 VINSERTF64X4 $0x1,%YMM0,%ZMM6,%ZMM5 |
0x401b7b VMULPS %ZMM27,%ZMM5,%ZMM6 |
0x401b81 VMULPS %ZMM6,%ZMM9,%ZMM0{%K2}{z} |
0x401b87 VMULPS %ZMM6,%ZMM8,%ZMM9{%K2}{z} |
0x401b8d VMULPS %ZMM6,%ZMM30,%ZMM8{%K2}{z} |
0x401b93 VADDPS %ZMM0,%ZMM10,%ZMM10 |
0x401b99 VADDPS %ZMM9,%ZMM11,%ZMM11 |
0x401b9f VADDPS %ZMM8,%ZMM12,%ZMM12 |
0x401ba5 CMP %R11,%RBX |
0x401ba8 JNE 401a90 |
/home/kcamus/qaas_runs/169-401-3406/intel/HACCmk/build/HACCmk/src/Step10_orig.c: 19 - 31 |
-------------------------------------------------------------------------------- |
19: for ( j = 0; j < count1; j++ ) |
20: { |
21: dxc = xx1[j] - xxi; |
22: dyc = yy1[j] - yyi; |
23: dzc = zz1[j] - zzi; |
24: |
25: r2 = dxc * dxc + dyc * dyc + dzc * dzc; |
26: |
27: m = ( r2 < fsrrmax2 ) ? mass1[j] : 0.0f; |
28: |
29: f = pow( r2 + mp_rsm2, -1.5 ) - ( ma0 + r2*(ma1 + r2*(ma2 + r2*(ma3 + r2*(ma4 + r2*ma5))))); |
30: |
31: f = ( r2 > 0.0f ) ? m * f : 0.0f; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►50.20+ | main._omp_fn.1 | main.c:144 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
►49.80+ | main._omp_fn.1 | main.c:144 | exec |
○ | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.62 - 3.08 |
Bottlenecks | P0, |
Function | Step10_orig |
Source | Step10_orig.c:19-31 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 68.00 - 80.00 |
CQA cycles if no scalar integer | 68.00 - 80.00 |
CQA cycles if FP arith vectorized | 68.00 - 80.00 |
CQA cycles if fully vectorized | 68.00 - 80.00 |
Front-end cycles | 15.00 |
DIV/SQRT cycles | 26.00 |
P0 cycles | 11.50 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.00 |
P4 cycles | 26.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 68.00 - 80.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 69.77 - 84.37 |
Stall cycles (UFS) | 54.31 - 68.91 |
Nb insns | 47.00 |
Nb uops | 60.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 7.06 - 6.00 |
Nb FLOP add-sub | 128.00 |
Nb FLOP mul | 96.00 |
Nb FLOP fma | 112.00 |
Nb FLOP div | 16.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 16.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 3.20 - 3.76 |
Bytes prefetched | 0.00 |
Bytes loaded | 256.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 4.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 100.00 |
Vector-efficiency ratio all | 92.05 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 73.08 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.62 - 3.08 |
Bottlenecks | P0, |
Function | Step10_orig |
Source | Step10_orig.c:19-31 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 68.00 - 80.00 |
CQA cycles if no scalar integer | 68.00 - 80.00 |
CQA cycles if FP arith vectorized | 68.00 - 80.00 |
CQA cycles if fully vectorized | 68.00 - 80.00 |
Front-end cycles | 15.00 |
DIV/SQRT cycles | 26.00 |
P0 cycles | 11.50 |
P1 cycles | 2.00 |
P2 cycles | 2.00 |
P3 cycles | 0.00 |
P4 cycles | 26.00 |
P5 cycles | 1.00 |
P6 cycles | 0.00 |
P7 cycles | 68.00 - 80.00 |
Inter-iter dependencies cycles | 4 |
FE+BE cycles (UFS) | 69.77 - 84.37 |
Stall cycles (UFS) | 54.31 - 68.91 |
Nb insns | 47.00 |
Nb uops | 60.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 7.06 - 6.00 |
Nb FLOP add-sub | 128.00 |
Nb FLOP mul | 96.00 |
Nb FLOP fma | 112.00 |
Nb FLOP div | 16.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 16.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 3.20 - 3.76 |
Bytes prefetched | 0.00 |
Bytes loaded | 256.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 4.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | 100.00 |
Vectorization ratio other | 100.00 |
Vector-efficiency ratio all | 92.05 |
Vector-efficiency ratio load | 100.00 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | 100.00 |
Vector-efficiency ratio other | 73.08 |
Path / |
Function | Step10_orig |
Source file and lines | Step10_orig.c:19-31 |
Module | exec |
nb instructions | 47 |
nb uops | 60 |
loop length | 286 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 3 |
used zmm registers | 27 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.29 |
micro-operation queue | 15.00 cycles |
front end | 15.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 26.00 | 1.00 | 2.00 | 2.00 | 0.00 | 26.00 | 1.00 | 0.00 |
cycles | 26.00 | 11.50 | 2.00 | 2.00 | 0.00 | 26.00 | 1.00 | 0.00 |
Cycles executing div or sqrt instructions | 68.00-80.00 |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 69.77-84.37 |
Stall cycles | 54.31-68.91 |
RS full (events) | 7.29-12.61 |
PRF_FLOAT full (events) | 56.06-66.55 |
Front-end | 15.00 |
Dispatch | 26.00 |
DIV/SQRT | 68.00-80.00 |
Data deps. | 4.00 |
Overall L1 | 68.00-80.00 |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 92% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 73% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPS (%RDX,%R11,1),%ZMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVUPS (%RSI,%R11,1),%ZMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVUPS (%RCX,%R11,1),%ZMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VSUBPS %ZMM25,%ZMM0,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VSUBPS %ZMM26,%ZMM6,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VSUBPS %ZMM24,%ZMM5,%ZMM30 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM8,%ZMM8,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD231PS %ZMM9,%ZMM9,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD231PS %ZMM30,%ZMM30,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCMPPS $0xe,%ZMM15,%ZMM28,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 4 | 1 |
VCMPPS $0x1,%ZMM23,%ZMM28,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 4 | 1 |
VADDPS %ZMM22,%ZMM28,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPS2PD %YMM0,%ZMM6 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VEXTRACTF32X8 $0x1,%ZMM0,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVAPS %ZMM28,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VSQRTPD %ZMM6,%ZMM29 | 3 | 2 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 24-33 | 18-24 |
VCVTPS2PD %YMM5,%ZMM5 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VMULPD %ZMM29,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD132PS %ZMM21,%ZMM20,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VSQRTPD %ZMM5,%ZMM31 | 3 | 2 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 24-33 | 18-24 |
VMULPD %ZMM31,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMOVUPS (%R8,%R11,1),%ZMM13{%K1} | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
ADD $0x40,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVAPS %ZMM13,%ZMM27{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD132PS %ZMM28,%ZMM19,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM6,%ZMM14,%ZMM6 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 24 | 16 |
VDIVPD %ZMM5,%ZMM14,%ZMM5 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 24 | 16 |
VFMADD132PS %ZMM28,%ZMM18,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD132PS %ZMM28,%ZMM17,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD132PS %ZMM28,%ZMM16,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPS2PD %YMM0,%ZMM28 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VEXTRACTF32X8 $0x1,%ZMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %ZMM28,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPS2PD %YMM0,%ZMM0 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VADDPD %ZMM0,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPD2PS %ZMM6,%YMM6 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VCVTPD2PS %ZMM5,%YMM0 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VINSERTF64X4 $0x1,%YMM0,%ZMM6,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMULPS %ZMM27,%ZMM5,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM6,%ZMM9,%ZMM0{%K2}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM6,%ZMM8,%ZMM9{%K2}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM6,%ZMM30,%ZMM8{%K2}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VADDPS %ZMM0,%ZMM10,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VADDPS %ZMM9,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VADDPS %ZMM8,%ZMM12,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
CMP %R11,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 401a90 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Function | Step10_orig |
Source file and lines | Step10_orig.c:19-31 |
Module | exec |
nb instructions | 47 |
nb uops | 60 |
loop length | 286 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 3 |
used zmm registers | 27 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 1.29 |
micro-operation queue | 15.00 cycles |
front end | 15.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 26.00 | 1.00 | 2.00 | 2.00 | 0.00 | 26.00 | 1.00 | 0.00 |
cycles | 26.00 | 11.50 | 2.00 | 2.00 | 0.00 | 26.00 | 1.00 | 0.00 |
Cycles executing div or sqrt instructions | 68.00-80.00 |
Longest recurrence chain latency (RecMII) | 4.00 |
FE+BE cycles | 69.77-84.37 |
Stall cycles | 54.31-68.91 |
RS full (events) | 7.29-12.61 |
PRF_FLOAT full (events) | 56.06-66.55 |
Front-end | 15.00 |
Dispatch | 26.00 |
DIV/SQRT | 68.00-80.00 |
Data deps. | 4.00 |
Overall L1 | 68.00-80.00 |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 100% |
all | 92% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | 100% |
fma | 100% |
div/sqrt | 100% |
other | 73% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPS (%RDX,%R11,1),%ZMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVUPS (%RSI,%R11,1),%ZMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VMOVUPS (%RCX,%R11,1),%ZMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
VSUBPS %ZMM25,%ZMM0,%ZMM8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VSUBPS %ZMM26,%ZMM6,%ZMM9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VSUBPS %ZMM24,%ZMM5,%ZMM30 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM8,%ZMM8,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD231PS %ZMM9,%ZMM9,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD231PS %ZMM30,%ZMM30,%ZMM28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCMPPS $0xe,%ZMM15,%ZMM28,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 4 | 1 |
VCMPPS $0x1,%ZMM23,%ZMM28,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 4 | 1 |
VADDPS %ZMM22,%ZMM28,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPS2PD %YMM0,%ZMM6 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VEXTRACTF32X8 $0x1,%ZMM0,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMOVAPS %ZMM28,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VSQRTPD %ZMM6,%ZMM29 | 3 | 2 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 24-33 | 18-24 |
VCVTPS2PD %YMM5,%ZMM5 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VMULPD %ZMM29,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD132PS %ZMM21,%ZMM20,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VSQRTPD %ZMM5,%ZMM31 | 3 | 2 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 24-33 | 18-24 |
VMULPD %ZMM31,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMOVUPS (%R8,%R11,1),%ZMM13{%K1} | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
ADD $0x40,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVAPS %ZMM13,%ZMM27{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VFMADD132PS %ZMM28,%ZMM19,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VDIVPD %ZMM6,%ZMM14,%ZMM6 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 24 | 16 |
VDIVPD %ZMM5,%ZMM14,%ZMM5 | 3 | 2.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 24 | 16 |
VFMADD132PS %ZMM28,%ZMM18,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD132PS %ZMM28,%ZMM17,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VFMADD132PS %ZMM28,%ZMM16,%ZMM0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPS2PD %YMM0,%ZMM28 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VEXTRACTF32X8 $0x1,%ZMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %ZMM28,%ZMM6,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPS2PD %YMM0,%ZMM0 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VADDPD %ZMM0,%ZMM5,%ZMM5 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VCVTPD2PS %ZMM6,%YMM6 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VCVTPD2PS %ZMM5,%YMM0 | 2 | 0.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 7 | 1 |
VINSERTF64X4 $0x1,%YMM0,%ZMM6,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VMULPS %ZMM27,%ZMM5,%ZMM6 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM6,%ZMM9,%ZMM0{%K2}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM6,%ZMM8,%ZMM9{%K2}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMULPS %ZMM6,%ZMM30,%ZMM8{%K2}{z} | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VADDPS %ZMM0,%ZMM10,%ZMM10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VADDPS %ZMM9,%ZMM11,%ZMM11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VADDPS %ZMM8,%ZMM12,%ZMM12 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
CMP %R11,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 401a90 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Metric | run_0 |
---|---|
Coverage (% app. time) | 99.42 |
Time (s) | 40.44 |
Instance Count | 2190000 |
Iteration Count - min | 25 |
Iteration Count - avg | 480.25 |
Iteration Count - max | 936 |
Cycles per Iteration - min | 77.09 |
Cycles per Iteration - avg | 81.11 |
Cycles per Iteration - max | 7258 |
Metric | Value |
---|---|
Bucket Coverage (% loop time) | 99.93 |
Instance Count | 2190000 |
ORIG CPI:min | 177.52 |
ORIG CPI:med | 178.24 |
ORIG CPI:max | 233.52 |
DL1 CPI:min | 107.76 |
DL1 CPI:med | 109.28 |
DL1 CPI:max | 185.44 |
ORIG (min) / DL1 (min) | 1.65 |
ORIG (med) / DL1 (med) | 1.63 |
ORIG (max) / DL1 (max) | 1.26 |
Nb Iteration:min | 25 |
Nb Iteration:med | 25.00 |
Nb Iteration:max | 25 |
ORIG: min (cycles) | 4438 |
ORIG: med (cycles) | 4456.00 |
ORIG: max (cycles) | 5838 |
DL1:min (cycles) | 2694 |
DL1:med (cycles) | 2732.00 |
DL1:max (cycles) | 4636 |
Metric (average per iteration except for Time and Iteration Count) | ORIG | DL1 | ||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Min (Thread) | Med (Thread) | Avg (Thread) | Max (Thread) | Min (Instances) | Med (Instances) | Max (Instances) | Min (Thread) | Med (Thread) | Avg (Thread) | Max (Thread) | Min (Instances) | Med (Instances) | Max (Instances) | |
Time | 4456.00 | 4456.00 | 4456.00 | 4456.00 | 4438.00 | 4456.00 | 5838.00 | 2732.00 | 2732.00 | 2732.00 | 2732.00 | 2694.00 | 2732.00 | 4636.00 |
CPI MIN | 177.52 | 107.76 | ||||||||||||
CPI MED | 178.24 | 178.24 | 178.24 | 178.24 | 177.52 | 178.24 | 233.52 | 109.28 | 109.28 | 109.28 | 109.28 | 107.76 | 109.28 | 185.44 |
CPI AVG | 180.07 | 114.31 | ||||||||||||
CPI MAX | 233.52 | 185.44 | ||||||||||||
Iteration Count | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 | 25.00 |
ORIG | DL1 | Original Code |
---|---|---|
0x6b516d ADDQ $0x1,-0x23f5(%RIP) 0x6b5175 VMOVUPS (%RDX,%R11,1),%ZMM0 | 0x6b55e0 VMOVUPS -0x32ea(%RIP),%ZMM0 | 0x401a90 VMOVUPS (%RDX,%R11,1),%ZMM0 |
0x6b517c VMOVUPS (%RSI,%R11,1),%ZMM6 | 0x6b55ea VMOVUPS -0x32f4(%RIP),%ZMM6 | 0x401a97 VMOVUPS (%RSI,%R11,1),%ZMM6 |
0x6b5183 VMOVUPS (%RCX,%R11,1),%ZMM5 | 0x6b55f4 VMOVUPS -0x32fe(%RIP),%ZMM5 | 0x401a9e VMOVUPS (%RCX,%R11,1),%ZMM5 |
0x6b518a VSUBPS %ZMM25,%ZMM0,%ZMM8 | 0x6b55fe VSUBPS %ZMM25,%ZMM0,%ZMM8 | 0x401aa5 VSUBPS %ZMM25,%ZMM0,%ZMM8 |
0x6b5190 VSUBPS %ZMM26,%ZMM6,%ZMM9 | 0x6b5604 VSUBPS %ZMM26,%ZMM6,%ZMM9 | 0x401aab VSUBPS %ZMM26,%ZMM6,%ZMM9 |
0x6b5196 VSUBPS %ZMM24,%ZMM5,%ZMM30 | 0x6b560a VSUBPS %ZMM24,%ZMM5,%ZMM30 | 0x401ab1 VSUBPS %ZMM24,%ZMM5,%ZMM30 |
0x6b519c VMULPS %ZMM8,%ZMM8,%ZMM28 | 0x6b5610 VMULPS %ZMM8,%ZMM8,%ZMM28 | 0x401ab7 VMULPS %ZMM8,%ZMM8,%ZMM28 |
0x6b51a2 VFMADD231PS %ZMM9,%ZMM9,%ZMM28 | 0x6b5616 VFMADD231PS %ZMM9,%ZMM9,%ZMM28 | 0x401abd VFMADD231PS %ZMM9,%ZMM9,%ZMM28 |
0x6b51a8 VFMADD231PS %ZMM30,%ZMM30,%ZMM28 | 0x6b561c VFMADD231PS %ZMM30,%ZMM30,%ZMM28 | 0x401ac3 VFMADD231PS %ZMM30,%ZMM30,%ZMM28 |
0x6b51ae VCMPPS $0xe,%ZMM15,%ZMM28,%K2 | 0x6b5622 VCMPPS $0xe,%ZMM15,%ZMM28,%K2 | 0x401ac9 VCMPPS $0xe,%ZMM15,%ZMM28,%K2 |
0x6b51b5 VCMPPS $0x1,%ZMM23,%ZMM28,%K1 | 0x6b5629 VCMPPS $0x1,%ZMM23,%ZMM28,%K1 | 0x401ad0 VCMPPS $0x1,%ZMM23,%ZMM28,%K1 |
0x6b51bc VADDPS %ZMM22,%ZMM28,%ZMM0 | 0x6b5630 VADDPS %ZMM22,%ZMM28,%ZMM0 | 0x401ad7 VADDPS %ZMM22,%ZMM28,%ZMM0 |
0x6b51c2 VCVTPS2PD %YMM0,%ZMM6 | 0x6b5636 VCVTPS2PD %YMM0,%ZMM6 | 0x401add VCVTPS2PD %YMM0,%ZMM6 |
0x6b51c8 VEXTRACTF32X8 $0x1,%ZMM0,%YMM5 | 0x6b563c VEXTRACTF32X8 $0x1,%ZMM0,%YMM5 | 0x401ae3 VEXTRACTF32X8 $0x1,%ZMM0,%YMM5 |
0x6b51cf VMOVAPS %ZMM28,%ZMM0 | 0x6b5643 VMOVAPS %ZMM28,%ZMM0 | 0x401aea VMOVAPS %ZMM28,%ZMM0 |
0x6b51d5 VSQRTPD %ZMM6,%ZMM29 | 0x6b5649 VSQRTPD -0x3513(%RIP),%ZMM29 | 0x401af0 VSQRTPD %ZMM6,%ZMM29 |
0x6b51db VCVTPS2PD %YMM5,%ZMM5 | 0x6b5653 VCVTPS2PD %YMM5,%ZMM5 | 0x401af6 VCVTPS2PD %YMM5,%ZMM5 |
0x6b51e1 VMULPD %ZMM29,%ZMM6,%ZMM6 | 0x6b5659 VMULPD %ZMM29,%ZMM6,%ZMM6 | 0x401afc VMULPD %ZMM29,%ZMM6,%ZMM6 |
0x6b51e7 VFMADD132PS %ZMM21,%ZMM20,%ZMM0 | 0x6b565f VFMADD132PS %ZMM21,%ZMM20,%ZMM0 | 0x401b02 VFMADD132PS %ZMM21,%ZMM20,%ZMM0 |
0x6b51ed VSQRTPD %ZMM5,%ZMM31 | 0x6b5665 VSQRTPD -0x34af(%RIP),%ZMM31 | 0x401b08 VSQRTPD %ZMM5,%ZMM31 |
0x6b51f3 VMULPD %ZMM31,%ZMM5,%ZMM5 | 0x6b566f VMULPD %ZMM31,%ZMM5,%ZMM5 | 0x401b0e VMULPD %ZMM31,%ZMM5,%ZMM5 |
0x6b51f9 VMOVUPS (%R8,%R11,1),%ZMM13{%K1} | 0x6b5675 VMOVUPS -0x337f(%RIP),%ZMM13{%K1} | 0x401b14 VMOVUPS (%R8,%R11,1),%ZMM13{%K1} |
0x6b5200 ADD $0x40,%R11 | 0x6b567f ADD $0x40,%R11 | 0x401b1b ADD $0x40,%R11 |
0x6b5204 VMOVAPS %ZMM13,%ZMM27{%K1}{z} | 0x6b5683 VMOVAPS %ZMM13,%ZMM27{%K1}{z} | 0x401b1f VMOVAPS %ZMM13,%ZMM27{%K1}{z} |
0x6b520a VFMADD132PS %ZMM28,%ZMM19,%ZMM0 | 0x6b5689 VFMADD132PS %ZMM28,%ZMM19,%ZMM0 | 0x401b25 VFMADD132PS %ZMM28,%ZMM19,%ZMM0 |
0x6b5210 VDIVPD %ZMM6,%ZMM14,%ZMM6 | 0x6b568f VMOVUPD -0x3459(%RIP),%ZMM14 0x6b5699 VDIVPD -0x34a3(%RIP),%ZMM14,%ZMM6 | 0x401b2b VDIVPD %ZMM6,%ZMM14,%ZMM6 |
0x6b5216 VDIVPD %ZMM5,%ZMM14,%ZMM5 | 0x6b56a3 VMOVUPD -0x33ed(%RIP),%ZMM14 0x6b56ad VDIVPD -0x3437(%RIP),%ZMM14,%ZMM5 | 0x401b31 VDIVPD %ZMM5,%ZMM14,%ZMM5 |
0x6b521c VFMADD132PS %ZMM28,%ZMM18,%ZMM0 | 0x6b56b7 VFMADD132PS %ZMM28,%ZMM18,%ZMM0 | 0x401b37 VFMADD132PS %ZMM28,%ZMM18,%ZMM0 |
0x6b5222 VFMADD132PS %ZMM28,%ZMM17,%ZMM0 | 0x6b56bd VFMADD132PS %ZMM28,%ZMM17,%ZMM0 | 0x401b3d VFMADD132PS %ZMM28,%ZMM17,%ZMM0 |
0x6b5228 VFMADD132PS %ZMM28,%ZMM16,%ZMM0 | 0x6b56c3 VFMADD132PS %ZMM28,%ZMM16,%ZMM0 | 0x401b43 VFMADD132PS %ZMM28,%ZMM16,%ZMM0 |
0x6b522e VCVTPS2PD %YMM0,%ZMM28 | 0x6b56c9 VCVTPS2PD %YMM0,%ZMM28 | 0x401b49 VCVTPS2PD %YMM0,%ZMM28 |
0x6b5234 VEXTRACTF32X8 $0x1,%ZMM0,%YMM0 | 0x6b56cf VEXTRACTF32X8 $0x1,%ZMM0,%YMM0 | 0x401b4f VEXTRACTF32X8 $0x1,%ZMM0,%YMM0 |
0x6b523b VADDPD %ZMM28,%ZMM6,%ZMM6 | 0x6b56d6 VADDPD %ZMM28,%ZMM6,%ZMM6 | 0x401b56 VADDPD %ZMM28,%ZMM6,%ZMM6 |
0x6b5241 VCVTPS2PD %YMM0,%ZMM0 | 0x6b56dc VCVTPS2PD %YMM0,%ZMM0 | 0x401b5c VCVTPS2PD %YMM0,%ZMM0 |
0x6b5247 VADDPD %ZMM0,%ZMM5,%ZMM5 | 0x6b56e2 VADDPD %ZMM0,%ZMM5,%ZMM5 | 0x401b62 VADDPD %ZMM0,%ZMM5,%ZMM5 |
0x6b524d VCVTPD2PS %ZMM6,%YMM6 | 0x6b56e8 VCVTPD2PS %ZMM6,%YMM6 | 0x401b68 VCVTPD2PS %ZMM6,%YMM6 |
0x6b5253 VCVTPD2PS %ZMM5,%YMM0 | 0x6b56ee VCVTPD2PS %ZMM5,%YMM0 | 0x401b6e VCVTPD2PS %ZMM5,%YMM0 |
0x6b5259 VINSERTF64X4 $0x1,%YMM0,%ZMM6,%ZMM5 | 0x6b56f4 VINSERTF64X4 $0x1,%YMM0,%ZMM6,%ZMM5 | 0x401b74 VINSERTF64X4 $0x1,%YMM0,%ZMM6,%ZMM5 |
0x6b5260 VMULPS %ZMM27,%ZMM5,%ZMM6 | 0x6b56fb VMULPS %ZMM27,%ZMM5,%ZMM6 | 0x401b7b VMULPS %ZMM27,%ZMM5,%ZMM6 |
0x6b5266 VMULPS %ZMM6,%ZMM9,%ZMM0{%K2}{z} | 0x6b5701 VMULPS %ZMM6,%ZMM9,%ZMM0{%K2}{z} | 0x401b81 VMULPS %ZMM6,%ZMM9,%ZMM0{%K2}{z} |
0x6b526c VMULPS %ZMM6,%ZMM8,%ZMM9{%K2}{z} | 0x6b5707 VMULPS %ZMM6,%ZMM8,%ZMM9{%K2}{z} | 0x401b87 VMULPS %ZMM6,%ZMM8,%ZMM9{%K2}{z} |
0x6b5272 VMULPS %ZMM6,%ZMM30,%ZMM8{%K2}{z} | 0x6b570d VMULPS %ZMM6,%ZMM30,%ZMM8{%K2}{z} | 0x401b8d VMULPS %ZMM6,%ZMM30,%ZMM8{%K2}{z} |
0x6b5278 VADDPS %ZMM0,%ZMM10,%ZMM10 | 0x6b5713 VADDPS %ZMM0,%ZMM10,%ZMM10 | 0x401b93 VADDPS %ZMM0,%ZMM10,%ZMM10 |
0x6b527e VADDPS %ZMM9,%ZMM11,%ZMM11 | 0x6b5719 VADDPS %ZMM9,%ZMM11,%ZMM11 | 0x401b99 VADDPS %ZMM9,%ZMM11,%ZMM11 |
0x6b5284 VADDPS %ZMM8,%ZMM12,%ZMM12 | 0x6b571f VADDPS %ZMM8,%ZMM12,%ZMM12 | 0x401b9f VADDPS %ZMM8,%ZMM12,%ZMM12 |
0x6b528a CMP %R11,%RBX | 0x6b5725 CMP %R11,%RBX | 0x401ba5 CMP %R11,%RBX |
0x6b528d JNE 6b516d | 0x6b5728 JNE 6b55e0 | 0x401ba8 JNE 401a90 |
Path / |
Metric | ORIG | DL1 | Original |
---|---|---|---|
FP operations per cycle L1 | 6.00, 7.06, | 6.00, 7.06, | 6.00, 7.06, |
cycles L1 CQA | 80.00 | 80.00 | 80.00 |
cycles UFS | 84.68 | 81.94 | 84.37 |
bytes loaded | 264.00 | 640.00 | 256.00 |
bytes stored | 8.00 | 0.00 | 0.00 |
nb loads | 5.00 | 10.00 | 4.00 |
nb stores | 1.00 | 0.00 | 0.00 |
cycles dispatch | 26.00 | 26.00 | 26.00 |
cycles front end | 15.50 | 16.50 | 15.00 |
cycles P0 | 26.00 | 26.00 | 26.00 |
cycles P1 | 11.50 | 11.50 | 11.50 |
cycles P2 | 2.50 | 5.00 | 2.00 |
cycles P3 | 2.50 | 5.00 | 2.00 |
cycles P4 | 1.00 | 0.00 | 0.00 |
cycles P5 | 26.00 | 26.00 | 26.00 |
cycles P6 | 1.50 | 1.00 | 1.00 |
cycles P7 | 1.00 | 0.00 | 0.00 |
stall cycles | 68.70 | 65.98 | 68.91 |
LB full | 0.00 | 0.00 | 0.00 |
LM full | 0.00 | 0.00 | 0.00 |
PRF full | 0.00 | 0.00 | 0.00 |
PRF_FLOAT full | 66.50 | 71.46 | 66.55 |
PRF_INT full | 0.00 | 0.00 | 0.00 |
ROB full | 0.00 | 0.00 | 0.00 |
RS full | 13.06 | 2.81 | 12.61 |
SB full | 0.00 | 0.00 | 0.00 |
nb uops | 62.00 | 66.00 | 60.00 |
uops P0 | 26.00 | 26.00 | 26.00 |
uops P1 | 1.50 | 1.00 | 1.00 |
uops P2 | 2.50 | 5.00 | 2.00 |
uops P3 | 2.50 | 5.00 | 2.00 |
uops P4 | 1.00 | 0.00 | 0.00 |
uops P5 | 26.00 | 26.00 | 26.00 |
uops P6 | 1.50 | 1.00 | 1.00 |
uops P7 | 1.00 | 0.00 | 0.00 |
ID | 9 | 11 | 4 |
Metric | ORIG | DL1 | Original |
---|---|---|---|
FP operations per cycle L1 | 6.00, 7.06, | 6.00, 7.06, | 6.00, 7.06, |
cycles L1 CQA | 80.00 | 80.00 | 80.00 |
cycles UFS | 84.68 | 81.94 | 84.37 |
bytes loaded | 264.00 | 640.00 | 256.00 |
bytes stored | 8.00 | 0.00 | 0.00 |
nb loads | 5.00 | 10.00 | 4.00 |
nb stores | 1.00 | 0.00 | 0.00 |
cycles dispatch | 26.00 | 26.00 | 26.00 |
cycles front end | 15.50 | 16.50 | 15.00 |
cycles P0 | 26.00 | 26.00 | 26.00 |
cycles P1 | 11.50 | 11.50 | 11.50 |
cycles P2 | 2.50 | 5.00 | 2.00 |
cycles P3 | 2.50 | 5.00 | 2.00 |
cycles P4 | 1.00 | 0.00 | 0.00 |
cycles P5 | 26.00 | 26.00 | 26.00 |
cycles P6 | 1.50 | 1.00 | 1.00 |
cycles P7 | 1.00 | 0.00 | 0.00 |
stall cycles | 68.70 | 65.98 | 68.91 |
LB full | 0.00 | 0.00 | 0.00 |
LM full | 0.00 | 0.00 | 0.00 |
PRF full | 0.00 | 0.00 | 0.00 |
PRF_FLOAT full | 66.50 | 71.46 | 66.55 |
PRF_INT full | 0.00 | 0.00 | 0.00 |
ROB full | 0.00 | 0.00 | 0.00 |
RS full | 13.06 | 2.81 | 12.61 |
SB full | 0.00 | 0.00 | 0.00 |
nb uops | 62.00 | 66.00 | 60.00 |
uops P0 | 26.00 | 26.00 | 26.00 |
uops P1 | 1.50 | 1.00 | 1.00 |
uops P2 | 2.50 | 5.00 | 2.00 |
uops P3 | 2.50 | 5.00 | 2.00 |
uops P4 | 1.00 | 0.00 | 0.00 |
uops P5 | 26.00 | 26.00 | 26.00 |
uops P6 | 1.50 | 1.00 | 1.00 |
uops P7 | 1.00 | 0.00 | 0.00 |
ID | 9 | 11 | 4 |