Loop Id: 1 | Module: exec | Source: main.c:111-116 | Coverage: 0.19% |
---|
Loop Id: 1 | Module: exec | Source: main.c:111-116 | Coverage: 0.19% |
---|
0x401820 VADDPS %YMM5,%YMM11,%YMM14 |
0x401824 VADDPS %YMM4,%YMM10,%YMM13 |
0x401828 VADDPS %YMM7,%YMM10,%YMM10 |
0x40182c VADDPS %YMM8,%YMM11,%YMM11 |
0x401831 VMOVUPS %YMM14,0x46dc14(,%R9,4) [1] |
0x40183b VADDPS %YMM6,%YMM12,%YMM14 |
0x40183f VADDPS %YMM9,%YMM12,%YMM12 |
0x401844 VMOVUPS %YMM13,0x40c194(,%R9,4) [1] |
0x40184e VMOVUPS %YMM14,0x4cf694(,%R9,4) [1] |
0x401858 VPBROADCASTD %R9D,%YMM14 |
0x40185e VPADDD %YMM16,%YMM14,%YMM14 |
0x401864 VCVTDQ2PS %YMM14,%YMM14 |
0x401869 VFMADD132PS %YMM17,%YMM13,%YMM14 |
0x40186f VMOVUPS %YMM14,0x531114(,%R9,4) [1] |
0x401879 ADD $0x8,%R9 |
0x40187d CMP %R8,%R9 |
0x401880 JLE 401820 |
/home/eoseret/qaas_runs_CPU_9468/172-289-8348/intel/HACCmk/build/HACCmk/src/main.c: 111 - 116 |
-------------------------------------------------------------------------------- |
111: for ( i = 1; i < n; i++ ) |
112: { |
113: xx[i] = xx[i-1] + dx1; |
114: yy[i] = yy[i-1] + dy1; |
115: zz[i] = zz[i-1] + dz1; |
116: mass[i] = (float)i * 0.01f + xx[i]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | __libc_start_call_main | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.08 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.24 |
Bottlenecks | P10, P11, |
Function | main |
Source | main.c:111-116 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 3.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 3.25 |
Front-end cycles | 2.83 |
P0 cycles | 0.50 |
P1 cycles | 0.50 |
P2 cycles | 0.25 |
P3 cycles | 0.25 |
P4 cycles | 0.50 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 1.33 |
P8 cycles | 1.50 |
P9 cycles | 1.50 |
P10 cycles | 3.50 |
P11 cycles | 3.50 |
P12 cycles | 2.00 |
P13 cycles | 2.00 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 17.00 |
Nb uops | 17.00 |
Nb loads | 0.00 |
Nb stores | 4.00 |
Nb stack references | 0.00 |
FLOP/cycle | 18.29 |
Nb FLOP add-sub | 48.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 8.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 36.57 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 128.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 92.86 |
Vectorization ratio load | NA |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 46.88 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 28.13 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.08 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.24 |
Bottlenecks | P10, P11, |
Function | main |
Source | main.c:111-116 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 3.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 3.50 |
CQA cycles if fully vectorized | 3.25 |
Front-end cycles | 2.83 |
P0 cycles | 0.50 |
P1 cycles | 0.50 |
P2 cycles | 0.25 |
P3 cycles | 0.25 |
P4 cycles | 0.50 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 1.33 |
P8 cycles | 1.50 |
P9 cycles | 1.50 |
P10 cycles | 3.50 |
P11 cycles | 3.50 |
P12 cycles | 2.00 |
P13 cycles | 2.00 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 17.00 |
Nb uops | 17.00 |
Nb loads | 0.00 |
Nb stores | 4.00 |
Nb stack references | 0.00 |
FLOP/cycle | 18.29 |
Nb FLOP add-sub | 48.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 8.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 36.57 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 128.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 92.86 |
Vectorization ratio load | NA |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 46.88 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 50.00 |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 28.13 |
Path / |
Function | main |
Source file and lines | main.c:111-116 |
Module | exec |
nb instructions | 17 |
nb uops | 17 |
loop length | 98 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 13 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 2.83 cycles |
front end | 2.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 1.50 | 1.50 | 3.50 | 3.50 | 2.00 | 2.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 1.50 | 1.50 | 3.50 | 3.50 | 2.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 2.83 |
Dispatch | 3.50 |
Data deps. | 3.00 |
Overall L1 | 3.50 |
all | 66% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 92% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 35% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 28% |
all | 50% |
load | NA (no load vectorizable/vectorized instructions) |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 46% |
load | NA (no load vectorizable/vectorized instructions) |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VADDPS %YMM5,%YMM11,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM4,%YMM10,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM7,%YMM10,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM8,%YMM11,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VMOVUPS %YMM14,0x46dc14(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
VADDPS %YMM6,%YMM12,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM9,%YMM12,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VMOVUPS %YMM13,0x40c194(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
VMOVUPS %YMM14,0x4cf694(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
VPBROADCASTD %R9D,%YMM14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
VPADDD %YMM16,%YMM14,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (50.0%) |
VCVTDQ2PS %YMM14,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VFMADD132PS %YMM17,%YMM13,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
VMOVUPS %YMM14,0x531114(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
ADD $0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 401820 <main+0x300> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
Function | main |
Source file and lines | main.c:111-116 |
Module | exec |
nb instructions | 17 |
nb uops | 17 |
loop length | 98 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 13 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 2.83 cycles |
front end | 2.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 1.50 | 1.50 | 3.50 | 3.50 | 2.00 | 2.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 1.50 | 1.50 | 3.50 | 3.50 | 2.00 | 2.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 2.83 |
Dispatch | 3.50 |
Data deps. | 3.00 |
Overall L1 | 3.50 |
all | 66% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 92% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 35% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 28% |
all | 50% |
load | NA (no load vectorizable/vectorized instructions) |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 46% |
load | NA (no load vectorizable/vectorized instructions) |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VADDPS %YMM5,%YMM11,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM4,%YMM10,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM7,%YMM10,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM8,%YMM11,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VMOVUPS %YMM14,0x46dc14(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
VADDPS %YMM6,%YMM12,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VADDPS %YMM9,%YMM12,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VMOVUPS %YMM13,0x40c194(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
VMOVUPS %YMM14,0x4cf694(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
VPBROADCASTD %R9D,%YMM14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
VPADDD %YMM16,%YMM14,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (50.0%) |
VCVTDQ2PS %YMM14,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (50.0%) |
VFMADD132PS %YMM17,%YMM13,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | vect (50.0%) |
VMOVUPS %YMM14,0x531114(,%R9,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (50.0%) |
ADD $0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 401820 <main+0x300> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |