Loop Id: 1 | Module: exec | Source: main.c:111-116 | Coverage: 0.22% |
---|
Loop Id: 1 | Module: exec | Source: main.c:111-116 | Coverage: 0.22% |
---|
0x4018c0 VPBROADCASTD %EDI,%ZMM25 |
0x4018c6 VADDPS %ZMM1,%ZMM16,%ZMM19 |
0x4018cc VADDPS %ZMM0,%ZMM15,%ZMM18 |
0x4018d2 VADDPS %ZMM4,%ZMM17,%ZMM26 |
0x4018d8 VADDPS %ZMM7,%ZMM15,%ZMM15 |
0x4018de VADDPS %ZMM8,%ZMM16,%ZMM16 |
0x4018e4 VADDPS %ZMM9,%ZMM17,%ZMM17 |
0x4018ea VMOVUPS %ZMM19,0x46ec14(,%RDI,4) [1] |
0x4018f5 VMOVUPS %ZMM18,0x40d194(,%RDI,4) [1] |
0x401900 VMOVUPS %ZMM26,0x4d0694(,%RDI,4) [1] |
0x40190b VPADDD %ZMM20,%ZMM25,%ZMM19 |
0x401911 VCVTDQ2PS %ZMM19,%ZMM19 |
0x401917 VFMADD132PS %ZMM21,%ZMM18,%ZMM19 |
0x40191d VMOVUPS %ZMM19,0x532114(,%RDI,4) [1] |
0x401928 ADD $0x10,%RDI |
0x40192c CMP %RSI,%RDI |
0x40192f JLE 4018c0 |
/home/eoseret/qaas_runs_CPU_9468/172-289-8348/intel/HACCmk/build/HACCmk/src/main.c: 111 - 116 |
-------------------------------------------------------------------------------- |
111: for ( i = 1; i < n; i++ ) |
112: { |
113: xx[i] = xx[i-1] + dx1; |
114: yy[i] = yy[i-1] + dy1; |
115: zz[i] = zz[i-1] + dz1; |
116: mass[i] = (float)i * 0.01f + xx[i]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | __libc_start_call_main | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.14 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.15 |
Bottlenecks | P11, |
Function | main |
Source | main.c:111-116 |
Source loop unroll info | unrolled by 16 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 16 |
CQA cycles | 7.50 |
CQA cycles if no scalar integer | 7.50 |
CQA cycles if FP arith vectorized | 7.50 |
CQA cycles if fully vectorized | 6.56 |
Front-end cycles | 3.50 |
P0 cycles | 0.50 |
P1 cycles | 0.50 |
P2 cycles | 0.25 |
P3 cycles | 0.25 |
P4 cycles | 0.50 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 1.33 |
P8 cycles | 2.50 |
P9 cycles | 1.50 |
P10 cycles | 6.50 |
P11 cycles | 7.50 |
P12 cycles | 4.00 |
P13 cycles | 4.00 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 17.00 |
Nb uops | 21.00 |
Nb loads | 0.00 |
Nb stores | 4.00 |
Nb stack references | 0.00 |
FLOP/cycle | 17.07 |
Nb FLOP add-sub | 96.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.13 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 256.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 92.86 |
Vectorization ratio load | NA |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 93.30 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 53.13 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.14 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.15 |
Bottlenecks | P11, |
Function | main |
Source | main.c:111-116 |
Source loop unroll info | unrolled by 16 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 16 |
CQA cycles | 7.50 |
CQA cycles if no scalar integer | 7.50 |
CQA cycles if FP arith vectorized | 7.50 |
CQA cycles if fully vectorized | 6.56 |
Front-end cycles | 3.50 |
P0 cycles | 0.50 |
P1 cycles | 0.50 |
P2 cycles | 0.25 |
P3 cycles | 0.25 |
P4 cycles | 0.50 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 1.33 |
P8 cycles | 2.50 |
P9 cycles | 1.50 |
P10 cycles | 6.50 |
P11 cycles | 7.50 |
P12 cycles | 4.00 |
P13 cycles | 4.00 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 17.00 |
Nb uops | 21.00 |
Nb loads | 0.00 |
Nb stores | 4.00 |
Nb stack references | 0.00 |
FLOP/cycle | 17.07 |
Nb FLOP add-sub | 96.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 16.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.13 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 256.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 92.86 |
Vectorization ratio load | NA |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 93.30 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 53.13 |
Path / |
Function | main |
Source file and lines | main.c:111-116 |
Module | exec |
nb instructions | 17 |
nb uops | 21 |
loop length | 113 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 15 |
nb stack references | 0 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 1.50 | 1.50 | 4.00 | 4.00 | 4.00 | 4.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 2.50 | 1.50 | 6.50 | 7.50 | 4.00 | 4.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 3.50 |
Dispatch | 7.50 |
Data deps. | 3.00 |
Overall L1 | 7.50 |
all | 66% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 92% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 68% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 53% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 93% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 53% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VPBROADCASTD %EDI,%ZMM25 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
VADDPS %ZMM1,%ZMM16,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM0,%ZMM15,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM4,%ZMM17,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM7,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM8,%ZMM16,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM9,%ZMM17,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVUPS %ZMM19,0x46ec14(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVUPS %ZMM18,0x40d194(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVUPS %ZMM26,0x4d0694(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VPADDD %ZMM20,%ZMM25,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VCVTDQ2PS %ZMM19,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VFMADD132PS %ZMM21,%ZMM18,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 | vect (100.0%) |
VMOVUPS %ZMM19,0x532114(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
ADD $0x10,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RSI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4018c0 <main+0x370> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
Function | main |
Source file and lines | main.c:111-116 |
Module | exec |
nb instructions | 17 |
nb uops | 21 |
loop length | 113 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 15 |
nb stack references | 0 |
micro-operation queue | 3.50 cycles |
front end | 3.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 1.50 | 1.50 | 4.00 | 4.00 | 4.00 | 4.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 1.33 | 1.33 | 1.33 | 2.50 | 1.50 | 6.50 | 7.50 | 4.00 | 4.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 3.50 |
Dispatch | 7.50 |
Data deps. | 3.00 |
Overall L1 | 7.50 |
all | 66% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 92% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 68% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 53% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 93% |
load | NA (no load vectorizable/vectorized instructions) |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 53% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VPBROADCASTD %EDI,%ZMM25 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (6.3%) |
VADDPS %ZMM1,%ZMM16,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM0,%ZMM15,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM4,%ZMM17,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM7,%ZMM15,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM8,%ZMM16,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VADDPS %ZMM9,%ZMM17,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVUPS %ZMM19,0x46ec14(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVUPS %ZMM18,0x40d194(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVUPS %ZMM26,0x4d0694(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VPADDD %ZMM20,%ZMM25,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VCVTDQ2PS %ZMM19,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VFMADD132PS %ZMM21,%ZMM18,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 | vect (100.0%) |
VMOVUPS %ZMM19,0x532114(,%RDI,4) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
ADD $0x10,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RSI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4018c0 <main+0x370> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |