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Global Metrics

Metricr0r1r2r3r4r5
Total Time (s)632.4490.2270.6859.2953.7850.43
Max (Thread Active Time) (s)631.8489.2569.3857.4651.2947.15
Average Active Time (s)631.7689.2269.2757.1250.5346.30
Activity Ratio (%)99.999.198.396.794.492.4
Average number of active threads7.99163.29394.080123.318150.318176.296
Affinity Stability (%)99.999.398.697.596.394.4
Time in analyzed loops (%)92.388.584.984.783.282.8
Time in analyzed innermost loops (%)44.445.745.846.947.247.8
Time in user code (%)96.792.288.488.487.086.6
Compilation Options Score (%)66.766.766.766.766.766.7
Array Access Efficiency (%)44.047.549.250.451.552.5
Potential Speedups
Perfect Flow Complexity1.001.011.011.011.011.01
Perfect OpenMP/MPI/Pthread/TBB1.021.031.051.041.051.06
Perfect OpenMP/MPI/Pthread/TBB + Perfect Load Distribution1.031.061.081.091.111.10
Scalability - Gap1.001.141.341.501.701.91
No Scalar IntegerPotential Speedup1.031.031.031.031.031.04
Nb Loops to get 80%81011111111
FP VectorisedPotential Speedup1.111.101.091.091.091.09
Nb Loops to get 80%333333
Fully VectorisedPotential Speedup1.451.431.411.401.391.39
Nb Loops to get 80%578899
Only FP ArithmeticPotential Speedup3.823.252.912.842.712.66
Nb Loops to get 80%101212121212

Scalability Speedup

Cumulated Speedup If No Scalar Integer

Cumulated Speedup If FP Vectorized

Cumulated Speedup If Fully Vectorized

Cumulated Speedup If Only FP Arithmetic

Loop Based Profiles

Innermost / Single Loops

Inbetween Loops

Outermost Loops

Cumulated Coverage With All Loops

Innermost Loop Based Profiles

Coverage

Count

Application Categorization

Time

Coverage

Compilation Options

Source ObjectIssue
exec
pair_eam_intel.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
npair_intel.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
fix_nve_intel.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
thermo.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
format.h
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
atom.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
platform.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
neighbor.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
domain_omp.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
comm_brick.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
compute_temp.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
nbin.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
domain.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
fix_nve.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
verlet.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
intel_buffers.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
modify.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
random_park.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
variable.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
pair_eam.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
npair.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
comm.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
input.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
stl_map.h
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
stl_vector.h
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
atom_vec.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
fix_intel.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2
nbin_intel.cpp
-xHost or -march=native should not be used with Intel compilers while targeting (or compiling on) non-Intel processors, use -mavx2

Path Count Profiles

Coverage

Count

Low Iteration Count Profiles

Coverage

Count

Average Number of Active Threads

Run 1 - 8x1

Run 2 - 64x1

Run 3 - 96x1

Run 4 - 128x1

Run 5 - 160x1

Run 6 - 192x1

Experiment Summaries

r0r1r2r3r4r5
Application/beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/run/base_runs/defaults/icx/execsame as r0same as r0same as r0same as r0same as r0
Timestamp2025-09-15 22:31:47same as r0same as r0same as r0same as r0same as r0
Experiment TypeMPI; same as r0same as r0same as r0same as r0same as r0
Machinegmz12.benchmarkcenter.megware.comsame as r0same as r0same as r0same as r0same as r0
Architecturex86_64same as r0same as r0same as r0same as r0same as r0
Micro ArchitectureZEN_V5same as r0same as r0same as r0same as r0same as r0
Model NameAMD EPYC 9655 96-Core Processorsame as r0same as r0same as r0same as r0same as r0
Cache Size1024 KBsame as r0same as r0same as r0same as r0same as r0
Number of Cores96same as r0same as r0same as r0same as r0same as r0
Maximal Frequency4.509375 GHzsame as r0same as r0same as r0same as r0same as r0
OS VersionLinux 5.14.0-570.39.1.el9_6.x86_64 #1 SMP PREEMPT_DYNAMIC Thu Sep 4 05:08:52 EDT 2025same as r0same as r0same as r0same as r0same as r0
Architecture used during static analysisx86_64same as r0same as r0same as r0same as r0same as r0
Micro Architecture used during static analysisZEN_V5same as r0same as r0same as r0same as r0same as r0
Compilation Options exec: clang based Intel(R) oneAPI DPC++/C++ Compiler 2024.0.0 (2024.0.0.20231017) /cluster/intel/oneapi/2024.0.0/compiler/2024.0/bin/compiler/clang --driver-mode=g++ --intel -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/third_party -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/ASPHERE -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/CLASS2 -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/DPD-BASIC -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/KSPACE -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/MANYBODY -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/MEAM -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/MISC -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/MOLECULE -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/REPLICA -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/RIGID -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/OPENMP -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/OPT -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/INTEL -I /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/icx/lammps/cmake/styles -I /cluster/intel/oneapi/2024.0.0/mpi/2021.11/include -D FFT_MKL -D FFT_MKL_THREADS -D LAMMPS_GZIP -D LAMMPS_MEMALIGN=64 -D LAMMPS_OMP_COMPAT=4 -D LAMMPS_PNG -D LAMMPS_SMALLBIG -D LMP_INTEL -D LMP_INTEL_USELRT -D LMP_OPENMP -D LMP_USE_MKL_RNG -D MPICH_SKIP_MPICXX -D OMPI_SKIP_MPICXX -D _MPICC_H -isystem /cluster/intel/oneapi/2024.0.0/mkl/2024.0/include -isystem /cluster/intel/oneapi/2024.0.0/tbb/2021.11/include -O3 -ffp-model=fast -march=native -mprefer-vector-width=512 -g -fno-omit-frame-pointer -fcf-protection=none -nopie -grecord-command-line -Wno-tautological-constant-compare -Wno-unused-command-line-argument -std=c++17 -fPIC -fiopenmp -MD -MT lammps/cmake/CMakeFiles/lammps.dir/__/src/INTEL/pair_eam_intel.cpp.o -MF lammps/cmake/CMakeFiles/lammps.dir/__/src/INTEL/pair_eam_intel.cpp.o.d -o lammps/cmake/CMakeFiles/lammps.dir/__/src/INTEL/pair_eam_intel.cpp.o -c /beegfs/hackathon/users/eoseret/qaas_runs_ZEN5/175-795-6450/intel/LAMMPS/build/LAMMPS/lammps/src/INTEL/pair_eam_intel.cpp -fveclib=SVML -fheinous-gnu-extensions same as r0same as r0same as r0same as r0same as r0
Number of processes observed86496128160192
Number of threads observed86496128160192
Frequency Driveracpi-cpufreqsame as r0same as r0same as r0same as r0same as r0
Frequency Governorperformancesame as r0same as r0same as r0same as r0same as r0
Huge Pagesalwayssame as r0same as r0same as r0same as r0same as r0
Hyperthreadingonsame as r0same as r0same as r0same as r0same as r0
Number of sockets2same as r0same as r0same as r0same as r0same as r0
Number of cores per socket96same as r0same as r0same as r0same as r0same as r0
MAQAO version2025.1.2same as r0same as r0same as r0same as r0same as r0
MAQAO buildd7816a4ef31d96c8cb7cb54a3ec2554ac0d7ef52::20250912-183832same as r0same as r0same as r0same as r0same as r0
CommentsOV scalability run using icxsame as r0same as r0same as r0same as r0same as r0
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