Function: .omp_outlined.#0x43f1a0 | Module: exec | Source: Collapse.hpp:81-84 [...] | Coverage: 14.61% |
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Function: .omp_outlined.#0x43f1a0 | Module: exec | Source: Collapse.hpp:81-84 [...] | Coverage: 14.61% |
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/home/hbollore/qaas/qaas-runs/169-817-5851/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 84 |
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81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \ |
82: RAJA_COLLAPSE(2) |
83: for (i0 = 0; i0 < l0; ++i0) { |
84: for (i1 = 0; i1 < l1; ++i1) { |
/home/hbollore/qaas/qaas-runs/169-817-5851/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
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59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/home/hbollore/qaas/qaas-runs/169-817-5851/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62 |
-------------------------------------------------------------------------------- |
62: phi(nm,g,z) += ell(nm, d) * psi(d, g, z); |
/home/hbollore/qaas/qaas-runs/169-817-5851/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp: 55 - 55 |
-------------------------------------------------------------------------------- |
55: : val(rhs.val) |
/home/hbollore/qaas/qaas-runs/169-817-5851/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 79 - 79 |
-------------------------------------------------------------------------------- |
79: : layout(V.layout), data(V.data) |
0x43f1a0 SUB SP, SP, #352 |
0x43f1a4 STP X29, X30, [SP, #256] |
0x43f1a8 STP X28, X27, [SP, #272] |
0x43f1ac STP X26, X25, [SP, #288] |
0x43f1b0 STP X24, X23, [SP, #304] |
0x43f1b4 STP X22, X21, [SP, #320] |
0x43f1b8 STP X20, X19, [SP, #336] |
0x43f1bc ADD X29, SP, #256 |
0x43f1c0 LDR X8, [X2] |
0x43f1c4 LDR X26, [X3] |
0x43f1c8 CMP X8, #1 |
0x43f1cc CCMP X26, #1, #8, #10 |
0x43f1d0 B.LT 43f27c |
0x43f1d4 LDR X9, [X4] |
0x43f1d8 LDP X22, X11, [X4, #16] |
0x43f1dc LDR W1, [X0] |
0x43f1e0 MOVZ W10, #1 |
0x43f1e4 ADRP X0, |
0x43f1e8 ADD X0, X0, #312 |
0x43f1ec SUB X3, X29, #36 |
0x43f1f0 SUB X5, X29, #24 |
0x43f1f4 LDR X27, [X4, #32] |
0x43f1f8 LDP X24, X25, [X4, #48] |
0x43f1fc LDR X19, [X4, #200] |
0x43f200 SUB X6, X29, #32 |
0x43f204 MOVZ W2, #34 |
0x43f208 MOVZ W7, #1 |
0x43f20c LDR X21, [X4, #240] |
0x43f210 STUR WZR, [X29, #476] |
0x43f214 STUR X10, [X29, #480] |
0x43f218 STUR X9, [X29, #400] |
0x43f21c MOVN X9, #0 |
0x43f220 STUR X11, [X29, #464] |
0x43f224 STR W1, [SP, #20] |
0x43f228 MADD X23, X26, X8, X9 |
0x43f22c LDP X28, X9, [X4, #96] |
0x43f230 LDR X8, [X4, #168] |
0x43f234 STP X23, XZR, [X29, #1000] |
0x43f238 STP X8, X9, [X29, #936] |
0x43f23c LDP X20, X9, [X4, #272] |
0x43f240 LDR X8, [X4, #344] |
0x43f244 SUB X4, X29, #16 |
0x43f248 STR X10, [SP] |
0x43f24c STP X8, X9, [X29, #920] |
0x43f250 BL 402c90 |
0x43f254 LDP X8, X0, [X29, #1000] |
0x43f258 CMP X8, X23 |
0x43f25c CSEL X8, X8, X23, #11 |
0x43f260 CMP X0, X8 |
0x43f264 STUR X8, [X29, #440] |
0x43f268 B.LE 43f29c |
(37) 0x43f26c LDR W1, [SP, #20] |
(37) 0x43f270 ADRP X0, |
(37) 0x43f274 ADD X0, X0, #336 |
(37) 0x43f278 BL 402bb0 |
(37) 0x43f27c LDP X20, X19, [SP, #336] |
(37) 0x43f280 LDP X22, X21, [SP, #320] |
(37) 0x43f284 LDP X24, X23, [SP, #304] |
(37) 0x43f288 LDP X26, X25, [SP, #288] |
(37) 0x43f28c LDP X28, X27, [SP, #272] |
(37) 0x43f290 LDP X29, X30, [SP, #256] |
(37) 0x43f294 ADD SP, SP, #352 |
(37) 0x43f298 RET |
(37) 0x43f29c MADD X13, X20, X22, XZR |
(37) 0x43f2a0 LDUR X3, [X29, #416] |
(37) 0x43f2a4 LDUR X8, [X29, #464] |
(37) 0x43f2a8 LDUR X17, [X29, #424] |
(37) 0x43f2ac MADD X9, X19, X22, XZR |
(37) 0x43f2b0 UBFM X12, X19, #61, #60 |
(37) 0x43f2b4 SUB X11, X25, X24 |
(37) 0x43f2b8 LDUR X4, [X29, #408] |
(37) 0x43f2bc STP X28, X27, [SP, #120] |
(37) 0x43f2c0 STUR X12, [X29, #464] |
(37) 0x43f2c4 ADD X1, X27, X0 |
(37) 0x43f2c8 CNTW X27, ALL |
(37) 0x43f2cc UBFM X16, X20, #61, #60 |
(37) 0x43f2d0 STUR X26, [X29, #392] |
(37) 0x43f2d4 STR X21, [SP, #112] |
(37) 0x43f2d8 PTRUE P0.D, ALL |
(37) 0x43f2dc UBFM X9, X9, #61, #60 |
(37) 0x43f2e0 ADD X12, X9, #8 |
(37) 0x43f2e4 ADD X14, X13, X24 |
(37) 0x43f2e8 ORR X2, XZR, X21 |
(37) 0x43f2ec UBFM X14, X14, #61, #60 |
(37) 0x43f2f0 SUB X10, X8, X22 |
(37) 0x43f2f4 UBFM X8, X24, #61, #60 |
(37) 0x43f2f8 STR X14, [SP, #96] |
(37) 0x43f2fc UBFM X14, X3, #61, #60 |
(37) 0x43f300 ADD X15, X17, X8 |
(37) 0x43f304 ADD X8, X8, X13,LSL #3 |
(37) 0x43f308 STR X14, [SP, #88] |
(37) 0x43f30c ADD X14, X25, X13 |
(37) 0x43f310 UBFM X13, X28, #61, #60 |
(37) 0x43f314 MOVZ W28, #8 |
(37) 0x43f318 ADD X8, X4, X8 |
(37) 0x43f31c STR X13, [SP, #64] |
(37) 0x43f320 STR X15, [SP, #104] |
(37) 0x43f324 STR X14, [SP, #80] |
(37) 0x43f328 ORN X14, XZR, X24 |
(37) 0x43f32c STR X8, [SP, #72] |
(37) 0x43f330 ADD X8, X8, #16 |
(37) 0x43f334 ADD X18, X25, X14 |
(37) 0x43f338 LDUR X14, [X29, #432] |
(37) 0x43f33c STR X8, [SP, #48] |
(37) 0x43f340 ADD X8, X15, #16 |
(37) 0x43f344 STR X8, [SP, #40] |
(37) 0x43f348 ADD X8, X21, X9 |
(37) 0x43f34c STR X8, [SP, #32] |
(37) 0x43f350 ADD X8, X21, X12 |
(37) 0x43f354 UBFM X13, X14, #61, #60 |
(37) 0x43f358 ORR X15, XZR, X14 |
(37) 0x43f35c STR X13, [SP, #56] |
(37) 0x43f360 SUB X13, X24, X25 |
(37) 0x43f364 STR X8, [SP, #24] |
(37) 0x43f368 STUR X13, [X29, #456] |
(37) 0x43f36c B 43f3a8 |
0x43f370 HINT #0 |
0x43f374 HINT #0 |
0x43f378 HINT #0 |
0x43f37c HINT #0 |
(38) 0x43f380 LDUR X26, [X29, #392] |
(38) 0x43f384 LDP X17, X15, [X29, #936] |
(38) 0x43f388 LDR X2, [SP, #112] |
(38) 0x43f38c LDP X4, X3, [X29, #920] |
(38) 0x43f390 LDUR X0, [X29, #448] |
(37) 0x43f394 LDUR X8, [X29, #440] |
(37) 0x43f398 ADD X1, X1, #1 |
(37) 0x43f39c CMP X0, X8 |
(37) 0x43f3a0 ADD X0, X0, #1 |
(37) 0x43f3a4 B.EQ 43f26c |
(37) 0x43f3a8 CMP X10, #1 |
(37) 0x43f3ac B.LT 43f394 |
(38) 0x43f3b0 SDIV X8, X0, X26 |
(38) 0x43f3b4 LDUR X13, [X29, #400] |
(38) 0x43f3b8 LDR X20, [SP, #104] |
(38) 0x43f3bc STUR X0, [X29, #448] |
(38) 0x43f3c0 ORR X23, XZR, XZR |
(38) 0x43f3c4 MADD X9, X8, X26, XZR |
(38) 0x43f3c8 ADD X13, X8, X13 |
(38) 0x43f3cc LDP X8, X14, [SP, #120] |
(38) 0x43f3d0 SUB X12, X0, X9 |
(38) 0x43f3d4 UBFM X0, X13, #61, #60 |
(38) 0x43f3d8 SUB X9, X1, X9 |
(38) 0x43f3dc ADD X12, X12, X14 |
(38) 0x43f3e0 MADD X8, X8, X13, XZR |
(38) 0x43f3e4 MADD X15, X15, X12, XZR |
(38) 0x43f3e8 ADD X14, X20, X15,LSL #3 |
(38) 0x43f3ec ADD X21, X14, X8,LSL #3 |
(38) 0x43f3f0 ADD X8, X25, X8 |
(38) 0x43f3f4 ADD X14, X2, X0 |
(38) 0x43f3f8 LDR X2, [SP, #80] |
(38) 0x43f3fc ADD X8, X8, X15 |
(38) 0x43f400 ADD X17, X17, X8,LSL #3 |
(38) 0x43f404 LDP X15, X8, [SP, #88] |
(38) 0x43f408 MADD X8, X15, X12, X8 |
(38) 0x43f40c MADD X12, X3, X12, X2 |
(38) 0x43f410 LDR X2, [SP, #32] |
(38) 0x43f414 ADD X7, X4, X8 |
(38) 0x43f418 ADD X30, X4, X12,LSL #3 |
(38) 0x43f41c LDP X12, X8, [SP, #64] |
(38) 0x43f420 ADD X5, X2, X0 |
(38) 0x43f424 LDR X2, [SP, #24] |
(38) 0x43f428 ADD X6, X2, X0 |
(38) 0x43f42c LDR X2, [SP, #56] |
(38) 0x43f430 MADD X0, X15, X9, X8 |
(38) 0x43f434 MADD X8, X2, X9, XZR |
(38) 0x43f438 MADD X8, X12, X13, X8 |
(38) 0x43f43c MADD X12, X12, X13, XZR |
(38) 0x43f440 LDR X13, [SP, #48] |
(38) 0x43f444 MADD X12, X2, X9, X12 |
(38) 0x43f448 ADD X8, X20, X8 |
(38) 0x43f44c ADD X26, X20, X12 |
(38) 0x43f450 MADD X20, X15, X9, X13 |
(38) 0x43f454 LDR X9, [SP, #40] |
(38) 0x43f458 ADD X2, X9, X12 |
(38) 0x43f45c B 43f474 |
(38) 0x43f460 ADD X23, X23, #1 |
(38) 0x43f464 ADD X0, X0, X16 |
(38) 0x43f468 ADD X20, X20, X16 |
(38) 0x43f46c CMP X23, X10 |
(38) 0x43f470 B.EQ 43f380 |
(38) 0x43f474 CMP X11, #1 |
(38) 0x43f478 B.LT 43f460 |
(39) 0x43f47c ADD X9, X23, X22 |
(39) 0x43f480 CMP X27, #8 |
(39) 0x43f484 MADD X3, X19, X9, XZR |
(39) 0x43f488 CSEL X9, X27, X28, #8 |
(39) 0x43f48c CMP X11, X9 |
(39) 0x43f490 B.CS 43f4a0 |
(39) 0x43f494 ORR X12, XZR, XZR |
(39) 0x43f498 B 43f540 |
0x43f49c HINT #0 |
(39) 0x43f4a0 LDUR X9, [X29, #464] |
(39) 0x43f4a4 ORR X12, XZR, XZR |
(39) 0x43f4a8 MADD X9, X9, X23, XZR |
(39) 0x43f4ac ADD X13, X5, X9 |
(39) 0x43f4b0 ADD X15, X6, X9 |
(39) 0x43f4b4 MADD X9, X16, X23, XZR |
(39) 0x43f4b8 ADD X4, X7, X9 |
(39) 0x43f4bc ADD X9, X30, X9 |
(39) 0x43f4c0 CMP X21, X9 |
(39) 0x43f4c4 CCMP X4, X17, #2, #3 |
(39) 0x43f4c8 CSINC W9, WZR, WZR, #2 |
(39) 0x43f4cc CMP X13, X17 |
(39) 0x43f4d0 CCMP X21, X15, #2, #3 |
(39) 0x43f4d4 B.CC 43f540 |
(39) 0x43f4d8 TBNZ W9, #0, 43f540 |
0x43f4dc UDIV X9, X11, X27 |
0x43f4e0 ORR X15, XZR, XZR |
0x43f4e4 ADDVL X13, X8, #1 |
0x43f4e8 MADD X12, X9, X27, XZR |
0x43f4ec ADD X9, X14, X3,LSL #3 |
0x43f4f0 LD1RD {Z0.D}, P0/Z, [X9] |
0x43f4f4 SUB X4, X11, X12 |
0x43f4f8 ADDVL X9, X0, #1 |
0x43f4fc HINT #0 |
(42) 0x43f500 LD1D {Z1.D}, P0/Z, [X0, X15,LSL #3] |
(42) 0x43f504 LD1D {Z2.D}, P0/Z, [X9, X15,LSL #3] |
(42) 0x43f508 LD1D {Z3.D}, P0/Z, [X8, X15,LSL #3] |
(42) 0x43f50c FMAD Z1.D, P0/M, Z0.D, Z3.D |
(42) 0x43f510 LD1D {Z4.D}, P0/Z, [X13, X15,LSL #3] |
(42) 0x43f514 FMAD Z2.D, P0/M, Z0.D, Z4.D |
(42) 0x43f518 ST1D {Z1.D}, P0, [X8, X15,LSL #3] |
(42) 0x43f51c ST1D {Z2.D}, P0, [X13, X15,LSL #3] |
(42) 0x43f520 ADD X15, X15, X27 |
(42) 0x43f524 CMP X12, X15 |
(42) 0x43f528 B.NE 43f500 |
0x43f52c CBZ X4, 43f460 |
0x43f530 HINT #0 |
0x43f534 HINT #0 |
0x43f538 HINT #0 |
0x43f53c HINT #0 |
(39) 0x43f540 ADD W9, W24, W12 |
(39) 0x43f544 SUB X15, X18, X12 |
(39) 0x43f548 SUB W9, W25, W9 |
(39) 0x43f54c ANDS X4, X9, #4160 |
(39) 0x43f550 B.EQ 43f580 |
(39) 0x43f554 ADD X9, X26, X12,LSL #3 |
(39) 0x43f558 HINT #0 |
(39) 0x43f55c HINT #0 |
(41) 0x43f560 LDR D0, [X14, X3,LSL #3] |
(41) 0x43f564 LDR D1, [X0, X12,LSL #3] |
(41) 0x43f568 LDR D2, [X9] |
(41) 0x43f56c ADD X12, X12, #1 |
(41) 0x43f570 SUBS X4, X4, #1 |
(41) 0x43f574 FMADD D0, D0, D1, D2 |
(41) 0x43f578 STR D0, [X9], #8 |
(41) 0x43f57c B.NE 43f560 |
(39) 0x43f580 CMP X15, #3 |
(39) 0x43f584 B.CC 43f460 |
(39) 0x43f588 LDUR X9, [X29, #456] |
(39) 0x43f58c ADD X15, X9, X12 |
(39) 0x43f590 UBFM X9, X12, #61, #60 |
(39) 0x43f594 ADD X12, X20, X9 |
(39) 0x43f598 ADD X4, X2, X9 |
(39) 0x43f59c HINT #0 |
(40) 0x43f5a0 LDR D0, [X14, X3,LSL #3] |
(40) 0x43f5a4 LDUR D1, [X12, #496] |
(40) 0x43f5a8 LDP D2, D3, [X4, #1008] |
(40) 0x43f5ac ADDS X15, X15, #4 |
(40) 0x43f5b0 FMADD D0, D0, D1, D2 |
(40) 0x43f5b4 STUR D0, [X4, #496] |
(40) 0x43f5b8 LDR D0, [X14, X3,LSL #3] |
(40) 0x43f5bc LDUR D1, [X12, #504] |
(40) 0x43f5c0 FMADD D0, D0, D1, D3 |
(40) 0x43f5c4 LDP D2, D3, [X4] |
(40) 0x43f5c8 STUR D0, [X4, #504] |
(40) 0x43f5cc LDR D0, [X14, X3,LSL #3] |
(40) 0x43f5d0 LDR D1, [X12] |
(40) 0x43f5d4 FMADD D0, D0, D1, D2 |
(40) 0x43f5d8 STR D0, [X4] |
(40) 0x43f5dc LDR D0, [X14, X3,LSL #3] |
(40) 0x43f5e0 LDR D1, [X12, #8] |
(40) 0x43f5e4 ADD X12, X12, #32 |
(40) 0x43f5e8 FMADD D0, D0, D1, D3 |
(40) 0x43f5ec STR D0, [X4, #8] |
(40) 0x43f5f0 ADD X4, X4, #32 |
(40) 0x43f5f4 B.NE 43f5a0 |
(39) 0x43f5f8 B 43f460 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | __kmp_invoke_microtask | libomp.so |
Path / |
Source file and lines | Collapse.hpp:81-84 |
Module | exec |
nb instructions | 70 |
loop length | 280 |
nb stack references | 0 |
front end | 7.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 2.00 | 6.50 | 6.50 | 6.50 | 6.50 | 0.00 | 0.00 | 0.00 | 0.00 | 10.50 | 10.17 | 10.33 | 8.00 | 8.00 |
cycles | 2.00 | 2.00 | 6.50 | 6.50 | 6.50 | 6.50 | 0.00 | 0.00 | 0.00 | 0.00 | 10.50 | 10.17 | 10.33 | 8.00 | 8.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Front-end | 7.50 |
Overall L1 | 10.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
SUB SP, SP, #352 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X29, X30, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X28, X27, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X26, X25, [SP, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X24, X23, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X22, X21, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X20, X19, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #256 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X8, [X2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X26, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CCMP X26, #1, #8, #10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B.LT 43f27c <.omp_outlined.+0xdc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [X4] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X22, X11, [X4, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR W1, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X0, <4b31e4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #312 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X29, #36 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X5, X29, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X27, [X4, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X24, X25, [X4, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X19, [X4, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X6, X29, #32 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W2, #34 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W7, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X21, [X4, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR WZR, [X29, #476] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X10, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X9, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STUR X11, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR W1, [SP, #20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MADD X23, X26, X8, X9 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDP X28, X9, [X4, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X8, [X4, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X23, XZR, [X29, #1000] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X9, [X29, #936] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X20, X9, [X4, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X8, [X4, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X4, X29, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 402c90 <@plt_start@+0x4e0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X8, X0, [X29, #1000] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
CMP X8, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X8, X8, X23, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X0, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STUR X8, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LE 43f29c <.omp_outlined.+0xfc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
UDIV X9, X11, X27 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ORR X15, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADDVL X13, X8, #1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MADD X12, X9, X27, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X9, X14, X3,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LD1RD {Z0.D}, P0/Z, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
SUB X4, X11, X12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADDVL X9, X0, #1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
HINT #0 | ||||||||||||||||||
CBZ X4, 43f460 <.omp_outlined.+0x2c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 |
Source file and lines | Collapse.hpp:81-84 |
Module | exec |
nb instructions | 70 |
loop length | 280 |
nb stack references | 0 |
front end | 7.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 2.00 | 6.50 | 6.50 | 6.50 | 6.50 | 0.00 | 0.00 | 0.00 | 0.00 | 10.50 | 10.17 | 10.33 | 8.00 | 8.00 |
cycles | 2.00 | 2.00 | 6.50 | 6.50 | 6.50 | 6.50 | 0.00 | 0.00 | 0.00 | 0.00 | 10.50 | 10.17 | 10.33 | 8.00 | 8.00 |
Cycles executing div or sqrt instructions | 1.00-0.50 |
Front-end | 7.50 |
Overall L1 | 10.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
SUB SP, SP, #352 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STP X29, X30, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X28, X27, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X26, X25, [SP, #288] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X24, X23, [SP, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X22, X21, [SP, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X20, X19, [SP, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
ADD X29, SP, #256 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X8, [X2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDR X26, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CCMP X26, #1, #8, #10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
B.LT 43f27c <.omp_outlined.+0xdc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDR X9, [X4] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X22, X11, [X4, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR W1, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
MOVZ W10, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADRP X0, <4b31e4> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD X0, X0, #312 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X3, X29, #36 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SUB X5, X29, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X27, [X4, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
LDP X24, X25, [X4, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X19, [X4, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X6, X29, #32 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W2, #34 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOVZ W7, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LDR X21, [X4, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STUR WZR, [X29, #476] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X10, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STUR X9, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STUR X11, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STR W1, [SP, #20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
MADD X23, X26, X8, X9 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
LDP X28, X9, [X4, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X8, [X4, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
STP X23, XZR, [X29, #1000] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X9, [X29, #936] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
LDP X20, X9, [X4, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
LDR X8, [X4, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 |
SUB X4, X29, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
STR X10, [SP] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
STP X8, X9, [X29, #920] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
BL 402c90 <@plt_start@+0x4e0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LDP X8, X0, [X29, #1000] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 |
CMP X8, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
CSEL X8, X8, X23, #11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP X0, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
STUR X8, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 |
B.LE 43f29c <.omp_outlined.+0xfc> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
UDIV X9, X11, X27 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 1-0.50 |
ORR X15, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADDVL X13, X8, #1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
MADD X12, X9, X27, XZR | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
ADD X9, X14, X3,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LD1RD {Z0.D}, P0/Z, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 |
SUB X4, X11, X12 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADDVL X9, X0, #1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 |
HINT #0 | ||||||||||||||||||
CBZ X4, 43f460 <.omp_outlined.+0x2c0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 | ||||||||||||||||||
HINT #0 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼.omp_outlined.#0x43f1a0– | 14.61 | 2.01 |
○Loop 42 - forall.hpp:59-59 - exec | 14.5 | 1.99 |
▼Loop 39 - LTimes.cpp:62-62 - exec– | 0.11 | 0.01 |
○Loop 40 - forall.hpp:59-59 - exec | 0 | 0 |
▼Loop 38 - forall.hpp:59-59 - exec– | 0 | 0 |
○Loop 37 - forall.hpp:59-59 - exec | 0 | 0 |
○Loop 41 - forall.hpp:59-59 - exec | 0 | 0 |