Function: void RAJA::internal::StatementExecutor<RAJA::statement::Collapse<RAJA::omp_parallel_collap ... | Module: libkripke.so | Source: Collapse.hpp:81-81 [...] | Coverage: 3.69% |
---|
Function: void RAJA::internal::StatementExecutor<RAJA::statement::Collapse<RAJA::omp_parallel_collap ... | Module: libkripke.so | Source: Collapse.hpp:81-81 [...] | Coverage: 3.69% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 79 - 110 |
-------------------------------------------------------------------------------- |
79: : layout(V.layout), data(V.data) |
[...] |
110: return data[idx]; |
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 81 |
-------------------------------------------------------------------------------- |
81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \ |
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 55 - 55 |
-------------------------------------------------------------------------------- |
55: return a * b; |
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 307 - 307 |
-------------------------------------------------------------------------------- |
307: return Ret{lhs} + rhs; |
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/RangeSegment.hpp: 120 - 120 |
-------------------------------------------------------------------------------- |
120: RAJA_HOST_DEVICE RAJA_INLINE ~TypedRangeSegment() {} |
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp: 55 - 177 |
-------------------------------------------------------------------------------- |
55: : val(rhs.val) |
[...] |
142: return val - rhs.val; |
[...] |
177: return value_type(val + rhs); |
/home/eoseret/qaas_runs_CPU_9468/171-147-9160/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62 |
-------------------------------------------------------------------------------- |
62: phi(nm,g,z) += ell(nm, d) * psi(d, g, z); |
0x4c2e0 PUSH %RBP |
0x4c2e1 MOV %RSP,%RBP |
0x4c2e4 PUSH %R15 |
0x4c2e6 PUSH %R14 |
0x4c2e8 PUSH %R13 |
0x4c2ea PUSH %R12 |
0x4c2ec PUSH %RBX |
0x4c2ed AND $-0x20,%RSP |
0x4c2f1 SUB $0xe0,%RSP |
0x4c2f8 MOV 0x10(%RDI),%RAX |
0x4c2fc MOV (%RAX),%RBX |
0x4c2ff MOV 0x118(%RAX),%R15 |
0x4c306 MOV 0x18(%RAX),%RDX |
0x4c30a MOV 0x20(%RAX),%RCX |
0x4c30e MOV 0x38(%RAX),%RSI |
0x4c312 MOV 0x60(%RAX),%R8 |
0x4c316 MOV %RBX,(%RSP) |
0x4c31a MOV 0x68(%RAX),%R9 |
0x4c31e MOV 0xa8(%RAX),%R10 |
0x4c325 MOV %R15,0x40(%RSP) |
0x4c32a MOV 0xc8(%RAX),%R11 |
0x4c331 MOV 0xf0(%RAX),%R12 |
0x4c338 MOV %RDX,0xd0(%RSP) |
0x4c340 MOV 0x110(%RAX),%R14 |
0x4c347 MOV 0x10(%RAX),%R13 |
0x4c34b MOV %RCX,0x50(%RSP) |
0x4c350 MOV 0x30(%RAX),%RBX |
0x4c354 MOV %RSI,0x58(%RSP) |
0x4c359 MOV %R8,0x30(%RSP) |
0x4c35e MOV %R9,0x38(%RSP) |
0x4c363 MOV %R10,0xd8(%RSP) |
0x4c36b MOV %R11,0xb8(%RSP) |
0x4c373 MOV %R12,0x48(%RSP) |
0x4c378 MOV %R14,0xc8(%RSP) |
0x4c380 MOV 0x158(%RAX),%R14 |
0x4c387 MOV (%RDI),%R15 |
0x4c38a MOV 0x8(%RDI),%RAX |
0x4c38e TEST %R15,%R15 |
0x4c391 JLE 4c875 |
0x4c397 MOV %RAX,0x68(%RSP) |
0x4c39c TEST %RAX,%RAX |
0x4c39f JLE 4c875 |
0x4c3a5 CALL 9760 <omp_get_num_threads@plt> |
0x4c3aa MOVSXD %EAX,%R12 |
0x4c3ad CALL 9650 <omp_get_thread_num@plt> |
0x4c3b2 XOR %EDX,%EDX |
0x4c3b4 MOV 0xd8(%RSP),%R9 |
0x4c3bc MOVSXD %EAX,%RDI |
0x4c3bf MOV 0x68(%RSP),%RAX |
0x4c3c4 IMUL %R15,%RAX |
0x4c3c8 DIV %R12 |
0x4c3cb CMP %RDX,%RDI |
0x4c3ce MOV %RAX,%RCX |
0x4c3d1 JB 4caae |
0x4c3d7 IMUL %RCX,%RDI |
0x4c3db LEA (%RDI,%RDX,1),%RAX |
0x4c3df LEA (%RCX,%RAX,1),%RSI |
0x4c3e3 CMP %RSI,%RAX |
0x4c3e6 JAE 4c875 |
0x4c3ec XOR %EDX,%EDX |
0x4c3ee MOV 0xd0(%RSP),%R10 |
0x4c3f6 MOV 0x58(%RSP),%R11 |
0x4c3fb DIVQ 0x68(%RSP) |
0x4c400 SUB %R13,%R10 |
0x4c403 SUB %RBX,%R11 |
0x4c406 MOV %R10,0xc0(%RSP) |
0x4c40e MOV %RAX,0x60(%RSP) |
0x4c413 MOV %RDX,%R8 |
0x4c416 TEST %R10,%R10 |
0x4c419 JLE 4c875 |
0x4c41f TEST %R11,%R11 |
0x4c422 JLE 4c875 |
0x4c428 MOV 0xb8(%RSP),%R12 |
0x4c430 MOV 0xc8(%RSP),%RDI |
0x4c438 LEA -0x1(%RCX),%R15 |
0x4c43c MOV %R11,%RAX |
0x4c43f MOV %R15,0x10(%RSP) |
0x4c444 LEA -0x1(%R11),%RCX |
0x4c448 MOV 0x60(%RSP),%R10 |
0x4c44d SHR $0x2,%RAX |
0x4c451 LEA (,%R12,8),%R15 |
0x4c459 MOV %RCX,0x98(%RSP) |
0x4c461 MOV %R11,%RSI |
0x4c464 MOV %R11,%RCX |
0x4c467 IMUL %R13,%R12 |
0x4c46b SAL $0x5,%RAX |
0x4c46f AND $-0x4,%RSI |
0x4c473 XOR %EDX,%EDX |
0x4c475 IMUL %RDI,%R13 |
0x4c479 AND $0x3,%ECX |
0x4c47c MOV %RAX,0xb8(%RSP) |
0x4c484 MOV %RSI,0x80(%RSP) |
0x4c48c MOV %R12,0x20(%RSP) |
0x4c491 MOV %R13,0x18(%RSP) |
0x4c496 LEA (,%RDI,8),%R13 |
0x4c49e MOV (%RSP),%RDI |
0x4c4a2 MOV %R13,0xb0(%RSP) |
0x4c4aa MOV %R11,%R13 |
0x4c4ad ADD %RDI,%R10 |
0x4c4b0 LEA 0x1(%RDI,%R12,1),%R12 |
0x4c4b5 AND $0x3,%R13D |
0x4c4b9 MOV %RCX,0x78(%RSP) |
0x4c4be MOV %R10,0x28(%RSP) |
0x4c4c3 MOV %R12,0x8(%RSP) |
0x4c4c8 MOV %R13,0x90(%RSP) |
0x4c4d0 MOV %R8,0x88(%RSP) |
0x4c4d8 MOV %R11,0xd8(%RSP) |
0x4c4e0 MOV %RDX,0x70(%RSP) |
0x4c4e5 NOPL (%RAX) |
(405) 0x4c4e8 MOV 0x28(%RSP),%R11 |
(405) 0x4c4ed MOV 0x88(%RSP),%R8 |
(405) 0x4c4f5 MOV 0x50(%RSP),%RDI |
(405) 0x4c4fa MOV 0x30(%RSP),%R12 |
(405) 0x4c4ff MOV 0x20(%RSP),%RSI |
(405) 0x4c504 MOV 0x38(%RSP),%RAX |
(405) 0x4c509 ADD %R8,%RDI |
(405) 0x4c50c IMUL %R11,%R12 |
(405) 0x4c510 MOV 0x8(%RSP),%R8 |
(405) 0x4c515 MOV 0x48(%RSP),%RDX |
(405) 0x4c51a ADD %R11,%RSI |
(405) 0x4c51d MOV 0x60(%RSP),%R11 |
(405) 0x4c522 IMUL %RDI,%RAX |
(405) 0x4c526 MOV 0x40(%RSP),%R10 |
(405) 0x4c52b LEA (%RDX,%RSI,8),%RSI |
(405) 0x4c52f MOV 0x18(%RSP),%R13 |
(405) 0x4c534 ADD %R11,%R8 |
(405) 0x4c537 IMUL %R10,%RDI |
(405) 0x4c53b XOR %R11D,%R11D |
(405) 0x4c53e LEA (%RDX,%R8,8),%R8 |
(405) 0x4c542 MOV 0x58(%RSP),%RDX |
(405) 0x4c547 ADD %RAX,%R12 |
(405) 0x4c54a LEA (%R12,%RBX,1),%RAX |
(405) 0x4c54e ADD %R12,%RDX |
(405) 0x4c551 ADD %R13,%RDI |
(405) 0x4c554 MOV %RAX,0xa8(%RSP) |
(405) 0x4c55c LEA (%R9,%RAX,8),%RAX |
(405) 0x4c560 LEA (%R9,%RDX,8),%R10 |
(405) 0x4c564 LEA (%RBX,%RDI,1),%RCX |
(405) 0x4c568 MOV %R10,0xd0(%RSP) |
(405) 0x4c570 LEA (%R14,%RCX,8),%RCX |
(405) 0x4c574 NOPL (%RAX) |
(404) 0x4c578 CMPQ $0x1,0xd8(%RSP) |
(404) 0x4c581 JE 4ca48 |
(404) 0x4c587 MOV 0xd0(%RSP),%RDX |
(404) 0x4c58f LEA -0x8(%R8),%R13 |
(404) 0x4c593 CMP %RDX,%R13 |
(404) 0x4c596 SETAE %R10B |
(404) 0x4c59a CMP %R8,%RAX |
(404) 0x4c59d SETAE %R13B |
(404) 0x4c5a1 OR %R10B,%R13B |
(404) 0x4c5a4 JE 4c888 |
(404) 0x4c5aa LEA 0x8(%RCX),%R10 |
(404) 0x4c5ae MOV %RAX,%RDX |
(404) 0x4c5b1 SUB %R10,%RDX |
(404) 0x4c5b4 CMP $0x10,%RDX |
(404) 0x4c5b8 JBE 4c888 |
(404) 0x4c5be CMPQ $0x2,0x98(%RSP) |
(404) 0x4c5c7 JBE 4ca5e |
(404) 0x4c5cd MOV 0xb8(%RSP),%R13 |
(404) 0x4c5d5 VBROADCASTSD (%RSI),%YMM2 |
(404) 0x4c5da XOR %EDX,%EDX |
(404) 0x4c5dc SUB $0x20,%R13 |
(404) 0x4c5e0 SHR $0x5,%R13 |
(404) 0x4c5e4 INC %R13 |
(404) 0x4c5e7 AND $0x7,%R13D |
(404) 0x4c5eb JE 4c6b1 |
(404) 0x4c5f1 CMP $0x1,%R13 |
(404) 0x4c5f5 JE 4c68f |
(404) 0x4c5fb CMP $0x2,%R13 |
(404) 0x4c5ff JE 4c67b |
(404) 0x4c601 CMP $0x3,%R13 |
(404) 0x4c605 JE 4c667 |
(404) 0x4c607 CMP $0x4,%R13 |
(404) 0x4c60b JE 4c653 |
(404) 0x4c60d CMP $0x5,%R13 |
(404) 0x4c611 JE 4c63f |
(404) 0x4c613 CMP $0x6,%R13 |
(404) 0x4c617 JE 4c62b |
(404) 0x4c619 VMOVUPD (%RCX),%YMM1 |
(404) 0x4c61d MOV $0x20,%EDX |
(404) 0x4c622 VFMADD213PD (%RAX),%YMM2,%YMM1 |
(404) 0x4c627 VMOVUPD %YMM1,(%RAX) |
(404) 0x4c62b VMOVUPD (%RCX,%RDX,1),%YMM3 |
(404) 0x4c630 VFMADD213PD (%RAX,%RDX,1),%YMM2,%YMM3 |
(404) 0x4c636 VMOVUPD %YMM3,(%RAX,%RDX,1) |
(404) 0x4c63b ADD $0x20,%RDX |
(404) 0x4c63f VMOVUPD (%RCX,%RDX,1),%YMM5 |
(404) 0x4c644 VFMADD213PD (%RAX,%RDX,1),%YMM2,%YMM5 |
(404) 0x4c64a VMOVUPD %YMM5,(%RAX,%RDX,1) |
(404) 0x4c64f ADD $0x20,%RDX |
(404) 0x4c653 VMOVUPD (%RCX,%RDX,1),%YMM6 |
(404) 0x4c658 VFMADD213PD (%RAX,%RDX,1),%YMM2,%YMM6 |
(404) 0x4c65e VMOVUPD %YMM6,(%RAX,%RDX,1) |
(404) 0x4c663 ADD $0x20,%RDX |
(404) 0x4c667 VMOVUPD (%RCX,%RDX,1),%YMM7 |
(404) 0x4c66c VFMADD213PD (%RAX,%RDX,1),%YMM2,%YMM7 |
(404) 0x4c672 VMOVUPD %YMM7,(%RAX,%RDX,1) |
(404) 0x4c677 ADD $0x20,%RDX |
(404) 0x4c67b VMOVUPD (%RCX,%RDX,1),%YMM8 |
(404) 0x4c680 VFMADD213PD (%RAX,%RDX,1),%YMM2,%YMM8 |
(404) 0x4c686 VMOVUPD %YMM8,(%RAX,%RDX,1) |
(404) 0x4c68b ADD $0x20,%RDX |
(404) 0x4c68f VMOVUPD (%RCX,%RDX,1),%YMM9 |
(404) 0x4c694 VFMADD213PD (%RAX,%RDX,1),%YMM2,%YMM9 |
(404) 0x4c69a VMOVUPD %YMM9,(%RAX,%RDX,1) |
(404) 0x4c69f ADD $0x20,%RDX |
(404) 0x4c6a3 CMP %RDX,0xb8(%RSP) |
(404) 0x4c6ab JE 4c77f |
(407) 0x4c6b1 VMOVUPD (%RCX,%RDX,1),%YMM10 |
(407) 0x4c6b6 VFMADD213PD (%RAX,%RDX,1),%YMM2,%YMM10 |
(407) 0x4c6bc VMOVUPD %YMM10,(%RAX,%RDX,1) |
(407) 0x4c6c1 VMOVUPD 0x20(%RDX,%RCX,1),%YMM11 |
(407) 0x4c6c7 VFMADD213PD 0x20(%RAX,%RDX,1),%YMM2,%YMM11 |
(407) 0x4c6ce VMOVUPD %YMM11,0x20(%RAX,%RDX,1) |
(407) 0x4c6d4 VMOVUPD 0x40(%RDX,%RCX,1),%YMM12 |
(407) 0x4c6da VFMADD213PD 0x40(%RAX,%RDX,1),%YMM2,%YMM12 |
(407) 0x4c6e1 VMOVUPD %YMM12,0x40(%RAX,%RDX,1) |
(407) 0x4c6e7 VMOVUPD 0x60(%RDX,%RCX,1),%YMM13 |
(407) 0x4c6ed VFMADD213PD 0x60(%RAX,%RDX,1),%YMM2,%YMM13 |
(407) 0x4c6f4 VMOVUPD %YMM13,0x60(%RAX,%RDX,1) |
(407) 0x4c6fa VMOVUPD 0x80(%RDX,%RCX,1),%YMM14 |
(407) 0x4c703 VFMADD213PD 0x80(%RAX,%RDX,1),%YMM2,%YMM14 |
(407) 0x4c70d VMOVUPD %YMM14,0x80(%RAX,%RDX,1) |
(407) 0x4c716 VMOVUPD 0xa0(%RDX,%RCX,1),%YMM15 |
(407) 0x4c71f VFMADD213PD 0xa0(%RAX,%RDX,1),%YMM2,%YMM15 |
(407) 0x4c729 VMOVUPD %YMM15,0xa0(%RAX,%RDX,1) |
(407) 0x4c732 VMOVUPD 0xc0(%RDX,%RCX,1),%YMM0 |
(407) 0x4c73b VFMADD213PD 0xc0(%RAX,%RDX,1),%YMM2,%YMM0 |
(407) 0x4c745 VMOVUPD %YMM0,0xc0(%RAX,%RDX,1) |
(407) 0x4c74e VMOVUPD 0xe0(%RDX,%RCX,1),%YMM4 |
(407) 0x4c757 VFMADD213PD 0xe0(%RAX,%RDX,1),%YMM2,%YMM4 |
(407) 0x4c761 VMOVUPD %YMM4,0xe0(%RAX,%RDX,1) |
(407) 0x4c76a ADD $0x100,%RDX |
(407) 0x4c771 CMP %RDX,0xb8(%RSP) |
(407) 0x4c779 JNE 4c6b1 |
(404) 0x4c77f CMPQ $0,0x90(%RSP) |
(404) 0x4c788 JE 4c811 |
(404) 0x4c78e MOV 0x78(%RSP),%R10 |
(404) 0x4c793 MOV %R10,%RDX |
(404) 0x4c796 CMP $0x1,%R10 |
(404) 0x4c79a JE 4ca7a |
(404) 0x4c7a0 MOV 0x80(%RSP),%R10 |
(404) 0x4c7a8 MOV %R10,0xa0(%RSP) |
(404) 0x4c7b0 MOV 0xa8(%RSP),%R13 |
(404) 0x4c7b8 VMOVDDUP (%RSI),%XMM2 |
(404) 0x4c7bc ADD %R10,%R13 |
(404) 0x4c7bf ADD %RBX,%R10 |
(404) 0x4c7c2 LEA (%R9,%R13,8),%R13 |
(404) 0x4c7c6 ADD %RDI,%R10 |
(404) 0x4c7c9 VMOVUPD (%R13),%XMM1 |
(404) 0x4c7cf VFMADD132PD (%R14,%R10,8),%XMM1,%XMM2 |
(404) 0x4c7d5 VMOVUPD %XMM2,(%R13) |
(404) 0x4c7db TEST $0x1,%DL |
(404) 0x4c7de JE 4c811 |
(404) 0x4c7e0 MOV 0xa0(%RSP),%R10 |
(404) 0x4c7e8 AND $-0x2,%RDX |
(404) 0x4c7ec ADD %R10,%RDX |
(404) 0x4c7ef ADD %RBX,%RDX |
(404) 0x4c7f2 VMOVSD (%RSI),%XMM3 |
(404) 0x4c7f6 LEA (%R12,%RDX,1),%R13 |
(404) 0x4c7fa ADD %RDI,%RDX |
(404) 0x4c7fd LEA (%R9,%R13,8),%R10 |
(404) 0x4c801 VMOVSD (%R10),%XMM5 |
(404) 0x4c806 VFMADD132SD (%R14,%RDX,8),%XMM5,%XMM3 |
(404) 0x4c80c VMOVSD %XMM3,(%R10) |
(404) 0x4c811 MOV 0xc8(%RSP),%R10 |
(404) 0x4c819 MOV 0xb0(%RSP),%R13 |
(404) 0x4c821 INC %R11 |
(404) 0x4c824 ADD %R15,%RSI |
(404) 0x4c827 MOV 0xc0(%RSP),%RDX |
(404) 0x4c82f ADD %R15,%R8 |
(404) 0x4c832 ADD %R10,%RDI |
(404) 0x4c835 ADD %R13,%RCX |
(404) 0x4c838 CMP %RDX,%R11 |
(404) 0x4c83b JNE 4c578 |
(405) 0x4c841 MOV 0x10(%RSP),%RDI |
(405) 0x4c846 CMP %RDI,0x70(%RSP) |
(405) 0x4c84b JE 4c872 |
(405) 0x4c84d INCQ 0x88(%RSP) |
(405) 0x4c855 MOV 0x88(%RSP),%R12 |
(405) 0x4c85d CMP %R12,0x68(%RSP) |
(405) 0x4c862 JLE 4ca87 |
(405) 0x4c868 INCQ 0x70(%RSP) |
(405) 0x4c86d JMP 4c4e8 |
0x4c872 VZEROUPPER |
0x4c875 LEA -0x28(%RBP),%RSP |
0x4c879 POP %RBX |
0x4c87a POP %R12 |
0x4c87c POP %R13 |
0x4c87e POP %R14 |
0x4c880 POP %R15 |
0x4c882 POP %RBP |
0x4c883 RET |
0x4c884 NOPL (%RAX) |
(404) 0x4c888 MOV 0xd8(%RSP),%R13 |
(404) 0x4c890 XOR %EDX,%EDX |
(404) 0x4c892 AND $0x7,%R13D |
(404) 0x4c896 JE 4c976 |
(404) 0x4c89c CMP $0x1,%R13 |
(404) 0x4c8a0 JE 4c951 |
(404) 0x4c8a6 CMP $0x2,%R13 |
(404) 0x4c8aa JE 4c93a |
(404) 0x4c8b0 CMP $0x3,%R13 |
(404) 0x4c8b4 JE 4c923 |
(404) 0x4c8b6 CMP $0x4,%R13 |
(404) 0x4c8ba JE 4c90c |
(404) 0x4c8bc CMP $0x5,%R13 |
(404) 0x4c8c0 JE 4c8f5 |
(404) 0x4c8c2 CMP $0x6,%R13 |
(404) 0x4c8c6 JE 4c8de |
(404) 0x4c8c8 VMOVSD (%RCX),%XMM7 |
(404) 0x4c8cc VMOVSD (%RAX),%XMM6 |
(404) 0x4c8d0 MOV $0x1,%EDX |
(404) 0x4c8d5 VFMADD132SD (%RSI),%XMM6,%XMM7 |
(404) 0x4c8da VMOVSD %XMM7,(%RAX) |
(404) 0x4c8de VMOVSD (%RCX,%RDX,8),%XMM8 |
(404) 0x4c8e3 VMOVSD (%RAX,%RDX,8),%XMM9 |
(404) 0x4c8e8 VFMADD132SD (%RSI),%XMM9,%XMM8 |
(404) 0x4c8ed VMOVSD %XMM8,(%RAX,%RDX,8) |
(404) 0x4c8f2 INC %RDX |
(404) 0x4c8f5 VMOVSD (%RCX,%RDX,8),%XMM10 |
(404) 0x4c8fa VMOVSD (%RAX,%RDX,8),%XMM11 |
(404) 0x4c8ff VFMADD132SD (%RSI),%XMM11,%XMM10 |
(404) 0x4c904 VMOVSD %XMM10,(%RAX,%RDX,8) |
(404) 0x4c909 INC %RDX |
(404) 0x4c90c VMOVSD (%RCX,%RDX,8),%XMM12 |
(404) 0x4c911 VMOVSD (%RAX,%RDX,8),%XMM13 |
(404) 0x4c916 VFMADD132SD (%RSI),%XMM13,%XMM12 |
(404) 0x4c91b VMOVSD %XMM12,(%RAX,%RDX,8) |
(404) 0x4c920 INC %RDX |
(404) 0x4c923 VMOVSD (%RCX,%RDX,8),%XMM14 |
(404) 0x4c928 VMOVSD (%RAX,%RDX,8),%XMM15 |
(404) 0x4c92d VFMADD132SD (%RSI),%XMM15,%XMM14 |
(404) 0x4c932 VMOVSD %XMM14,(%RAX,%RDX,8) |
(404) 0x4c937 INC %RDX |
(404) 0x4c93a VMOVSD (%RCX,%RDX,8),%XMM0 |
(404) 0x4c93f VMOVSD (%RAX,%RDX,8),%XMM4 |
(404) 0x4c944 VFMADD132SD (%RSI),%XMM4,%XMM0 |
(404) 0x4c949 VMOVSD %XMM0,(%RAX,%RDX,8) |
(404) 0x4c94e INC %RDX |
(404) 0x4c951 VMOVSD (%RCX,%RDX,8),%XMM2 |
(404) 0x4c956 VMOVSD (%RAX,%RDX,8),%XMM1 |
(404) 0x4c95b VFMADD132SD (%RSI),%XMM1,%XMM2 |
(404) 0x4c960 VMOVSD %XMM2,(%RAX,%RDX,8) |
(404) 0x4c965 INC %RDX |
(404) 0x4c968 CMP %RDX,0xd8(%RSP) |
(404) 0x4c970 JE 4c811 |
(406) 0x4c976 VMOVSD (%RCX,%RDX,8),%XMM3 |
(406) 0x4c97b VMOVSD (%RAX,%RDX,8),%XMM5 |
(406) 0x4c980 VMOVSD 0x8(%RAX,%RDX,8),%XMM6 |
(406) 0x4c986 VMOVSD 0x10(%RAX,%RDX,8),%XMM9 |
(406) 0x4c98c VFMADD132SD (%RSI),%XMM5,%XMM3 |
(406) 0x4c991 VMOVSD 0x18(%RAX,%RDX,8),%XMM11 |
(406) 0x4c997 VMOVSD 0x20(%RAX,%RDX,8),%XMM13 |
(406) 0x4c99d VMOVSD 0x28(%RAX,%RDX,8),%XMM15 |
(406) 0x4c9a3 VMOVSD 0x30(%RAX,%RDX,8),%XMM4 |
(406) 0x4c9a9 VMOVSD 0x38(%RAX,%RDX,8),%XMM1 |
(406) 0x4c9af VMOVSD %XMM3,(%RAX,%RDX,8) |
(406) 0x4c9b4 VMOVSD 0x8(%RCX,%RDX,8),%XMM7 |
(406) 0x4c9ba VFMADD132SD (%RSI),%XMM6,%XMM7 |
(406) 0x4c9bf VMOVSD %XMM7,0x8(%RAX,%RDX,8) |
(406) 0x4c9c5 VMOVSD 0x10(%RCX,%RDX,8),%XMM8 |
(406) 0x4c9cb VFMADD132SD (%RSI),%XMM9,%XMM8 |
(406) 0x4c9d0 VMOVSD %XMM8,0x10(%RAX,%RDX,8) |
(406) 0x4c9d6 VMOVSD 0x18(%RCX,%RDX,8),%XMM10 |
(406) 0x4c9dc VFMADD132SD (%RSI),%XMM11,%XMM10 |
(406) 0x4c9e1 VMOVSD %XMM10,0x18(%RAX,%RDX,8) |
(406) 0x4c9e7 VMOVSD 0x20(%RCX,%RDX,8),%XMM12 |
(406) 0x4c9ed VFMADD132SD (%RSI),%XMM13,%XMM12 |
(406) 0x4c9f2 VMOVSD %XMM12,0x20(%RAX,%RDX,8) |
(406) 0x4c9f8 VMOVSD 0x28(%RCX,%RDX,8),%XMM14 |
(406) 0x4c9fe VFMADD132SD (%RSI),%XMM15,%XMM14 |
(406) 0x4ca03 VMOVSD %XMM14,0x28(%RAX,%RDX,8) |
(406) 0x4ca09 VMOVSD 0x30(%RCX,%RDX,8),%XMM0 |
(406) 0x4ca0f VFMADD132SD (%RSI),%XMM4,%XMM0 |
(406) 0x4ca14 VMOVSD %XMM0,0x30(%RAX,%RDX,8) |
(406) 0x4ca1a VMOVSD 0x38(%RCX,%RDX,8),%XMM2 |
(406) 0x4ca20 VFMADD132SD (%RSI),%XMM1,%XMM2 |
(406) 0x4ca25 VMOVSD %XMM2,0x38(%RAX,%RDX,8) |
(406) 0x4ca2b ADD $0x8,%RDX |
(406) 0x4ca2f CMP %RDX,0xd8(%RSP) |
(406) 0x4ca37 JNE 4c976 |
(404) 0x4ca3d JMP 4c811 |
0x4ca42 NOPW (%RAX,%RAX,1) |
(404) 0x4ca48 VMOVSD (%RCX),%XMM0 |
(404) 0x4ca4c VMOVSD (%RAX),%XMM4 |
(404) 0x4ca50 VFMADD132SD (%RSI),%XMM4,%XMM0 |
(404) 0x4ca55 VMOVSD %XMM0,(%RAX) |
(404) 0x4ca59 JMP 4c811 |
(404) 0x4ca5e MOVQ $0,0xa0(%RSP) |
(404) 0x4ca6a MOV 0xd8(%RSP),%RDX |
(404) 0x4ca72 XOR %R10D,%R10D |
(404) 0x4ca75 JMP 4c7b0 |
(404) 0x4ca7a MOV 0x80(%RSP),%RDX |
(404) 0x4ca82 JMP 4c7ef |
(405) 0x4ca87 INCQ 0x60(%RSP) |
(405) 0x4ca8c MOV (%RSP),%RCX |
(405) 0x4ca90 MOVQ $0,0x88(%RSP) |
(405) 0x4ca9c MOV 0x60(%RSP),%RSI |
(405) 0x4caa1 ADD %RCX,%RSI |
(405) 0x4caa4 MOV %RSI,0x28(%RSP) |
(405) 0x4caa9 JMP 4c868 |
0x4caae INC %RCX |
0x4cab1 XOR %EDX,%EDX |
0x4cab3 JMP 4c3d7 |
0x4cab8 NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○97.64 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○2.36 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | Collapse.hpp:81-81 |
Module | libkripke.so |
nb instructions | 124 |
nb uops | 135 |
loop length | 566 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 27 |
micro-operation queue | 22.50 cycles |
front end | 22.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.30 | 11.00 | 11.00 | 11.00 | 18.00 | 6.20 | 6.30 | 18.00 | 18.00 | 18.00 | 6.20 | 11.00 |
cycles | 6.30 | 14.47 | 11.00 | 11.00 | 18.00 | 6.20 | 6.30 | 18.00 | 18.00 | 18.00 | 6.20 | 11.00 |
Cycles executing div or sqrt instructions | 20.00 |
Front-end | 22.50 |
Dispatch | 18.00 |
DIV/SQRT | 20.00 |
Overall L1 | 22.50 |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
SUB $0xe0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
MOV 0x10(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x118(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x18(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0x20(%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0x38(%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x60(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %RBX,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x68(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0xa8(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %R15,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xc8(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0xf0(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV %RDX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x110(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x30(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R8,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R9,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R10,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R12,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R14,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x158(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV (%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
CALL 9760 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
MOVSXD %EAX,%R12 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 | N/A |
CALL 9650 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xd8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOVSXD %EAX,%RDI | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 | N/A |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
IMUL %R15,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
DIV %R12 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 | scal (12.5%) |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
JB 4caae <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x7ce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
IMUL %RCX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
LEA (%RDI,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
LEA (%RCX,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
JAE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x58(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
DIVQ 0x68(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 10 | scal (12.5%) |
SUB %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
SUB %RBX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RDX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
TEST %R10,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
TEST %R11,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
LEA -0x1(%RCX),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
MOV %R15,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA -0x1(%R11),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0x60(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
LEA (,%R12,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
MOV %R11,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
IMUL %R13,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | scal (12.5%) |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %RDI,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
AND $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RSI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R12,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R13,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA (,%RDI,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV (%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV %R13,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
ADD %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
LEA 0x1(%RDI,%R12,1),%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
AND $0x3,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | scal (6.3%) |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R10,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R12,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R13,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R8,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 | N/A |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
INC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
JMP 4c3d7 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0xf7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
Source file and lines | Collapse.hpp:81-81 |
Module | libkripke.so |
nb instructions | 124 |
nb uops | 135 |
loop length | 566 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 27 |
micro-operation queue | 22.50 cycles |
front end | 22.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.30 | 11.00 | 11.00 | 11.00 | 18.00 | 6.20 | 6.30 | 18.00 | 18.00 | 18.00 | 6.20 | 11.00 |
cycles | 6.30 | 14.47 | 11.00 | 11.00 | 18.00 | 6.20 | 6.30 | 18.00 | 18.00 | 18.00 | 6.20 | 11.00 |
Cycles executing div or sqrt instructions | 20.00 |
Front-end | 22.50 |
Dispatch | 18.00 |
DIV/SQRT | 20.00 |
Overall L1 | 22.50 |
all | 1% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 | N/A |
AND $-0x20,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
SUB $0xe0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
MOV 0x10(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV (%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x118(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x18(%RAX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0x20(%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0x38(%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x60(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %RBX,(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x68(%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0xa8(%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %R15,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xc8(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0xf0(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV %RDX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x110(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x30(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R8,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R9,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R10,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R12,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R14,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x158(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV (%RDI),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x8(%RDI),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
CALL 9760 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
MOVSXD %EAX,%R12 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 | N/A |
CALL 9650 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xd8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOVSXD %EAX,%RDI | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 | N/A |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
IMUL %R15,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
DIV %R12 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 | scal (12.5%) |
CMP %RDX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
JB 4caae <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x7ce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
IMUL %RCX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
LEA (%RDI,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
LEA (%RCX,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
JAE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
MOV 0x58(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
DIVQ 0x68(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 10 | scal (12.5%) |
SUB %R13,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
SUB %RBX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | N/A |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RDX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
TEST %R10,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
TEST %R11,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 | scal (12.5%) |
JLE 4c875 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0x595> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb8(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
LEA -0x1(%RCX),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
MOV %R15,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA -0x1(%R11),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0x60(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | scal (12.5%) |
SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
LEA (,%R12,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
MOV %R11,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
IMUL %R13,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
SAL $0x5,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 | N/A |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | scal (12.5%) |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %RDI,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | scal (12.5%) |
AND $0x3,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | N/A |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RSI,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R12,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R13,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA (,%RDI,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV (%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 | N/A |
MOV %R13,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | scal (12.5%) |
ADD %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 | scal (12.5%) |
LEA 0x1(%RDI,%R12,1),%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
AND $0x3,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 | scal (6.3%) |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R10,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R12,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R13,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R8,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R11,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 | N/A |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 | N/A |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
INC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
JMP 4c3d7 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_9DirectionElPSW_EESW_EENSO_INSQ_INSR_5GroupElPS10_EES10_EENSO_INSQ_INSR_4ZoneElPS14_EES14_EEEEENSM_IJEEEJZNK10LTimesSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdERKNSR_4Core3SetES1L_S1L_S1L_RNS1I_5FieldIdJSW_S10_S14_EEERNS1M_IdJSS_S10_S14_EEERNS1M_IdJSS_SW_EEEEUlSS_SW_S10_S14_E_EEEEEvOS1G_._omp_fn.0+0xf7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 | N/A |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
Name | Coverage (%) | Time (s) |
---|---|---|
▼void RAJA::internal::StatementExecutor | 3.69 | 2.15 |
▼Loop 405 - RangeSegment.hpp:120-120 - libkripke.so– | 0.00 | 0.00 |
▼Loop 404 - forall.hpp:59-59 - libkripke.so– | 0.00 | 0.00 |
○Loop 407 - forall.hpp:59-59 - libkripke.so | 3.69 | 1.70 |
○Loop 406 - forall.hpp:59-59 - libkripke.so | 0.00 | 0.00 |