Loop Id: 2050 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.04% |
---|
Loop Id: 2050 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.04% |
---|
0x4b3890 MOV -0x60(%RBP),%RDI |
0x4b3894 MOV -0x50(%RBP),%R8 |
0x4b3898 MOV %RAX,-0x40(%RBP) |
0x4b389c MOV -0x70(%RBP),%RCX |
0x4b38a0 MOV -0x58(%RBP),%R11 |
0x4b38a4 MOV %RDX,-0x48(%RBP) |
0x4b38a8 IMUL (%RDI),%R8 |
0x4b38ac XOR %EDI,%EDI |
0x4b38ae ADD %RAX,%RCX |
0x4b38b1 LEA (%R11,%RDX,8),%R11 |
0x4b38b5 ADD %R8,%RCX |
0x4b38b8 NOPL (%RAX,%RAX,1) |
(2049) 0x4b38c0 MOV -0x38(%RBP),%RDX |
(2049) 0x4b38c4 MOVSXD (%R10,%RDI,4),%RSI |
(2049) 0x4b38c8 MOV (%RDX,%RDI,8),%R8 |
(2049) 0x4b38cc ADD %R8,%RSI |
(2049) 0x4b38cf CMP %RSI,%R8 |
(2049) 0x4b38d2 JGE 4b3b48 |
(2049) 0x4b38d8 SAL $0x3,%RSI |
(2049) 0x4b38dc LEA (,%R8,8),%RAX |
(2049) 0x4b38e4 VXORPD %XMM0,%XMM0,%XMM0 |
(2049) 0x4b38e8 MOV %RSI,%RDX |
(2049) 0x4b38eb SUB %RAX,%RDX |
(2049) 0x4b38ee SUB $0x8,%RDX |
(2049) 0x4b38f2 SHR $0x3,%RDX |
(2049) 0x4b38f6 INC %RDX |
(2049) 0x4b38f9 AND $0x7,%EDX |
(2049) 0x4b38fc JE 4b39f4 |
(2049) 0x4b3902 CMP $0x1,%RDX |
(2049) 0x4b3906 JE 4b39d0 |
(2049) 0x4b390c CMP $0x2,%RDX |
(2049) 0x4b3910 JE 4b39b5 |
(2049) 0x4b3916 CMP $0x3,%RDX |
(2049) 0x4b391a JE 4b399a |
(2049) 0x4b391c CMP $0x4,%RDX |
(2049) 0x4b3920 JE 4b397f |
(2049) 0x4b3922 CMP $0x5,%RDX |
(2049) 0x4b3926 JE 4b3964 |
(2049) 0x4b3928 CMP $0x6,%RDX |
(2049) 0x4b392c JE 4b3949 |
(2049) 0x4b392e MOV (%R14,%R8,8),%RDX |
(2049) 0x4b3932 VMOVSD (%R15,%R8,8),%XMM7 |
(2049) 0x4b3938 ADD $0x8,%RAX |
(2049) 0x4b393c IMUL %R13,%RDX |
(2049) 0x4b3940 ADD %RCX,%RDX |
(2049) 0x4b3943 VFMADD231SD (%RBX,%RDX,8),%XMM7,%XMM0 |
(2049) 0x4b3949 MOV (%R14,%RAX,1),%R8 |
(2049) 0x4b394d VMOVSD (%R15,%RAX,1),%XMM1 |
(2049) 0x4b3953 ADD $0x8,%RAX |
(2049) 0x4b3957 IMUL %R13,%R8 |
(2049) 0x4b395b ADD %RCX,%R8 |
(2049) 0x4b395e VFMADD231SD (%RBX,%R8,8),%XMM1,%XMM0 |
(2049) 0x4b3964 MOV (%R14,%RAX,1),%RDX |
(2049) 0x4b3968 VMOVSD (%R15,%RAX,1),%XMM2 |
(2049) 0x4b396e ADD $0x8,%RAX |
(2049) 0x4b3972 IMUL %R13,%RDX |
(2049) 0x4b3976 ADD %RCX,%RDX |
(2049) 0x4b3979 VFMADD231SD (%RBX,%RDX,8),%XMM2,%XMM0 |
(2049) 0x4b397f MOV (%R14,%RAX,1),%R8 |
(2049) 0x4b3983 VMOVSD (%R15,%RAX,1),%XMM3 |
(2049) 0x4b3989 ADD $0x8,%RAX |
(2049) 0x4b398d IMUL %R13,%R8 |
(2049) 0x4b3991 ADD %RCX,%R8 |
(2049) 0x4b3994 VFMADD231SD (%RBX,%R8,8),%XMM3,%XMM0 |
(2049) 0x4b399a MOV (%R14,%RAX,1),%RDX |
(2049) 0x4b399e VMOVSD (%R15,%RAX,1),%XMM6 |
(2049) 0x4b39a4 ADD $0x8,%RAX |
(2049) 0x4b39a8 IMUL %R13,%RDX |
(2049) 0x4b39ac ADD %RCX,%RDX |
(2049) 0x4b39af VFMADD231SD (%RBX,%RDX,8),%XMM6,%XMM0 |
(2049) 0x4b39b5 MOV (%R14,%RAX,1),%R8 |
(2049) 0x4b39b9 VMOVSD (%R15,%RAX,1),%XMM5 |
(2049) 0x4b39bf ADD $0x8,%RAX |
(2049) 0x4b39c3 IMUL %R13,%R8 |
(2049) 0x4b39c7 ADD %RCX,%R8 |
(2049) 0x4b39ca VFMADD231SD (%RBX,%R8,8),%XMM5,%XMM0 |
(2049) 0x4b39d0 MOV (%R14,%RAX,1),%RDX |
(2049) 0x4b39d4 VMOVSD (%R15,%RAX,1),%XMM4 |
(2049) 0x4b39da ADD $0x8,%RAX |
(2049) 0x4b39de IMUL %R13,%RDX |
(2049) 0x4b39e2 ADD %RCX,%RDX |
(2049) 0x4b39e5 VFMADD231SD (%RBX,%RDX,8),%XMM4,%XMM0 |
(2049) 0x4b39eb CMP %RSI,%RAX |
(2049) 0x4b39ee JE 4b3ac7 |
(2051) 0x4b39f4 MOV (%R14,%RAX,1),%R8 |
(2051) 0x4b39f8 MOV 0x8(%R14,%RAX,1),%RDX |
(2051) 0x4b39fd VMOVSD (%R15,%RAX,1),%XMM8 |
(2051) 0x4b3a03 VMOVSD 0x8(%R15,%RAX,1),%XMM9 |
(2051) 0x4b3a0a IMUL %R13,%R8 |
(2051) 0x4b3a0e VMOVSD 0x10(%R15,%RAX,1),%XMM10 |
(2051) 0x4b3a15 VMOVSD 0x18(%R15,%RAX,1),%XMM11 |
(2051) 0x4b3a1c IMUL %R13,%RDX |
(2051) 0x4b3a20 VMOVSD 0x20(%R15,%RAX,1),%XMM12 |
(2051) 0x4b3a27 VMOVSD 0x28(%R15,%RAX,1),%XMM13 |
(2051) 0x4b3a2e VMOVSD 0x30(%R15,%RAX,1),%XMM14 |
(2051) 0x4b3a35 VMOVSD 0x38(%R15,%RAX,1),%XMM15 |
(2051) 0x4b3a3c ADD %RCX,%R8 |
(2051) 0x4b3a3f VFMADD231SD (%RBX,%R8,8),%XMM8,%XMM0 |
(2051) 0x4b3a45 ADD %RCX,%RDX |
(2051) 0x4b3a48 MOV 0x10(%R14,%RAX,1),%R8 |
(2051) 0x4b3a4d VFMADD231SD (%RBX,%RDX,8),%XMM9,%XMM0 |
(2051) 0x4b3a53 MOV 0x18(%R14,%RAX,1),%RDX |
(2051) 0x4b3a58 IMUL %R13,%R8 |
(2051) 0x4b3a5c IMUL %R13,%RDX |
(2051) 0x4b3a60 ADD %RCX,%R8 |
(2051) 0x4b3a63 VFMADD231SD (%RBX,%R8,8),%XMM10,%XMM0 |
(2051) 0x4b3a69 ADD %RCX,%RDX |
(2051) 0x4b3a6c MOV 0x20(%R14,%RAX,1),%R8 |
(2051) 0x4b3a71 VFMADD231SD (%RBX,%RDX,8),%XMM11,%XMM0 |
(2051) 0x4b3a77 MOV 0x28(%R14,%RAX,1),%RDX |
(2051) 0x4b3a7c IMUL %R13,%R8 |
(2051) 0x4b3a80 IMUL %R13,%RDX |
(2051) 0x4b3a84 ADD %RCX,%R8 |
(2051) 0x4b3a87 VFMADD231SD (%RBX,%R8,8),%XMM12,%XMM0 |
(2051) 0x4b3a8d ADD %RCX,%RDX |
(2051) 0x4b3a90 MOV 0x30(%R14,%RAX,1),%R8 |
(2051) 0x4b3a95 VFMADD231SD (%RBX,%RDX,8),%XMM13,%XMM0 |
(2051) 0x4b3a9b MOV 0x38(%R14,%RAX,1),%RDX |
(2051) 0x4b3aa0 ADD $0x40,%RAX |
(2051) 0x4b3aa4 IMUL %R13,%R8 |
(2051) 0x4b3aa8 IMUL %R13,%RDX |
(2051) 0x4b3aac ADD %RCX,%R8 |
(2051) 0x4b3aaf VFMADD231SD (%RBX,%R8,8),%XMM14,%XMM0 |
(2051) 0x4b3ab5 ADD %RCX,%RDX |
(2051) 0x4b3ab8 VFMADD231SD (%RBX,%RDX,8),%XMM15,%XMM0 |
(2051) 0x4b3abe CMP %RSI,%RAX |
(2051) 0x4b3ac1 JNE 4b39f4 |
(2049) 0x4b3ac7 VMOVSD (%R9,%RDI,8),%XMM7 |
(2049) 0x4b3acd VFMADD132SD (%R11,%RDI,8),%XMM7,%XMM0 |
(2049) 0x4b3ad3 VMOVSD %XMM0,(%R9,%RDI,8) |
(2049) 0x4b3ad9 INC %RDI |
(2049) 0x4b3adc CMP %R12,%RDI |
(2049) 0x4b3adf JNE 4b38c0 |
0x4b3ae5 MOV -0x40(%RBP),%RAX |
0x4b3ae9 MOV -0x48(%RBP),%RDX |
0x4b3aed MOV -0x78(%RBP),%R11 |
0x4b3af1 MOV -0x68(%RBP),%RDI |
0x4b3af5 INC %RAX |
0x4b3af8 ADD %R11,%RDX |
0x4b3afb CMP %RDI,%RAX |
0x4b3afe JNE 4b3890 |
(2049) 0x4b3b48 VXORPD %XMM0,%XMM0,%XMM0 |
(2049) 0x4b3b4c JMP 4b3ac7 |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 55 - 55 |
-------------------------------------------------------------------------------- |
55: return a * b; |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 110 - 110 |
-------------------------------------------------------------------------------- |
110: return data[idx]; |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp: 105 - 105 |
-------------------------------------------------------------------------------- |
105: return TYPE(value + a); |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp: 87 - 97 |
-------------------------------------------------------------------------------- |
87: MixElem mix_start = zone_to_mixelem(z); |
88: MixElem mix_stop = mix_start + zone_to_num_mixelem(z); |
89: |
90: double sigs_z = 0.0; |
91: for(MixElem mix = mix_start;mix < mix_stop;++ mix){ |
92: Material mat = mixelem_to_material(mix); |
93: double fraction = mixelem_to_fraction(mix); |
94: |
95: sigs_z += sigs(mat, n, global_g, global_gp) * fraction; |
96: } |
97: phi_out(nm, g, z) += sigs_z * phi(nm, gp, z); |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○96.89 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○3.11 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | Layout.hpp:55-55,forall.hpp:59-59,View.hpp:110-110 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.40 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.10 |
P0 cycles | 1.60 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 1.00 |
P4 cycles | 1.00 |
P5 cycles | 0.90 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 3.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.33 |
Stall cycles (UFS) | 0.00 |
Nb insns | 20.00 |
Nb uops | 19.00 |
Nb loads | 9.00 |
Nb stores | 2.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.79 |
Bytes prefetched | 0.00 |
Bytes loaded | 72.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | Layout.hpp:55-55,forall.hpp:59-59,View.hpp:110-110 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.40 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.10 |
P0 cycles | 1.60 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 1.00 |
P4 cycles | 1.00 |
P5 cycles | 0.90 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.00 |
P10 cycles | 3.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.33 |
Stall cycles (UFS) | 0.00 |
Nb insns | 20.00 |
Nb uops | 19.00 |
Nb loads | 9.00 |
Nb stores | 2.00 |
Nb stack references | 8.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.79 |
Bytes prefetched | 0.00 |
Bytes loaded | 72.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
nb instructions | 20 |
nb uops | 19 |
loop length | 79 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.10 | 1.00 | 3.00 | 3.00 | 1.00 | 1.00 | 0.90 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 |
cycles | 1.10 | 1.60 | 3.00 | 3.00 | 1.00 | 1.00 | 0.90 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.33 |
Stall cycles | 0.00 |
Front-end | 3.17 |
Dispatch | 3.00 |
Overall L1 | 3.17 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL (%RDI),%R8 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R11,%RDX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4b3890 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_5GroupElPSW_EESW_EESZ_NSO_INSQ_INSR_4ZoneElPS10_EES10_EEEEENSM_IJEEEJZNK14ScatteringSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdES1D_RKNSR_4Core3SetES1H_S1H_RNS1E_5FieldIdJSS_SW_S10_EEES1K_RNS1I_IdJNSR_8MaterialENSR_8LegendreENSR_11GlobalGroupES1N_EEERNS1I_INSR_7MixElemEJS10_EEERNS1I_IiJS10_EEERNS1I_IS1L_JS1Q_EEERNS1I_IdJS1Q_EEERNS1I_IS1M_JSS_EEEEUlSS_SW_SW_S10_E_EEEEEvOS1C_._omp_fn.0+0x2c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
nb instructions | 20 |
nb uops | 19 |
loop length | 79 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.10 | 1.00 | 3.00 | 3.00 | 1.00 | 1.00 | 0.90 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 |
cycles | 1.10 | 1.60 | 3.00 | 3.00 | 1.00 | 1.00 | 0.90 | 1.00 | 1.00 | 1.00 | 1.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.33 |
Stall cycles | 0.00 |
Front-end | 3.17 |
Dispatch | 3.00 |
Overall L1 | 3.17 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL (%RDI),%R8 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R11,%RDX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4b3890 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_5GroupElPSW_EESW_EESZ_NSO_INSQ_INSR_4ZoneElPS10_EES10_EEEEENSM_IJEEEJZNK14ScatteringSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdES1D_RKNSR_4Core3SetES1H_S1H_RNS1E_5FieldIdJSS_SW_S10_EEES1K_RNS1I_IdJNSR_8MaterialENSR_8LegendreENSR_11GlobalGroupES1N_EEERNS1I_INSR_7MixElemEJS10_EEERNS1I_IiJS10_EEERNS1I_IS1L_JS1Q_EEERNS1I_IdJS1Q_EEERNS1I_IS1M_JSS_EEEEUlSS_SW_SW_S10_E_EEEEEvOS1C_._omp_fn.0+0x2c0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |