Loop Id: 61 | Module: libqmcwfs.so | Source: BsplineAllocator.hpp:179-180 | Coverage: 1.83% |
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Loop Id: 61 | Module: libqmcwfs.so | Source: BsplineAllocator.hpp:179-180 | Coverage: 1.83% |
---|
0xc30d VMOVSD (%RDI),%XMM14 [3] |
0xc311 VMULSD (%RSI,%RAX,1),%XMM14,%XMM15 [1] |
0xc316 VMOVSD %XMM15,(%RCX,%RAX,1) [2] |
0xc31b VMOVSD (%RDI),%XMM0 [3] |
0xc31f VMULSD 0x8(%RSI,%RAX,1),%XMM0,%XMM1 [1] |
0xc325 VMOVSD %XMM1,0x8(%RCX,%RAX,1) [2] |
0xc32b VMOVSD (%RDI),%XMM2 [3] |
0xc32f VMULSD 0x10(%RSI,%RAX,1),%XMM2,%XMM3 [1] |
0xc335 VMOVSD %XMM3,0x10(%RCX,%RAX,1) [2] |
0xc33b VMOVSD (%RDI),%XMM4 [3] |
0xc33f VMULSD 0x18(%RSI,%RAX,1),%XMM4,%XMM5 [1] |
0xc345 VMOVSD %XMM5,0x18(%RCX,%RAX,1) [2] |
0xc34b VMOVSD (%RDI),%XMM6 [3] |
0xc34f VMULSD 0x20(%RSI,%RAX,1),%XMM6,%XMM7 [1] |
0xc355 VMOVSD %XMM7,0x20(%RCX,%RAX,1) [2] |
0xc35b VMOVSD (%RDI),%XMM8 [3] |
0xc35f VMULSD 0x28(%RSI,%RAX,1),%XMM8,%XMM9 [1] |
0xc365 VMOVSD %XMM9,0x28(%RCX,%RAX,1) [2] |
0xc36b VMOVSD (%RDI),%XMM10 [3] |
0xc36f VMULSD 0x30(%RSI,%RAX,1),%XMM10,%XMM11 [1] |
0xc375 VMOVSD %XMM11,0x30(%RCX,%RAX,1) [2] |
0xc37b VMOVSD (%RDI),%XMM12 [3] |
0xc37f VMULSD 0x38(%RSI,%RAX,1),%XMM12,%XMM13 [1] |
0xc385 VMOVSD %XMM13,0x38(%RCX,%RAX,1) [2] |
0xc38b ADD $0x40,%RAX |
0xc38f CMP %RAX,%R10 |
0xc392 JNE c30d |
/home/kcamus/qaas_runs/169-390-4082/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/BsplineAllocator.hpp: 179 - 180 |
-------------------------------------------------------------------------------- |
179: for (int ind = first; ind < last; ind++) |
180: spline->coefs[ix * xs + iy * ys + iz * zs + ind] = coeff(ix, iy, iz) * prefactor[ind]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.06 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | qmcplusplus::BsplineAllocator |
Source | BsplineAllocator.hpp:179-180 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.50 |
CQA cycles if no scalar integer | 8.50 |
CQA cycles if FP arith vectorized | 8.00 |
CQA cycles if fully vectorized | 1.06 |
Front-end cycles | 8.50 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 8.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 8.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 8.66 |
Stall cycles (UFS) | 0.00 |
Nb insns | 27.00 |
Nb uops | 26.00 |
Nb loads | 16.00 |
Nb stores | 8.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.94 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 8.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.59 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 64.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.06 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | qmcplusplus::BsplineAllocator |
Source | BsplineAllocator.hpp:179-180 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.50 |
CQA cycles if no scalar integer | 8.50 |
CQA cycles if FP arith vectorized | 8.00 |
CQA cycles if fully vectorized | 1.06 |
Front-end cycles | 8.50 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 8.00 |
P2 cycles | 8.00 |
P3 cycles | 8.00 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 8.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 8.66 |
Stall cycles (UFS) | 0.00 |
Nb insns | 27.00 |
Nb uops | 26.00 |
Nb loads | 16.00 |
Nb stores | 8.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.94 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 8.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 22.59 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 64.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
Function | qmcplusplus::BsplineAllocator |
Source file and lines | BsplineAllocator.hpp:179-180 |
Module | libqmcwfs.so |
nb instructions | 27 |
nb uops | 26 |
loop length | 139 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 8.50 cycles |
front end | 8.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 8.00 | 8.00 | 8.00 | 1.00 | 1.00 | 8.00 |
cycles | 4.00 | 4.00 | 8.00 | 8.00 | 8.00 | 1.00 | 1.00 | 8.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 8.66 |
Stall cycles | 0.00 |
Front-end | 8.50 |
Dispatch | 8.00 |
Data deps. | 1.00 |
Overall L1 | 8.50 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSD (%RDI),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD (%RSI,%RAX,1),%XMM14,%XMM15 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM15,(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x8(%RSI,%RAX,1),%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,0x8(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x10(%RSI,%RAX,1),%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x10(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x18(%RSI,%RAX,1),%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x18(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x20(%RSI,%RAX,1),%XMM6,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM7,0x20(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x28(%RSI,%RAX,1),%XMM8,%XMM9 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM9,0x28(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x30(%RSI,%RAX,1),%XMM10,%XMM11 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM11,0x30(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x38(%RSI,%RAX,1),%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM13,0x38(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE c30d <_ZN11qmcplusplus16BsplineAllocatorIdLm64ENS_10MallocatorIdLm64EEEE26setCoefficientsForOrbitalsEiiR5ArrayIdLj3EEP19multi_UBspline_3d_d._omp_fn.0.lto_priv.0+0x21d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Function | qmcplusplus::BsplineAllocator |
Source file and lines | BsplineAllocator.hpp:179-180 |
Module | libqmcwfs.so |
nb instructions | 27 |
nb uops | 26 |
loop length | 139 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 8.50 cycles |
front end | 8.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 8.00 | 8.00 | 8.00 | 1.00 | 1.00 | 8.00 |
cycles | 4.00 | 4.00 | 8.00 | 8.00 | 8.00 | 1.00 | 1.00 | 8.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 8.66 |
Stall cycles | 0.00 |
Front-end | 8.50 |
Dispatch | 8.00 |
Data deps. | 1.00 |
Overall L1 | 8.50 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
VMOVSD (%RDI),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD (%RSI,%RAX,1),%XMM14,%XMM15 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM15,(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x8(%RSI,%RAX,1),%XMM0,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM1,0x8(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x10(%RSI,%RAX,1),%XMM2,%XMM3 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM3,0x10(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x18(%RSI,%RAX,1),%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM5,0x18(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x20(%RSI,%RAX,1),%XMM6,%XMM7 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM7,0x20(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x28(%RSI,%RAX,1),%XMM8,%XMM9 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM9,0x28(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x30(%RSI,%RAX,1),%XMM10,%XMM11 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM11,0x30(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD (%RDI),%XMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMULSD 0x38(%RSI,%RAX,1),%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMOVSD %XMM13,0x38(%RCX,%RAX,1) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE c30d <_ZN11qmcplusplus16BsplineAllocatorIdLm64ENS_10MallocatorIdLm64EEEE26setCoefficientsForOrbitalsEiiR5ArrayIdLj3EEP19multi_UBspline_3d_d._omp_fn.0.lto_priv.0+0x21d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |