OV - exec - Loop 123

	Loop Id: 123	Module: exec	Source: par_coarsen.c:2528-2540	Coverage: 0.05%

0x4283dc LDR	X15, [X1]    [12]

0x4283e0 UBFM	X16, X15, #61, #60

0x4283e4 LDR	X17, [X20, X16]    [13]

0x4283e8 CBNZ	X17, 428aa8

0x4283ec LDR	X18, [X1, #8]    [12]

0x4283f0 ADD	X0, X0, #1

0x4283f4 MOVZ	W3, #1

0x4283f8 ADD	X1, X1, #8

0x4283fc UBFM	X30, X18, #61, #60

0x428400 LDR	X2, [X20, X30]    [13]

0x428404 CBZ	X2, 428ac0

0x428408 LDR	X4, [X1, #8]    [1]

0x42840c STR	XZR, [X27, X30]    [15]

0x428410 UBFM	X7, X4, #61, #60

0x428414 LDR	X5, [X20, X7]    [13]

0x428418 CBZ	X5, 428ad8

0x42841c LDR	X8, [X1, #16]    [3]

0x428420 STR	XZR, [X27, X7]    [15]

0x428424 UBFM	X9, X8, #61, #60

0x428428 LDR	X10, [X20, X9]    [13]

0x42842c CBZ	X10, 428af0

0x428430 LDR	X11, [X1, #24]    [5]

0x428434 STR	XZR, [X27, X9]    [15]

0x428438 UBFM	X12, X11, #61, #60

0x42843c LDR	X13, [X20, X12]    [13]

0x428440 CBZ	X13, 428b08

0x428444 LDR	X14, [X1, #32]    [7]

0x428448 STR	XZR, [X27, X12]    [15]

0x42844c UBFM	X15, X14, #61, #60

0x428450 LDR	X16, [X20, X15]    [13]

0x428454 CBZ	X16, 428b20

0x428458 LDR	X17, [X1, #40]    [9]

0x42845c STR	XZR, [X27, X15]    [15]

0x428460 UBFM	X18, X17, #61, #60

0x428464 LDR	X30, [X20, X18]    [13]

0x428468 CBZ	X30, 428b38

0x42846c LDR	X2, [X1, #48]    [11]

0x428470 STR	XZR, [X27, X18]    [15]

0x428474 UBFM	X4, X2, #61, #60

0x428478 LDR	X7, [X20, X4]    [13]

0x42847c CBZ	X7, 428b50

0x428480 STR	XZR, [X27, X4]    [15]

0x428484 ADD	X1, X1, #56

0x428488 CMP	X1, X6

0x42848c B.NE	4283dc

0x428aa8 LDR	X18, [X1, #8]    [12]

0x428aac ADD	X1, X1, #8

0x428ab0 STR	XZR, [X27, X16]    [15]

0x428ab4 UBFM	X30, X18, #61, #60

0x428ab8 LDR	X2, [X20, X30]    [13]

0x428abc CBNZ	X2, 428408

0x428ac0 LDR	X4, [X1, #8]    [14]

0x428ac4 ADD	X0, X0, #1

0x428ac8 MOVZ	W3, #1

0x428acc UBFM	X7, X4, #61, #60

0x428ad0 LDR	X5, [X20, X7]    [13]

0x428ad4 CBNZ	X5, 42841c

0x428ad8 LDR	X8, [X1, #16]    [2]

0x428adc ADD	X0, X0, #1

0x428ae0 MOVZ	W3, #1

0x428ae4 UBFM	X9, X8, #61, #60

0x428ae8 LDR	X10, [X20, X9]    [13]

0x428aec CBNZ	X10, 428430

0x428af0 LDR	X11, [X1, #24]    [4]

0x428af4 ADD	X0, X0, #1

0x428af8 MOVZ	W3, #1

0x428afc UBFM	X12, X11, #61, #60

0x428b00 LDR	X13, [X20, X12]    [13]

0x428b04 CBNZ	X13, 428444

0x428b08 LDR	X14, [X1, #32]    [6]

0x428b0c ADD	X0, X0, #1

0x428b10 MOVZ	W3, #1

0x428b14 UBFM	X15, X14, #61, #60

0x428b18 LDR	X16, [X20, X15]    [13]

0x428b1c CBNZ	X16, 428458

0x428b20 LDR	X17, [X1, #40]    [8]

0x428b24 ADD	X0, X0, #1

0x428b28 MOVZ	W3, #1

0x428b2c UBFM	X18, X17, #61, #60

0x428b30 LDR	X30, [X20, X18]    [13]

0x428b34 CBNZ	X30, 42846c

0x428b38 LDR	X2, [X1, #48]    [10]

0x428b3c ADD	X0, X0, #1

0x428b40 MOVZ	W3, #1

0x428b44 UBFM	X4, X2, #61, #60

0x428b48 LDR	X7, [X20, X4]    [13]

0x428b4c CBNZ	X7, 428480

0x428b50 ADD	X0, X0, #1

0x428b54 MOVZ	W3, #1

0x428b58 B	428484

/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c: 2528 - 2540

--------------------------------------------------------------------------------

2528:         for (ig = ig_begin; ig < ig_end; ig++)

2529:         {

2530:            i = graph_array[ig];

2531:

2532:            if (CF_marker[i]!=0) /* C or F point */

2533:            {

2534:               /* the independent set subroutine needs measure 0 for

2535:                  removed nodes */

2536:               measure_array[i] = 0;

2537:            }

2538:            else

2539:            {

2540:               private_graph_size_cnt++;

Coverage (%)	Name	Source Location	Module
►98.53+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.47+	GOMP_parallel		libgomp.so.1.0.0
○	hypre_BoomerAMGCoarsenPMIS	par_coarsen.c:2586	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:612	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.68
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.13
Bottlenecks	P10, P11, P12,
Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.8
Source	par_coarsen.c:2528-2540
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	12.67
CQA cycles if no scalar integer	12.67
CQA cycles if FP arith vectorized	12.67
CQA cycles if fully vectorized	2.71
Front-end cycles	11.25
P0 cycles	8.50
P1 cycles	8.50
P2 cycles	8.75
P3 cycles	8.75
P4 cycles	8.75
P5 cycles	8.75
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	12.67
P11 cycles	12.67
P12 cycles	12.67
P13 cycles	4.00
P14 cycles	4.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	90.00
Nb uops	90.00
Nb loads	NA
Nb stores	8.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	0.00
Bytes prefetched	0.00
Bytes loaded	0.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	22.22
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	13.89

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.68
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.13
Bottlenecks	P10, P11, P12,
Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.8
Source	par_coarsen.c:2528-2540
Source loop unroll info	not unrolled or unrolled with no peel/tail loop
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	12.67
CQA cycles if no scalar integer	12.67
CQA cycles if FP arith vectorized	12.67
CQA cycles if fully vectorized	2.71
Front-end cycles	11.25
P0 cycles	8.50
P1 cycles	8.50
P2 cycles	8.75
P3 cycles	8.75
P4 cycles	8.75
P5 cycles	8.75
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	12.67
P11 cycles	12.67
P12 cycles	12.67
P13 cycles	4.00
P14 cycles	4.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	90.00
Nb uops	90.00
Nb loads	NA
Nb stores	8.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	0.00
Bytes prefetched	0.00
Bytes loaded	0.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	22.22
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	13.89

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.8
Source file and lines	par_coarsen.c:2528-2540
Module	exec

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c:2528-2540.

The related source loop is not unrolled or unrolled with no peel/tail loop.
Warnings:

Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 256 paths individually, rerun with max-paths=256
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 256 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. Only 22% of vector register length is used (average across all VPU instructions). By vectorizing your loop, you can lower the cost of an iteration from 12.67 to 2.71 cycles (4.68x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop does not load or store any data.

General properties

nb instructions	90
nb uops	90
loop length	360
used w registers	1
used x registers	22
used b registers	0
used h registers	0
used s registers	0
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.25 cycles
front end	11.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	8.50	8.50	8.75	8.75	8.75	8.75	0.00	0.00	0.00	0.00	12.67	12.67	12.67	4.00	4.00
cycles	8.50	8.50	8.75	8.75	8.75	8.75	0.00	0.00	0.00	0.00	12.67	12.67	12.67	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.25
Dispatch	12.67
Overall L1	12.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	22%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 12.67 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 4283dc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X15, [X1]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X16, X15, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X17, [X20, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X17, 428aa8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x844>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
UBFM X30, X18, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X2, [X20, X30]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X2, 428ac0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x85c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X27, X30]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X7, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X20, X7]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X5, 428ad8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x874>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X1, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X7]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X9, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X20, X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X10, 428af0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x88c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X1, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X9]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X12, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X13, [X20, X12]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X13, 428b08 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X1, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X12]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X15, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X20, X15]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X16, 428b20 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X1, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X15]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X18, X17, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X30, [X20, X18]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X30, 428b38 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X1, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X18]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X4, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X20, X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X7, 428b50 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [X27, X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X1, X1, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X1, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4283dc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STR XZR, [X27, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X30, X18, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X2, [X20, X30]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X2, 428408 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X7, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X20, X7]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X5, 42841c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X1, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X9, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X20, X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X10, 428430 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X1, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X12, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X13, [X20, X12]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X13, 428444 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X1, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X15, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X20, X15]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X16, 428458 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X1, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X18, X17, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X30, [X20, X18]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X30, 42846c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x208>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X1, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X4, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X20, X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X7, 428480 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
B 428484 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	hypre_BoomerAMGCoarsenPMIS._omp_fn.8
Source file and lines	par_coarsen.c:2528-2540
Module	exec

Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 256 paths individually, rerun with max-paths=256
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with fassociative-math (included in Ofast or ffast-math) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop does not load or store any data.

General properties

nb instructions	90
nb uops	90
loop length	360
used w registers	1
used x registers	22
used b registers	0
used h registers	0
used s registers	0
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.25 cycles
front end	11.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	8.50	8.50	8.75	8.75	8.75	8.75	0.00	0.00	0.00	0.00	12.67	12.67	12.67	4.00	4.00
cycles	8.50	8.50	8.75	8.75	8.75	8.75	0.00	0.00	0.00	0.00	12.67	12.67	12.67	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.25
Dispatch	12.67
Overall L1	12.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	22%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 12.67 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 4283dc

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDR X15, [X1]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UBFM X16, X15, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X17, [X20, X16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X17, 428aa8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x844>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
UBFM X30, X18, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X2, [X20, X30]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X2, 428ac0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x85c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR XZR, [X27, X30]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X7, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X20, X7]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X5, 428ad8 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x874>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X1, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X7]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X9, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X20, X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X10, 428af0 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x88c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X1, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X9]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X12, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X13, [X20, X12]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X13, 428b08 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X1, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X12]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X15, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X20, X15]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X16, 428b20 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X1, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X15]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X18, X17, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X30, [X20, X18]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X30, 428b38 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X1, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR XZR, [X27, X18]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X4, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X20, X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X7, 428b50 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x8ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR XZR, [X27, X4]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X1, X1, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X1, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4283dc <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x178>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STR XZR, [X27, X16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
UBFM X30, X18, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X2, [X20, X30]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X2, 428408 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1a4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X1, #8]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X7, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X20, X7]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X5, 42841c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X1, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X9, X8, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X20, X9]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X10, 428430 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1cc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X1, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X12, X11, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X13, [X20, X12]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBNZ X13, 428444 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X1, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X15, X14, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X20, X15]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X16, 428458 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x1f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X1, #40]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X18, X17, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X30, [X20, X18]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X30, 42846c <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x208>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X1, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
UBFM X4, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X20, X4]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X7, 428480 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x21c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
B 428484 <hypre_BoomerAMGCoarsenPMIS._omp_fn.8+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Report Configuration

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code