| Function: hypre_BoomerAMGBuildExtPIInterp.omp_outlined | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage (incl. loops): 0.22% | (excl. loops): 0.00% |
|---|
| Function: hypre_BoomerAMGBuildExtPIInterp.omp_outlined | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage (incl. loops): 0.22% | (excl. loops): 0.00% |
|---|
/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1196 - 1757 |
-------------------------------------------------------------------------------- |
1196: #pragma omp parallel private(i,my_thread_num,num_threads,start,stop,coarse_counter,jj_counter,jj_counter_offd, P_marker, P_marker_offd,jj,kk,i1,k1,loc_col,jj_begin_row,jj_begin_row_offd,jj_end_row,jj_end_row_offd,diagonal,sum,sgn,jj1,i2,distribute,strong_f_marker) |
[...] |
1219: jj_counter = start_indexing; |
1220: jj_counter_offd = start_indexing; |
1221: if (n_fine) |
1222: { |
1223: P_marker = hypre_CTAlloc(HYPRE_Int, n_fine); |
1224: for (i = 0; i < n_fine; i++) |
1225: { P_marker[i] = -1; } |
1226: } |
1227: if (full_off_procNodes) |
1228: { |
1229: P_marker_offd = hypre_CTAlloc(HYPRE_Int, full_off_procNodes); |
1230: for (i = 0; i < full_off_procNodes; i++) |
1231: { P_marker_offd[i] = -1;} |
1232: } |
1233: |
1234: /* this thread's row range */ |
1235: my_thread_num = hypre_GetThreadNum(); |
1236: num_threads = hypre_NumActiveThreads(); |
1237: start = (n_fine/num_threads)*my_thread_num; |
1238: if (my_thread_num == num_threads-1) |
[...] |
1244: for (i = start; i < stop; i++) |
1245: { |
1246: P_diag_i[i] = jj_counter; |
1247: if (num_procs > 1) |
1248: P_offd_i[i] = jj_counter_offd; |
1249: |
1250: if (CF_marker[i] >= 0) |
1251: { |
1252: jj_counter++; |
1253: fine_to_coarse[i] = coarse_counter; |
1254: coarse_counter++; |
[...] |
1262: else if (CF_marker[i] != -3) |
1263: { |
1264: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1265: { |
1266: i1 = S_diag_j[jj]; |
1267: if (CF_marker[i1] >= 0) |
1268: { /* i1 is a C point */ |
1269: if (P_marker[i1] < P_diag_i[i]) |
1270: { |
1271: P_marker[i1] = jj_counter; |
1272: jj_counter++; |
1273: } |
1274: } |
1275: else if (CF_marker[i1] != -3) |
1276: { /* i1 is a F point, loop through it's strong neighbors */ |
1277: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1278: { |
1279: k1 = S_diag_j[kk]; |
1280: if (CF_marker[k1] >= 0) |
1281: { |
1282: if(P_marker[k1] < P_diag_i[i]) |
1283: { |
1284: P_marker[k1] = jj_counter; |
1285: jj_counter++; |
1286: } |
1287: } |
1288: } |
1289: if(num_procs > 1) |
1290: { |
1291: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1292: { |
1293: if(col_offd_S_to_A) |
1294: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1295: else |
1296: k1 = S_offd_j[kk]; |
1297: if (CF_marker_offd[k1] >= 0) |
1298: { |
1299: if(P_marker_offd[k1] < P_offd_i[i]) |
1300: { |
1301: tmp_CF_marker_offd[k1] = 1; |
1302: P_marker_offd[k1] = jj_counter_offd; |
1303: jj_counter_offd++; |
[...] |
1311: if (num_procs > 1) |
1312: { |
1313: for (jj = S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1314: { |
1315: i1 = S_offd_j[jj]; |
1316: if(col_offd_S_to_A) |
1317: i1 = col_offd_S_to_A[i1]; |
1318: if (CF_marker_offd[i1] >= 0) |
1319: { |
1320: if(P_marker_offd[i1] < P_offd_i[i]) |
1321: { |
1322: tmp_CF_marker_offd[i1] = 1; |
1323: P_marker_offd[i1] = jj_counter_offd; |
1324: jj_counter_offd++; |
1325: } |
1326: } |
1327: else if (CF_marker_offd[i1] != -3) |
1328: { /* F point; look at neighbors of i1. Sop contains global col |
1329: * numbers and entries that could be in S_diag or S_offd or |
1330: * neither. */ |
1331: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1332: { |
1333: k1 = Sop_j[kk]; |
1334: if(k1 >= col_1 && k1 < col_n) |
1335: { /* In S_diag */ |
1336: loc_col = k1-col_1; |
1337: if(P_marker[loc_col] < P_diag_i[i]) |
1338: { |
1339: P_marker[loc_col] = jj_counter; |
1340: jj_counter++; |
1341: } |
1342: } |
1343: else |
1344: { |
1345: loc_col = -k1 - 1; |
1346: if(P_marker_offd[loc_col] < P_offd_i[i]) |
1347: { |
1348: P_marker_offd[loc_col] = jj_counter_offd; |
1349: tmp_CF_marker_offd[loc_col] = 1; |
1350: jj_counter_offd++; |
[...] |
1363: #pragma omp barrier |
1364: #endif |
1365: P_diag_i[stop] = jj_counter; |
1366: P_offd_i[stop] = jj_counter_offd; |
1367: fine_to_coarse_offset[my_thread_num] = coarse_counter; |
1368: diag_offset[my_thread_num] = jj_counter; |
1369: offd_offset[my_thread_num] = jj_counter_offd; |
1370: |
1371: /* Stitch P_diag_i, P_offd_i and fine_to_coarse together */ |
1372: #ifdef HYPRE_USING_OPENMP |
1373: #pragma omp barrier |
1374: #endif |
1375: if(my_thread_num == 0) |
1376: { |
1377: /* Calculate the offset for P_diag_i and P_offd_i for each thread */ |
1378: for (i = 1; i < num_threads; i++) |
1379: { |
1380: diag_offset[i] = diag_offset[i-1] + diag_offset[i]; |
1381: fine_to_coarse_offset[i] = fine_to_coarse_offset[i-1] + fine_to_coarse_offset[i]; |
1382: offd_offset[i] = offd_offset[i-1] + offd_offset[i]; |
1383: } |
1384: } |
1385: #ifdef HYPRE_USING_OPENMP |
1386: #pragma omp barrier |
1387: #endif |
1388: |
1389: if(my_thread_num > 0) |
1390: { |
1391: /* update row pointer array with offset, |
1392: * making sure to update the row stop index */ |
1393: for (i = start+1; i <= stop; i++) |
1394: { |
1395: P_diag_i[i] += diag_offset[my_thread_num-1]; |
1396: P_offd_i[i] += offd_offset[my_thread_num-1]; |
1397: } |
1398: /* update fine_to_coarse by offsetting with the offset |
1399: * from the preceding thread */ |
1400: for (i = start; i < stop; i++) |
1401: { |
1402: if(fine_to_coarse[i] >= 0) |
1403: { fine_to_coarse[i] += fine_to_coarse_offset[my_thread_num-1]; } |
1404: } |
1405: } |
1406: #ifdef HYPRE_USING_OPENMP |
1407: #pragma omp barrier |
1408: #endif |
1409: |
1410: if(my_thread_num == 0) |
1411: { |
1412: if (debug_flag==4) |
1413: { |
1414: wall_time = time_getWallclockSeconds() - wall_time; |
1415: hypre_printf("Proc = %d determine structure %f\n", |
1416: my_id, wall_time); |
1417: fflush(NULL); |
[...] |
1423: if (debug_flag== 4) wall_time = time_getWallclockSeconds(); |
1424: |
1425: P_diag_size = P_diag_i[n_fine]; |
1426: P_offd_size = P_offd_i[n_fine]; |
1427: |
1428: if (P_diag_size) |
1429: { |
1430: P_diag_j = hypre_CTAlloc(HYPRE_Int, P_diag_size); |
1431: P_diag_data = hypre_CTAlloc(HYPRE_Real, P_diag_size); |
1432: } |
1433: |
1434: if (P_offd_size) |
1435: { |
1436: P_offd_j = hypre_CTAlloc(HYPRE_Int, P_offd_size); |
1437: P_offd_data = hypre_CTAlloc(HYPRE_Real, P_offd_size); |
1438: } |
1439: } |
1440: |
1441: /* Fine to coarse mapping */ |
1442: if(num_procs > 1 && my_thread_num == 0) |
1443: { |
1444: for (i = 0; i < n_fine; i++) |
1445: fine_to_coarse[i] += my_first_cpt; |
1446: |
1447: hypre_alt_insert_new_nodes(comm_pkg, extend_comm_pkg, fine_to_coarse, |
1448: full_off_procNodes, |
1449: fine_to_coarse_offd); |
1450: |
1451: for (i = 0; i < n_fine; i++) |
1452: fine_to_coarse[i] -= my_first_cpt; |
1453: } |
1454: |
1455: for (i = 0; i < n_fine; i++) |
1456: P_marker[i] = -1; |
1457: |
1458: for (i = 0; i < full_off_procNodes; i++) |
1459: P_marker_offd[i] = -1; |
[...] |
1467: #pragma omp barrier |
1468: #endif |
1469: for (i = start; i < stop; i++) |
1470: { |
1471: jj_begin_row = P_diag_i[i]; |
[...] |
1480: if (CF_marker[i] >= 0) |
1481: { |
1482: P_diag_j[jj_counter] = fine_to_coarse[i]; |
1483: P_diag_data[jj_counter] = one; |
[...] |
1491: else if (CF_marker[i] != -3) |
1492: { |
1493: strong_f_marker--; |
1494: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1495: { |
1496: i1 = S_diag_j[jj]; |
[...] |
1503: if (CF_marker[i1] >= 0) |
1504: { |
1505: if (P_marker[i1] < jj_begin_row) |
1506: { |
1507: P_marker[i1] = jj_counter; |
1508: P_diag_j[jj_counter] = fine_to_coarse[i1]; |
1509: P_diag_data[jj_counter] = zero; |
1510: jj_counter++; |
1511: } |
1512: } |
1513: else if (CF_marker[i1] != -3) |
1514: { |
1515: P_marker[i1] = strong_f_marker; |
1516: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1517: { |
1518: k1 = S_diag_j[kk]; |
1519: if (CF_marker[k1] >= 0) |
1520: { |
1521: if(P_marker[k1] < jj_begin_row) |
1522: { |
1523: P_marker[k1] = jj_counter; |
1524: P_diag_j[jj_counter] = fine_to_coarse[k1]; |
1525: P_diag_data[jj_counter] = zero; |
1526: jj_counter++; |
1527: } |
1528: } |
1529: } |
1530: if(num_procs > 1) |
1531: { |
1532: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1533: { |
1534: if(col_offd_S_to_A) |
1535: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1536: else |
1537: k1 = S_offd_j[kk]; |
1538: if(CF_marker_offd[k1] >= 0) |
1539: { |
1540: if(P_marker_offd[k1] < jj_begin_row_offd) |
1541: { |
1542: P_marker_offd[k1] = jj_counter_offd; |
1543: P_offd_j[jj_counter_offd] = k1; |
1544: P_offd_data[jj_counter_offd] = zero; |
1545: jj_counter_offd++; |
[...] |
1553: if ( num_procs > 1) |
1554: { |
1555: for (jj=S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1556: { |
1557: i1 = S_offd_j[jj]; |
1558: if(col_offd_S_to_A) |
1559: i1 = col_offd_S_to_A[i1]; |
1560: if ( CF_marker_offd[i1] >= 0) |
1561: { |
1562: if(P_marker_offd[i1] < jj_begin_row_offd) |
1563: { |
1564: P_marker_offd[i1] = jj_counter_offd; |
1565: P_offd_j[jj_counter_offd] = i1; |
1566: P_offd_data[jj_counter_offd] = zero; |
1567: jj_counter_offd++; |
1568: } |
1569: } |
1570: else if (CF_marker_offd[i1] != -3) |
1571: { |
1572: P_marker_offd[i1] = strong_f_marker; |
1573: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1574: { |
1575: k1 = Sop_j[kk]; |
1576: /* Find local col number */ |
1577: if(k1 >= col_1 && k1 < col_n) |
1578: { |
1579: loc_col = k1-col_1; |
1580: if(P_marker[loc_col] < jj_begin_row) |
1581: { |
1582: P_marker[loc_col] = jj_counter; |
1583: P_diag_j[jj_counter] = fine_to_coarse[loc_col]; |
1584: P_diag_data[jj_counter] = zero; |
1585: jj_counter++; |
1586: } |
1587: } |
1588: else |
1589: { |
1590: loc_col = -k1 - 1; |
1591: if(P_marker_offd[loc_col] < jj_begin_row_offd) |
1592: { |
1593: P_marker_offd[loc_col] = jj_counter_offd; |
1594: P_offd_j[jj_counter_offd]=loc_col; |
1595: P_offd_data[jj_counter_offd] = zero; |
1596: jj_counter_offd++; |
[...] |
1607: diagonal = A_diag_data[A_diag_i[i]]; |
1608: |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
1676: } |
1677: } |
1678: if(num_procs > 1) |
1679: { |
1680: for(jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++) |
1681: { |
1682: i1 = A_offd_j[jj]; |
1683: if(P_marker_offd[i1] >= jj_begin_row_offd) |
1684: P_offd_data[P_marker_offd[i1]] += A_offd_data[jj]; |
1685: else if(P_marker_offd[i1] == strong_f_marker) |
1686: { |
1687: sum = zero; |
1688: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1689: { |
1690: k1 = A_ext_j[jj1]; |
1691: if(k1 >= col_1 && k1 < col_n) |
1692: { /* diag */ |
1693: loc_col = k1 - col_1; |
1694: if(P_marker[loc_col] >= jj_begin_row || loc_col == i) |
1695: sum += A_ext_data[jj1]; |
1696: } |
1697: else |
1698: { |
1699: loc_col = -k1 - 1; |
1700: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1701: sum += A_ext_data[jj1]; |
1702: } |
1703: } |
1704: if(sum != 0) |
1705: { |
1706: distribute = A_offd_data[jj] / sum; |
1707: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1708: { |
1709: k1 = A_ext_j[jj1]; |
1710: if(k1 >= col_1 && k1 < col_n) |
1711: { /* diag */ |
1712: loc_col = k1 - col_1; |
1713: if(P_marker[loc_col] >= jj_begin_row) |
1714: P_diag_data[P_marker[loc_col]] += distribute* |
1715: A_ext_data[jj1]; |
1716: if(loc_col == i) |
1717: diagonal += distribute*A_ext_data[jj1]; |
1718: } |
1719: else |
1720: { |
1721: loc_col = -k1 - 1; |
1722: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1723: P_offd_data[P_marker_offd[loc_col]] += distribute* |
1724: A_ext_data[jj1]; |
[...] |
1733: else if (CF_marker_offd[i1] != -3) |
1734: { |
1735: if(num_functions == 1 || dof_func[i] == dof_func_offd[i1]) |
1736: diagonal += A_offd_data[jj]; |
1737: } |
1738: } |
1739: } |
1740: if (diagonal) |
1741: { |
1742: for(jj = jj_begin_row; jj < jj_end_row; jj++) |
1743: P_diag_data[jj] /= -diagonal; |
1744: for(jj = jj_begin_row_offd; jj < jj_end_row_offd; jj++) |
1745: P_offd_data[jj] /= -diagonal; |
1746: } |
1747: } |
1748: strong_f_marker--; |
[...] |
1754: if (n_fine) |
1755: { hypre_TFree(P_marker); } |
1756: if (full_off_procNodes) |
1757: { hypre_TFree(P_marker_offd); } |
0x43a740 STP X29, X30, [SP, #928]! |
0x43a744 STP X28, X27, [SP, #16] |
0x43a748 STP X26, X25, [SP, #32] |
0x43a74c STP X24, X23, [SP, #48] |
0x43a750 STP X22, X21, [SP, #64] |
0x43a754 STP X20, X19, [SP, #80] |
0x43a758 ADD X29, SP, #0 |
0x43a75c SUB SP, SP, #448 |
0x43a760 STUR X7, [X29, #472] |
0x43a764 STUR X6, [X29, #496] |
0x43a768 LDR X20, [X2] |
0x43a76c STUR X5, [X29, #456] |
0x43a770 STUR X3, [X29, #320] |
0x43a774 STR X0, [SP, #192] |
0x43a778 LDR X8, [X29, #432] |
0x43a77c LDR X0, [X3] |
0x43a780 STR X8, [SP, #88] |
0x43a784 LDP X8, X9, [X29, #416] |
0x43a788 STUR X9, [X29, #336] |
0x43a78c STR X8, [SP, #80] |
0x43a790 LDR X8, [X29, #408] |
0x43a794 STR X8, [SP, #72] |
0x43a798 LDR X8, [X29, #400] |
0x43a79c STR X8, [SP, #152] |
0x43a7a0 LDR X8, [X29, #392] |
0x43a7a4 STR X8, [SP, #144] |
0x43a7a8 LDP X8, X9, [X29, #376] |
0x43a7ac STUR X9, [X29, #360] |
0x43a7b0 STR X8, [SP, #136] |
0x43a7b4 LDR X8, [X29, #368] |
0x43a7b8 STR X8, [SP, #128] |
0x43a7bc LDP X8, X26, [X29, #336] |
0x43a7c0 LDP X19, X21, [X29, #352] |
0x43a7c4 STR X8, [SP, #96] |
0x43a7c8 LDP X27, X8, [X29, #320] |
0x43a7cc STUR X8, [X29, #312] |
0x43a7d0 LDR X8, [X29, #312] |
0x43a7d4 STR X8, [SP, #24] |
0x43a7d8 LDR X8, [X29, #304] |
0x43a7dc STR X8, [SP, #16] |
0x43a7e0 LDR X8, [X29, #296] |
0x43a7e4 STR X8, [SP, #48] |
0x43a7e8 LDP X8, X9, [X29, #280] |
0x43a7ec STUR X9, [X29, #416] |
0x43a7f0 STUR X8, [X29, #344] |
0x43a7f4 LDP X8, X9, [X29, #264] |
0x43a7f8 STUR X8, [X29, #400] |
0x43a7fc LDR X8, [X29, #256] |
0x43a800 STUR X9, [X29, #432] |
0x43a804 STR X8, [SP, #216] |
0x43a808 LDR X8, [X29, #248] |
0x43a80c STR X8, [SP, #64] |
0x43a810 LDR X8, [X29, #240] |
0x43a814 STR X8, [SP, #8] |
0x43a818 LDR X8, [X29, #232] |
0x43a81c STR X8, [SP, #40] |
0x43a820 LDR X8, [X29, #224] |
0x43a824 STR X8, [SP, #56] |
0x43a828 LDR X8, [X29, #216] |
0x43a82c STR X8, [SP, #200] |
0x43a830 LDP X8, X9, [X29, #200] |
0x43a834 LDP X28, X24, [X29, #184] |
0x43a838 STUR X8, [X29, #440] |
0x43a83c LDR X8, [X29, #176] |
0x43a840 STUR X9, [X29, #424] |
0x43a844 STR X8, [SP, #120] |
0x43a848 LDR X8, [X29, #168] |
0x43a84c STR X8, [SP, #112] |
0x43a850 LDP X8, X9, [X29, #152] |
0x43a854 STUR X9, [X29, #464] |
0x43a858 LDP X10, X9, [X29, #136] |
0x43a85c STUR X8, [X29, #328] |
0x43a860 STUR X9, [X29, #352] |
0x43a864 LDP X11, X9, [X29, #120] |
0x43a868 STP X9, X10, [X29, #808] |
0x43a86c LDP X8, X9, [X29, #104] |
0x43a870 STUR X8, [X29, #408] |
0x43a874 LDR X8, [X29, #96] |
0x43a878 STP X9, X11, [X29, #888] |
0x43a87c STUR X8, [X29, #368] |
0x43a880 STR X4, [SP, #224] |
0x43a884 CBZ X0, 43a918 |
0x43a888 MOVZ W1, #8 |
0x43a88c BL 4ac4b0 |
0x43a890 LDUR X11, [X29, #320] |
0x43a894 ORR X22, XZR, X0 |
0x43a898 LDR X8, [X11] |
0x43a89c CMP X8, #1 |
0x43a8a0 B.LT 43a8c0 |
0x43a8a4 MOVN X9, #0 |
0x43a8a8 ORR X8, XZR, XZR |
(878) 0x43a8ac STR X9, [X22, X8,LSL #3] |
(878) 0x43a8b0 ADD X8, X8, #1 |
(878) 0x43a8b4 LDR X10, [X11] |
(878) 0x43a8b8 CMP X8, X10 |
(878) 0x43a8bc B.LT 43a8ac |
0x43a8c0 LDR X4, [SP, #224] |
0x43a8c4 LDR X0, [X4] |
0x43a8c8 STP X21, X19, [SP, #160] |
0x43a8cc STR X26, [SP, #104] |
0x43a8d0 STR X27, [SP, #32] |
0x43a8d4 CBZ X0, 43a92c |
0x43a8d8 MOVZ W1, #8 |
0x43a8dc BL 4ac4b0 |
0x43a8e0 LDR X11, [SP, #224] |
0x43a8e4 ORR X23, XZR, X0 |
0x43a8e8 LDR X8, [X11] |
0x43a8ec CMP X8, #1 |
0x43a8f0 B.LT 43a92c |
0x43a8f4 MOVN X9, #0 |
0x43a8f8 ORR X8, XZR, XZR |
0x43a8fc HINT #0 |
(877) 0x43a900 STR X9, [X23, X8,LSL #3] |
(877) 0x43a904 ADD X8, X8, #1 |
(877) 0x43a908 LDR X10, [X11] |
(877) 0x43a90c CMP X8, X10 |
(877) 0x43a910 B.LT 43a900 |
0x43a914 B 43a92c |
0x43a918 LDR X0, [X4] |
0x43a91c STP X21, X19, [SP, #160] |
0x43a920 STR X26, [SP, #104] |
0x43a924 STR X27, [SP, #32] |
0x43a928 CBNZ X0, 43a8d8 |
0x43a92c BL 4ae1b0 |
0x43a930 ORR X19, XZR, X0 |
0x43a934 BL 4ae190 |
0x43a938 LDUR X8, [X29, #320] |
0x43a93c SUB X9, X0, #1 |
0x43a940 ORR X26, XZR, XZR |
0x43a944 LDR X8, [X8] |
0x43a948 SDIV X10, X8, X0 |
0x43a94c MUL X27, X10, X19 |
0x43a950 STR X10, [SP, #176] |
0x43a954 ADD X10, X10, X27 |
0x43a958 CMP X19, X9 |
0x43a95c CSEL X14, X8, X10, #0 |
0x43a960 CMP X14, X27 |
0x43a964 STUR X14, [X29, #392] |
0x43a968 STR X19, [SP, #208] |
0x43a96c STR X0, [SP, #184] |
0x43a970 B.GT 43aa90 |
0x43a974 ORR X19, XZR, X20 |
0x43a978 LDR X8, [SP, #192] |
0x43a97c ADRP X0, |
0x43a980 ADD X0, X0, #1408 |
0x43a984 ORR X21, XZR, X14 |
0x43a988 LDR W25, [X8] |
0x43a98c ORR W1, WZR, W25 |
0x43a990 BL 410070 |
0x43a994 LDUR X8, [X29, #456] |
0x43a998 LDUR X9, [X29, #472] |
0x43a99c LDUR X10, [X29, #440] |
0x43a9a0 ADRP X0, |
0x43a9a4 ADD X0, X0, #1432 |
0x43a9a8 ORR W1, WZR, W25 |
0x43a9ac LDR X8, [X8] |
0x43a9b0 LDR X9, [X9] |
0x43a9b4 LDR X10, [X10] |
0x43a9b8 STR X19, [X8, X21,LSL #3] |
0x43a9bc STR X20, [X9, X21,LSL #3] |
0x43a9c0 LDR X21, [SP, #208] |
0x43a9c4 LDUR X8, [X29, #424] |
0x43a9c8 LDR X8, [X8] |
0x43a9cc STR X26, [X10, X21,LSL #3] |
0x43a9d0 LDR X26, [SP, #200] |
0x43a9d4 STR X19, [X8, X21,LSL #3] |
0x43a9d8 LDR X8, [X26] |
0x43a9dc STR X20, [X8, X21,LSL #3] |
0x43a9e0 ORR W20, WZR, W25 |
0x43a9e4 BL 410070 |
0x43a9e8 LDR X19, [SP, #216] |
0x43a9ec LDR X12, [SP, #184] |
0x43a9f0 CBNZ X21, 43ae6c |
0x43a9f4 SUBS X8, X12, #1 |
0x43a9f8 B.LE 43ae6c |
0x43a9fc LDUR X9, [X29, #424] |
0x43aa00 LDUR X10, [X29, #440] |
0x43aa04 LDR X11, [X26] |
0x43aa08 ADD X13, X11, X12,LSL #3 |
0x43aa0c LDR X9, [X9] |
0x43aa10 LDR X10, [X10] |
0x43aa14 ADD X14, X9, X12,LSL #3 |
0x43aa18 CMP X9, X13 |
0x43aa1c ADD X15, X10, X12,LSL #3 |
0x43aa20 CCMP X11, X14, #2, #3 |
0x43aa24 CSINC W12, WZR, WZR, #2 |
0x43aa28 CMP X10, X13 |
0x43aa2c CCMP X11, X15, #2, #3 |
0x43aa30 CSINC W13, WZR, WZR, #2 |
0x43aa34 CMP X10, X14 |
0x43aa38 CCMP X9, X15, #2, #3 |
0x43aa3c B.CC 43ae28 |
0x43aa40 TBNZ W12, #0, 43ae28 |
0x43aa44 CBNZ W13, 43ae28 |
0x43aa48 LDR X12, [X9], #8 |
0x43aa4c LDR X13, [X11], #8 |
0x43aa50 LDR X14, [X10], #8 |
0x43aa54 HINT #0 |
0x43aa58 HINT #0 |
0x43aa5c HINT #0 |
(867) 0x43aa60 LDR X15, [X9] |
(867) 0x43aa64 SUBS X8, X8, #1 |
(867) 0x43aa68 ADD X12, X15, X12 |
(867) 0x43aa6c STR X12, [X9], #8 |
(867) 0x43aa70 LDR X15, [X10] |
(867) 0x43aa74 ADD X14, X15, X14 |
(867) 0x43aa78 STR X14, [X10], #8 |
(867) 0x43aa7c LDR X15, [X11] |
(867) 0x43aa80 ADD X13, X15, X13 |
(867) 0x43aa84 STR X13, [X11], #8 |
(867) 0x43aa88 B.NE 43aa60 |
0x43aa8c B 43ae6c |
0x43aa90 LDUR X9, [X29, #472] |
0x43aa94 LDUR X8, [X29, #456] |
0x43aa98 ORR X18, XZR, X27 |
0x43aa9c ORR X19, XZR, X20 |
0x43aaa0 LDR X25, [X9] |
0x43aaa4 LDP X11, X9, [X29, #880] |
0x43aaa8 LDR X8, [X8] |
0x43aaac LDR X10, [X11] |
0x43aab0 LDR X11, [X9] |
0x43aab4 LDUR X9, [X29, #384] |
0x43aab8 LDR X12, [X9] |
0x43aabc LDUR X9, [X29, #296] |
0x43aac0 LDR X13, [X9] |
0x43aac4 LDUR X9, [X29, #352] |
0x43aac8 LDR X9, [X9] |
0x43aacc STUR X9, [X29, #488] |
0x43aad0 LDUR X9, [X29, #304] |
0x43aad4 LDR X15, [X9] |
0x43aad8 LDUR X9, [X29, #328] |
0x43aadc LDR X9, [X9] |
0x43aae0 STUR X9, [X29, #480] |
0x43aae4 LDUR X9, [X29, #408] |
0x43aae8 LDR X16, [X9] |
0x43aaec STUR X16, [X29, #448] |
0x43aaf0 B 43ab20 |
0x43aaf4 HINT #0 |
0x43aaf8 HINT #0 |
0x43aafc HINT #0 |
(868) 0x43ab00 LDR X9, [X10, X18,LSL #3] |
(868) 0x43ab04 TBNZ X9, #63, 43ab40 |
(868) 0x43ab08 ADD X19, X19, #1 |
(868) 0x43ab0c STR X26, [X16, X18,LSL #3] |
(868) 0x43ab10 ADD X26, X26, #1 |
(868) 0x43ab14 ADD X18, X18, #1 |
(868) 0x43ab18 CMP X18, X14 |
(868) 0x43ab1c B.EQ 43a978 |
(868) 0x43ab20 LDUR X9, [X29, #496] |
(868) 0x43ab24 STR X19, [X8, X18,LSL #3] |
(868) 0x43ab28 LDR X9, [X9] |
(868) 0x43ab2c CMP X9, #2 |
(868) 0x43ab30 B.LT 43ab00 |
(868) 0x43ab34 STR X20, [X25, X18,LSL #3] |
(868) 0x43ab38 B 43ab00 |
0x43ab3c HINT #0 |
(868) 0x43ab40 CMN X9, #3 |
(868) 0x43ab44 B.EQ 43ab14 |
(869) 0x43ab48 ADD X1, X18, #1 |
(869) 0x43ab4c LDR X2, [X11, X18,LSL #3] |
(869) 0x43ab50 LDR X9, [X11, X1,LSL #3] |
(869) 0x43ab54 CMP X2, X9 |
(869) 0x43ab58 B.GE 43ace4 |
(869) 0x43ab5c LDUR X9, [X29, #296] |
(869) 0x43ab60 LDR X3, [X9] |
(869) 0x43ab64 LDUR X9, [X29, #304] |
(869) 0x43ab68 LDR X4, [X9] |
(869) 0x43ab6c LDUR X9, [X29, #328] |
(869) 0x43ab70 LDR X5, [X9] |
(869) 0x43ab74 B 43ab90 |
0x43ab78 HINT #0 |
0x43ab7c HINT #0 |
(873) 0x43ab80 LDR X9, [X11, X1,LSL #3] |
(873) 0x43ab84 ADD X2, X2, #1 |
(873) 0x43ab88 CMP X2, X9 |
(873) 0x43ab8c B.GE 43ace4 |
(873) 0x43ab90 LDR X9, [X12, X2,LSL #3] |
(873) 0x43ab94 LDR X14, [X10, X9,LSL #3] |
(873) 0x43ab98 TBNZ X14, #63, 43abc0 |
(873) 0x43ab9c LDR X14, [X22, X9,LSL #3] |
(873) 0x43aba0 LDR X0, [X8, X18,LSL #3] |
(873) 0x43aba4 CMP X14, X0 |
(873) 0x43aba8 B.GE 43ab80 |
(873) 0x43abac STR X19, [X22, X9,LSL #3] |
(873) 0x43abb0 ADD X19, X19, #1 |
(873) 0x43abb4 B 43ab80 |
0x43abb8 HINT #0 |
0x43abbc HINT #0 |
(873) 0x43abc0 CMN X14, #3 |
(873) 0x43abc4 B.EQ 43ab80 |
(873) 0x43abc8 ADD X6, X9, #1 |
(873) 0x43abcc LDR X0, [X11, X9,LSL #3] |
(873) 0x43abd0 LDR X7, [X11, X6,LSL #3] |
(873) 0x43abd4 B 43abe4 |
0x43abd8 HINT #0 |
0x43abdc HINT #0 |
(876) 0x43abe0 ADD X0, X0, #1 |
(876) 0x43abe4 CMP X0, X7 |
(876) 0x43abe8 B.GE 43ac18 |
(876) 0x43abec LDR X14, [X12, X0,LSL #3] |
(876) 0x43abf0 LDR X21, [X10, X14,LSL #3] |
(876) 0x43abf4 TBNZ X21, #63, 43abe0 |
(876) 0x43abf8 LDR X21, [X22, X14,LSL #3] |
(876) 0x43abfc LDR X30, [X8, X18,LSL #3] |
(876) 0x43ac00 CMP X21, X30 |
(876) 0x43ac04 B.GE 43abe0 |
(876) 0x43ac08 STR X19, [X22, X14,LSL #3] |
(876) 0x43ac0c ADD X19, X19, #1 |
(876) 0x43ac10 LDR X7, [X11, X6,LSL #3] |
(876) 0x43ac14 B 43abe0 |
(873) 0x43ac18 LDUR X14, [X29, #496] |
(873) 0x43ac1c LDR X14, [X14] |
(873) 0x43ac20 CMP X14, #2 |
(873) 0x43ac24 B.LT 43ab80 |
(873) 0x43ac28 LDR X7, [X3, X9,LSL #3] |
(873) 0x43ac2c LDR X0, [X3, X6,LSL #3] |
(873) 0x43ac30 CMP X7, X0 |
(873) 0x43ac34 B.GE 43ab80 |
(873) 0x43ac38 LDUR X9, [X29, #352] |
(873) 0x43ac3c LDR X21, [X9] |
(873) 0x43ac40 LDUR X9, [X29, #472] |
(873) 0x43ac44 LDR X30, [X9] |
(873) 0x43ac48 LDUR X9, [X29, #464] |
(873) 0x43ac4c LDR X9, [X9] |
(873) 0x43ac50 CBNZ X4, 43ac6c |
(873) 0x43ac54 B 43acb0 |
0x43ac58 HINT #0 |
0x43ac5c HINT #0 |
(874) 0x43ac60 ADD X7, X7, #1 |
(874) 0x43ac64 CMP X7, X0 |
(874) 0x43ac68 B.GE 43ab80 |
(874) 0x43ac6c LDR X14, [X21, X7,LSL #3] |
(874) 0x43ac70 LDR X14, [X4, X14,LSL #3] |
(874) 0x43ac74 LDR X16, [X5, X14,LSL #3] |
(874) 0x43ac78 TBNZ X16, #63, 43ac60 |
(874) 0x43ac7c LDR X16, [X23, X14,LSL #3] |
(874) 0x43ac80 LDR X17, [X30, X18,LSL #3] |
(874) 0x43ac84 CMP X16, X17 |
(874) 0x43ac88 B.GE 43ac60 |
(874) 0x43ac8c MOVZ W16, #1 |
(874) 0x43ac90 STR X16, [X9, X14,LSL #3] |
(874) 0x43ac94 STR X20, [X23, X14,LSL #3] |
(874) 0x43ac98 ADD X20, X20, #1 |
(874) 0x43ac9c LDR X0, [X3, X6,LSL #3] |
(874) 0x43aca0 B 43ac60 |
(875) 0x43aca4 ADD X7, X7, #1 |
(875) 0x43aca8 CMP X7, X0 |
(875) 0x43acac B.GE 43ab80 |
(875) 0x43acb0 LDR X14, [X21, X7,LSL #3] |
(875) 0x43acb4 LDR X16, [X5, X14,LSL #3] |
(875) 0x43acb8 TBNZ X16, #63, 43aca4 |
(875) 0x43acbc LDR X16, [X23, X14,LSL #3] |
(875) 0x43acc0 LDR X17, [X30, X18,LSL #3] |
(875) 0x43acc4 CMP X16, X17 |
(875) 0x43acc8 B.GE 43aca4 |
(875) 0x43accc MOVZ W16, #1 |
(875) 0x43acd0 STR X16, [X9, X14,LSL #3] |
(875) 0x43acd4 STR X20, [X23, X14,LSL #3] |
(875) 0x43acd8 ADD X20, X20, #1 |
(875) 0x43acdc LDR X0, [X3, X6,LSL #3] |
(875) 0x43ace0 B 43aca4 |
(869) 0x43ace4 LDUR X9, [X29, #496] |
(869) 0x43ace8 LDR X9, [X9] |
(869) 0x43acec CMP X9, #2 |
(869) 0x43acf0 B.LT 43ae1c |
(869) 0x43acf4 LDR X2, [X13, X18,LSL #3] |
(869) 0x43acf8 LDR X9, [X13, X1,LSL #3] |
(869) 0x43acfc CMP X2, X9 |
(869) 0x43ad00 B.GE 43ae1c |
(870) 0x43ad04 LDR X9, [SP, #112] |
(870) 0x43ad08 LDR X3, [X9] |
(870) 0x43ad0c LDR X9, [SP, #120] |
(870) 0x43ad10 LDR X4, [X9] |
(870) 0x43ad14 LDUR X9, [X29, #472] |
(870) 0x43ad18 LDR X5, [X9] |
(870) 0x43ad1c LDUR X9, [X29, #464] |
(870) 0x43ad20 LDR X6, [X9] |
(870) 0x43ad24 B 43ad38 |
(870) 0x43ad28 LDR X9, [X13, X1,LSL #3] |
(870) 0x43ad2c ADD X2, X2, #1 |
(870) 0x43ad30 CMP X2, X9 |
(870) 0x43ad34 B.GE 43ae1c |
(870) 0x43ad38 LDUR X9, [X29, #488] |
(870) 0x43ad3c LDR X9, [X9, X2,LSL #3] |
(870) 0x43ad40 CBZ X15, 43ad48 |
(870) 0x43ad44 LDR X9, [X15, X9,LSL #3] |
(870) 0x43ad48 LDUR X14, [X29, #480] |
(870) 0x43ad4c LDR X14, [X14, X9,LSL #3] |
(870) 0x43ad50 TBNZ X14, #63, 43ad80 |
(870) 0x43ad54 LDR X14, [X23, X9,LSL #3] |
(870) 0x43ad58 LDR X16, [X5, X18,LSL #3] |
(870) 0x43ad5c CMP X14, X16 |
(870) 0x43ad60 B.GE 43ad28 |
(870) 0x43ad64 MOVZ W14, #1 |
(870) 0x43ad68 STR X14, [X6, X9,LSL #3] |
(870) 0x43ad6c STR X20, [X23, X9,LSL #3] |
(870) 0x43ad70 ADD X20, X20, #1 |
(870) 0x43ad74 B 43ad28 |
0x43ad78 HINT #0 |
0x43ad7c HINT #0 |
(870) 0x43ad80 CMN X14, #3 |
(870) 0x43ad84 B.EQ 43ad28 |
(870) 0x43ad88 ADD X9, X3, X9,LSL #3 |
(870) 0x43ad8c LDP X0, X14, [X9] |
(870) 0x43ad90 CMP X0, X14 |
(870) 0x43ad94 B.GE 43ad28 |
(872) 0x43ad98 LDUR X14, [X29, #472] |
(872) 0x43ad9c LDR X7, [X14] |
(872) 0x43ada0 LDUR X14, [X29, #464] |
(872) 0x43ada4 LDR X21, [X14] |
(872) 0x43ada8 B 43adbc |
(872) 0x43adac LDR X14, [X9, #8] |
(872) 0x43adb0 ADD X0, X0, #1 |
(872) 0x43adb4 CMP X0, X14 |
(872) 0x43adb8 B.GE 43ad28 |
(872) 0x43adbc LDR X30, [X4, X0,LSL #3] |
(872) 0x43adc0 LDR X14, [X28] |
(872) 0x43adc4 LDR X16, [X24] |
(872) 0x43adc8 SUBS X14, X30, X14 |
(872) 0x43adcc CCMP X30, X16, #0, #10 |
(872) 0x43add0 B.LT 43ae00 |
(872) 0x43add4 ORN X14, XZR, X30 |
(872) 0x43add8 LDR X17, [X7, X18,LSL #3] |
(872) 0x43addc LDR X16, [X23, X14,LSL #3] |
(872) 0x43ade0 CMP X16, X17 |
(872) 0x43ade4 B.GE 43adac |
(872) 0x43ade8 STR X20, [X23, X14,LSL #3] |
(872) 0x43adec MOVZ W16, #1 |
(872) 0x43adf0 ADD X20, X20, #1 |
(872) 0x43adf4 STR X16, [X21, X14,LSL #3] |
(872) 0x43adf8 B 43adac |
0x43adfc HINT #0 |
(871) 0x43ae00 LDR X16, [X22, X14,LSL #3] |
(871) 0x43ae04 LDR X17, [X8, X18,LSL #3] |
(871) 0x43ae08 CMP X16, X17 |
(871) 0x43ae0c B.GE 43adac |
(871) 0x43ae10 STR X19, [X22, X14,LSL #3] |
(871) 0x43ae14 ADD X19, X19, #1 |
(871) 0x43ae18 B 43adac |
(869) 0x43ae1c LDUR X14, [X29, #392] |
(869) 0x43ae20 LDUR X16, [X29, #448] |
(869) 0x43ae24 B 43ab14 |
0x43ae28 ADD X11, X11, #8 |
0x43ae2c ADD X10, X10, #8 |
0x43ae30 ADD X9, X9, #8 |
0x43ae34 HINT #0 |
0x43ae38 HINT #0 |
0x43ae3c HINT #0 |
(866) 0x43ae40 LDP X12, X13, [X9, #1016] |
(866) 0x43ae44 SUBS X8, X8, #1 |
(866) 0x43ae48 ADD X12, X13, X12 |
(866) 0x43ae4c STR X12, [X9], #8 |
(866) 0x43ae50 LDP X12, X13, [X10, #1016] |
(866) 0x43ae54 ADD X12, X13, X12 |
(866) 0x43ae58 STR X12, [X10], #8 |
(866) 0x43ae5c LDP X12, X13, [X11, #1016] |
(866) 0x43ae60 ADD X12, X13, X12 |
(866) 0x43ae64 STR X12, [X11], #8 |
(866) 0x43ae68 B.NE 43ae40 |
0x43ae6c ADRP X0, |
0x43ae70 ADD X0, X0, #1456 |
0x43ae74 ORR W1, WZR, W20 |
0x43ae78 BL 410070 |
0x43ae7c LDUR X4, [X29, #392] |
0x43ae80 LDR X25, [SP, #96] |
0x43ae84 CMP X21, #1 |
0x43ae88 B.LT 43af50 |
0x43ae8c SUBS X8, X4, X27 |
0x43ae90 B.LE 43af50 |
0x43ae94 LDUR X9, [X29, #424] |
0x43ae98 LDUR X11, [X29, #456] |
0x43ae9c LDUR X12, [X29, #472] |
0x43aea0 CMP X8, #16 |
0x43aea4 ORR X13, XZR, X27 |
0x43aea8 LDR X16, [X26] |
0x43aeac LDR X15, [X9] |
0x43aeb0 LDR X11, [X11] |
0x43aeb4 LDR X12, [X12] |
0x43aeb8 UBFM X9, X21, #61, #60 |
0x43aebc SUB X10, X9, #8 |
0x43aec0 ADD X9, X15, X10 |
0x43aec4 ADD X10, X16, X10 |
0x43aec8 B.CS 43bee8 |
0x43aecc SUB X14, X4, X13 |
0x43aed0 UBFM X13, X13, #61, #60 |
0x43aed4 ADD X13, X13, #8 |
0x43aed8 ADD X12, X12, X13 |
0x43aedc ADD X11, X11, X13 |
(863) 0x43aee0 LDR X13, [X9] |
(863) 0x43aee4 LDR X15, [X11] |
(863) 0x43aee8 SUBS X14, X14, #1 |
(863) 0x43aeec ADD X13, X15, X13 |
(863) 0x43aef0 STR X13, [X11], #8 |
(863) 0x43aef4 LDR X13, [X10] |
(863) 0x43aef8 LDR X15, [X12] |
(863) 0x43aefc ADD X13, X15, X13 |
(863) 0x43af00 STR X13, [X12], #8 |
(863) 0x43af04 B.NE 43aee0 |
0x43af08 LDUR X9, [X29, #408] |
0x43af0c LDR X11, [SP, #176] |
0x43af10 LDR X10, [X9] |
0x43af14 LDUR X9, [X29, #440] |
0x43af18 MUL X11, X21, X11 |
0x43af1c LDR X9, [X9] |
0x43af20 ADD X10, X10, X11,LSL #3 |
0x43af24 ADD X9, X9, X21,LSL #3 |
0x43af28 B 43af38 |
(864) 0x43af2c ADD X10, X10, #8 |
(864) 0x43af30 SUBS X8, X8, #1 |
(864) 0x43af34 B.EQ 43af50 |
(864) 0x43af38 LDR X11, [X10] |
(864) 0x43af3c TBNZ X11, #63, 43af2c |
(864) 0x43af40 LDUR X12, [X9, #504] |
(864) 0x43af44 ADD X11, X12, X11 |
(864) 0x43af48 STR X11, [X10] |
(864) 0x43af4c B 43af2c |
0x43af50 ADRP X0, |
0x43af54 ADD X0, X0, #1480 |
0x43af58 ORR W1, WZR, W20 |
0x43af5c BL 410070 |
0x43af60 CBZ X21, 43af74 |
0x43af64 LDUR X13, [X29, #320] |
0x43af68 LDR X12, [SP, #224] |
0x43af6c LDR X8, [X13] |
0x43af70 B 43b140 |
0x43af74 LDR X9, [SP, #56] |
0x43af78 LDR X8, [X9] |
0x43af7c CMP X8, #4 |
0x43af80 B.NE 43afd8 |
0x43af84 ORR W21, WZR, W20 |
0x43af88 ORR X20, XZR, X9 |
0x43af8c BL 4ae240 |
0x43af90 LDR X8, [SP, #40] |
0x43af94 ADRP X0, |
0x43af98 ADD X0, X0, #3592 |
0x43af9c LDR D1, [X8] |
0x43afa0 FSUB D0, D0, S1 |
0x43afa4 STR D0, [X8] |
0x43afa8 LDR X8, [SP, #8] |
0x43afac LDR X1, [X8] |
0x43afb0 BL 4ac6c0 |
0x43afb4 ORR X0, XZR, XZR |
0x43afb8 BL 4102e0 |
0x43afbc LDR X8, [X20] |
0x43afc0 ORR W20, WZR, W21 |
0x43afc4 CMP X8, #4 |
0x43afc8 B.NE 43afd8 |
0x43afcc BL 4ae240 |
0x43afd0 LDR X8, [SP, #40] |
0x43afd4 STR D0, [X8] |
0x43afd8 LDUR X8, [X29, #456] |
0x43afdc LDUR X13, [X29, #320] |
0x43afe0 LDR X10, [SP, #64] |
0x43afe4 LDR X8, [X8] |
0x43afe8 LDR X9, [X13] |
0x43afec LDR X8, [X8, X9,LSL #3] |
0x43aff0 STR X8, [X10] |
0x43aff4 LDUR X8, [X29, #472] |
0x43aff8 LDR X9, [X13] |
0x43affc LDR X8, [X8] |
0x43b000 LDR X0, [X8, X9,LSL #3] |
0x43b004 STR X0, [X19] |
0x43b008 LDR X8, [X10] |
0x43b00c CBZ X8, 43b04c |
0x43b010 MOVZ W1, #8 |
0x43b014 ORR X0, XZR, X8 |
0x43b018 ORR W21, WZR, W20 |
0x43b01c ORR X20, XZR, X10 |
0x43b020 BL 4ac4b0 |
0x43b024 LDUR X8, [X29, #400] |
0x43b028 MOVZ W1, #8 |
0x43b02c STR X0, [X8] |
0x43b030 LDR X0, [X20] |
0x43b034 ORR W20, WZR, W21 |
0x43b038 BL 4ac4b0 |
0x43b03c LDUR X8, [X29, #432] |
0x43b040 LDUR X13, [X29, #320] |
0x43b044 STR X0, [X8] |
0x43b048 LDR X0, [X19] |
0x43b04c LDR X12, [SP, #224] |
0x43b050 CBZ X0, 43b080 |
0x43b054 MOVZ W1, #8 |
0x43b058 BL 4ac4b0 |
0x43b05c LDUR X8, [X29, #344] |
0x43b060 MOVZ W1, #8 |
0x43b064 STR X0, [X8] |
0x43b068 LDR X0, [X19] |
0x43b06c BL 4ac4b0 |
0x43b070 LDUR X13, [X29, #320] |
0x43b074 LDR X12, [SP, #224] |
0x43b078 LDUR X8, [X29, #416] |
0x43b07c STR X0, [X8] |
0x43b080 LDUR X8, [X29, #496] |
0x43b084 LDR X9, [X8] |
0x43b088 LDR X8, [X13] |
0x43b08c CMP X9, #1 |
0x43b090 B.LE 43b140 |
0x43b094 LDR X14, [SP, #48] |
0x43b098 CMP X8, #1 |
0x43b09c B.LT 43b0cc |
0x43b0a0 LDUR X9, [X29, #408] |
0x43b0a4 ORR X8, XZR, XZR |
0x43b0a8 LDR X9, [X9] |
(862) 0x43b0ac LDR X10, [X14] |
(862) 0x43b0b0 LDR X11, [X9, X8,LSL #3] |
(862) 0x43b0b4 ADD X10, X11, X10 |
(862) 0x43b0b8 STR X10, [X9, X8,LSL #3] |
(862) 0x43b0bc ADD X8, X8, #1 |
(862) 0x43b0c0 LDR X10, [X13] |
(862) 0x43b0c4 CMP X8, X10 |
(862) 0x43b0c8 B.LT 43b0ac |
0x43b0cc LDP X9, X8, [SP, #16] |
0x43b0d0 LDR X3, [X12] |
0x43b0d4 LDR X1, [X8] |
0x43b0d8 LDUR X8, [X29, #408] |
0x43b0dc LDR X0, [X9] |
0x43b0e0 LDR X2, [X8] |
0x43b0e4 LDR X8, [SP, #32] |
0x43b0e8 LDR X4, [X8] |
0x43b0ec BL 47e7c0 |
0x43b0f0 LDUR X13, [X29, #320] |
0x43b0f4 LDR X12, [SP, #224] |
0x43b0f8 LDR X8, [X13] |
0x43b0fc CMP X8, #1 |
0x43b100 B.LT 43b174 |
0x43b104 LDUR X8, [X29, #408] |
0x43b108 LDR X14, [SP, #48] |
0x43b10c ORR X9, XZR, XZR |
0x43b110 LDR X10, [X8] |
0x43b114 HINT #0 |
0x43b118 HINT #0 |
0x43b11c HINT #0 |
(861) 0x43b120 LDR X8, [X14] |
(861) 0x43b124 LDR X11, [X10, X9,LSL #3] |
(861) 0x43b128 SUB X8, X11, X8 |
(861) 0x43b12c STR X8, [X10, X9,LSL #3] |
(861) 0x43b130 ADD X9, X9, #1 |
(861) 0x43b134 LDR X8, [X13] |
(861) 0x43b138 CMP X9, X8 |
(861) 0x43b13c B.LT 43b120 |
0x43b140 CMP X8, #1 |
0x43b144 B.LT 43b174 |
0x43b148 MOVN X9, #0 |
0x43b14c ORR X8, XZR, XZR |
0x43b150 HINT #0 |
0x43b154 HINT #0 |
0x43b158 HINT #0 |
0x43b15c HINT #0 |
(860) 0x43b160 STR X9, [X22, X8,LSL #3] |
(860) 0x43b164 ADD X8, X8, #1 |
(860) 0x43b168 LDR X10, [X13] |
(860) 0x43b16c CMP X8, X10 |
(860) 0x43b170 B.LT 43b160 |
0x43b174 LDR X8, [X12] |
0x43b178 CMP X8, #1 |
0x43b17c B.LT 43b19c |
0x43b180 MOVN X9, #0 |
0x43b184 ORR X8, XZR, XZR |
(859) 0x43b188 STR X9, [X23, X8,LSL #3] |
(859) 0x43b18c ADD X8, X8, #1 |
(859) 0x43b190 LDR X10, [X12] |
(859) 0x43b194 CMP X8, X10 |
(859) 0x43b198 B.LT 43b188 |
0x43b19c ADRP X0, |
0x43b1a0 ADD X0, X0, #1504 |
0x43b1a4 ORR W1, WZR, W20 |
0x43b1a8 BL 410070 |
0x43b1ac LDUR X17, [X29, #392] |
0x43b1b0 LDUR X9, [X29, #312] |
0x43b1b4 CMP X17, X27 |
0x43b1b8 B.GT 43b200 |
0x43b1bc LDUR X8, [X29, #320] |
0x43b1c0 LDR X8, [X8] |
0x43b1c4 CBZ X8, 43b1d0 |
0x43b1c8 ORR X0, XZR, X22 |
0x43b1cc BL 4ac5b0 |
0x43b1d0 LDR X8, [SP, #224] |
0x43b1d4 LDR X8, [X8] |
0x43b1d8 CBZ X8, 43bec8 |
0x43b1dc ORR X0, XZR, X23 |
0x43b1e0 ADD SP, SP, #448 |
0x43b1e4 LDP X20, X19, [SP, #80] |
0x43b1e8 LDP X22, X21, [SP, #64] |
0x43b1ec LDP X24, X23, [SP, #48] |
0x43b1f0 LDP X26, X25, [SP, #32] |
0x43b1f4 LDP X28, X27, [SP, #16] |
0x43b1f8 LDP X29, X30, [SP], #96 |
0x43b1fc B 4ac5b0 |
0x43b200 LDR X8, [SP, #104] |
0x43b204 FMOV D0, #1.0000000 |
0x43b208 FMOV D1, #-1.0000000 |
0x43b20c FMOV V2.2D, #1.0000000 |
0x43b210 MOVN X30, #1 |
0x43b214 LDR X26, [X8] |
0x43b218 LDR X8, [SP, #160] |
0x43b21c LDR X18, [X8] |
0x43b220 LDUR X8, [X29, #432] |
0x43b224 LDR X0, [X8] |
0x43b228 LDUR X8, [X29, #416] |
0x43b22c LDR X10, [X8] |
0x43b230 LDUR X8, [X29, #456] |
0x43b234 LDR X11, [X8] |
0x43b238 LDUR X8, [X29, #472] |
0x43b23c LDR X8, [X8] |
0x43b240 STR X8, [SP, #176] |
0x43b244 LDUR X8, [X29, #368] |
0x43b248 LDR X14, [X8] |
0x43b24c LDUR X8, [X29, #376] |
0x43b250 LDR X15, [X8] |
0x43b254 LDUR X8, [X29, #384] |
0x43b258 LDR X16, [X8] |
0x43b25c LDUR X8, [X29, #296] |
0x43b260 LDR X8, [X8] |
0x43b264 STUR X8, [X29, #488] |
0x43b268 LDUR X8, [X29, #352] |
0x43b26c LDR X8, [X8] |
0x43b270 STUR X8, [X29, #472] |
0x43b274 LDUR X8, [X29, #304] |
0x43b278 LDR X8, [X8] |
0x43b27c STUR X8, [X29, #464] |
0x43b280 LDUR X8, [X29, #328] |
0x43b284 LDR X8, [X8] |
0x43b288 STUR X8, [X29, #456] |
0x43b28c LDR X8, [SP, #168] |
0x43b290 LDR X8, [X8] |
0x43b294 STUR X8, [X29, #424] |
0x43b298 LDR X8, [SP, #128] |
0x43b29c LDR X8, [X8] |
0x43b2a0 STR X8, [SP, #104] |
0x43b2a4 ADD X8, X26, #8 |
0x43b2a8 STUR X8, [X29, #376] |
0x43b2ac ADD X8, X18, #8 |
0x43b2b0 STUR X8, [X29, #368] |
0x43b2b4 ADD X8, X0, #16 |
0x43b2b8 STP X8, X10, [SP, #56] |
0x43b2bc ADD X8, X10, #16 |
0x43b2c0 STR X8, [SP, #48] |
0x43b2c4 LDR X8, [SP, #136] |
0x43b2c8 STUR X26, [X29, #480] |
0x43b2cc LDR X8, [X8] |
0x43b2d0 STP X18, X8, [X29, #952] |
0x43b2d4 LDUR X8, [X29, #408] |
0x43b2d8 LDR X10, [X8] |
0x43b2dc LDUR X8, [X29, #400] |
0x43b2e0 STP X11, X0, [SP, #184] |
0x43b2e4 LDR X12, [X8] |
0x43b2e8 STP X12, X10, [SP, #160] |
0x43b2ec B 43b320 |
0x43b2f0 HINT #0 |
0x43b2f4 HINT #0 |
0x43b2f8 HINT #0 |
0x43b2fc HINT #0 |
(839) 0x43b300 LDR D3, [X9] |
(839) 0x43b304 LDR X8, [X10, X27,LSL #3] |
(839) 0x43b308 STR X8, [X12, X4,LSL #3] |
(839) 0x43b30c STR D3, [X0, X4,LSL #3] |
(839) 0x43b310 ADD X27, X27, #1 |
(839) 0x43b314 SUB X30, X30, #1 |
(839) 0x43b318 CMP X27, X17 |
(839) 0x43b31c B.EQ 43b1bc |
(839) 0x43b320 LDR X4, [X11, X27,LSL #3] |
(839) 0x43b324 LDR X8, [X14, X27,LSL #3] |
(839) 0x43b328 TBZ X8, #63, 43b300 |
(839) 0x43b32c CMN X8, #3 |
(839) 0x43b330 B.EQ 43b310 |
(840) 0x43b334 LDR X8, [SP, #176] |
(840) 0x43b338 LDR X10, [X15, X27,LSL #3] |
(840) 0x43b33c SUB X30, X30, #1 |
(840) 0x43b340 ORR X5, XZR, X4 |
(840) 0x43b344 LDR X13, [X8, X27,LSL #3] |
(840) 0x43b348 ADD X8, X27, #1 |
(840) 0x43b34c LDR X8, [X15, X8,LSL #3] |
(840) 0x43b350 ORR X3, XZR, X13 |
(840) 0x43b354 CMP X10, X8 |
(840) 0x43b358 B.GE 43b524 |
(840) 0x43b35c LDP X9, X8, [X29, #808] |
(840) 0x43b360 ORR X5, XZR, X4 |
(840) 0x43b364 ORR X3, XZR, X13 |
(840) 0x43b368 LDR X12, [X8] |
(840) 0x43b36c LDUR X8, [X29, #328] |
(840) 0x43b370 LDR X11, [X9] |
(840) 0x43b374 LDR X18, [X8] |
(840) 0x43b378 LDP X8, X9, [X29, #912] |
(840) 0x43b37c LDR X6, [X8] |
(840) 0x43b380 LDUR X8, [X29, #432] |
(840) 0x43b384 LDR X1, [X9] |
(840) 0x43b388 LDR X19, [X8] |
(840) 0x43b38c B 43b3b4 |
(851) 0x43b390 LDUR X26, [X29, #480] |
(851) 0x43b394 HINT #0 |
(851) 0x43b398 HINT #0 |
(851) 0x43b39c HINT #0 |
(851) 0x43b3a0 ADD X8, X27, #1 |
(851) 0x43b3a4 ADD X10, X10, #1 |
(851) 0x43b3a8 LDR X8, [X15, X8,LSL #3] |
(851) 0x43b3ac CMP X10, X8 |
(851) 0x43b3b0 B.GE 43b524 |
(851) 0x43b3b4 LDR X17, [X16, X10,LSL #3] |
(851) 0x43b3b8 LDR X8, [X14, X17,LSL #3] |
(851) 0x43b3bc TBNZ X8, #63, 43b3e8 |
(851) 0x43b3c0 LDR X8, [X22, X17,LSL #3] |
(851) 0x43b3c4 CMP X8, X4 |
(851) 0x43b3c8 B.GE 43b3a0 |
(851) 0x43b3cc LDR D3, [X25] |
(851) 0x43b3d0 STR X5, [X22, X17,LSL #3] |
(851) 0x43b3d4 LDR X8, [X1, X17,LSL #3] |
(851) 0x43b3d8 STR X8, [X6, X5,LSL #3] |
(851) 0x43b3dc STR D3, [X19, X5,LSL #3] |
(851) 0x43b3e0 ADD X5, X5, #1 |
(851) 0x43b3e4 B 43b3a0 |
(851) 0x43b3e8 CMN X8, #3 |
(851) 0x43b3ec B.EQ 43b3a0 |
(851) 0x43b3f0 STR X30, [X22, X17,LSL #3] |
(851) 0x43b3f4 ADD X20, X17, #1 |
(851) 0x43b3f8 LDR X0, [X15, X17,LSL #3] |
(851) 0x43b3fc LDR X26, [X15, X20,LSL #3] |
(851) 0x43b400 CMP X0, X26 |
(851) 0x43b404 B.GE 43b464 |
(851) 0x43b408 LDP X8, X9, [X29, #912] |
(851) 0x43b40c LDR X21, [X8] |
(851) 0x43b410 LDUR X8, [X29, #432] |
(851) 0x43b414 LDR X2, [X9] |
(851) 0x43b418 LDR X9, [X8] |
(851) 0x43b41c B 43b42c |
(854) 0x43b420 ADD X0, X0, #1 |
(854) 0x43b424 CMP X0, X26 |
(854) 0x43b428 B.GE 43b464 |
(854) 0x43b42c LDR X8, [X16, X0,LSL #3] |
(854) 0x43b430 LDR X7, [X14, X8,LSL #3] |
(854) 0x43b434 TBNZ X7, #63, 43b420 |
(854) 0x43b438 LDR X7, [X22, X8,LSL #3] |
(854) 0x43b43c CMP X7, X4 |
(854) 0x43b440 B.GE 43b420 |
(854) 0x43b444 STR X5, [X22, X8,LSL #3] |
(854) 0x43b448 LDR D3, [X25] |
(854) 0x43b44c LDR X8, [X2, X8,LSL #3] |
(854) 0x43b450 STR X8, [X21, X5,LSL #3] |
(854) 0x43b454 LDR X26, [X15, X20,LSL #3] |
(854) 0x43b458 STR D3, [X9, X5,LSL #3] |
(854) 0x43b45c ADD X5, X5, #1 |
(854) 0x43b460 B 43b420 |
(851) 0x43b464 LDUR X8, [X29, #496] |
(851) 0x43b468 LDR X8, [X8] |
(851) 0x43b46c CMP X8, #2 |
(851) 0x43b470 B.LT 43b390 |
(851) 0x43b474 LDR X21, [X11, X17,LSL #3] |
(851) 0x43b478 LDR X0, [X11, X20,LSL #3] |
(851) 0x43b47c CMP X21, X0 |
(851) 0x43b480 B.GE 43b390 |
(851) 0x43b484 LDP X8, X9, [X29, #856] |
(851) 0x43b488 LDR X17, [X8] |
(851) 0x43b48c LDUR X8, [X29, #416] |
(851) 0x43b490 LDR X26, [X9] |
(851) 0x43b494 LDR X2, [X8] |
(851) 0x43b498 CBNZ X12, 43b4ac |
(851) 0x43b49c B 43b4f0 |
(852) 0x43b4a0 ADD X21, X21, #1 |
(852) 0x43b4a4 CMP X21, X0 |
(852) 0x43b4a8 B.GE 43b390 |
(852) 0x43b4ac LDR X8, [X26, X21,LSL #3] |
(852) 0x43b4b0 LDR X8, [X12, X8,LSL #3] |
(852) 0x43b4b4 LDR X9, [X18, X8,LSL #3] |
(852) 0x43b4b8 TBNZ X9, #63, 43b4a0 |
(852) 0x43b4bc LDR X9, [X23, X8,LSL #3] |
(852) 0x43b4c0 CMP X9, X13 |
(852) 0x43b4c4 B.GE 43b4a0 |
(852) 0x43b4c8 LDR D3, [X25] |
(852) 0x43b4cc STR X3, [X23, X8,LSL #3] |
(852) 0x43b4d0 STR X8, [X17, X3,LSL #3] |
(852) 0x43b4d4 LDR X0, [X11, X20,LSL #3] |
(852) 0x43b4d8 STR D3, [X2, X3,LSL #3] |
(852) 0x43b4dc ADD X3, X3, #1 |
(852) 0x43b4e0 B 43b4a0 |
(853) 0x43b4e4 ADD X21, X21, #1 |
(853) 0x43b4e8 CMP X21, X0 |
(853) 0x43b4ec B.GE 43b390 |
(853) 0x43b4f0 LDR X8, [X26, X21,LSL #3] |
(853) 0x43b4f4 LDR X9, [X18, X8,LSL #3] |
(853) 0x43b4f8 TBNZ X9, #63, 43b4e4 |
(853) 0x43b4fc LDR X9, [X23, X8,LSL #3] |
(853) 0x43b500 CMP X9, X13 |
(853) 0x43b504 B.GE 43b4e4 |
(853) 0x43b508 LDR D3, [X25] |
(853) 0x43b50c STR X3, [X23, X8,LSL #3] |
(853) 0x43b510 STR X8, [X17, X3,LSL #3] |
(853) 0x43b514 LDR X0, [X11, X20,LSL #3] |
(853) 0x43b518 STR D3, [X2, X3,LSL #3] |
(853) 0x43b51c ADD X3, X3, #1 |
(853) 0x43b520 B 43b4e4 |
(840) 0x43b524 LDUR X8, [X29, #496] |
(840) 0x43b528 LDR X8, [X8] |
(840) 0x43b52c CMP X8, #2 |
(840) 0x43b530 B.LT 43b6a8 |
(840) 0x43b534 LDUR X8, [X29, #488] |
(840) 0x43b538 ADD X9, X27, #1 |
(840) 0x43b53c LDR X10, [X8, X27,LSL #3] |
(840) 0x43b540 LDR X8, [X8, X9,LSL #3] |
(840) 0x43b544 CMP X10, X8 |
(840) 0x43b548 B.GE 43b6b0 |
(840) 0x43b54c LDP X9, X8, [SP, #112] |
(840) 0x43b550 LDR X12, [X8] |
(840) 0x43b554 LDUR X8, [X29, #344] |
(840) 0x43b558 LDR X11, [X9] |
(840) 0x43b55c LDR X18, [X8] |
(840) 0x43b560 LDUR X8, [X29, #416] |
(840) 0x43b564 LDR X1, [X8] |
(840) 0x43b568 B 43b584 |
(849) 0x43b56c LDUR X8, [X29, #488] |
(849) 0x43b570 ADD X9, X27, #1 |
(849) 0x43b574 ADD X10, X10, #1 |
(849) 0x43b578 LDR X8, [X8, X9,LSL #3] |
(849) 0x43b57c CMP X10, X8 |
(849) 0x43b580 B.GE 43b6b8 |
(849) 0x43b584 LDUR X8, [X29, #472] |
(849) 0x43b588 LDR X9, [X8, X10,LSL #3] |
(849) 0x43b58c LDUR X8, [X29, #464] |
(849) 0x43b590 CBZ X8, 43b598 |
(849) 0x43b594 LDR X9, [X8, X9,LSL #3] |
(849) 0x43b598 LDUR X8, [X29, #456] |
(849) 0x43b59c LDR X8, [X8, X9,LSL #3] |
(849) 0x43b5a0 TBNZ X8, #63, 43b5c8 |
(849) 0x43b5a4 LDR X8, [X23, X9,LSL #3] |
(849) 0x43b5a8 CMP X8, X13 |
(849) 0x43b5ac B.GE 43b56c |
(849) 0x43b5b0 LDR D3, [X25] |
(849) 0x43b5b4 STR X3, [X23, X9,LSL #3] |
(849) 0x43b5b8 STR X9, [X18, X3,LSL #3] |
(849) 0x43b5bc STR D3, [X1, X3,LSL #3] |
(849) 0x43b5c0 ADD X3, X3, #1 |
(849) 0x43b5c4 B 43b56c |
(849) 0x43b5c8 CMN X8, #3 |
(849) 0x43b5cc B.EQ 43b56c |
(849) 0x43b5d0 UBFM X8, X9, #61, #60 |
(849) 0x43b5d4 ADD X17, X11, X9,LSL #3 |
(849) 0x43b5d8 STR X30, [X23, X8] |
(849) 0x43b5dc LDP X0, X8, [X17] |
(849) 0x43b5e0 CMP X0, X8 |
(849) 0x43b5e4 B.GE 43b56c |
(849) 0x43b5e8 LDUR X8, [X29, #344] |
(849) 0x43b5ec LDR X2, [X8] |
(849) 0x43b5f0 LDP X8, X9, [X29, #920] |
(849) 0x43b5f4 LDR X19, [X8] |
(849) 0x43b5f8 LDUR X8, [X29, #400] |
(849) 0x43b5fc LDR X6, [X9] |
(849) 0x43b600 LDR X20, [X8] |
(849) 0x43b604 LDUR X8, [X29, #432] |
(849) 0x43b608 LDR X21, [X8] |
(849) 0x43b60c B 43b630 |
0x43b610 HINT #0 |
0x43b614 HINT #0 |
0x43b618 HINT #0 |
0x43b61c HINT #0 |
(850) 0x43b620 LDR X8, [X17, #8] |
(850) 0x43b624 ADD X0, X0, #1 |
(850) 0x43b628 CMP X0, X8 |
(850) 0x43b62c B.GE 43b56c |
(850) 0x43b630 LDR X8, [X12, X0,LSL #3] |
(850) 0x43b634 LDR X9, [X28] |
(850) 0x43b638 LDR X7, [X24] |
(850) 0x43b63c SUBS X9, X8, X9 |
(850) 0x43b640 CCMP X8, X7, #0, #10 |
(850) 0x43b644 B.LT 43b680 |
(850) 0x43b648 ORN X8, XZR, X8 |
(850) 0x43b64c LDR X9, [X23, X8,LSL #3] |
(850) 0x43b650 CMP X9, X13 |
(850) 0x43b654 B.GE 43b620 |
(850) 0x43b658 LDR D3, [X25] |
(850) 0x43b65c STR X3, [X23, X8,LSL #3] |
(850) 0x43b660 STR X8, [X2, X3,LSL #3] |
(850) 0x43b664 STR D3, [X6, X3,LSL #3] |
(850) 0x43b668 ADD X3, X3, #1 |
(850) 0x43b66c B 43b620 |
0x43b670 HINT #0 |
0x43b674 HINT #0 |
0x43b678 HINT #0 |
0x43b67c HINT #0 |
(850) 0x43b680 LDR X8, [X22, X9,LSL #3] |
(850) 0x43b684 CMP X8, X4 |
(850) 0x43b688 B.GE 43b620 |
(850) 0x43b68c LDR D3, [X25] |
(850) 0x43b690 STR X5, [X22, X9,LSL #3] |
(850) 0x43b694 LDR X8, [X19, X9,LSL #3] |
(850) 0x43b698 STR X8, [X20, X5,LSL #3] |
(850) 0x43b69c STR D3, [X21, X5,LSL #3] |
(850) 0x43b6a0 ADD X5, X5, #1 |
(850) 0x43b6a4 B 43b620 |
(840) 0x43b6a8 ORR W19, WZR, WZR |
(840) 0x43b6ac B 43b6c8 |
(840) 0x43b6b0 MOVZ W19, #1 |
(840) 0x43b6b4 B 43b6c8 |
(840) 0x43b6b8 LDUR X8, [X29, #496] |
(840) 0x43b6bc LDR X8, [X8] |
(840) 0x43b6c0 CMP X8, #1 |
(840) 0x43b6c4 CSINC W19, WZR, WZR, #13 |
(840) 0x43b6c8 LDUR X9, [X29, #424] |
(840) 0x43b6cc ADD X10, X27, #1 |
(840) 0x43b6d0 LDUR X17, [X29, #440] |
(840) 0x43b6d4 LDR X8, [X9, X27,LSL #3] |
(840) 0x43b6d8 LDR X11, [X9, X10,LSL #3] |
(840) 0x43b6dc LDR D3, [X26, X8,LSL #3] |
(840) 0x43b6e0 ADD X10, X8, #1 |
(840) 0x43b6e4 CMP X10, X11 |
(840) 0x43b6e8 B.GE 43bb48 |
(840) 0x43b6ec LDUR X8, [X29, #432] |
(840) 0x43b6f0 LDR X12, [X8] |
(840) 0x43b6f4 LDR X8, [SP, #144] |
(840) 0x43b6f8 LDR X8, [X8] |
(840) 0x43b6fc STUR X8, [X29, #384] |
(840) 0x43b700 LDR X8, [SP, #152] |
(840) 0x43b704 LDR X9, [X8] |
(840) 0x43b708 LDR X8, [SP, #128] |
(840) 0x43b70c LDR X7, [X8] |
(840) 0x43b710 LDR X8, [SP, #136] |
(840) 0x43b714 LDR X8, [X8] |
(840) 0x43b718 STP X8, X9, [SP, #208] |
(840) 0x43b71c ADD X8, X8, #8 |
(840) 0x43b720 STR X8, [SP, #200] |
(840) 0x43b724 B 43b744 |
(844) 0x43b728 LDR D4, [X26, X10,LSL #3] |
(844) 0x43b72c LDR D5, [X12, X9,LSL #3] |
(844) 0x43b730 FADD D4, D5, D4 |
(844) 0x43b734 STR D4, [X12, X9,LSL #3] |
(844) 0x43b738 ADD X10, X10, #1 |
(844) 0x43b73c CMP X10, X11 |
(844) 0x43b740 B.EQ 43bb48 |
(844) 0x43b744 LDR X20, [X17, X10,LSL #3] |
(844) 0x43b748 LDR X9, [X22, X20,LSL #3] |
(844) 0x43b74c CMP X9, X4 |
(844) 0x43b750 B.GE 43b728 |
(844) 0x43b754 CMP X9, X30 |
(844) 0x43b758 B.NE 43b7e0 |
(844) 0x43b75c LDUR X8, [X29, #424] |
(844) 0x43b760 LDR D5, [X25] |
(844) 0x43b764 ADD X21, X20, #1 |
(844) 0x43b768 LDR X18, [X8, X20,LSL #3] |
(844) 0x43b76c LDR X1, [X8, X21,LSL #3] |
(844) 0x43b770 LDR D4, [X26, X18,LSL #3] |
(844) 0x43b774 ADD X6, X18, #1 |
(844) 0x43b778 FCMP D4, #0 |
(844) 0x43b77c FCSEL D4, D1, D0, #11 |
(844) 0x43b780 CMP X6, X1 |
(844) 0x43b784 B.GE 43b828 |
(844) 0x43b788 SUB W8, W18, W1 |
(844) 0x43b78c TBNZ W8, #0, 43b818 |
(844) 0x43b790 LDUR X8, [X29, #440] |
(844) 0x43b794 LDR X8, [X8, X6,LSL #3] |
(844) 0x43b798 LDR X9, [X22, X8,LSL #3] |
(844) 0x43b79c CMP X8, X27 |
(844) 0x43b7a0 CCMP X9, X4, #0, #1 |
(844) 0x43b7a4 B.LT 43b7bc |
(844) 0x43b7a8 LDR D6, [X26, X6,LSL #3] |
(844) 0x43b7ac FMUL D7, D6, D4 |
(844) 0x43b7b0 FCMP D7, #0 |
(844) 0x43b7b4 B.GE 43b7bc |
(844) 0x43b7b8 FADD D5, D6, D5 |
(844) 0x43b7bc ADD X9, X18, #2 |
(844) 0x43b7c0 SUB X8, X1, #2 |
(844) 0x43b7c4 CMP X8, X18 |
(844) 0x43b7c8 B.EQ 43b828 |
(844) 0x43b7cc B 43b860 |
0x43b7d0 HINT #0 |
0x43b7d4 HINT #0 |
0x43b7d8 HINT #0 |
0x43b7dc HINT #0 |
(844) 0x43b7e0 LDR X8, [X14, X20,LSL #3] |
(844) 0x43b7e4 CMN X8, #3 |
(844) 0x43b7e8 B.EQ 43b738 |
(844) 0x43b7ec LDUR X8, [X29, #384] |
(844) 0x43b7f0 CMP X8, #1 |
(844) 0x43b7f4 B.EQ 43b80c |
(844) 0x43b7f8 LDR X9, [SP, #216] |
(844) 0x43b7fc LDR X8, [X9, X27,LSL #3] |
(844) 0x43b800 LDR X9, [X9, X20,LSL #3] |
(844) 0x43b804 CMP X8, X9 |
(844) 0x43b808 B.NE 43b738 |
(844) 0x43b80c LDR D4, [X26, X10,LSL #3] |
(844) 0x43b810 FADD D3, D4, D3 |
(844) 0x43b814 B 43b738 |
(844) 0x43b818 ADD X9, X18, #1 |
(844) 0x43b81c SUB X8, X1, #2 |
(844) 0x43b820 CMP X8, X18 |
(844) 0x43b824 B.NE 43b860 |
(844) 0x43b828 CBZ W19, 43b920 |
(844) 0x43b82c LDR X9, [X7, X20,LSL #3] |
(844) 0x43b830 LDR X17, [X7, X21,LSL #3] |
(844) 0x43b834 CMP X17, X9 |
(844) 0x43b838 B.LE 43b920 |
(844) 0x43b83c LDUR X8, [X29, #360] |
(844) 0x43b840 LDR X2, [X8] |
(844) 0x43b844 SUB W8, W17, W9 |
(844) 0x43b848 TBNZ W8, #0, 43b8e4 |
(844) 0x43b84c ORR X26, XZR, X9 |
(844) 0x43b850 ADD X8, X9, #1 |
(844) 0x43b854 CMP X17, X8 |
(844) 0x43b858 B.EQ 43b920 |
(844) 0x43b85c B 43ba04 |
(844) 0x43b860 LDUR X8, [X29, #376] |
(844) 0x43b864 SUB X17, X1, X9 |
(844) 0x43b868 ADD X0, X8, X9,LSL #3 |
(844) 0x43b86c LDUR X8, [X29, #368] |
(844) 0x43b870 ADD X2, X8, X9,LSL #3 |
(844) 0x43b874 B 43b890 |
0x43b878 HINT #0 |
0x43b87c HINT #0 |
(848) 0x43b880 ADD X2, X2, #16 |
(848) 0x43b884 SUBS X17, X17, #2 |
(848) 0x43b888 ADD X0, X0, #16 |
(848) 0x43b88c B.EQ 43b828 |
(848) 0x43b890 LDUR X8, [X2, #504] |
(848) 0x43b894 LDR X9, [X22, X8,LSL #3] |
(848) 0x43b898 CMP X8, X27 |
(848) 0x43b89c CCMP X9, X4, #0, #1 |
(848) 0x43b8a0 B.LT 43b8b8 |
(848) 0x43b8a4 LDUR D6, [X0, #504] |
(848) 0x43b8a8 FMUL D7, D6, D4 |
(848) 0x43b8ac FCMP D7, #0 |
(848) 0x43b8b0 B.GE 43b8b8 |
(848) 0x43b8b4 FADD D5, D6, D5 |
(848) 0x43b8b8 LDR X8, [X2] |
(848) 0x43b8bc LDR X9, [X22, X8,LSL #3] |
(848) 0x43b8c0 CMP X8, X27 |
(848) 0x43b8c4 CCMP X9, X4, #0, #1 |
(848) 0x43b8c8 B.LT 43b880 |
(848) 0x43b8cc LDR D6, [X0] |
(848) 0x43b8d0 FMUL D7, D6, D4 |
(848) 0x43b8d4 FCMP D7, #0 |
(848) 0x43b8d8 B.GE 43b880 |
(848) 0x43b8dc FADD D5, D6, D5 |
(848) 0x43b8e0 B 43b880 |
(844) 0x43b8e4 LDR X8, [SP, #208] |
(844) 0x43b8e8 LDR X8, [X8, X9,LSL #3] |
(844) 0x43b8ec LDR X8, [X23, X8,LSL #3] |
(844) 0x43b8f0 CMP X8, X13 |
(844) 0x43b8f4 B.LT 43b90c |
(844) 0x43b8f8 LDR D6, [X2, X9,LSL #3] |
(844) 0x43b8fc FMUL D7, D6, D4 |
(844) 0x43b900 FCMP D7, #0 |
(844) 0x43b904 B.GE 43b90c |
(844) 0x43b908 FADD D5, D6, D5 |
(844) 0x43b90c ADD X26, X9, #1 |
(844) 0x43b910 ADD X8, X9, #1 |
(844) 0x43b914 CMP X17, X8 |
(844) 0x43b918 B.NE 43ba04 |
(844) 0x43b91c HINT #0 |
(844) 0x43b920 LDUR X26, [X29, #480] |
(844) 0x43b924 FCMP D5, #0 |
(844) 0x43b928 LDR D6, [X26, X10,LSL #3] |
(844) 0x43b92c B.EQ 43b9f8 |
(844) 0x43b930 FDIV D5, D6, D5 |
(844) 0x43b934 CMP X6, X1 |
(844) 0x43b938 B.GE 43b9b8 |
(844) 0x43b93c LDUR X8, [X29, #432] |
(844) 0x43b940 LDR X17, [X8] |
(844) 0x43b944 ORN X8, XZR, X18 |
(844) 0x43b948 ADD X0, X8, X1 |
(844) 0x43b94c LDP X9, X8, [X29, #880] |
(844) 0x43b950 ADD X1, X9, X18,LSL #3 |
(844) 0x43b954 ADD X18, X8, X18,LSL #3 |
(844) 0x43b958 B 43b96c |
0x43b95c HINT #0 |
(846) 0x43b960 SUBS X0, X0, #1 |
(846) 0x43b964 ADD X18, X18, #8 |
(846) 0x43b968 B.EQ 43b9b8 |
(846) 0x43b96c LDR X9, [X1], #8 |
(846) 0x43b970 LDR X2, [X22, X9,LSL #3] |
(846) 0x43b974 CMP X2, X4 |
(846) 0x43b978 B.LT 43b998 |
(846) 0x43b97c LDR D6, [X18] |
(846) 0x43b980 FMUL D7, D6, D4 |
(846) 0x43b984 FCMP D7, #0 |
(846) 0x43b988 B.GE 43b998 |
(846) 0x43b98c LDR D7, [X17, X2,LSL #3] |
(846) 0x43b990 FMADD D6, D6, D5, D7 |
(846) 0x43b994 STR D6, [X17, X2,LSL #3] |
(846) 0x43b998 CMP X9, X27 |
(846) 0x43b99c B.NE 43b960 |
(846) 0x43b9a0 LDR D6, [X18] |
(846) 0x43b9a4 FMUL D7, D6, D4 |
(846) 0x43b9a8 FCMP D7, #0 |
(846) 0x43b9ac B.GE 43b960 |
(846) 0x43b9b0 FMADD D3, D6, D5, D3 |
(846) 0x43b9b4 B 43b960 |
(844) 0x43b9b8 CBZ W19, 43bab8 |
(844) 0x43b9bc LDR X18, [X7, X20,LSL #3] |
(844) 0x43b9c0 LDR X9, [X7, X21,LSL #3] |
(844) 0x43b9c4 CMP X9, X18 |
(844) 0x43b9c8 B.LE 43bab8 |
(844) 0x43b9cc LDUR X8, [X29, #360] |
(844) 0x43b9d0 LDR X1, [X8] |
(844) 0x43b9d4 LDUR X8, [X29, #416] |
(844) 0x43b9d8 LDR X17, [X8] |
(844) 0x43b9dc SUB W8, W9, W18 |
(844) 0x43b9e0 TBNZ W8, #0, 43ba78 |
(844) 0x43b9e4 ORR X2, XZR, X18 |
(844) 0x43b9e8 ADD X8, X18, #1 |
(844) 0x43b9ec CMP X9, X8 |
(844) 0x43b9f0 B.EQ 43bab8 |
(844) 0x43b9f4 B 43bac0 |
(844) 0x43b9f8 LDUR X17, [X29, #440] |
(844) 0x43b9fc FADD D3, D6, D3 |
(844) 0x43ba00 B 43b738 |
(844) 0x43ba04 LDR X8, [SP, #200] |
(844) 0x43ba08 SUB X17, X17, X26 |
(844) 0x43ba0c ADD X0, X8, X26,LSL #3 |
(844) 0x43ba10 ADD X8, X2, X26,LSL #3 |
(844) 0x43ba14 ADD X2, X8, #8 |
(844) 0x43ba18 B 43ba2c |
0x43ba1c HINT #0 |
(847) 0x43ba20 SUBS X17, X17, #2 |
(847) 0x43ba24 ADD X2, X2, #16 |
(847) 0x43ba28 B.EQ 43b920 |
(847) 0x43ba2c LDUR X8, [X0, #504] |
(847) 0x43ba30 LDR X8, [X23, X8,LSL #3] |
(847) 0x43ba34 CMP X8, X13 |
(847) 0x43ba38 B.LT 43ba50 |
(847) 0x43ba3c LDUR D6, [X2, #504] |
(847) 0x43ba40 FMUL D7, D6, D4 |
(847) 0x43ba44 FCMP D7, #0 |
(847) 0x43ba48 B.GE 43ba50 |
(847) 0x43ba4c FADD D5, D6, D5 |
(847) 0x43ba50 LDR X8, [X0], #16 |
(847) 0x43ba54 LDR X8, [X23, X8,LSL #3] |
(847) 0x43ba58 CMP X8, X13 |
(847) 0x43ba5c B.LT 43ba20 |
(847) 0x43ba60 LDR D6, [X2] |
(847) 0x43ba64 FMUL D7, D6, D4 |
(847) 0x43ba68 FCMP D7, #0 |
(847) 0x43ba6c B.GE 43ba20 |
(847) 0x43ba70 FADD D5, D6, D5 |
(847) 0x43ba74 B 43ba20 |
(844) 0x43ba78 LDR X8, [SP, #208] |
(844) 0x43ba7c LDR X8, [X8, X18,LSL #3] |
(844) 0x43ba80 LDR X0, [X23, X8,LSL #3] |
(844) 0x43ba84 CMP X0, X13 |
(844) 0x43ba88 B.LT 43baa8 |
(844) 0x43ba8c LDR D6, [X1, X18,LSL #3] |
(844) 0x43ba90 FMUL D7, D6, D4 |
(844) 0x43ba94 FCMP D7, #0 |
(844) 0x43ba98 B.GE 43baa8 |
(844) 0x43ba9c LDR D7, [X17, X0,LSL #3] |
(844) 0x43baa0 FMADD D6, D6, D5, D7 |
(844) 0x43baa4 STR D6, [X17, X0,LSL #3] |
(844) 0x43baa8 ADD X2, X18, #1 |
(844) 0x43baac ADD X8, X18, #1 |
(844) 0x43bab0 CMP X9, X8 |
(844) 0x43bab4 B.NE 43bac0 |
(844) 0x43bab8 LDUR X17, [X29, #440] |
(844) 0x43babc B 43b738 |
(844) 0x43bac0 LDR X8, [SP, #200] |
(844) 0x43bac4 SUB X18, X9, X2 |
(844) 0x43bac8 ADD X0, X8, X2,LSL #3 |
(844) 0x43bacc ADD X8, X1, X2,LSL #3 |
(844) 0x43bad0 ADD X1, X8, #8 |
(844) 0x43bad4 B 43baec |
0x43bad8 HINT #0 |
0x43badc HINT #0 |
(845) 0x43bae0 SUBS X18, X18, #2 |
(845) 0x43bae4 ADD X1, X1, #16 |
(845) 0x43bae8 B.EQ 43bab8 |
(845) 0x43baec LDUR X8, [X0, #504] |
(845) 0x43baf0 LDR X9, [X23, X8,LSL #3] |
(845) 0x43baf4 CMP X9, X13 |
(845) 0x43baf8 B.LT 43bb18 |
(845) 0x43bafc LDUR D6, [X1, #504] |
(845) 0x43bb00 FMUL D7, D6, D4 |
(845) 0x43bb04 FCMP D7, #0 |
(845) 0x43bb08 B.GE 43bb18 |
(845) 0x43bb0c LDR D7, [X17, X9,LSL #3] |
(845) 0x43bb10 FMADD D6, D6, D5, D7 |
(845) 0x43bb14 STR D6, [X17, X9,LSL #3] |
(845) 0x43bb18 LDR X8, [X0], #16 |
(845) 0x43bb1c LDR X9, [X23, X8,LSL #3] |
(845) 0x43bb20 CMP X9, X13 |
(845) 0x43bb24 B.LT 43bae0 |
(845) 0x43bb28 LDR D6, [X1] |
(845) 0x43bb2c FMUL D7, D6, D4 |
(845) 0x43bb30 FCMP D7, #0 |
(845) 0x43bb34 B.GE 43bae0 |
(845) 0x43bb38 LDR D7, [X17, X9,LSL #3] |
(845) 0x43bb3c FMADD D6, D6, D5, D7 |
(845) 0x43bb40 STR D6, [X17, X9,LSL #3] |
(845) 0x43bb44 B 43bae0 |
(840) 0x43bb48 CBZ W19, 43bd80 |
(840) 0x43bb4c LDR X8, [SP, #104] |
(840) 0x43bb50 ADD X9, X27, #1 |
(840) 0x43bb54 LDR X10, [X8, X27,LSL #3] |
(840) 0x43bb58 LDR X11, [X8, X9,LSL #3] |
(840) 0x43bb5c CMP X10, X11 |
(840) 0x43bb60 B.GE 43bd80 |
(841) 0x43bb64 LDUR X8, [X29, #360] |
(841) 0x43bb68 LDR X26, [X28] |
(841) 0x43bb6c LDR X12, [X8] |
(841) 0x43bb70 LDUR X8, [X29, #416] |
(841) 0x43bb74 LDR X18, [X8] |
(841) 0x43bb78 LDUR X8, [X29, #328] |
(841) 0x43bb7c LDR X1, [X8] |
(841) 0x43bb80 LDR X8, [SP, #144] |
(841) 0x43bb84 LDR X8, [X8] |
(841) 0x43bb88 STUR X8, [X29, #384] |
(841) 0x43bb8c LDR X8, [SP, #152] |
(841) 0x43bb90 LDR X9, [X8] |
(841) 0x43bb94 LDR X8, [SP, #88] |
(841) 0x43bb98 LDR X8, [X8] |
(841) 0x43bb9c STP X8, X9, [SP, #208] |
(841) 0x43bba0 LDP X9, X8, [SP, #72] |
(841) 0x43bba4 LDR X20, [X9] |
(841) 0x43bba8 LDR X21, [X8] |
(841) 0x43bbac B 43bbdc |
0x43bbb0 HINT #0 |
0x43bbb4 HINT #0 |
0x43bbb8 HINT #0 |
0x43bbbc HINT #0 |
(841) 0x43bbc0 LDR D4, [X12, X10,LSL #3] |
(841) 0x43bbc4 LDR D5, [X18, X17,LSL #3] |
(841) 0x43bbc8 FADD D4, D5, D4 |
(841) 0x43bbcc STR D4, [X18, X17,LSL #3] |
(841) 0x43bbd0 ADD X10, X10, #1 |
(841) 0x43bbd4 CMP X10, X11 |
(841) 0x43bbd8 B.EQ 43bd80 |
(841) 0x43bbdc LDUR X8, [X29, #448] |
(841) 0x43bbe0 LDR X9, [X8, X10,LSL #3] |
(841) 0x43bbe4 LDR X17, [X23, X9,LSL #3] |
(841) 0x43bbe8 CMP X17, X13 |
(841) 0x43bbec B.GE 43bbc0 |
(841) 0x43bbf0 CMP X17, X30 |
(841) 0x43bbf4 B.NE 43bc80 |
(841) 0x43bbf8 LDR D4, [X25] |
(841) 0x43bbfc ADD X8, X20, X9,LSL #3 |
(841) 0x43bc00 LDP X19, X9, [X8] |
(841) 0x43bc04 SUBS X7, X9, X19 |
(841) 0x43bc08 B.LE 43bcb0 |
(841) 0x43bc0c LDUR X8, [X29, #336] |
(841) 0x43bc10 LDR X17, [X24] |
(841) 0x43bc14 ORR X2, XZR, X19 |
(841) 0x43bc18 LDR X0, [X8] |
(841) 0x43bc1c B 43bc34 |
(843) 0x43bc20 LDR D5, [X0, X2,LSL #3] |
(843) 0x43bc24 FADD D4, D5, D4 |
(843) 0x43bc28 ADD X2, X2, #1 |
(843) 0x43bc2c CMP X9, X2 |
(843) 0x43bc30 B.EQ 43bcbc |
(843) 0x43bc34 LDR X8, [X21, X2,LSL #3] |
(843) 0x43bc38 SUBS X6, X8, X26 |
(843) 0x43bc3c CCMP X8, X17, #0, #10 |
(843) 0x43bc40 B.LT 43bc60 |
(843) 0x43bc44 ORN X8, XZR, X8 |
(843) 0x43bc48 LDR X8, [X23, X8,LSL #3] |
(843) 0x43bc4c CMP X8, X13 |
(843) 0x43bc50 B.GE 43bc20 |
(843) 0x43bc54 B 43bc28 |
0x43bc58 HINT #0 |
0x43bc5c HINT #0 |
(843) 0x43bc60 LDR X8, [X22, X6,LSL #3] |
(843) 0x43bc64 CMP X6, X27 |
(843) 0x43bc68 CCMP X8, X4, #0, #1 |
(843) 0x43bc6c B.LT 43bc28 |
(843) 0x43bc70 B 43bc20 |
0x43bc74 HINT #0 |
0x43bc78 HINT #0 |
0x43bc7c HINT #0 |
(841) 0x43bc80 LDR X8, [X1, X9,LSL #3] |
(841) 0x43bc84 CMN X8, #3 |
(841) 0x43bc88 B.EQ 43bbd0 |
(841) 0x43bc8c LDUR X8, [X29, #384] |
(841) 0x43bc90 CMP X8, #1 |
(841) 0x43bc94 B.EQ 43bd74 |
(841) 0x43bc98 LDP X17, X8, [SP, #208] |
(841) 0x43bc9c LDR X8, [X8, X27,LSL #3] |
(841) 0x43bca0 LDR X9, [X17, X9,LSL #3] |
(841) 0x43bca4 CMP X8, X9 |
(841) 0x43bca8 B.NE 43bbd0 |
(841) 0x43bcac B 43bd74 |
(841) 0x43bcb0 FCMP D4, #0 |
(841) 0x43bcb4 B.NE 43bbd0 |
(841) 0x43bcb8 B 43bd74 |
(841) 0x43bcbc FCMP D4, #0 |
(841) 0x43bcc0 B.EQ 43bd74 |
(842) 0x43bcc4 LDR D5, [X12, X10,LSL #3] |
(842) 0x43bcc8 LDUR X9, [X29, #416] |
(842) 0x43bccc LDUR X8, [X29, #336] |
(842) 0x43bcd0 ADD X2, X21, X19,LSL #3 |
(842) 0x43bcd4 FDIV D4, D5, D4 |
(842) 0x43bcd8 LDR X17, [X9] |
(842) 0x43bcdc LDUR X9, [X29, #432] |
(842) 0x43bce0 LDR X8, [X8] |
(842) 0x43bce4 LDR X0, [X9] |
(842) 0x43bce8 ADD X19, X8, X19,LSL #3 |
(842) 0x43bcec B 43bd0c |
0x43bcf0 HINT #0 |
0x43bcf4 HINT #0 |
0x43bcf8 HINT #0 |
0x43bcfc HINT #0 |
(842) 0x43bd00 ADD X19, X19, #8 |
(842) 0x43bd04 SUBS X7, X7, #1 |
(842) 0x43bd08 B.EQ 43bbd0 |
(842) 0x43bd0c LDR X8, [X2], #8 |
(842) 0x43bd10 LDR X6, [X24] |
(842) 0x43bd14 SUBS X9, X8, X26 |
(842) 0x43bd18 CCMP X8, X6, #0, #10 |
(842) 0x43bd1c B.LT 43bd44 |
(842) 0x43bd20 ORN X8, XZR, X8 |
(842) 0x43bd24 LDR X8, [X23, X8,LSL #3] |
(842) 0x43bd28 CMP X8, X13 |
(842) 0x43bd2c B.LT 43bd00 |
(842) 0x43bd30 LDR D5, [X19] |
(842) 0x43bd34 LDR D6, [X17, X8,LSL #3] |
(842) 0x43bd38 FMADD D5, D5, D4, D6 |
(842) 0x43bd3c STR D5, [X17, X8,LSL #3] |
(842) 0x43bd40 B 43bd00 |
(842) 0x43bd44 LDR X8, [X22, X9,LSL #3] |
(842) 0x43bd48 CMP X8, X4 |
(842) 0x43bd4c B.LT 43bd60 |
(842) 0x43bd50 LDR D5, [X19] |
(842) 0x43bd54 LDR D6, [X0, X8,LSL #3] |
(842) 0x43bd58 FMADD D5, D5, D4, D6 |
(842) 0x43bd5c STR D5, [X0, X8,LSL #3] |
(842) 0x43bd60 CMP X9, X27 |
(842) 0x43bd64 B.NE 43bd00 |
(842) 0x43bd68 LDR D5, [X19] |
(842) 0x43bd6c FMADD D3, D5, D4, D3 |
(842) 0x43bd70 B 43bd00 |
(841) 0x43bd74 LDR D4, [X12, X10,LSL #3] |
(841) 0x43bd78 FADD D3, D4, D3 |
(841) 0x43bd7c B 43bbd0 |
(840) 0x43bd80 FCMP D3, #0 |
(840) 0x43bd84 B.EQ 43bea0 |
(840) 0x43bd88 LDUR X26, [X29, #480] |
(840) 0x43bd8c LDR X0, [SP, #192] |
(840) 0x43bd90 SUBS X9, X5, X4 |
(840) 0x43bd94 B.LE 43be14 |
(840) 0x43bd98 CMP X9, #4 |
(840) 0x43bd9c B.CC 43bdf0 |
(840) 0x43bda0 DUP V4.2D, V3.D[0] |
(840) 0x43bda4 LDR X8, [SP, #56] |
(840) 0x43bda8 AND X10, X9, #0x0 |
(840) 0x43bdac AND X17, X9, #0x0 |
(840) 0x43bdb0 ADD X11, X4, X10 |
(840) 0x43bdb4 FDIV V4.2D, V2.2D, V4.2D |
(840) 0x43bdb8 ADD X12, X8, X4,LSL #3 |
(840) 0x43bdbc HINT #0 |
(858) 0x43bdc0 LDP Q5, Q6, [X12, #2032] |
(858) 0x43bdc4 SUBS X17, X17, #4 |
(858) 0x43bdc8 FNEG V6.2D, V6.2D |
(858) 0x43bdcc FNEG V5.2D, V5.2D |
(858) 0x43bdd0 FMUL V6.2D, V6.2D, V4.2D |
(858) 0x43bdd4 FMUL V5.2D, V5.2D, V4.2D |
(858) 0x43bdd8 STP Q5, Q6, [X12, #2032] |
(858) 0x43bddc ADD X12, X12, #32 |
(858) 0x43bde0 B.NE 43bdc0 |
(840) 0x43bde4 CMP X9, X10 |
(840) 0x43bde8 ORR X4, XZR, X11 |
(840) 0x43bdec B.EQ 43be14 |
(840) 0x43bdf0 FDIV D4, D0, D3 |
(840) 0x43bdf4 ADD X9, X0, X4,LSL #3 |
(840) 0x43bdf8 SUB X10, X5, X4 |
(840) 0x43bdfc HINT #0 |
(857) 0x43be00 LDR D5, [X9] |
(857) 0x43be04 SUBS X10, X10, #1 |
(857) 0x43be08 FNMUL D5, D5, D4 |
(857) 0x43be0c STR D5, [X9], #8 |
(857) 0x43be10 B.NE 43be00 |
(840) 0x43be14 SUBS X9, X3, X13 |
(840) 0x43be18 B.LE 43beb4 |
(840) 0x43be1c LDUR X17, [X29, #392] |
(840) 0x43be20 CMP X9, #4 |
(840) 0x43be24 B.CC 43be74 |
(840) 0x43be28 DUP V4.2D, V3.D[0] |
(840) 0x43be2c LDR X8, [SP, #48] |
(840) 0x43be30 AND X10, X9, #0x0 |
(840) 0x43be34 ADD X11, X13, X10 |
(840) 0x43be38 FDIV V4.2D, V2.2D, V4.2D |
(840) 0x43be3c ADD X12, X8, X13,LSL #3 |
(840) 0x43be40 AND X13, X9, #0x0 |
(856) 0x43be44 LDP Q5, Q6, [X12, #2032] |
(856) 0x43be48 SUBS X13, X13, #4 |
(856) 0x43be4c FNEG V6.2D, V6.2D |
(856) 0x43be50 FNEG V5.2D, V5.2D |
(856) 0x43be54 FMUL V6.2D, V6.2D, V4.2D |
(856) 0x43be58 FMUL V5.2D, V5.2D, V4.2D |
(856) 0x43be5c STP Q5, Q6, [X12, #2032] |
(856) 0x43be60 ADD X12, X12, #32 |
(856) 0x43be64 B.NE 43be44 |
(840) 0x43be68 CMP X9, X10 |
(840) 0x43be6c ORR X13, XZR, X11 |
(840) 0x43be70 B.EQ 43be98 |
(840) 0x43be74 FDIV D3, D0, D3 |
(840) 0x43be78 LDR X8, [SP, #64] |
(840) 0x43be7c SUB X10, X3, X13 |
(840) 0x43be80 ADD X9, X8, X13,LSL #3 |
(855) 0x43be84 LDR D4, [X9] |
(855) 0x43be88 SUBS X10, X10, #1 |
(855) 0x43be8c FNMUL D4, D4, D3 |
(855) 0x43be90 STR D4, [X9], #8 |
(855) 0x43be94 B.NE 43be84 |
(840) 0x43be98 LDUR X9, [X29, #312] |
(840) 0x43be9c B 43bebc |
(840) 0x43bea0 LDUR X9, [X29, #312] |
(840) 0x43bea4 LDUR X17, [X29, #392] |
(840) 0x43bea8 LDUR X26, [X29, #480] |
(840) 0x43beac LDR X0, [SP, #192] |
(840) 0x43beb0 B 43bebc |
(840) 0x43beb4 LDUR X9, [X29, #312] |
(840) 0x43beb8 LDUR X17, [X29, #392] |
(840) 0x43bebc LDR X11, [SP, #184] |
(840) 0x43bec0 LDP X12, X10, [SP, #160] |
(840) 0x43bec4 B 43b310 |
0x43bec8 ADD SP, SP, #448 |
0x43becc LDP X20, X19, [SP, #80] |
0x43bed0 LDP X22, X21, [SP, #64] |
0x43bed4 LDP X24, X23, [SP, #48] |
0x43bed8 LDP X26, X25, [SP, #32] |
0x43bedc LDP X28, X27, [SP, #16] |
0x43bee0 LDP X29, X30, [SP], #96 |
0x43bee4 RET |
0x43bee8 LDR X13, [SP, #176] |
0x43beec UBFM X17, X4, #61, #60 |
0x43bef0 ADD X15, X15, X21,LSL #3 |
0x43bef4 ADD X3, X16, X21,LSL #3 |
0x43bef8 ADD X17, X17, #8 |
0x43befc ADD X1, X11, X17 |
0x43bf00 ADD X2, X12, X17 |
0x43bf04 MUL X13, X21, X13 |
0x43bf08 UBFM X14, X13, #61, #60 |
0x43bf0c ADD X13, X14, #8 |
0x43bf10 ADD X0, X11, X13 |
0x43bf14 ADD X13, X12, X13 |
0x43bf18 CMP X0, X15 |
0x43bf1c CCMP X9, X1, #2, #3 |
0x43bf20 CSINC W18, WZR, WZR, #2 |
0x43bf24 CMP X0, X3 |
0x43bf28 CCMP X10, X1, #2, #3 |
0x43bf2c CSINC W17, WZR, WZR, #2 |
0x43bf30 CMP X13, X15 |
0x43bf34 CCMP X9, X2, #2, #3 |
0x43bf38 CSINC W16, WZR, WZR, #2 |
0x43bf3c CMP X13, X3 |
0x43bf40 CCMP X10, X2, #2, #3 |
0x43bf44 CSINC W15, WZR, WZR, #2 |
0x43bf48 CMP X13, X1 |
0x43bf4c ORR X13, XZR, X27 |
0x43bf50 CCMP X0, X2, #2, #3 |
0x43bf54 B.CC 43aecc |
0x43bf58 ORR X13, XZR, X27 |
0x43bf5c TBNZ W18, #0, 43aecc |
0x43bf60 ORR X13, XZR, X27 |
0x43bf64 TBNZ W17, #0, 43aecc |
0x43bf68 ORR X13, XZR, X27 |
0x43bf6c TBNZ W16, #0, 43aecc |
0x43bf70 ORR X13, XZR, X27 |
0x43bf74 TBNZ W15, #0, 43aecc |
0x43bf78 LD1R {V0.2D}, [X10] |
0x43bf7c LD1R {V1.2D}, [X9] |
0x43bf80 AND X15, X8, #0x0 |
0x43bf84 ADD X16, X14, #24 |
0x43bf88 AND X17, X8, #0x0 |
0x43bf8c ADD X13, X27, X15 |
0x43bf90 ADD X14, X11, X16 |
0x43bf94 ADD X16, X12, X16 |
0x43bf98 HINT #0 |
0x43bf9c HINT #0 |
(865) 0x43bfa0 LDP Q2, Q3, [X14, #2032] |
(865) 0x43bfa4 LDP Q4, Q5, [X16, #2032] |
(865) 0x43bfa8 SUBS X17, X17, #4 |
(865) 0x43bfac ADD V3.2D, V3.2D, V1.2D |
(865) 0x43bfb0 ADD V2.2D, V2.2D, V1.2D |
(865) 0x43bfb4 ADD V4.2D, V4.2D, V0.2D |
(865) 0x43bfb8 STP Q2, Q3, [X14, #2032] |
(865) 0x43bfbc ADD V2.2D, V5.2D, V0.2D |
(865) 0x43bfc0 ADD X14, X14, #32 |
(865) 0x43bfc4 STP Q4, Q2, [X16, #2032] |
(865) 0x43bfc8 ADD X16, X16, #32 |
(865) 0x43bfcc B.NE 43bfa0 |
0x43bfd0 CMP X8, X15 |
0x43bfd4 B.NE 43aecc |
0x43bfd8 B 43af08 |
0x43bfdc HINT #0 |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►99.06+ | __kmp_invoke_microtask | libomp.so | |
| ○ | __kmp_invoke_task_func | libomp.so | |
| ○ | __kmp_launch_thread | libomp.so | |
| ○ | __kmp_launch_worker(void*) | libomp.so | |
| ○ | start_thread | libc.so.6 | |
| ○ | thread_start | libc.so.6 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_4
| Source file and lines | par_lr_interp.c:1196-1757 |
| Module | exec |
| nb instructions | 574 |
| nb uops | 507 |
| loop length | 2296 |
| used w registers | 11 |
| used x registers | 32 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 2 |
| used d registers | 2 |
| used q registers | 0 |
| used v registers | 3 |
| used z registers | 0 |
| nb stack references | 83 |
| micro-operation queue | 63.38 cycles |
| front end | 63.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 30.50 | 30.50 | 42.25 | 42.25 | 42.25 | 42.25 | 2.00 | 2.00 | 2.00 | 2.00 | 98.67 | 98.67 | 98.67 | 43.00 | 43.00 |
| cycles | 30.50 | 30.50 | 42.25 | 42.25 | 42.25 | 42.25 | 2.00 | 2.00 | 2.00 | 2.00 | 98.67 | 98.67 | 98.67 | 43.00 | 43.00 |
| Cycles executing div or sqrt instructions | 5.00-20.00 |
| Front-end | 63.38 |
| Dispatch | 98.67 |
| DIV/SQRT | 5.00-20.00 |
| Overall L1 | 98.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 25% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 33% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 1% |
| all | 26% |
| load | 28% |
| store | 28% |
| mul | 25% |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 21% |
| all | 31% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 33% |
| all | 26% |
| load | 28% |
| store | 28% |
| mul | 25% |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 22% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STP X29, X30, [SP, #928]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X28, X27, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X26, X25, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X24, X23, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X22, X21, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X20, X19, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| SUB SP, SP, #448 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STUR X7, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X6, [X29, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X20, [X2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X5, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X3, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X0, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X8, [SP, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #360] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X26, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X19, X21, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STR X8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X27, X8, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X8, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X28, X24, [X29, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| STUR X8, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X10, X9, [X29, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X9, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X11, X9, [X29, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STP X9, X10, [X29, #808] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X8, X9, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X9, X11, [X29, #888] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X4, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CBZ X0, 43a918 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1d8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X11, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X22, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X8, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43a8c0 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x180> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X4, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X4] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STP X21, X19, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X26, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CBZ X0, 43a92c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X11, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X23, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X8, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43a92c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| B 43a92c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [X4] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STP X21, X19, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X26, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CBNZ X0, 43a8d8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x198> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 4ae1b0 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ae190 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| SUB X9, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X26, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| SDIV X10, X8, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 5-20 | N/A |
| MUL X27, X10, X19 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| STR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X10, X10, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X19, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CSEL X14, X8, X10, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CMP X14, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| STUR X14, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X19, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X0, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| B.GT 43aa90 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x350> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X8, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X0, <4fc97c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1408 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR X21, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR W25, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (12.5%) |
| ORR W1, WZR, W25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X10, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X0, <4fc9a0> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1432 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X19, [X8, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X20, [X9, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X21, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X26, [X10, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X26, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X19, [X8, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X20, [X8, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ORR W20, WZR, W25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X19, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBNZ X21, 43ae6c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x72c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUBS X8, X12, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.LE 43ae6c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x72c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X10, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X13, X11, X12,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X14, X9, X12,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CMP X9, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ADD X15, X10, X12,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CCMP X11, X14, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W12, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X10, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X11, X15, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W13, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X10, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X9, X15, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| B.CC 43ae28 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x6e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| TBNZ W12, #0, 43ae28 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x6e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CBNZ W13, 43ae28 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x6e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [X9], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X13, [X11], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X14, [X10], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| B 43ae6c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x72c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X18, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR X19, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X25, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X11, X9, [X29, #880] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X13, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X9, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X15, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X9, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X16, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STUR X16, [X29, #448] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| B 43ab20 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x3e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| ADD X11, X11, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X10, X10, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X9, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| ADRP X0, <4fce6c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1456 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X4, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X25, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| CMP X21, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43af50 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x810> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUBS X8, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.LE 43af50 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x810> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X11, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X12, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X16, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X15, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| UBFM X9, X21, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| SUB X10, X9, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X15, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X10, X16, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| B.CS 43bee8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x17a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUB X14, X4, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X13, X13, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X13, X13, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X12, X12, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X11, X11, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDUR X9, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MUL X11, X21, X11 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X10, X10, X11,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X9, X21,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| B 43af38 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x7f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADRP X0, <4fcf50> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1480 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CBZ X21, 43af74 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x834> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 43b140 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa00> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.NE 43afd8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x898> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR W21, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X20, XZR, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ae240 <time_getWallclockSeconds> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X0, <4c0f94> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #3592 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR D1, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | scal (25.0%) |
| FSUB D0, D0, S1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (25.0%) |
| STR D0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| BL 4ac6c0 <hypre_printf> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| BL 4102e0 <@plt_start@+0x2c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR W20, WZR, W21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X8, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.NE 43afd8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x898> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 4ae240 <time_getWallclockSeconds> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR D0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 43b04c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x90c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| ORR X0, XZR, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W21, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X20, XZR, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X0, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ORR W20, WZR, W21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 43b080 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x940> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LE 43b140 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa00> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X14, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b0cc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x98c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X9, X8, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDR X3, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X2, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X4, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| BL 47e7c0 <hypre_alt_insert_new_nodes> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b174 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa34> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X14, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ORR X9, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X10, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b174 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa34> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| LDR X8, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b19c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa5c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADRP X0, <4fc19c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1504 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X17, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X9, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X17, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GT 43b200 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xac0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 43b1d0 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa90> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| BL 4ac5b0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 43bec8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1788> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD SP, SP, #448 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDP X20, X19, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X22, X21, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X24, X23, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X26, X25, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X28, X27, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| B 4ac5b0 <hypre_Free> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| FMOV D0, #1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (25.0%) |
| FMOV D1, #-1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (25.0%) |
| FMOV V2.2D, #1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | vect (50.0%) |
| MOVN X30, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X26, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X18, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X14, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X15, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X16, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X8, X26, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STUR X8, [X29, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X8, X18, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X8, X0, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STP X8, X10, [SP, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X8, X10, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X8, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X26, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X18, X8, [X29, #952] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X11, X0, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X12, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X12, X10, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| B 43b320 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xbe0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| ADD SP, SP, #448 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDP X20, X19, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X22, X21, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X24, X23, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X26, X25, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X28, X27, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X13, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| UBFM X17, X4, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X15, X15, X21,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X3, X16, X21,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X17, X17, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X1, X11, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X2, X12, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MUL X13, X21, X13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
| UBFM X14, X13, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X14, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, X11, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X12, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X0, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X9, X1, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W18, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X10, X1, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W17, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP X13, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X9, X2, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W16, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP X13, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X10, X2, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W15, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X13, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CCMP X0, X2, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| B.CC 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W18, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W17, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W16, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W15, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LD1R {V0.2D}, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.33 | 0.33 | 0.33 | 0 | 0 | 8 | 0.33 | scal (25.0%) |
| LD1R {V1.2D}, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.33 | 0.33 | 0.33 | 0 | 0 | 8 | 0.33 | scal (25.0%) |
| AND X15, X8, #0x0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X16, X14, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| AND X17, X8, #0x0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X27, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X14, X11, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X16, X12, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| CMP X8, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.NE 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 43af08 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x7c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_4
| Source file and lines | par_lr_interp.c:1196-1757 |
| Module | exec |
| nb instructions | 574 |
| nb uops | 507 |
| loop length | 2296 |
| used w registers | 11 |
| used x registers | 32 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 2 |
| used d registers | 2 |
| used q registers | 0 |
| used v registers | 3 |
| used z registers | 0 |
| nb stack references | 83 |
| micro-operation queue | 63.38 cycles |
| front end | 63.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 30.50 | 30.50 | 42.25 | 42.25 | 42.25 | 42.25 | 2.00 | 2.00 | 2.00 | 2.00 | 98.67 | 98.67 | 98.67 | 43.00 | 43.00 |
| cycles | 30.50 | 30.50 | 42.25 | 42.25 | 42.25 | 42.25 | 2.00 | 2.00 | 2.00 | 2.00 | 98.67 | 98.67 | 98.67 | 43.00 | 43.00 |
| Cycles executing div or sqrt instructions | 5.00-20.00 |
| Front-end | 63.38 |
| Dispatch | 98.67 |
| DIV/SQRT | 5.00-20.00 |
| Overall L1 | 98.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 25% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 33% |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 1% |
| all | 26% |
| load | 28% |
| store | 28% |
| mul | 25% |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 21% |
| all | 31% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 33% |
| all | 26% |
| load | 28% |
| store | 28% |
| mul | 25% |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 22% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STP X29, X30, [SP, #928]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X28, X27, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X26, X25, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X24, X23, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X22, X21, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X20, X19, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| SUB SP, SP, #448 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STUR X7, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X6, [X29, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X20, [X2] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X5, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X3, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X0, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X8, [SP, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #360] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X26, [X29, #336] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X19, X21, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STR X8, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X27, X8, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X8, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #264] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #248] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X28, X24, [X29, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| STUR X8, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X8, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X8, X9, [X29, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X9, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X10, X9, [X29, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STUR X9, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDP X11, X9, [X29, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STP X9, X10, [X29, #808] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X8, X9, [X29, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X29, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X9, X11, [X29, #888] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X4, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CBZ X0, 43a918 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1d8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X11, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X22, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X8, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43a8c0 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x180> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X4, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X4] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STP X21, X19, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X26, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CBZ X0, 43a92c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X11, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X23, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X8, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43a92c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| B 43a92c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [X4] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STP X21, X19, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X26, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X27, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CBNZ X0, 43a8d8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x198> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 4ae1b0 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ae190 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| SUB X9, X0, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X26, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| SDIV X10, X8, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 5-20 | N/A |
| MUL X27, X10, X19 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| STR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X10, X10, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X19, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CSEL X14, X8, X10, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CMP X14, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| STUR X14, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X19, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X0, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| B.GT 43aa90 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x350> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X8, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X0, <4fc97c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1408 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR X21, XZR, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR W25, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (12.5%) |
| ORR W1, WZR, W25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X10, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X0, <4fc9a0> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1432 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X19, [X8, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X20, [X9, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X21, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X26, [X10, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X26, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X19, [X8, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X20, [X8, X21,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ORR W20, WZR, W25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X19, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBNZ X21, 43ae6c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x72c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUBS X8, X12, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.LE 43ae6c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x72c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X10, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X13, X11, X12,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X14, X9, X12,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CMP X9, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ADD X15, X10, X12,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CCMP X11, X14, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W12, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X10, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X11, X15, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W13, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X10, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X9, X15, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| B.CC 43ae28 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x6e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| TBNZ W12, #0, 43ae28 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x6e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CBNZ W13, 43ae28 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x6e8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X12, [X9], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X13, [X11], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X14, [X10], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| B 43ae6c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x72c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X18, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR X19, XZR, X20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X25, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X11, X9, [X29, #880] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X13, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X9, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X15, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X9, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X9, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X16, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STUR X16, [X29, #448] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| B 43ab20 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x3e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| ADD X11, X11, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X10, X10, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X9, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| ADRP X0, <4fce6c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1456 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X4, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X25, [SP, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| CMP X21, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43af50 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x810> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUBS X8, X4, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.LE 43af50 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x810> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X11, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X12, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X16, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X15, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X11] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| UBFM X9, X21, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| SUB X10, X9, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X15, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X10, X16, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| B.CS 43bee8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x17a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SUB X14, X4, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X13, X13, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X13, X13, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X12, X12, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X11, X11, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDUR X9, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X9, [X29, #440] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MUL X11, X21, X11 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADD X10, X10, X11,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X9, X21,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| B 43af38 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x7f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ADRP X0, <4fcf50> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1480 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CBZ X21, 43af74 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x834> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 43b140 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa00> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.NE 43afd8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x898> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR W21, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X20, XZR, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ae240 <time_getWallclockSeconds> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ADRP X0, <4c0f94> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #3592 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR D1, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | scal (25.0%) |
| FSUB D0, D0, S1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (25.0%) |
| STR D0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| BL 4ac6c0 <hypre_printf> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| BL 4102e0 <@plt_start@+0x2c0> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR W20, WZR, W21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X8, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.NE 43afd8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x898> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| BL 4ae240 <time_getWallclockSeconds> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR D0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X8, X9,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 43b04c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x90c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| ORR X0, XZR, X8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W21, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X20, XZR, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X0, [X20] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ORR W20, WZR, W21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X0, 43b080 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x940> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #344] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ W1, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X0, [X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| BL 4ac4b0 <hypre_CAlloc> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #496] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X9, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LE 43b140 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa00> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X14, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b0cc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x98c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X9, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X9, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X9, X8, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDR X3, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X1, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X2, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X4, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| BL 47e7c0 <hypre_alt_insert_new_nodes> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X13, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X13] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b174 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa34> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X14, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ORR X9, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X10, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b174 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa34> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| LDR X8, [X12] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X8, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 43b19c <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa5c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MOVN X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X8, XZR, XZR | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADRP X0, <4fc19c> | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X0, X0, #1504 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR W1, WZR, W20 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| BL 410070 <@plt_start@+0x50> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X17, [X29, #392] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X9, [X29, #312] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CMP X17, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GT 43b200 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xac0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X8, [X29, #320] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 43b1d0 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xa90> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| BL 4ac5b0 <hypre_Free> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBZ X8, 43bec8 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x1788> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X23 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD SP, SP, #448 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDP X20, X19, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X22, X21, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X24, X23, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X26, X25, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X28, X27, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| B 4ac5b0 <hypre_Free> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X8, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| FMOV D0, #1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (25.0%) |
| FMOV D1, #-1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | scal (25.0%) |
| FMOV V2.2D, #1.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 2 | 0.25 | vect (50.0%) |
| MOVN X30, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X26, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X18, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #432] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X0, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #416] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X11, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X14, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X15, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #384] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X16, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDUR X8, [X29, #296] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #488] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #352] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #472] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #304] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #464] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDUR X8, [X29, #328] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #456] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X8, [X29, #424] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X8, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X8, X26, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STUR X8, [X29, #376] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X8, X18, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STUR X8, [X29, #368] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X8, X0, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STP X8, X10, [SP, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ADD X8, X10, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X8, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STUR X26, [X29, #480] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X8, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X18, X8, [X29, #952] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDUR X8, [X29, #408] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X10, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDUR X8, [X29, #400] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X11, X0, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X12, [X8] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STP X12, X10, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| B 43b320 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0xbe0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| ADD SP, SP, #448 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDP X20, X19, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X22, X21, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X24, X23, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X26, X25, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X28, X27, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #96 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X13, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| UBFM X17, X4, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X15, X15, X21,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X3, X16, X21,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X17, X17, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X1, X11, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X2, X12, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| MUL X13, X21, X13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
| UBFM X14, X13, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X14, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X0, X11, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X12, X13 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X0, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X9, X1, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W18, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X10, X1, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W17, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP X13, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X9, X2, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W16, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
| CMP X13, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| CCMP X10, X2, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CSINC W15, WZR, WZR, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CMP X13, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| CCMP X0, X2, #2, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| B.CC 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W18, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W17, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W16, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X13, XZR, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| TBNZ W15, #0, 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LD1R {V0.2D}, [X10] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.33 | 0.33 | 0.33 | 0 | 0 | 8 | 0.33 | scal (25.0%) |
| LD1R {V1.2D}, [X9] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0.33 | 0.33 | 0.33 | 0 | 0 | 8 | 0.33 | scal (25.0%) |
| AND X15, X8, #0x0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X16, X14, #24 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| AND X17, X8, #0x0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X27, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X14, X11, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X16, X12, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| HINT #0 | N/A | ||||||||||||||||||
| HINT #0 | N/A | ||||||||||||||||||
| CMP X8, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.NE 43aecc <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x78c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| B 43af08 <hypre_BoomerAMGBuildExtPIInterp.omp_outlined+0x7c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| HINT #0 | N/A |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ▼hypre_BoomerAMGBuildExtPIInterp.omp_outlined– | 0.22 | 0.10 |
| ○Loop 860 - par_lr_interp.c:1455-1456 - exec | 0.01 | 0.00 |
| ○Loop 878 - par_lr_interp.c:1224-1225 - exec | 0.00 | 0.00 |
| ○Loop 859 - par_lr_interp.c:1458-1459 - exec | 0.00 | 0.00 |
| ○Loop 863 - par_lr_interp.c:1393-1396 - exec | 0.00 | 0.00 |
| ▼Loop 871 - par_lr_interp.c:1244-1350 - exec– | 0.00 | 0.00 |
| ▼Loop 872 - par_lr_interp.c:1244-1350 - exec– | 0.00 | 0.00 |
| ▼Loop 870 - par_lr_interp.c:1244-1341 - exec– | 0.00 | 0.00 |
| ▼Loop 869 - par_lr_interp.c:1244-1341 - exec– | 0.00 | 0.00 |
| ▼Loop 873 - par_lr_interp.c:1264-1303 - exec– | 0.00 | 0.00 |
| ○Loop 876 - par_lr_interp.c:1277-1285 - exec | 0.03 | 0.01 |
| ○Loop 875 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.00 |
| ○Loop 874 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.00 |
| ○Loop 868 - par_lr_interp.c:1244-1262 - exec | 0.00 | 0.00 |
| ○Loop 864 - par_lr_interp.c:1400-1403 - exec | 0.00 | 0.00 |
| ○Loop 865 - par_lr_interp.c:1393-1396 - exec | 0.00 | 0.00 |
| ○Loop 877 - par_lr_interp.c:1230-1231 - exec | 0.00 | 0.00 |
| ○Loop 862 - par_lr_interp.c:1444-1445 - exec | 0.00 | 0.00 |
| ○Loop 866 - par_lr_interp.c:1378-1382 - exec | 0.00 | 0.00 |
| ○Loop 861 - par_lr_interp.c:1451-1452 - exec | 0.00 | 0.00 |
| ▼Loop 842 - par_lr_interp.c:1469-1748 - exec– | 0.00 | 0.00 |
| ▼Loop 841 - par_lr_interp.c:1469-1748 - exec– | 0.00 | 0.00 |
| ▼Loop 840 - par_lr_interp.c:1469-1748 - exec– | 0.00 | 0.00 |
| ▼Loop 844 - par_lr_interp.c:1609-1675 - exec– | 0.05 | 0.02 |
| ○Loop 848 - par_lr_interp.c:1624-1628 - exec | 0.05 | 0.02 |
| ○Loop 846 - par_lr_interp.c:1644-1651 - exec | 0.04 | 0.01 |
| ○Loop 847 - par_lr_interp.c:1632-1637 - exec | 0.00 | 0.00 |
| ○Loop 845 - par_lr_interp.c:1655-1660 - exec | 0.00 | 0.00 |
| ▼Loop 851 - par_lr_interp.c:1494-1545 - exec– | 0.00 | 0.01 |
| ○Loop 854 - par_lr_interp.c:1516-1526 - exec | 0.03 | 0.01 |
| ○Loop 853 - par_lr_interp.c:1532-1545 - exec | 0.00 | 0.00 |
| ○Loop 852 - par_lr_interp.c:1532-1545 - exec | 0.00 | 0.00 |
| ○Loop 839 - par_lr_interp.c:1469-1748 - exec | 0.00 | 0.00 |
| ○Loop 858 - par_lr_interp.c:1742-1743 - exec | 0.00 | 0.01 |
| ▼Loop 849 - par_lr_interp.c:1555-1596 - exec– | 0.00 | 0.00 |
| ○Loop 850 - par_lr_interp.c:1573-1596 - exec | 0.00 | 0.00 |
| ○Loop 855 - par_lr_interp.c:1744-1745 - exec | 0.00 | 0.00 |
| ○Loop 857 - par_lr_interp.c:1742-1743 - exec | 0.00 | 0.00 |
| ○Loop 856 - par_lr_interp.c:1744-1745 - exec | 0.00 | 0.00 |
| ○Loop 843 - par_lr_interp.c:1688-1700 - exec | 0.00 | 0.00 |
| ○Loop 867 - par_lr_interp.c:1378-1382 - exec | 0.00 | 0.00 |
