OV - exec - Function hypre_BoomerAMGCreateS._omp

	Function: hypre_BoomerAMGCreateS._omp_fn.1	Module: exec	Source: par_strength.c:246-513 [...]	Coverage (incl. loops): 0.21% \| (excl. loops): 0.00%

/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 246 - 513

--------------------------------------------------------------------------------

246: #pragma omp parallel private(i,diag,row_scale,row_sum,jA,jS)

247: #endif

248:    {

249:    HYPRE_Int start, stop;

250:    hypre_GetSimpleThreadPartition(&start, &stop, num_variables);

251:    HYPRE_Int jS_diag = 0, jS_offd = 0;

252:

253:    for (i = start; i < stop; i++)

254:    {

255:       S_diag_i[i] = jS_diag;

256:       if (num_cols_offd)

257:       {

258:          S_offd_i[i] = jS_offd;

259:       }

260:

261:       diag = A_diag_data[A_diag_i[i]];

262:

263:       /* compute scaling factor and row sum */

264:       row_scale = 0.0;

265:       row_sum = diag;

266:       if (num_functions > 1)

267:       {

268:          if (diag < 0)

269:          {

270:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

271:             {

272:                if (dof_func[i] == dof_func[A_diag_j[jA]])

273:                {

274:                   row_scale = hypre_max(row_scale, A_diag_data[jA]);

275:                   row_sum += A_diag_data[jA];

276:                }

277:             }

278:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

279:             {

280:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

281:                {

282:                   row_scale = hypre_max(row_scale, A_offd_data[jA]);

283:                   row_sum += A_offd_data[jA];

[...]

289:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

290:             {

291:                if (dof_func[i] == dof_func[A_diag_j[jA]])

292:                {

293:                   row_scale = hypre_min(row_scale, A_diag_data[jA]);

294:                   row_sum += A_diag_data[jA];

295:                }

296:             }

297:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

298:             {

299:                if (dof_func[i] == dof_func_offd[A_offd_j[jA]])

300:                {

301:                   row_scale = hypre_min(row_scale, A_offd_data[jA]);

302:                   row_sum += A_offd_data[jA];

[...]

309:          if (diag < 0)

310:          {

311:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

312:             {

313:                row_scale = hypre_max(row_scale, A_diag_data[jA]);

314:                row_sum += A_diag_data[jA];

315:             }

316:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

317:             {

318:                row_scale = hypre_max(row_scale, A_offd_data[jA]);

319:                row_sum += A_offd_data[jA];

320:             }

321:          }

322:          else

323:          {

324:             for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

325:             {

326:                row_scale = hypre_min(row_scale, A_diag_data[jA]);

327:                row_sum += A_diag_data[jA];

328:             }

329:             for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

330:             {

331:                row_scale = hypre_min(row_scale, A_offd_data[jA]);

332:                row_sum += A_offd_data[jA];

333:             }

334:          } /* diag >= 0*/

335:       } /* num_functions <= 1 */

336:

337:       jS_diag += A_diag_i[i + 1] - A_diag_i[i] - 1;

338:       jS_offd += A_offd_i[i + 1] - A_offd_i[i];

339:

340:       /* compute row entries of S */

341:       S_temp_diag_j[A_diag_i[i]] = -1;

342:       if ((fabs(row_sum) > fabs(diag)*max_row_sum) && (max_row_sum < 1.0))

343:       {

344:          /* make all dependencies weak */

345:          for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

346:          {

347:             S_temp_diag_j[jA] = -1;

348:          }

349:          jS_diag -= A_diag_i[i + 1] - (A_diag_i[i] + 1);

350:

351:          for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

352:          {

353:             S_temp_offd_j[jA] = -1;

354:          }

355:          jS_offd -= A_offd_i[i + 1] - A_offd_i[i];

[...]

363:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

364:                {

365:                   if (A_diag_data[jA] <= strength_threshold * row_scale

366:                       || dof_func[i] != dof_func[A_diag_j[jA]])

367:                   {

368:                      S_temp_diag_j[jA] = -1;

369:                      --jS_diag;

[...]

376:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

377:                {

378:                   if (A_offd_data[jA] <= strength_threshold * row_scale

379:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

380:                   {

381:                      S_temp_offd_j[jA] = -1;

382:                      --jS_offd;

[...]

392:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

393:                {

394:                   if (A_diag_data[jA] >= strength_threshold * row_scale

395:                       || dof_func[i] != dof_func[A_diag_j[jA]])

396:                   {

397:                      S_temp_diag_j[jA] = -1;

398:                      --jS_diag;

[...]

405:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

406:                {

407:                   if (A_offd_data[jA] >= strength_threshold * row_scale

408:                       || dof_func[i] != dof_func_offd[A_offd_j[jA]])

409:                   {

410:                      S_temp_offd_j[jA] = -1;

411:                      --jS_offd;

[...]

424:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

425:                {

426:                   if (A_diag_data[jA] <= strength_threshold * row_scale)

427:                   {

428:                      S_temp_diag_j[jA] = -1;

429:                      --jS_diag;

430:                   }

431:                   else

432:                   {

433:                      S_temp_diag_j[jA] = A_diag_j[jA];

434:                   }

435:                }

436:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

437:                {

438:                   if (A_offd_data[jA] <= strength_threshold * row_scale)

439:                   {

440:                      S_temp_offd_j[jA] = -1;

441:                      --jS_offd;

442:                   }

443:                   else

444:                   {

445:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

451:                for (jA = A_diag_i[i]+1; jA < A_diag_i[i+1]; jA++)

452:                {

453:                   if (A_diag_data[jA] >= strength_threshold * row_scale)

454:                   {

455:                      S_temp_diag_j[jA] = -1;

456:                      --jS_diag;

457:                   }

458:                   else

459:                   {

460:                      S_temp_diag_j[jA] = A_diag_j[jA];

461:                   }

462:                }

463:                for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

464:                {

465:                   if (A_offd_data[jA] >= strength_threshold * row_scale)

466:                   {

467:                      S_temp_offd_j[jA] = -1;

468:                      --jS_offd;

469:                   }

470:                   else

471:                   {

472:                      S_temp_offd_j[jA] = A_offd_j[jA];

[...]

480:    hypre_prefix_sum_pair(&jS_diag, S_diag_i + num_variables, &jS_offd, S_offd_i + num_variables, prefix_sum_workspace);

[...]

492:    for (i = start; i < stop; i++)

493:    {

494:       S_diag_i[i] += jS_diag;

495:       S_offd_i[i] += jS_offd;

496:

497:       jS = S_diag_i[i];

498:       for (jA = A_diag_i[i]; jA < A_diag_i[i+1]; jA++)

499:       {

500:          if (S_temp_diag_j[jA] > -1)

501:          {

502:             S_diag_j[jS]    = S_temp_diag_j[jA];

503:             jS++;

504:          }

505:       }

506:

507:       jS = S_offd_i[i];

508:       for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++)

509:       {

510:          if (S_temp_offd_j[jA] > -1)

511:          {

512:             S_offd_j[jS]    = S_temp_offd_j[jA];

513:             jS++;

0x4b17e4 STP	X29, X30, [SP, #800]!

0x4b17e8 ORR	X3, XZR, X0

0x4b17ec ADD	X29, SP, #0

0x4b17f0 ADD	X0, SP, #192

0x4b17f4 ADD	X1, SP, #200

0x4b17f8 STP	X19, X20, [SP, #16]

0x4b17fc STP	X21, X22, [SP, #32]

0x4b1800 STP	X23, X24, [SP, #48]

0x4b1804 STP	X25, X26, [SP, #64]

0x4b1808 STP	X27, X28, [SP, #80]

0x4b180c STP	D14, D15, [SP, #96]

0x4b1810 LDR	X6, [X3, #80]

0x4b1814 LDP	X15, X22, [X3, #32]

0x4b1818 LDP	X9, X28, [X3, #96]

0x4b181c ORR	X2, XZR, X6

0x4b1820 LDP	X4, X21, [X3, #16]

0x4b1824 LDP	X12, X23, [X3, #48]

0x4b1828 LDP	X25, X24, [X3, #64]

0x4b182c LDR	X10, [X3, #112]

0x4b1830 LDP	D14, D15, [X3]

0x4b1834 STP	X15, X6, [SP, #144]

0x4b1838 STP	X10, X9, [SP, #112]

0x4b183c LDR	X5, [X3, #88]

0x4b1840 STR	X12, [SP, #128]

0x4b1844 STR	X4, [SP, #168]

0x4b1848 STR	X5, [SP, #160]

0x4b184c LDP	X27, X26, [X3, #120]

0x4b1850 LDP	X7, X19, [X3, #136]

0x4b1854 LDR	X20, [X3, #152]

0x4b1858 STR	X7, [SP, #136]

0x4b185c BL	52c0c0

0x4b1860 LDP	X4, X0, [SP, #192]

0x4b1864 STP	XZR, XZR, [SP, #208]

0x4b1868 CMP	X4, X0

0x4b186c LDR	X7, [SP, #128]

0x4b1870 LDP	X10, X9, [SP, #112]

0x4b1874 LDP	X15, X5, [SP, #144]

0x4b1878 B.GE	4b1df8

0x4b187c UBFM	X8, X4, #61, #60

0x4b1880 FMOV	D3, #1.0000000

0x4b1884 ADD	X30, X7, X4,LSL #3

0x4b1888 ADD	X11, X8, #8

0x4b188c ORR	X17, XZR, X0

0x4b1890 PTRUE	P7.B, ALL

0x4b1894 ADD	X3, X7, X11

0x4b1898 ADD	X0, X15, X11

0x4b189c STR	X10, [SP, #120]

0x4b18a0 MOVZ	X2, #0

0x4b18a4 MOVZ	X1, #0

0x4b18a8 STP	X27, X28, [SP, #144]

0x4b18ac CNTW	X8, ALL

0x4b18b0 MOVN	X14, #0

0x4b18b4 FCMPE	D15, D3

0x4b18b8 CNTD	X11, ALL

0x4b18bc CSINC	W13, WZR, WZR, #5

0x4b18c0 LDP	X10, X28, [SP, #160]

0x4b18c4 STR	W13, [SP, #112]

0x4b18c8 STR	X5, [SP, #160]

0x4b18cc STP	X7, X15, [SP, #176]

(1975) 0x4b18d0 STR	X1, [X9, X4,LSL #3]

(1975) 0x4b18d4 CBZ	X10, 4b18e0

(1975) 0x4b18d8 LDR	X16, [SP, #120]

(1975) 0x4b18dc STR	X2, [X16, X4,LSL #3]

(1975) 0x4b18e0 LDP	X6, X12, [X0, #1016]

(1975) 0x4b18e4 UBFM	X15, X6, #61, #60

(1975) 0x4b18e8 ADD	X7, X6, #1

(1975) 0x4b18ec ORR	X5, XZR, X7

(1975) 0x4b18f0 LDR	D4, [X22, X15]

(1975) 0x4b18f4 CMP	X28, #1

(1975) 0x4b18f8 B.LE	4b1f38

(1975) 0x4b18fc FCMPE	D4, #0

(1975) 0x4b1900 B.MI	4b21c0

(1975) 0x4b1904 CMP	X7, X12

(1975) 0x4b1908 B.GE	4b2a9c

(1975) 0x4b190c SUB	X16, X12, X7

(1975) 0x4b1910 LDR	X18, [X21, X4,LSL #3]

(1975) 0x4b1914 FMOV	D0, D4

(1975) 0x4b1918 ANDS	X27, X16, #0x7

(1975) 0x4b191c MOVI	D18, #0

(1975) 0x4b1920 B.EQ	4b19f4

(1975) 0x4b1924 CMP	X27, #1

(1975) 0x4b1928 B.EQ	4b19cc

(1975) 0x4b192c CMP	X27, #2

(1975) 0x4b1930 B.EQ	4b19b8

(1975) 0x4b1934 CMP	X27, #3

(1975) 0x4b1938 B.EQ	4b19a4

(1975) 0x4b193c CMP	X27, #4

(1975) 0x4b1940 B.EQ	4b1990

(1975) 0x4b1944 CMP	X27, #5

(1975) 0x4b1948 B.EQ	4b197c

(1975) 0x4b194c CMP	X27, #6

(1975) 0x4b1950 B.EQ	4b1968

(1975) 0x4b1954 LDR	X13, [X25, X7,LSL #3]

(1975) 0x4b1958 LDR	X5, [X21, X13,LSL #3]

(1975) 0x4b195c CMP	X18, X5

(1975) 0x4b1960 B.EQ	4b2afc

(1975) 0x4b1964 ADD	X5, X7, #1

(1975) 0x4b1968 LDR	X7, [X25, X5,LSL #3]

(1975) 0x4b196c LDR	X16, [X21, X7,LSL #3]

(1975) 0x4b1970 CMP	X18, X16

(1975) 0x4b1974 B.EQ	4b2a8c

(1975) 0x4b1978 ADD	X5, X5, #1

(1975) 0x4b197c LDR	X27, [X25, X5,LSL #3]

(1975) 0x4b1980 LDR	X13, [X21, X27,LSL #3]

(1975) 0x4b1984 CMP	X18, X13

(1975) 0x4b1988 B.EQ	4b2a2c

(1975) 0x4b198c ADD	X5, X5, #1

(1975) 0x4b1990 LDR	X7, [X25, X5,LSL #3]

(1975) 0x4b1994 LDR	X16, [X21, X7,LSL #3]

(1975) 0x4b1998 CMP	X18, X16

(1975) 0x4b199c B.EQ	4b29ec

(1975) 0x4b19a0 ADD	X5, X5, #1

(1975) 0x4b19a4 LDR	X27, [X25, X5,LSL #3]

(1975) 0x4b19a8 LDR	X13, [X21, X27,LSL #3]

(1975) 0x4b19ac CMP	X18, X13

(1975) 0x4b19b0 B.EQ	4b1efc

(1975) 0x4b19b4 ADD	X5, X5, #1

(1975) 0x4b19b8 LDR	X7, [X25, X5,LSL #3]

(1975) 0x4b19bc LDR	X16, [X21, X7,LSL #3]

(1975) 0x4b19c0 CMP	X18, X16

(1975) 0x4b19c4 B.EQ	4b1eec

(1975) 0x4b19c8 ADD	X5, X5, #1

(1975) 0x4b19cc LDR	X27, [X25, X5,LSL #3]

(1975) 0x4b19d0 LDR	X13, [X21, X27,LSL #3]

(1975) 0x4b19d4 CMP	X18, X13

(1975) 0x4b19d8 B.NE	4b19e8

(1975) 0x4b19dc LDR	D29, [X22, X5,LSL #3]

(1975) 0x4b19e0 FMINNM	D18, D18, D29

(1975) 0x4b19e4 FADD	D0, D0, D29

(1975) 0x4b19e8 ADD	X5, X5, #1

(1975) 0x4b19ec CMP	X5, X12

(1975) 0x4b19f0 B.EQ	4b1afc

  (1998) 0x4b19f4 LDR	X7, [X25, X5,LSL #3]

  (1998) 0x4b19f8 LDR	X16, [X21, X7,LSL #3]

  (1998) 0x4b19fc CMP	X18, X16

  (1998) 0x4b1a00 B.NE	4b1a10

  (1998) 0x4b1a04 LDR	D31, [X22, X5,LSL #3]

  (1998) 0x4b1a08 FMINNM	D18, D18, D31

  (1998) 0x4b1a0c FADD	D0, D0, D31

  (1998) 0x4b1a10 ADD	X5, X5, #1

  (1998) 0x4b1a14 LDR	X27, [X25, X5,LSL #3]

  (1998) 0x4b1a18 LDR	X13, [X21, X27,LSL #3]

  (1998) 0x4b1a1c CMP	X18, X13

  (1998) 0x4b1a20 B.NE	4b1a30

  (1998) 0x4b1a24 LDR	D24, [X22, X5,LSL #3]

  (1998) 0x4b1a28 FMINNM	D18, D18, D24

  (1998) 0x4b1a2c FADD	D0, D0, D24

  (1998) 0x4b1a30 ADD	X7, X5, #1

  (1998) 0x4b1a34 LDR	X16, [X25, X7,LSL #3]

  (1998) 0x4b1a38 LDR	X27, [X21, X16,LSL #3]

  (1998) 0x4b1a3c CMP	X18, X27

  (1998) 0x4b1a40 B.NE	4b1a50

  (1998) 0x4b1a44 LDR	D25, [X22, X7,LSL #3]

  (1998) 0x4b1a48 FMINNM	D18, D18, D25

  (1998) 0x4b1a4c FADD	D0, D0, D25

  (1998) 0x4b1a50 ADD	X13, X5, #2

  (1998) 0x4b1a54 LDR	X7, [X25, X13,LSL #3]

  (1998) 0x4b1a58 LDR	X16, [X21, X7,LSL #3]

  (1998) 0x4b1a5c CMP	X18, X16

  (1998) 0x4b1a60 B.NE	4b1a70

  (1998) 0x4b1a64 LDR	D27, [X22, X13,LSL #3]

  (1998) 0x4b1a68 FMINNM	D18, D18, D27

  (1998) 0x4b1a6c FADD	D0, D0, D27

  (1998) 0x4b1a70 ADD	X27, X5, #3

  (1998) 0x4b1a74 LDR	X13, [X25, X27,LSL #3]

  (1998) 0x4b1a78 LDR	X7, [X21, X13,LSL #3]

  (1998) 0x4b1a7c CMP	X18, X7

  (1998) 0x4b1a80 B.NE	4b1a90

  (1998) 0x4b1a84 LDR	D26, [X22, X27,LSL #3]

  (1998) 0x4b1a88 FMINNM	D18, D18, D26

  (1998) 0x4b1a8c FADD	D0, D0, D26

  (1998) 0x4b1a90 ADD	X27, X5, #4

  (1998) 0x4b1a94 LDR	X16, [X25, X27,LSL #3]

  (1998) 0x4b1a98 LDR	X13, [X21, X16,LSL #3]

  (1998) 0x4b1a9c CMP	X18, X13

  (1998) 0x4b1aa0 B.NE	4b1ab0

  (1998) 0x4b1aa4 LDR	D28, [X22, X27,LSL #3]

  (1998) 0x4b1aa8 FMINNM	D18, D18, D28

  (1998) 0x4b1aac FADD	D0, D0, D28

  (1998) 0x4b1ab0 ADD	X7, X5, #5

  (1998) 0x4b1ab4 LDR	X27, [X25, X7,LSL #3]

  (1998) 0x4b1ab8 LDR	X16, [X21, X27,LSL #3]

  (1998) 0x4b1abc CMP	X18, X16

  (1998) 0x4b1ac0 B.NE	4b1ad0

  (1998) 0x4b1ac4 LDR	D30, [X22, X7,LSL #3]

  (1998) 0x4b1ac8 FMINNM	D18, D18, D30

  (1998) 0x4b1acc FADD	D0, D0, D30

  (1998) 0x4b1ad0 ADD	X13, X5, #6

  (1998) 0x4b1ad4 LDR	X7, [X25, X13,LSL #3]

  (1998) 0x4b1ad8 LDR	X27, [X21, X7,LSL #3]

  (1998) 0x4b1adc CMP	X18, X27

  (1998) 0x4b1ae0 B.NE	4b1af0

  (1998) 0x4b1ae4 LDR	D3, [X22, X13,LSL #3]

  (1998) 0x4b1ae8 FMINNM	D18, D18, D3

  (1998) 0x4b1aec FADD	D0, D0, D3

  (1998) 0x4b1af0 ADD	X5, X5, #7

  (1998) 0x4b1af4 CMP	X5, X12

  (1998) 0x4b1af8 B.NE	4b19f4

(1975) 0x4b1afc LDR	X16, [X3]

(1975) 0x4b1b00 LDR	X13, [X30]

(1975) 0x4b1b04 CMP	X13, X16

(1975) 0x4b1b08 B.GE	4b1cf8

(1975) 0x4b1b0c SUB	X18, X16, X13

(1975) 0x4b1b10 LDR	X7, [X21, X4,LSL #3]

(1975) 0x4b1b14 ORR	X5, XZR, X13

(1975) 0x4b1b18 ANDS	X27, X18, #0x7

(1975) 0x4b1b1c B.EQ	4b1bf0

(1975) 0x4b1b20 CMP	X27, #1

(1975) 0x4b1b24 B.EQ	4b1bc8

(1975) 0x4b1b28 CMP	X27, #2

(1975) 0x4b1b2c B.EQ	4b1bb4

(1975) 0x4b1b30 CMP	X27, #3

(1975) 0x4b1b34 B.EQ	4b1ba0

(1975) 0x4b1b38 CMP	X27, #4

(1975) 0x4b1b3c B.EQ	4b1b8c

(1975) 0x4b1b40 CMP	X27, #5

(1975) 0x4b1b44 B.EQ	4b1b78

(1975) 0x4b1b48 CMP	X27, #6

(1975) 0x4b1b4c B.EQ	4b1b64

(1975) 0x4b1b50 LDR	X5, [X24, X13,LSL #3]

(1975) 0x4b1b54 LDR	X18, [X26, X5,LSL #3]

(1975) 0x4b1b58 CMP	X18, X7

(1975) 0x4b1b5c B.EQ	4b2b10

(1975) 0x4b1b60 ADD	X5, X13, #1

(1975) 0x4b1b64 LDR	X27, [X24, X5,LSL #3]

(1975) 0x4b1b68 LDR	X18, [X26, X27,LSL #3]

(1975) 0x4b1b6c CMP	X18, X7

(1975) 0x4b1b70 B.EQ	4b2a7c

(1975) 0x4b1b74 ADD	X5, X5, #1

(1975) 0x4b1b78 LDR	X27, [X24, X5,LSL #3]

(1975) 0x4b1b7c LDR	X18, [X26, X27,LSL #3]

(1975) 0x4b1b80 CMP	X18, X7

(1975) 0x4b1b84 B.EQ	4b2a1c

(1975) 0x4b1b88 ADD	X5, X5, #1

(1975) 0x4b1b8c LDR	X27, [X24, X5,LSL #3]

(1975) 0x4b1b90 LDR	X18, [X26, X27,LSL #3]

(1975) 0x4b1b94 CMP	X18, X7

(1975) 0x4b1b98 B.EQ	4b29dc

(1975) 0x4b1b9c ADD	X5, X5, #1

(1975) 0x4b1ba0 LDR	X27, [X24, X5,LSL #3]

(1975) 0x4b1ba4 LDR	X18, [X26, X27,LSL #3]

(1975) 0x4b1ba8 CMP	X18, X7

(1975) 0x4b1bac B.EQ	4b1f1c

(1975) 0x4b1bb0 ADD	X5, X5, #1

(1975) 0x4b1bb4 LDR	X27, [X24, X5,LSL #3]

(1975) 0x4b1bb8 LDR	X18, [X26, X27,LSL #3]

(1975) 0x4b1bbc CMP	X18, X7

(1975) 0x4b1bc0 B.EQ	4b1f0c

(1975) 0x4b1bc4 ADD	X5, X5, #1

(1975) 0x4b1bc8 LDR	X27, [X24, X5,LSL #3]

(1975) 0x4b1bcc LDR	X18, [X26, X27,LSL #3]

(1975) 0x4b1bd0 CMP	X18, X7

(1975) 0x4b1bd4 B.NE	4b1be4

(1975) 0x4b1bd8 LDR	D17, [X23, X5,LSL #3]

(1975) 0x4b1bdc FMINNM	D18, D18, D17

(1975) 0x4b1be0 FADD	D0, D0, D17

(1975) 0x4b1be4 ADD	X5, X5, #1

(1975) 0x4b1be8 CMP	X5, X16

(1975) 0x4b1bec B.EQ	4b1cf8

  (1997) 0x4b1bf0 LDR	X27, [X24, X5,LSL #3]

  (1997) 0x4b1bf4 LDR	X18, [X26, X27,LSL #3]

  (1997) 0x4b1bf8 CMP	X18, X7

  (1997) 0x4b1bfc B.NE	4b1c0c

  (1997) 0x4b1c00 LDR	D23, [X23, X5,LSL #3]

  (1997) 0x4b1c04 FMINNM	D18, D18, D23

  (1997) 0x4b1c08 FADD	D0, D0, D23

  (1997) 0x4b1c0c ADD	X5, X5, #1

  (1997) 0x4b1c10 LDR	X27, [X24, X5,LSL #3]

  (1997) 0x4b1c14 LDR	X18, [X26, X27,LSL #3]

  (1997) 0x4b1c18 CMP	X18, X7

  (1997) 0x4b1c1c B.NE	4b1c2c

  (1997) 0x4b1c20 LDR	D20, [X23, X5,LSL #3]

  (1997) 0x4b1c24 FMINNM	D18, D18, D20

  (1997) 0x4b1c28 FADD	D0, D0, D20

  (1997) 0x4b1c2c ADD	X18, X5, #1

  (1997) 0x4b1c30 LDR	X27, [X24, X18,LSL #3]

  (1997) 0x4b1c34 LDR	X27, [X26, X27,LSL #3]

  (1997) 0x4b1c38 CMP	X27, X7

  (1997) 0x4b1c3c B.NE	4b1c4c

  (1997) 0x4b1c40 LDR	D19, [X23, X18,LSL #3]

  (1997) 0x4b1c44 FMINNM	D18, D18, D19

  (1997) 0x4b1c48 FADD	D0, D0, D19

  (1997) 0x4b1c4c ADD	X18, X5, #2

  (1997) 0x4b1c50 LDR	X27, [X24, X18,LSL #3]

  (1997) 0x4b1c54 LDR	X27, [X26, X27,LSL #3]

  (1997) 0x4b1c58 CMP	X27, X7

  (1997) 0x4b1c5c B.NE	4b1c6c

  (1997) 0x4b1c60 LDR	D22, [X23, X18,LSL #3]

  (1997) 0x4b1c64 FMINNM	D18, D18, D22

  (1997) 0x4b1c68 FADD	D0, D0, D22

  (1997) 0x4b1c6c ADD	X18, X5, #3

  (1997) 0x4b1c70 LDR	X27, [X24, X18,LSL #3]

  (1997) 0x4b1c74 LDR	X27, [X26, X27,LSL #3]

  (1997) 0x4b1c78 CMP	X27, X7

  (1997) 0x4b1c7c B.NE	4b1c8c

  (1997) 0x4b1c80 LDR	D21, [X23, X18,LSL #3]

  (1997) 0x4b1c84 FMINNM	D18, D18, D21

  (1997) 0x4b1c88 FADD	D0, D0, D21

  (1997) 0x4b1c8c ADD	X18, X5, #4

  (1997) 0x4b1c90 LDR	X27, [X24, X18,LSL #3]

  (1997) 0x4b1c94 LDR	X27, [X26, X27,LSL #3]

  (1997) 0x4b1c98 CMP	X27, X7

  (1997) 0x4b1c9c B.NE	4b1cac

  (1997) 0x4b1ca0 LDR	D29, [X23, X18,LSL #3]

  (1997) 0x4b1ca4 FMINNM	D18, D18, D29

  (1997) 0x4b1ca8 FADD	D0, D0, D29

  (1997) 0x4b1cac ADD	X18, X5, #5

  (1997) 0x4b1cb0 LDR	X27, [X24, X18,LSL #3]

  (1997) 0x4b1cb4 LDR	X27, [X26, X27,LSL #3]

  (1997) 0x4b1cb8 CMP	X27, X7

  (1997) 0x4b1cbc B.NE	4b1ccc

  (1997) 0x4b1cc0 LDR	D31, [X23, X18,LSL #3]

  (1997) 0x4b1cc4 FMINNM	D18, D18, D31

  (1997) 0x4b1cc8 FADD	D0, D0, D31

  (1997) 0x4b1ccc ADD	X18, X5, #6

  (1997) 0x4b1cd0 LDR	X27, [X24, X18,LSL #3]

  (1997) 0x4b1cd4 LDR	X27, [X26, X27,LSL #3]

  (1997) 0x4b1cd8 CMP	X27, X7

  (1997) 0x4b1cdc B.NE	4b1cec

  (1997) 0x4b1ce0 LDR	D24, [X23, X18,LSL #3]

  (1997) 0x4b1ce4 FMINNM	D18, D18, D24

  (1997) 0x4b1ce8 FADD	D0, D0, D24

  (1997) 0x4b1cec ADD	X5, X5, #7

  (1997) 0x4b1cf0 CMP	X5, X16

  (1997) 0x4b1cf4 B.NE	4b1bf0

(1975) 0x4b1cf8 FABS	D4, D4

(1975) 0x4b1cfc STR	X14, [X19, X15]

(1975) 0x4b1d00 SUB	X15, X12, X6

(1975) 0x4b1d04 SUB	X12, X16, X13

(1975) 0x4b1d08 LDR	W16, [SP, #112]

(1975) 0x4b1d0c FABS	D25, D0

(1975) 0x4b1d10 LDP	X13, X18, [X0, #1016]

(1975) 0x4b1d14 SUB	X6, X15, #1

(1975) 0x4b1d18 ADD	X2, X2, X12

(1975) 0x4b1d1c ADD	X1, X1, X6

(1975) 0x4b1d20 FMUL	D27, D4, D15

(1975) 0x4b1d24 CMP	W16, #0

(1975) 0x4b1d28 ADD	X5, X13, #1

(1975) 0x4b1d2c FCCMPE	D27, D25, #0, #1

(1975) 0x4b1d30 B.MI	4b2928

(1975) 0x4b1d34 FMUL	D26, D14, D18

(1975) 0x4b1d38 CMP	X18, X5

(1975) 0x4b1d3c B.LE	4b1d7c

  (1996) 0x4b1d40 LDR	D28, [X22, X5,LSL #3]

  (1996) 0x4b1d44 FCMPE	D26, D28

  (1996) 0x4b1d48 B.LS	4b1d60

  (1996) 0x4b1d4c LDR	X27, [X25, X5,LSL #3]

  (1996) 0x4b1d50 LDR	X7, [X21, X4,LSL #3]

  (1996) 0x4b1d54 LDR	X18, [X21, X27,LSL #3]

  (1996) 0x4b1d58 CMP	X18, X7

  (1996) 0x4b1d5c B.EQ	4b1d68

  (1996) 0x4b1d60 SUB	X1, X1, #1

  (1996) 0x4b1d64 MOVN	X27, #0

  (1996) 0x4b1d68 STR	X27, [X19, X5,LSL #3]

  (1996) 0x4b1d6c ADD	X5, X5, #1

  (1996) 0x4b1d70 LDR	X15, [X0]

  (1996) 0x4b1d74 CMP	X15, X5

  (1996) 0x4b1d78 B.GT	4b1d40

(1975) 0x4b1d7c LDR	X6, [X3]

(1975) 0x4b1d80 LDR	X5, [X30]

(1975) 0x4b1d84 CMP	X5, X6

(1975) 0x4b1d88 B.GE	4b1dcc

(1975) 0x4b1d8c FMUL	D30, D14, D18

  (1995) 0x4b1d90 LDR	D3, [X23, X5,LSL #3]

  (1995) 0x4b1d94 FCMPE	D30, D3

  (1995) 0x4b1d98 B.LS	4b1db0

  (1995) 0x4b1d9c LDR	X13, [X24, X5,LSL #3]

  (1995) 0x4b1da0 LDR	X16, [X21, X4,LSL #3]

  (1995) 0x4b1da4 LDR	X12, [X26, X13,LSL #3]

  (1995) 0x4b1da8 CMP	X12, X16

  (1995) 0x4b1dac B.EQ	4b1db8

  (1995) 0x4b1db0 SUB	X2, X2, #1

  (1995) 0x4b1db4 MOVN	X13, #0

  (1995) 0x4b1db8 STR	X13, [X20, X5,LSL #3]

  (1995) 0x4b1dbc ADD	X5, X5, #1

  (1995) 0x4b1dc0 LDR	X7, [X3]

  (1995) 0x4b1dc4 CMP	X7, X5

  (1995) 0x4b1dc8 B.GT	4b1d90

(1975) 0x4b1dcc ADD	X4, X4, #1

(1975) 0x4b1dd0 ADD	X30, X30, #8

(1975) 0x4b1dd4 ADD	X3, X3, #8

(1975) 0x4b1dd8 ADD	X0, X0, #8

(1975) 0x4b1ddc CMP	X4, X17

(1975) 0x4b1de0 B.NE	4b18d0

0x4b1de4 LDR	X10, [SP, #120]

0x4b1de8 LDP	X27, X28, [SP, #144]

0x4b1dec LDP	X7, X15, [SP, #176]

0x4b1df0 STP	X1, X2, [SP, #208]

0x4b1df4 LDR	X5, [SP, #160]

0x4b1df8 ADD	X1, X9, X5,LSL #3

0x4b1dfc ADD	X2, SP, #216

0x4b1e00 ADD	X0, SP, #208

0x4b1e04 LDR	X4, [SP, #136]

0x4b1e08 ADD	X3, X10, X5,LSL #3

0x4b1e0c STP	X9, X10, [SP, #112]

0x4b1e10 STR	X7, [SP, #128]

0x4b1e14 STR	X15, [SP, #144]

0x4b1e18 BL	52d268

0x4b1e1c LDP	X1, X8, [SP, #192]

0x4b1e20 CMP	X1, X8

0x4b1e24 B.GE	4b1ecc

0x4b1e28 LDR	X17, [SP, #128]

0x4b1e2c LDP	X9, X14, [SP, #112]

0x4b1e30 LDP	X22, X11, [SP, #208]

0x4b1e34 ADD	X24, X17, #8

0x4b1e38 LDR	X21, [SP, #144]

0x4b1e3c ADD	X23, X21, #8

(1970) 0x4b1e40 LDR	X2, [X9, X1,LSL #3]

(1970) 0x4b1e44 ADD	X0, X2, X22

(1970) 0x4b1e48 STR	X0, [X9, X1,LSL #3]

(1970) 0x4b1e4c LDR	X3, [X14, X1,LSL #3]

(1970) 0x4b1e50 ADD	X18, X11, X3

(1970) 0x4b1e54 STR	X18, [X14, X1,LSL #3]

(1970) 0x4b1e58 LDR	X26, [X21, X1,LSL #3]

(1970) 0x4b1e5c LDR	X30, [X23, X1,LSL #3]

(1970) 0x4b1e60 LDR	X4, [X9, X1,LSL #3]

(1970) 0x4b1e64 CMP	X26, X30

(1970) 0x4b1e68 B.GE	4b1e90

  (1973) 0x4b1e6c LDR	X25, [X19, X26,LSL #3]

  (1973) 0x4b1e70 ADD	X26, X26, #1

  (1973) 0x4b1e74 TBNZ	X25, #63, 4b1f2c

  (1973) 0x4b1e78 STR	X25, [X28, X4,LSL #3]

  (1973) 0x4b1e7c ADD	X4, X4, #1

  (1973) 0x4b1e80 LDR	X30, [X23, X1,LSL #3]

  (1973) 0x4b1e84 CMP	X30, X26

  (1973) 0x4b1e88 B.GT	4b1e6c

(1970) 0x4b1e8c LDR	X18, [X14, X1,LSL #3]

(1970) 0x4b1e90 LDR	X13, [X17, X1,LSL #3]

(1970) 0x4b1e94 LDR	X12, [X24, X1,LSL #3]

  (1971) 0x4b1e98 CMP	X13, X12

  (1971) 0x4b1e9c B.GE	4b1ec0

    (1972) 0x4b1ea0 LDR	X16, [X20, X13,LSL #3]

    (1972) 0x4b1ea4 ADD	X13, X13, #1

    (1972) 0x4b1ea8 TBNZ	X16, #63, 4b1e98

    (1972) 0x4b1eac STR	X16, [X27, X18,LSL #3]

    (1972) 0x4b1eb0 ADD	X18, X18, #1

    (1972) 0x4b1eb4 LDR	X12, [X24, X1,LSL #3]

    (1972) 0x4b1eb8 CMP	X12, X13

    (1972) 0x4b1ebc B.GT	4b1ea0

(1970) 0x4b1ec0 ADD	X1, X1, #1

(1970) 0x4b1ec4 CMP	X1, X8

(1970) 0x4b1ec8 B.NE	4b1e40

0x4b1ecc LDP	D14, D15, [SP, #96]

0x4b1ed0 LDP	X19, X20, [SP, #16]

0x4b1ed4 LDP	X21, X22, [SP, #32]

0x4b1ed8 LDP	X23, X24, [SP, #48]

0x4b1edc LDP	X25, X26, [SP, #64]

0x4b1ee0 LDP	X27, X28, [SP, #80]

0x4b1ee4 LDP	X29, X30, [SP], #224

0x4b1ee8 RET

(1975) 0x4b1eec LDR	D21, [X22, X5,LSL #3]

(1975) 0x4b1ef0 FMINNM	D18, D18, D21

(1975) 0x4b1ef4 FADD	D0, D0, D21

(1975) 0x4b1ef8 B	4b19c8

(1975) 0x4b1efc LDR	D22, [X22, X5,LSL #3]

(1975) 0x4b1f00 FMINNM	D18, D18, D22

(1975) 0x4b1f04 FADD	D0, D0, D22

(1975) 0x4b1f08 B	4b19b4

(1975) 0x4b1f0c LDR	D6, [X23, X5,LSL #3]

(1975) 0x4b1f10 FMINNM	D18, D18, D6

(1975) 0x4b1f14 FADD	D0, D0, D6

(1975) 0x4b1f18 B	4b1bc4

(1975) 0x4b1f1c LDR	D5, [X23, X5,LSL #3]

(1975) 0x4b1f20 FMINNM	D18, D18, D5

(1975) 0x4b1f24 FADD	D0, D0, D5

(1975) 0x4b1f28 B	4b1bb0

  (1973) 0x4b1f2c CMP	X26, X30

  (1973) 0x4b1f30 B.LT	4b1e6c

(1970) 0x4b1f34 B	4b1e8c

(1975) 0x4b1f38 FCMPE	D4, #0

(1975) 0x4b1f3c B.MI	4b26a8

(1975) 0x4b1f40 CMP	X7, X12

(1975) 0x4b1f44 B.GE	4b2aa8

(1975) 0x4b1f48 SUB	X18, X12, #2

(1975) 0x4b1f4c SUB	X13, X12, #1

(1975) 0x4b1f50 SUB	X27, X18, X6

(1975) 0x4b1f54 SUB	X18, X13, X6

(1975) 0x4b1f58 CNTW	X5, ALL

(1975) 0x4b1f5c ADD	X16, X5, #5

(1975) 0x4b1f60 STR	X18, [SP, #128]

(1975) 0x4b1f64 CMP	X27, X16

(1975) 0x4b1f68 B.CC	4b2b44

(1975) 0x4b1f6c ADD	X16, X15, #8

(1975) 0x4b1f70 SUB	X27, X18, X8

(1975) 0x4b1f74 DUP	Z6.D, #0

(1975) 0x4b1f78 ADD	X16, X22, X16

(1975) 0x4b1f7c MOVZ	X5, #0

(1975) 0x4b1f80 ORR	Z7.D, Z6.D, Z6.D

(1975) 0x4b1f84 ADDVL	X18, X16, #1

(1975) 0x4b1f88 ORR	Z2.D, Z6.D, Z6.D

(1975) 0x4b1f8c ORR	Z16.D, Z6.D, Z6.D

  (1990) 0x4b1f90 LD1D	{Z1.D}, P7/Z, [X16, X5,LSL #3]

  (1990) 0x4b1f94 LD1D	{Z5.D}, P7/Z, [X18, X5,LSL #3]

  (1990) 0x4b1f98 ADD	X5, X5, X8

  (1990) 0x4b1f9c FMINNM	Z16.D, P7/M, Z16.D, Z1.D

  (1990) 0x4b1fa0 FADD	Z7.D, Z7.D, Z1.D

  (1990) 0x4b1fa4 FMINNM	Z2.D, P7/M, Z2.D, Z5.D

  (1990) 0x4b1fa8 FADD	Z6.D, Z6.D, Z5.D

  (1990) 0x4b1fac CMP	X27, X5

  (1990) 0x4b1fb0 B.CS	4b1f90

(1975) 0x4b1fb4 LDR	X27, [SP, #128]

(1975) 0x4b1fb8 FADD	Z0.D, Z7.D, Z6.D

(1975) 0x4b1fbc FMINNM	Z16.D, P7/M, Z16.D, Z2.D

(1975) 0x4b1fc0 CMP	X27, X5

(1975) 0x4b1fc4 B.EQ	4b1ff8

(1975) 0x4b1fc8 ADD	X7, X7, X5

(1975) 0x4b1fcc MOVZ	X16, #0

(1975) 0x4b1fd0 ADD	X18, X22, X7,LSL #3

(1975) 0x4b1fd4 ADD	X5, X6, X5

(1975) 0x4b1fd8 SUB	X13, X13, X5

(1975) 0x4b1fdc WHILELO	P6.D, XZR, X13

  (1989) 0x4b1fe0 LD1D	{Z17.D}, P6/Z, [X18, X16,LSL #3]

  (1989) 0x4b1fe4 ADD	X16, X16, X11

  (1989) 0x4b1fe8 FMINNM	Z16.D, P6/M, Z16.D, Z17.D

  (1989) 0x4b1fec FADD	Z0.D, P6/M, Z0.D, Z17.D

  (1989) 0x4b1ff0 WHILELO	P6.D, X16, X13

  (1989) 0x4b1ff4 B.NE	4b1fe0

(1975) 0x4b1ff8 LDR	X27, [X3]

(1975) 0x4b1ffc FADDV	D18, P7, Z0.D

(1975) 0x4b2000 FMINNMV	D23, P7, Z16.D

(1975) 0x4b2004 FADD	D20, D4, D18

(1975) 0x4b2008 LDR	X7, [X30]

(1975) 0x4b200c CMP	X7, X27

(1975) 0x4b2010 B.GE	4b2ac0

(1975) 0x4b2014 SUB	X5, X27, #1

(1975) 0x4b2018 CNTW	X13, ALL

(1975) 0x4b201c DUP	Z19.D, Z23.D[0]

(1975) 0x4b2020 SUB	X16, X27, X7

(1975) 0x4b2024 SUB	X18, X5, X7

(1975) 0x4b2028 ADD	X27, X13, #5

(1975) 0x4b202c CMP	X18, X27

(1975) 0x4b2030 B.CC	4b2b54

(1975) 0x4b2034 ADD	X13, X23, X7,LSL #3

(1975) 0x4b2038 MOVZ	X5, #0

(1975) 0x4b203c SUB	X27, X16, X8

(1975) 0x4b2040 DUP	Z27.D, #0

(1975) 0x4b2044 ORR	Z29.D, Z19.D, Z19.D

(1975) 0x4b2048 ORR	Z24.D, Z27.D, Z27.D

(1975) 0x4b204c ADDVL	X18, X13, #1

  (1988) 0x4b2050 LD1D	{Z31.D}, P7/Z, [X13, X5,LSL #3]

  (1988) 0x4b2054 LD1D	{Z22.D}, P7/Z, [X18, X5,LSL #3]

  (1988) 0x4b2058 ADD	X5, X5, X8

  (1988) 0x4b205c FMINNM	Z19.D, P7/M, Z19.D, Z31.D

  (1988) 0x4b2060 FADD	Z24.D, Z24.D, Z31.D

  (1988) 0x4b2064 FMINNM	Z29.D, P7/M, Z29.D, Z22.D

  (1988) 0x4b2068 FADD	Z27.D, Z27.D, Z22.D

  (1988) 0x4b206c CMP	X27, X5

  (1988) 0x4b2070 B.CS	4b2050

(1975) 0x4b2074 FADD	Z21.D, Z24.D, Z27.D

(1975) 0x4b2078 FMINNM	Z19.D, P7/M, Z19.D, Z29.D

(1975) 0x4b207c CMP	X16, X5

(1975) 0x4b2080 B.EQ	4b20b8

(1975) 0x4b2084 ADD	X7, X7, X5

(1975) 0x4b2088 MOVZ	X13, #0

(1975) 0x4b208c ADD	X27, X23, X7,LSL #3

(1975) 0x4b2090 SUB	X5, X16, X5

(1975) 0x4b2094 WHILELO	P0.D, XZR, X5

(1975) 0x4b2098 HINT	#0

(1975) 0x4b209c HINT	#0

  (1984) 0x4b20a0 LD1D	{Z25.D}, P0/Z, [X27, X13,LSL #3]

  (1984) 0x4b20a4 ADD	X13, X13, X11

  (1984) 0x4b20a8 FMINNM	Z19.D, P0/M, Z19.D, Z25.D

  (1984) 0x4b20ac FADD	Z21.D, P0/M, Z21.D, Z25.D

  (1984) 0x4b20b0 WHILELO	P0.D, X13, X5

  (1984) 0x4b20b4 B.NE	4b20a0

(1975) 0x4b20b8 FADDV	D26, P7, Z21.D

(1975) 0x4b20bc FADD	D20, D20, D26

(1975) 0x4b20c0 FMINNMV	D23, P7, Z19.D

(1975) 0x4b20c4 FABS	D4, D4

(1975) 0x4b20c8 STR	X14, [X19, X15]

(1975) 0x4b20cc FABS	D28, D20

(1975) 0x4b20d0 LDR	W15, [SP, #112]

(1975) 0x4b20d4 ADD	X2, X2, X16

(1975) 0x4b20d8 SUB	X12, X12, X6

(1975) 0x4b20dc LDP	X16, X18, [X0, #1016]

(1975) 0x4b20e0 SUB	X6, X12, #1

(1975) 0x4b20e4 ADD	X1, X1, X6

(1975) 0x4b20e8 FMUL	D30, D4, D15

(1975) 0x4b20ec CMP	W15, #0

(1975) 0x4b20f0 ADD	X5, X16, #1

(1975) 0x4b20f4 FCCMPE	D30, D28, #0, #1

(1975) 0x4b20f8 B.MI	4b2928

(1975) 0x4b20fc FMUL	D3, D14, D23

(1975) 0x4b2100 CMP	X5, X18

(1975) 0x4b2104 B.GE	4b212c

  (1987) 0x4b2108 LDR	D0, [X22, X5,LSL #3]

  (1987) 0x4b210c FCMPE	D3, D0

  (1987) 0x4b2110 B.LS	4b21a4

  (1987) 0x4b2114 LDR	X7, [X25, X5,LSL #3]

  (1987) 0x4b2118 STR	X7, [X19, X5,LSL #3]

  (1987) 0x4b211c ADD	X5, X5, #1

  (1987) 0x4b2120 LDR	X27, [X0]

  (1987) 0x4b2124 CMP	X27, X5

  (1987) 0x4b2128 B.GT	4b2108

(1975) 0x4b212c LDR	X15, [X3]

(1975) 0x4b2130 LDR	X16, [X30]

(1975) 0x4b2134 CMP	X16, X15

(1975) 0x4b2138 B.GE	4b1dcc

(1975) 0x4b213c FMUL	D16, D14, D23

  (1985) 0x4b2140 LDR	D2, [X23, X16,LSL #3]

  (1985) 0x4b2144 FCMPE	D16, D2

  (1985) 0x4b2148 B.LS	4b2170

  (1986) 0x4b214c LDR	X12, [X24, X16,LSL #3]

  (1986) 0x4b2150 STR	X12, [X20, X16,LSL #3]

  (1986) 0x4b2154 ADD	X16, X16, #1

  (1986) 0x4b2158 LDR	X6, [X3]

  (1986) 0x4b215c CMP	X6, X16

  (1986) 0x4b2160 B.LE	4b1dcc

  (1986) 0x4b2164 LDR	D2, [X23, X16,LSL #3]

  (1986) 0x4b2168 FCMPE	D16, D2

  (1986) 0x4b216c B.GT	4b214c

  (1985) 0x4b2170 STR	X14, [X20, X16,LSL #3]

  (1985) 0x4b2174 ADD	X16, X16, #1

  (1985) 0x4b2178 SUB	X2, X2, #1

  (1985) 0x4b217c LDR	X18, [X3]

  (1985) 0x4b2180 CMP	X18, X16

  (1985) 0x4b2184 B.GT	4b2140

(1975) 0x4b2188 ADD	X4, X4, #1

(1975) 0x4b218c ADD	X30, X30, #8

(1975) 0x4b2190 ADD	X3, X3, #8

(1975) 0x4b2194 ADD	X0, X0, #8

(1975) 0x4b2198 CMP	X4, X17

(1975) 0x4b219c B.NE	4b18d0

0x4b21a0 B	4b1de4

  (1987) 0x4b21a4 STR	X14, [X19, X5,LSL #3]

  (1987) 0x4b21a8 ADD	X5, X5, #1

  (1987) 0x4b21ac SUB	X1, X1, #1

  (1987) 0x4b21b0 LDR	X13, [X0]

  (1987) 0x4b21b4 CMP	X5, X13

  (1987) 0x4b21b8 B.LT	4b2108

(1975) 0x4b21bc B	4b212c

(1975) 0x4b21c0 CMP	X7, X12

(1975) 0x4b21c4 B.GE	4b2ac8

(1975) 0x4b21c8 SUB	X18, X12, X7

(1975) 0x4b21cc LDR	X27, [X21, X4,LSL #3]

(1975) 0x4b21d0 FMOV	D2, D4

(1975) 0x4b21d4 ANDS	X16, X18, #0x7

(1975) 0x4b21d8 MOVI	D25, #0

(1975) 0x4b21dc B.EQ	4b22b0

(1975) 0x4b21e0 CMP	X16, #1

(1975) 0x4b21e4 B.EQ	4b2288

(1975) 0x4b21e8 CMP	X16, #2

(1975) 0x4b21ec B.EQ	4b2274

(1975) 0x4b21f0 CMP	X16, #3

(1975) 0x4b21f4 B.EQ	4b2260

(1975) 0x4b21f8 CMP	X16, #4

(1975) 0x4b21fc B.EQ	4b224c

(1975) 0x4b2200 CMP	X16, #5

(1975) 0x4b2204 B.EQ	4b2238

(1975) 0x4b2208 CMP	X16, #6

(1975) 0x4b220c B.EQ	4b2224

(1975) 0x4b2210 LDR	X13, [X25, X7,LSL #3]

(1975) 0x4b2214 LDR	X5, [X21, X13,LSL #3]

(1975) 0x4b2218 CMP	X5, X27

(1975) 0x4b221c B.EQ	4b2b24

(1975) 0x4b2220 ADD	X5, X7, #1

(1975) 0x4b2224 LDR	X7, [X25, X5,LSL #3]

(1975) 0x4b2228 LDR	X18, [X21, X7,LSL #3]

(1975) 0x4b222c CMP	X18, X27

(1975) 0x4b2230 B.EQ	4b2ae8

(1975) 0x4b2234 ADD	X5, X5, #1

(1975) 0x4b2238 LDR	X16, [X25, X5,LSL #3]

(1975) 0x4b223c LDR	X13, [X21, X16,LSL #3]

(1975) 0x4b2240 CMP	X13, X27

(1975) 0x4b2244 B.EQ	4b2a6c

(1975) 0x4b2248 ADD	X5, X5, #1

(1975) 0x4b224c LDR	X7, [X25, X5,LSL #3]

(1975) 0x4b2250 LDR	X18, [X21, X7,LSL #3]

(1975) 0x4b2254 CMP	X18, X27

(1975) 0x4b2258 B.EQ	4b2a3c

(1975) 0x4b225c ADD	X5, X5, #1

(1975) 0x4b2260 LDR	X16, [X25, X5,LSL #3]

(1975) 0x4b2264 LDR	X13, [X21, X16,LSL #3]

(1975) 0x4b2268 CMP	X13, X27

(1975) 0x4b226c B.EQ	4b2a0c

(1975) 0x4b2270 ADD	X5, X5, #1

(1975) 0x4b2274 LDR	X7, [X25, X5,LSL #3]

(1975) 0x4b2278 LDR	X18, [X21, X7,LSL #3]

(1975) 0x4b227c CMP	X18, X27

(1975) 0x4b2280 B.EQ	4b29cc

(1975) 0x4b2284 ADD	X5, X5, #1

(1975) 0x4b2288 LDR	X16, [X25, X5,LSL #3]

(1975) 0x4b228c LDR	X13, [X21, X16,LSL #3]

(1975) 0x4b2290 CMP	X13, X27

(1975) 0x4b2294 B.NE	4b22a4

(1975) 0x4b2298 LDR	D6, [X22, X5,LSL #3]

(1975) 0x4b229c FMAXNM	D25, D25, D6

(1975) 0x4b22a0 FADD	D2, D2, D6

(1975) 0x4b22a4 ADD	X5, X5, #1

(1975) 0x4b22a8 CMP	X5, X12

(1975) 0x4b22ac B.EQ	4b23b8

  (1994) 0x4b22b0 LDR	X7, [X25, X5,LSL #3]

  (1994) 0x4b22b4 LDR	X18, [X21, X7,LSL #3]

  (1994) 0x4b22b8 CMP	X18, X27

  (1994) 0x4b22bc B.NE	4b22cc

  (1994) 0x4b22c0 LDR	D17, [X22, X5,LSL #3]

  (1994) 0x4b22c4 FMAXNM	D25, D25, D17

  (1994) 0x4b22c8 FADD	D2, D2, D17

  (1994) 0x4b22cc ADD	X5, X5, #1

  (1994) 0x4b22d0 LDR	X16, [X25, X5,LSL #3]

  (1994) 0x4b22d4 LDR	X13, [X21, X16,LSL #3]

  (1994) 0x4b22d8 CMP	X13, X27

  (1994) 0x4b22dc B.NE	4b22ec

  (1994) 0x4b22e0 LDR	D23, [X22, X5,LSL #3]

  (1994) 0x4b22e4 FMAXNM	D25, D25, D23

  (1994) 0x4b22e8 FADD	D2, D2, D23

  (1994) 0x4b22ec ADD	X7, X5, #1

  (1994) 0x4b22f0 LDR	X18, [X25, X7,LSL #3]

  (1994) 0x4b22f4 LDR	X16, [X21, X18,LSL #3]

  (1994) 0x4b22f8 CMP	X16, X27

  (1994) 0x4b22fc B.NE	4b230c

  (1994) 0x4b2300 LDR	D20, [X22, X7,LSL #3]

  (1994) 0x4b2304 FMAXNM	D25, D25, D20

  (1994) 0x4b2308 FADD	D2, D2, D20

  (1994) 0x4b230c ADD	X13, X5, #2

  (1994) 0x4b2310 LDR	X7, [X25, X13,LSL #3]

  (1994) 0x4b2314 LDR	X18, [X21, X7,LSL #3]

  (1994) 0x4b2318 CMP	X18, X27

  (1994) 0x4b231c B.NE	4b232c

  (1994) 0x4b2320 LDR	D19, [X22, X13,LSL #3]

  (1994) 0x4b2324 FMAXNM	D25, D25, D19

  (1994) 0x4b2328 FADD	D2, D2, D19

  (1994) 0x4b232c ADD	X13, X5, #3

  (1994) 0x4b2330 LDR	X16, [X25, X13,LSL #3]

  (1994) 0x4b2334 LDR	X7, [X21, X16,LSL #3]

  (1994) 0x4b2338 CMP	X7, X27

  (1994) 0x4b233c B.NE	4b234c

  (1994) 0x4b2340 LDR	D22, [X22, X13,LSL #3]

  (1994) 0x4b2344 FMAXNM	D25, D25, D22

  (1994) 0x4b2348 FADD	D2, D2, D22

  (1994) 0x4b234c ADD	X18, X5, #4

  (1994) 0x4b2350 LDR	X13, [X25, X18,LSL #3]

  (1994) 0x4b2354 LDR	X16, [X21, X13,LSL #3]

  (1994) 0x4b2358 CMP	X16, X27

  (1994) 0x4b235c B.NE	4b236c

  (1994) 0x4b2360 LDR	D21, [X22, X18,LSL #3]

  (1994) 0x4b2364 FMAXNM	D25, D25, D21

  (1994) 0x4b2368 FADD	D2, D2, D21

  (1994) 0x4b236c ADD	X7, X5, #5

  (1994) 0x4b2370 LDR	X18, [X25, X7,LSL #3]

  (1994) 0x4b2374 LDR	X13, [X21, X18,LSL #3]

  (1994) 0x4b2378 CMP	X13, X27

  (1994) 0x4b237c B.NE	4b238c

  (1994) 0x4b2380 LDR	D29, [X22, X7,LSL #3]

  (1994) 0x4b2384 FMAXNM	D25, D25, D29

  (1994) 0x4b2388 FADD	D2, D2, D29

  (1994) 0x4b238c ADD	X7, X5, #6

  (1994) 0x4b2390 LDR	X16, [X25, X7,LSL #3]

  (1994) 0x4b2394 LDR	X18, [X21, X16,LSL #3]

  (1994) 0x4b2398 CMP	X18, X27

  (1994) 0x4b239c B.NE	4b23ac

  (1994) 0x4b23a0 LDR	D31, [X22, X7,LSL #3]

  (1994) 0x4b23a4 FMAXNM	D25, D25, D31

  (1994) 0x4b23a8 FADD	D2, D2, D31

  (1994) 0x4b23ac ADD	X5, X5, #7

  (1994) 0x4b23b0 CMP	X5, X12

  (1994) 0x4b23b4 B.NE	4b22b0

(1975) 0x4b23b8 LDR	X16, [X3]

(1975) 0x4b23bc LDR	X13, [X30]

(1975) 0x4b23c0 CMP	X13, X16

(1975) 0x4b23c4 B.GE	4b25b4

(1975) 0x4b23c8 SUB	X27, X16, X13

(1975) 0x4b23cc LDR	X7, [X21, X4,LSL #3]

(1975) 0x4b23d0 ORR	X5, XZR, X13

(1975) 0x4b23d4 ANDS	X18, X27, #0x7

(1975) 0x4b23d8 B.EQ	4b24ac

(1975) 0x4b23dc CMP	X18, #1

(1975) 0x4b23e0 B.EQ	4b2484

(1975) 0x4b23e4 CMP	X18, #2

(1975) 0x4b23e8 B.EQ	4b2470

(1975) 0x4b23ec CMP	X18, #3

(1975) 0x4b23f0 B.EQ	4b245c

(1975) 0x4b23f4 CMP	X18, #4

(1975) 0x4b23f8 B.EQ	4b2448

(1975) 0x4b23fc CMP	X18, #5

(1975) 0x4b2400 B.EQ	4b2434

(1975) 0x4b2404 CMP	X18, #6

(1975) 0x4b2408 B.EQ	4b2420

(1975) 0x4b240c LDR	X5, [X24, X13,LSL #3]

(1975) 0x4b2410 LDR	X27, [X26, X5,LSL #3]

(1975) 0x4b2414 CMP	X7, X27

(1975) 0x4b2418 B.EQ	4b2b34

(1975) 0x4b241c ADD	X5, X13, #1

(1975) 0x4b2420 LDR	X18, [X24, X5,LSL #3]

(1975) 0x4b2424 LDR	X27, [X26, X18,LSL #3]

(1975) 0x4b2428 CMP	X7, X27

(1975) 0x4b242c B.EQ	4b2ad4

(1975) 0x4b2430 ADD	X5, X5, #1

(1975) 0x4b2434 LDR	X18, [X24, X5,LSL #3]

(1975) 0x4b2438 LDR	X27, [X26, X18,LSL #3]

(1975) 0x4b243c CMP	X7, X27

(1975) 0x4b2440 B.EQ	4b2a5c

(1975) 0x4b2444 ADD	X5, X5, #1

(1975) 0x4b2448 LDR	X18, [X24, X5,LSL #3]

(1975) 0x4b244c LDR	X27, [X26, X18,LSL #3]

(1975) 0x4b2450 CMP	X7, X27

(1975) 0x4b2454 B.EQ	4b2a4c

(1975) 0x4b2458 ADD	X5, X5, #1

(1975) 0x4b245c LDR	X18, [X24, X5,LSL #3]

(1975) 0x4b2460 LDR	X27, [X26, X18,LSL #3]

(1975) 0x4b2464 CMP	X7, X27

(1975) 0x4b2468 B.EQ	4b29fc

(1975) 0x4b246c ADD	X5, X5, #1

(1975) 0x4b2470 LDR	X18, [X24, X5,LSL #3]

(1975) 0x4b2474 LDR	X27, [X26, X18,LSL #3]

(1975) 0x4b2478 CMP	X7, X27

(1975) 0x4b247c B.EQ	4b29bc

(1975) 0x4b2480 ADD	X5, X5, #1

(1975) 0x4b2484 LDR	X18, [X24, X5,LSL #3]

(1975) 0x4b2488 LDR	X27, [X26, X18,LSL #3]

(1975) 0x4b248c CMP	X7, X27

(1975) 0x4b2490 B.NE	4b24a0

(1975) 0x4b2494 LDR	D18, [X23, X5,LSL #3]

(1975) 0x4b2498 FMAXNM	D25, D25, D18

(1975) 0x4b249c FADD	D2, D2, D18

(1975) 0x4b24a0 ADD	X5, X5, #1

(1975) 0x4b24a4 CMP	X5, X16

(1975) 0x4b24a8 B.EQ	4b25b4

  (1993) 0x4b24ac LDR	X18, [X24, X5,LSL #3]

  (1993) 0x4b24b0 LDR	X27, [X26, X18,LSL #3]

  (1993) 0x4b24b4 CMP	X7, X27

  (1993) 0x4b24b8 B.NE	4b24c8

  (1993) 0x4b24bc LDR	D0, [X23, X5,LSL #3]

  (1993) 0x4b24c0 FMAXNM	D25, D25, D0

  (1993) 0x4b24c4 FADD	D2, D2, D0

  (1993) 0x4b24c8 ADD	X5, X5, #1

  (1993) 0x4b24cc LDR	X18, [X24, X5,LSL #3]

  (1993) 0x4b24d0 LDR	X27, [X26, X18,LSL #3]

  (1993) 0x4b24d4 CMP	X7, X27

  (1993) 0x4b24d8 B.NE	4b24e8

  (1993) 0x4b24dc LDR	D16, [X23, X5,LSL #3]

  (1993) 0x4b24e0 FMAXNM	D25, D25, D16

  (1993) 0x4b24e4 FADD	D2, D2, D16

  (1993) 0x4b24e8 ADD	X18, X5, #1

  (1993) 0x4b24ec LDR	X27, [X24, X18,LSL #3]

  (1993) 0x4b24f0 LDR	X27, [X26, X27,LSL #3]

  (1993) 0x4b24f4 CMP	X7, X27

  (1993) 0x4b24f8 B.NE	4b2508

  (1993) 0x4b24fc LDR	D1, [X23, X18,LSL #3]

  (1993) 0x4b2500 FMAXNM	D25, D25, D1

  (1993) 0x4b2504 FADD	D2, D2, D1

  (1993) 0x4b2508 ADD	X18, X5, #2

  (1993) 0x4b250c LDR	X27, [X24, X18,LSL #3]

  (1993) 0x4b2510 LDR	X27, [X26, X27,LSL #3]

  (1993) 0x4b2514 CMP	X7, X27

  (1993) 0x4b2518 B.NE	4b2528

  (1993) 0x4b251c LDR	D7, [X23, X18,LSL #3]

  (1993) 0x4b2520 FMAXNM	D25, D25, D7

  (1993) 0x4b2524 FADD	D2, D2, D7

  (1993) 0x4b2528 ADD	X18, X5, #3

  (1993) 0x4b252c LDR	X27, [X24, X18,LSL #3]

  (1993) 0x4b2530 LDR	X27, [X26, X27,LSL #3]

  (1993) 0x4b2534 CMP	X7, X27

  (1993) 0x4b2538 B.NE	4b2548

  (1993) 0x4b253c LDR	D5, [X23, X18,LSL #3]

  (1993) 0x4b2540 FMAXNM	D25, D25, D5

  (1993) 0x4b2544 FADD	D2, D2, D5

  (1993) 0x4b2548 ADD	X18, X5, #4

  (1993) 0x4b254c LDR	X27, [X24, X18,LSL #3]

  (1993) 0x4b2550 LDR	X27, [X26, X27,LSL #3]

  (1993) 0x4b2554 CMP	X7, X27

  (1993) 0x4b2558 B.NE	4b2568

  (1993) 0x4b255c LDR	D6, [X23, X18,LSL #3]

  (1993) 0x4b2560 FMAXNM	D25, D25, D6

  (1993) 0x4b2564 FADD	D2, D2, D6

  (1993) 0x4b2568 ADD	X18, X5, #5

  (1993) 0x4b256c LDR	X27, [X24, X18,LSL #3]

  (1993) 0x4b2570 LDR	X27, [X26, X27,LSL #3]

  (1993) 0x4b2574 CMP	X7, X27

  (1993) 0x4b2578 B.NE	4b2588

  (1993) 0x4b257c LDR	D17, [X23, X18,LSL #3]

  (1993) 0x4b2580 FMAXNM	D25, D25, D17

  (1993) 0x4b2584 FADD	D2, D2, D17

  (1993) 0x4b2588 ADD	X18, X5, #6

  (1993) 0x4b258c LDR	X27, [X24, X18,LSL #3]

  (1993) 0x4b2590 LDR	X27, [X26, X27,LSL #3]

  (1993) 0x4b2594 CMP	X7, X27

  (1993) 0x4b2598 B.NE	4b25a8

  (1993) 0x4b259c LDR	D23, [X23, X18,LSL #3]

  (1993) 0x4b25a0 FMAXNM	D25, D25, D23

  (1993) 0x4b25a4 FADD	D2, D2, D23

  (1993) 0x4b25a8 ADD	X5, X5, #7

  (1993) 0x4b25ac CMP	X5, X16

  (1993) 0x4b25b0 B.NE	4b24ac

(1975) 0x4b25b4 FABS	D4, D4

(1975) 0x4b25b8 STR	X14, [X19, X15]

(1975) 0x4b25bc SUB	X15, X16, X13

(1975) 0x4b25c0 LDR	W16, [SP, #112]

(1975) 0x4b25c4 FABS	D20, D2

(1975) 0x4b25c8 SUB	X6, X12, X6

(1975) 0x4b25cc LDP	X13, X18, [X0, #1016]

(1975) 0x4b25d0 SUB	X12, X6, #1

(1975) 0x4b25d4 ADD	X2, X2, X15

(1975) 0x4b25d8 ADD	X1, X1, X12

(1975) 0x4b25dc FMUL	D19, D4, D15

(1975) 0x4b25e0 CMP	W16, #0

(1975) 0x4b25e4 ADD	X5, X13, #1

(1975) 0x4b25e8 FCCMPE	D19, D20, #0, #1

(1975) 0x4b25ec B.MI	4b2928

(1975) 0x4b25f0 FMUL	D22, D14, D25

(1975) 0x4b25f4 CMP	X18, X5

(1975) 0x4b25f8 B.LE	4b263c

(1975) 0x4b25fc HINT	#0

  (1992) 0x4b2600 LDR	D21, [X22, X5,LSL #3]

  (1992) 0x4b2604 FCMPE	D22, D21

  (1992) 0x4b2608 B.GE	4b2620

  (1992) 0x4b260c LDR	X27, [X25, X5,LSL #3]

  (1992) 0x4b2610 LDR	X7, [X21, X4,LSL #3]

  (1992) 0x4b2614 LDR	X18, [X21, X27,LSL #3]

  (1992) 0x4b2618 CMP	X18, X7

  (1992) 0x4b261c B.EQ	4b2628

  (1992) 0x4b2620 SUB	X1, X1, #1

  (1992) 0x4b2624 MOVN	X27, #0

  (1992) 0x4b2628 STR	X27, [X19, X5,LSL #3]

  (1992) 0x4b262c ADD	X5, X5, #1

  (1992) 0x4b2630 LDR	X15, [X0]

  (1992) 0x4b2634 CMP	X15, X5

  (1992) 0x4b2638 B.GT	4b2600

(1975) 0x4b263c LDR	X16, [X3]

(1975) 0x4b2640 LDR	X5, [X30]

(1975) 0x4b2644 CMP	X5, X16

(1975) 0x4b2648 B.GE	4b1dcc

(1975) 0x4b264c FMUL	D29, D14, D25

  (1991) 0x4b2650 LDR	D31, [X23, X5,LSL #3]

  (1991) 0x4b2654 FCMPE	D29, D31

  (1991) 0x4b2658 B.GE	4b2670

  (1991) 0x4b265c LDR	X6, [X24, X5,LSL #3]

  (1991) 0x4b2660 LDR	X13, [X21, X4,LSL #3]

  (1991) 0x4b2664 LDR	X12, [X26, X6,LSL #3]

  (1991) 0x4b2668 CMP	X12, X13

  (1991) 0x4b266c B.EQ	4b2678

  (1991) 0x4b2670 SUB	X2, X2, #1

  (1991) 0x4b2674 MOVN	X6, #0

  (1991) 0x4b2678 STR	X6, [X20, X5,LSL #3]

  (1991) 0x4b267c ADD	X5, X5, #1

  (1991) 0x4b2680 LDR	X7, [X3]

  (1991) 0x4b2684 CMP	X7, X5

  (1991) 0x4b2688 B.GT	4b2650

(1975) 0x4b268c ADD	X4, X4, #1

(1975) 0x4b2690 ADD	X30, X30, #8

(1975) 0x4b2694 ADD	X3, X3, #8

(1975) 0x4b2698 ADD	X0, X0, #8

(1975) 0x4b269c CMP	X4, X17

(1975) 0x4b26a0 B.NE	4b18d0

0x4b26a4 B	4b1de4

(1975) 0x4b26a8 CMP	X7, X12

(1975) 0x4b26ac B.GE	4b2b60

(1975) 0x4b26b0 SUB	X13, X12, #1

(1975) 0x4b26b4 SUB	X5, X12, #2

(1975) 0x4b26b8 SUB	X18, X13, X6

(1975) 0x4b26bc CNTW	X16, ALL

(1975) 0x4b26c0 SUB	X27, X5, X6

(1975) 0x4b26c4 ADD	X5, X16, #5

(1975) 0x4b26c8 STR	X18, [SP, #128]

(1975) 0x4b26cc CMP	X27, X5

(1975) 0x4b26d0 B.CC	4b2b80

(1975) 0x4b26d4 ADD	X16, X15, #8

(1975) 0x4b26d8 SUB	X27, X18, X8

(1975) 0x4b26dc DUP	Z23.D, #0

(1975) 0x4b26e0 ADD	X16, X22, X16

(1975) 0x4b26e4 MOVZ	X5, #0

(1975) 0x4b26e8 ORR	Z18.D, Z23.D, Z23.D

(1975) 0x4b26ec ADDVL	X18, X16, #1

(1975) 0x4b26f0 ORR	Z5.D, Z23.D, Z23.D

(1975) 0x4b26f4 ORR	Z7.D, Z23.D, Z23.D

(1975) 0x4b26f8 HINT	#0

(1975) 0x4b26fc HINT	#0

  (1983) 0x4b2700 LD1D	{Z6.D}, P7/Z, [X16, X5,LSL #3]

  (1983) 0x4b2704 LD1D	{Z17.D}, P7/Z, [X18, X5,LSL #3]

  (1983) 0x4b2708 ADD	X5, X5, X8

  (1983) 0x4b270c FMAXNM	Z7.D, P7/M, Z7.D, Z6.D

  (1983) 0x4b2710 FADD	Z18.D, Z6.D, Z18.D

  (1983) 0x4b2714 FMAXNM	Z5.D, P7/M, Z5.D, Z17.D

  (1983) 0x4b2718 FADD	Z23.D, Z23.D, Z17.D

  (1983) 0x4b271c CMP	X27, X5

  (1983) 0x4b2720 B.CS	4b2700

(1975) 0x4b2724 LDR	X27, [SP, #128]

(1975) 0x4b2728 FADD	Z1.D, Z18.D, Z23.D

(1975) 0x4b272c FMAXNM	Z7.D, P7/M, Z7.D, Z5.D

(1975) 0x4b2730 CMP	X27, X5

(1975) 0x4b2734 B.EQ	4b2768

(1975) 0x4b2738 ADD	X7, X7, X5

(1975) 0x4b273c MOVZ	X16, #0

(1975) 0x4b2740 ADD	X18, X22, X7,LSL #3

(1975) 0x4b2744 ADD	X5, X6, X5

(1975) 0x4b2748 SUB	X13, X13, X5

(1975) 0x4b274c WHILELO	P1.D, XZR, X13

  (1982) 0x4b2750 LD1D	{Z20.D}, P1/Z, [X18, X16,LSL #3]

  (1982) 0x4b2754 ADD	X16, X16, X11

  (1982) 0x4b2758 FMAXNM	Z7.D, P1/M, Z7.D, Z20.D

  (1982) 0x4b275c FADD	Z1.D, P1/M, Z1.D, Z20.D

  (1982) 0x4b2760 WHILELO	P1.D, X16, X13

  (1982) 0x4b2764 B.NE	4b2750

(1975) 0x4b2768 LDR	X27, [X3]

(1975) 0x4b276c FADDV	D19, P7, Z1.D

(1975) 0x4b2770 FMAXNMV	D22, P7, Z7.D

(1975) 0x4b2774 FADD	D21, D4, D19

(1975) 0x4b2778 LDR	X7, [X30]

(1975) 0x4b277c CMP	X7, X27

(1975) 0x4b2780 B.GE	4b2b78

(1975) 0x4b2784 SUB	X5, X27, #1

(1975) 0x4b2788 CNTW	X13, ALL

(1975) 0x4b278c DUP	Z29.D, Z22.D[0]

(1975) 0x4b2790 SUB	X16, X27, X7

(1975) 0x4b2794 SUB	X18, X5, X7

(1975) 0x4b2798 ADD	X27, X13, #5

(1975) 0x4b279c CMP	X18, X27

(1975) 0x4b27a0 B.CC	4b2b90

(1975) 0x4b27a4 ADD	X13, X23, X7,LSL #3

(1975) 0x4b27a8 MOVZ	X5, #0

(1975) 0x4b27ac SUB	X27, X16, X8

(1975) 0x4b27b0 DUP	Z28.D, #0

(1975) 0x4b27b4 ORR	Z24.D, Z29.D, Z29.D

(1975) 0x4b27b8 ORR	Z26.D, Z28.D, Z28.D

(1975) 0x4b27bc ADDVL	X18, X13, #1

  (1981) 0x4b27c0 LD1D	{Z25.D}, P7/Z, [X13, X5,LSL #3]

  (1981) 0x4b27c4 LD1D	{Z27.D}, P7/Z, [X18, X5,LSL #3]

  (1981) 0x4b27c8 ADD	X5, X5, X8

  (1981) 0x4b27cc FMAXNM	Z29.D, P7/M, Z29.D, Z25.D

  (1981) 0x4b27d0 FADD	Z26.D, Z26.D, Z25.D

  (1981) 0x4b27d4 FMAXNM	Z24.D, P7/M, Z24.D, Z27.D

  (1981) 0x4b27d8 FADD	Z28.D, Z28.D, Z27.D

  (1981) 0x4b27dc CMP	X5, X27

  (1981) 0x4b27e0 B.LS	4b27c0

(1975) 0x4b27e4 FADD	Z31.D, Z26.D, Z28.D

(1975) 0x4b27e8 FMAXNM	Z29.D, P7/M, Z29.D, Z24.D

(1975) 0x4b27ec CMP	X16, X5

(1975) 0x4b27f0 B.EQ	4b2820

(1975) 0x4b27f4 ADD	X7, X7, X5

(1975) 0x4b27f8 MOVZ	X13, #0

(1975) 0x4b27fc ADD	X27, X23, X7,LSL #3

(1975) 0x4b2800 SUB	X5, X16, X5

(1975) 0x4b2804 WHILELO	P2.D, XZR, X5

  (1974) 0x4b2808 LD1D	{Z30.D}, P2/Z, [X27, X13,LSL #3]

  (1974) 0x4b280c ADD	X13, X13, X11

  (1974) 0x4b2810 FMAXNM	Z29.D, P2/M, Z29.D, Z30.D

  (1974) 0x4b2814 FADD	Z31.D, P2/M, Z31.D, Z30.D

  (1974) 0x4b2818 WHILELO	P2.D, X13, X5

  (1974) 0x4b281c B.NE	4b2808

(1975) 0x4b2820 FADDV	D3, P7, Z31.D

(1975) 0x4b2824 FADD	D21, D21, D3

(1975) 0x4b2828 FMAXNMV	D22, P7, Z29.D

(1975) 0x4b282c FABS	D0, D4

(1975) 0x4b2830 STR	X14, [X19, X15]

(1975) 0x4b2834 FABS	D16, D21

(1975) 0x4b2838 LDR	W15, [SP, #112]

(1975) 0x4b283c ADD	X2, X2, X16

(1975) 0x4b2840 SUB	X6, X12, X6

(1975) 0x4b2844 LDP	X16, X18, [X0, #1016]

(1975) 0x4b2848 SUB	X12, X6, #1

(1975) 0x4b284c ADD	X1, X1, X12

(1975) 0x4b2850 FMUL	D2, D0, D15

(1975) 0x4b2854 CMP	W15, #0

(1975) 0x4b2858 ADD	X5, X16, #1

(1975) 0x4b285c FCCMPE	D16, D2, #4, #1

(1975) 0x4b2860 B.GT	4b2928

(1975) 0x4b2864 FMUL	D1, D14, D22

(1975) 0x4b2868 CMP	X5, X18

(1975) 0x4b286c B.GE	4b2894

  (1980) 0x4b2870 LDR	D7, [X22, X5,LSL #3]

  (1980) 0x4b2874 FCMPE	D1, D7

  (1980) 0x4b2878 B.GE	4b290c

  (1980) 0x4b287c LDR	X18, [X25, X5,LSL #3]

  (1980) 0x4b2880 STR	X18, [X19, X5,LSL #3]

  (1980) 0x4b2884 ADD	X5, X5, #1

  (1980) 0x4b2888 LDR	X7, [X0]

  (1980) 0x4b288c CMP	X7, X5

  (1980) 0x4b2890 B.GT	4b2870

(1975) 0x4b2894 LDR	X13, [X3]

(1975) 0x4b2898 LDR	X5, [X30]

(1975) 0x4b289c CMP	X5, X13

(1975) 0x4b28a0 B.GE	4b1dcc

(1975) 0x4b28a4 FMUL	D5, D14, D22

  (1978) 0x4b28a8 LDR	D6, [X23, X5,LSL #3]

  (1978) 0x4b28ac FCMPE	D5, D6

  (1978) 0x4b28b0 B.GE	4b28d8

  (1979) 0x4b28b4 LDR	X15, [X24, X5,LSL #3]

  (1979) 0x4b28b8 STR	X15, [X20, X5,LSL #3]

  (1979) 0x4b28bc ADD	X5, X5, #1

  (1979) 0x4b28c0 LDR	X6, [X3]

  (1979) 0x4b28c4 CMP	X6, X5

  (1979) 0x4b28c8 B.LE	4b1dcc

  (1979) 0x4b28cc LDR	D6, [X23, X5,LSL #3]

  (1979) 0x4b28d0 FCMPE	D5, D6

  (1979) 0x4b28d4 B.MI	4b28b4

  (1978) 0x4b28d8 STR	X14, [X20, X5,LSL #3]

  (1978) 0x4b28dc ADD	X5, X5, #1

  (1978) 0x4b28e0 SUB	X2, X2, #1

  (1978) 0x4b28e4 LDR	X12, [X3]

  (1978) 0x4b28e8 CMP	X12, X5

  (1978) 0x4b28ec B.GT	4b28a8

(1975) 0x4b28f0 ADD	X4, X4, #1

(1975) 0x4b28f4 ADD	X30, X30, #8

(1975) 0x4b28f8 ADD	X3, X3, #8

(1975) 0x4b28fc ADD	X0, X0, #8

(1975) 0x4b2900 CMP	X4, X17

(1975) 0x4b2904 B.NE	4b18d0

0x4b2908 B	4b1de4

  (1980) 0x4b290c STR	X14, [X19, X5,LSL #3]

  (1980) 0x4b2910 ADD	X5, X5, #1

  (1980) 0x4b2914 SUB	X1, X1, #1

  (1980) 0x4b2918 LDR	X27, [X0]

  (1980) 0x4b291c CMP	X5, X27

  (1980) 0x4b2920 B.LT	4b2870

(1975) 0x4b2924 B	4b2894

(1975) 0x4b2928 MOVN	X27, #0

(1975) 0x4b292c CMP	X5, X18

(1975) 0x4b2930 B.GE	4b295c

(1975) 0x4b2934 HINT	#0

(1975) 0x4b2938 HINT	#0

(1975) 0x4b293c HINT	#0

  (1977) 0x4b2940 STR	X27, [X19, X5,LSL #3]

  (1977) 0x4b2944 ADD	X5, X5, #1

  (1977) 0x4b2948 LDR	X18, [X0]

  (1977) 0x4b294c CMP	X18, X5

  (1977) 0x4b2950 B.GT	4b2940

(1975) 0x4b2954 LDUR	X15, [X0, #504]

(1975) 0x4b2958 ADD	X5, X15, #1

(1975) 0x4b295c LDR	X13, [X3]

(1975) 0x4b2960 SUB	X18, X18, X5

(1975) 0x4b2964 MOVN	X16, #0

(1975) 0x4b2968 SUB	X1, X1, X18

(1975) 0x4b296c LDR	X12, [X30]

(1975) 0x4b2970 CMP	X12, X13

(1975) 0x4b2974 B.GE	4b2998

(1975) 0x4b2978 HINT	#0

(1975) 0x4b297c HINT	#0

  (1976) 0x4b2980 STR	X16, [X20, X12,LSL #3]

  (1976) 0x4b2984 ADD	X12, X12, #1

  (1976) 0x4b2988 LDR	X13, [X3]

  (1976) 0x4b298c CMP	X13, X12

  (1976) 0x4b2990 B.GT	4b2980

(1975) 0x4b2994 LDR	X12, [X30]

(1975) 0x4b2998 SUB	X6, X13, X12

(1975) 0x4b299c ADD	X4, X4, #1

(1975) 0x4b29a0 SUB	X2, X2, X6

(1975) 0x4b29a4 ADD	X30, X30, #8

(1975) 0x4b29a8 ADD	X3, X3, #8

(1975) 0x4b29ac ADD	X0, X0, #8

(1975) 0x4b29b0 CMP	X4, X17

(1975) 0x4b29b4 B.NE	4b18d0

0x4b29b8 B	4b1de4

(1975) 0x4b29bc LDR	D3, [X23, X5,LSL #3]

(1975) 0x4b29c0 FMAXNM	D25, D25, D3

(1975) 0x4b29c4 FADD	D2, D2, D3

(1975) 0x4b29c8 B	4b2480

(1975) 0x4b29cc LDR	D5, [X22, X5,LSL #3]

(1975) 0x4b29d0 FMAXNM	D25, D25, D5

(1975) 0x4b29d4 FADD	D2, D2, D5

(1975) 0x4b29d8 B	4b2284

(1975) 0x4b29dc LDR	D7, [X23, X5,LSL #3]

(1975) 0x4b29e0 FMINNM	D18, D18, D7

(1975) 0x4b29e4 FADD	D0, D0, D7

(1975) 0x4b29e8 B	4b1b9c

(1975) 0x4b29ec LDR	D19, [X22, X5,LSL #3]

(1975) 0x4b29f0 FMINNM	D18, D18, D19

(1975) 0x4b29f4 FADD	D0, D0, D19

(1975) 0x4b29f8 B	4b19a0

(1975) 0x4b29fc LDR	D30, [X23, X5,LSL #3]

(1975) 0x4b2a00 FMAXNM	D25, D25, D30

(1975) 0x4b2a04 FADD	D2, D2, D30

(1975) 0x4b2a08 B	4b246c

(1975) 0x4b2a0c LDR	D7, [X22, X5,LSL #3]

(1975) 0x4b2a10 FMAXNM	D25, D25, D7

(1975) 0x4b2a14 FADD	D2, D2, D7

(1975) 0x4b2a18 B	4b2270

(1975) 0x4b2a1c LDR	D1, [X23, X5,LSL #3]

(1975) 0x4b2a20 FMINNM	D18, D18, D1

(1975) 0x4b2a24 FADD	D0, D0, D1

(1975) 0x4b2a28 B	4b1b88

(1975) 0x4b2a2c LDR	D20, [X22, X5,LSL #3]

(1975) 0x4b2a30 FMINNM	D18, D18, D20

(1975) 0x4b2a34 FADD	D0, D0, D20

(1975) 0x4b2a38 B	4b198c

(1975) 0x4b2a3c LDR	D1, [X22, X5,LSL #3]

(1975) 0x4b2a40 FMAXNM	D25, D25, D1

(1975) 0x4b2a44 FADD	D2, D2, D1

(1975) 0x4b2a48 B	4b225c

(1975) 0x4b2a4c LDR	D28, [X23, X5,LSL #3]

(1975) 0x4b2a50 FMAXNM	D25, D25, D28

(1975) 0x4b2a54 FADD	D2, D2, D28

(1975) 0x4b2a58 B	4b2458

(1975) 0x4b2a5c LDR	D26, [X23, X5,LSL #3]

(1975) 0x4b2a60 FMAXNM	D25, D25, D26

(1975) 0x4b2a64 FADD	D2, D2, D26

(1975) 0x4b2a68 B	4b2444

(1975) 0x4b2a6c LDR	D16, [X22, X5,LSL #3]

(1975) 0x4b2a70 FMAXNM	D25, D25, D16

(1975) 0x4b2a74 FADD	D2, D2, D16

(1975) 0x4b2a78 B	4b2248

(1975) 0x4b2a7c LDR	D2, [X23, X5,LSL #3]

(1975) 0x4b2a80 FMINNM	D18, D18, D2

(1975) 0x4b2a84 FADD	D0, D0, D2

(1975) 0x4b2a88 B	4b1b74

(1975) 0x4b2a8c LDR	D23, [X22, X5,LSL #3]

(1975) 0x4b2a90 FMINNM	D18, D18, D23

(1975) 0x4b2a94 FADD	D0, D0, D23

(1975) 0x4b2a98 B	4b1978

(1975) 0x4b2a9c FMOV	D0, D4

(1975) 0x4b2aa0 MOVI	D18, #0

(1975) 0x4b2aa4 B	4b1afc

(1975) 0x4b2aa8 LDR	X27, [X3]

(1975) 0x4b2aac FMOV	D20, D4

(1975) 0x4b2ab0 MOVI	D23, #0

(1975) 0x4b2ab4 LDR	X7, [X30]

(1975) 0x4b2ab8 CMP	X7, X27

(1975) 0x4b2abc B.LT	4b2014

(1975) 0x4b2ac0 SUB	X16, X27, X7

(1975) 0x4b2ac4 B	4b20c4

(1975) 0x4b2ac8 FMOV	D2, D4

(1975) 0x4b2acc MOVI	D25, #0

(1975) 0x4b2ad0 B	4b23b8

(1975) 0x4b2ad4 LDR	D27, [X23, X5,LSL #3]

(1975) 0x4b2ad8 ADD	X5, X5, #1

(1975) 0x4b2adc FMAXNM	D25, D25, D27

(1975) 0x4b2ae0 FADD	D2, D2, D27

(1975) 0x4b2ae4 B	4b2434

(1975) 0x4b2ae8 LDR	D0, [X22, X5,LSL #3]

(1975) 0x4b2aec ADD	X5, X5, #1

(1975) 0x4b2af0 FMAXNM	D25, D25, D0

(1975) 0x4b2af4 FADD	D2, D2, D0

(1975) 0x4b2af8 B	4b2238

(1975) 0x4b2afc LDR	D17, [X22, X7,LSL #3]

(1975) 0x4b2b00 ADD	X5, X7, #1

(1975) 0x4b2b04 FMINNM	D18, D18, D17

(1975) 0x4b2b08 FADD	D0, D4, D17

(1975) 0x4b2b0c B	4b1968

(1975) 0x4b2b10 LDR	D16, [X23, X13,LSL #3]

(1975) 0x4b2b14 ADD	X5, X13, #1

(1975) 0x4b2b18 FMINNM	D18, D18, D16

(1975) 0x4b2b1c FADD	D0, D0, D16

(1975) 0x4b2b20 B	4b1b64

(1975) 0x4b2b24 LDR	D18, [X22, X7,LSL #3]

(1975) 0x4b2b28 FMAXNM	D25, D25, D18

(1975) 0x4b2b2c FADD	D2, D4, D18

(1975) 0x4b2b30 B	4b2220

(1975) 0x4b2b34 LDR	D24, [X23, X13,LSL #3]

(1975) 0x4b2b38 FMAXNM	D25, D25, D24

(1975) 0x4b2b3c FADD	D2, D2, D24

(1975) 0x4b2b40 B	4b241c

(1975) 0x4b2b44 DUP	Z0.D, #0

(1975) 0x4b2b48 MOVZ	X5, #0

(1975) 0x4b2b4c ORR	Z16.D, Z0.D, Z0.D

(1975) 0x4b2b50 B	4b1fc8

(1975) 0x4b2b54 MOVZ	X5, #0

(1975) 0x4b2b58 DUP	Z21.D, #0

(1975) 0x4b2b5c B	4b2084

(1975) 0x4b2b60 LDR	X27, [X3]

(1975) 0x4b2b64 FMOV	D21, D4

(1975) 0x4b2b68 MOVI	D22, #0

(1975) 0x4b2b6c LDR	X7, [X30]

(1975) 0x4b2b70 CMP	X7, X27

(1975) 0x4b2b74 B.LT	4b2784

(1975) 0x4b2b78 SUB	X16, X27, X7

(1975) 0x4b2b7c B	4b282c

(1975) 0x4b2b80 DUP	Z1.D, #0

(1975) 0x4b2b84 MOVZ	X5, #0

(1975) 0x4b2b88 ORR	Z7.D, Z1.D, Z1.D

(1975) 0x4b2b8c B	4b2738

(1975) 0x4b2b90 MOVZ	X5, #0

(1975) 0x4b2b94 DUP	Z31.D, #0

(1975) 0x4b2b98 B	4b27f4

0x4b2b9c HINT	#0

Coverage (%)	Name	Source Location	Module
►98.70+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.30+	GOMP_parallel		libgomp.so.1.0.0
○	hypre_BoomerAMGCreateS	par_strength.c:246	exec
○	hypre_BoomerAMGSetup	par_amg_setup.c:581	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_1

Source file and lines	par_strength.c:246-513
Module	exec

The function is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:246-283,289-302,309-355,363-369,376-382,392-398,405-411,424-445,451-472,480,492-513.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.17 to 2.83 cycles (6.76x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 36% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 19.17 to 8.81 cycles (2.17x speedup).

Details

3% of VPU instructions are used in vector version (process two or more data elements in vector registers):

6% of VPU loads are used in vector version.
4% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is storing 3 bytes.

General properties

nb instructions	95
nb uops	94
loop length	380
used w registers	2
used x registers	29
used b registers	0
used h registers	0
used s registers	1
used d registers	3
used q registers	0
used v registers	0
used z registers	0
nb stack references	45

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.75 cycles
front end	11.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	4.50	4.50	7.25	7.25	7.25	7.25	1.00	1.00	0.50	0.50	19.17	18.83	19.00	11.00	11.00
cycles	4.50	4.50	7.25	7.25	7.25	7.25	1.00	1.00	0.50	0.50	19.17	18.83	19.00	11.00	11.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.75
Dispatch	19.17
Overall L1	19.17

Vectorization ratios

INT

all	4%
load	6%
store	4%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	3%
load	6%
store	4%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	37%
load	42%
store	39%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
other	30%

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	36%
load	42%
store	39%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	29%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.17 cycles. At this rate:

0% of peak store performance is reached (0.16 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 4b17e4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #800]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X3, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
LDR X6, [X3, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X15, X22, [X3, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X9, X28, [X3, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ORR X2, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDP X4, X21, [X3, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X12, X23, [X3, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X24, [X3, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X10, [X3, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP D14, D15, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
STP X15, X6, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X10, X9, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X3, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X12, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X4, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X5, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDP X27, X26, [X3, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X7, X19, [X3, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X20, [X3, #152]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 52c0c0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X4, X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
STP XZR, XZR, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X4, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
LDR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X10, X9, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X15, X5, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
B.GE 4b1df8 <hypre_BoomerAMGCreateS._omp_fn.1+0x614>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X8, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
FMOV D3, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
ADD X30, X7, X4,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X11, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X17, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
ADD X3, X7, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X15, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
MOVZ X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X27, X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CNTW X8, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
MOVN X14, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
FCMPE D15, D3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
CNTD X11, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
CSINC W13, WZR, WZR, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDP X10, X28, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
STR W13, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR X5, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X7, X15, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X27, X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X7, X15, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
STP X1, X2, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X1, X9, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X2, SP, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X3, X10, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X9, X10, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 52d268 <hypre_prefix_sum_pair>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X1, X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
CMP X1, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4b1ecc <hypre_BoomerAMGCreateS._omp_fn.1+0x6e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X9, X14, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X22, X11, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ADD X24, X17, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X21, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X21, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #224	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_1

Source file and lines	par_strength.c:246-513
Module	exec

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 19.17 to 2.83 cycles (6.76x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

3% of VPU instructions are used in vector version (process two or more data elements in vector registers):

6% of VPU loads are used in vector version.
4% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_GetSimpleThreadPartition: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:250
hypre_prefix_sum_pair: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c:480

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is storing 3 bytes.

General properties

nb instructions	95
nb uops	94
loop length	380
used w registers	2
used x registers	29
used b registers	0
used h registers	0
used s registers	1
used d registers	3
used q registers	0
used v registers	0
used z registers	0
nb stack references	45

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.75 cycles
front end	11.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	4.50	4.50	7.25	7.25	7.25	7.25	1.00	1.00	0.50	0.50	19.17	18.83	19.00	11.00	11.00
cycles	4.50	4.50	7.25	7.25	7.25	7.25	1.00	1.00	0.50	0.50	19.17	18.83	19.00	11.00	11.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	11.75
Dispatch	19.17
Overall L1	19.17

Vectorization ratios

INT

all	4%
load	6%
store	4%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	3%
load	6%
store	4%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	37%
load	42%
store	39%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
other	30%

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	36%
load	42%
store	39%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	29%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 19.17 cycles. At this rate:

0% of peak store performance is reached (0.16 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 4b17e4

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #800]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X3, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, SP, #200	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
LDR X6, [X3, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X15, X22, [X3, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X9, X28, [X3, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ORR X2, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDP X4, X21, [X3, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X12, X23, [X3, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X24, [X3, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X10, [X3, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP D14, D15, [X3]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
STP X15, X6, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X10, X9, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [X3, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X12, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X4, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X5, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDP X27, X26, [X3, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X7, X19, [X3, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X20, [X3, #152]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X7, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 52c0c0 <hypre_GetSimpleThreadPartition>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X4, X0, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
STP XZR, XZR, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CMP X4, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
LDR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X10, X9, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X15, X5, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
B.GE 4b1df8 <hypre_BoomerAMGCreateS._omp_fn.1+0x614>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X8, X4, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
FMOV D3, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
ADD X30, X7, X4,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X11, X8, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X17, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
ADD X3, X7, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X0, X15, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
MOVZ X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X27, X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CNTW X8, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
MOVN X14, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
FCMPE D15, D3	1	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
CNTD X11, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
CSINC W13, WZR, WZR, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDP X10, X28, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
STR W13, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR X5, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X7, X15, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X10, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X27, X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X7, X15, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
STP X1, X2, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X5, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X1, X9, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X2, SP, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, SP, #208	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X4, [SP, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X3, X10, X5,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X9, X10, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X7, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 52d268 <hypre_prefix_sum_pair>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X1, X8, [SP, #192]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
CMP X1, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4b1ecc <hypre_BoomerAMGCreateS._omp_fn.1+0x6e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X9, X14, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X22, X11, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ADD X24, X17, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X21, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X23, X21, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDP D14, D15, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #224	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4b1de4 <hypre_BoomerAMGCreateS._omp_fn.1+0x600>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A

Name	Coverage (%)	Time (s)
▼hypre_BoomerAMGCreateS._omp_fn.1–	0.21	0.09
▼Loop 1975 - par_strength.c:253-472 - exec–	0.05	0.02
○Loop 1987 - par_strength.c:451-460 - exec	0.06	0.02
○Loop 1990 - par_strength.c:324-327 - exec	0.02	0.01
○Loop 1989 - par_strength.c:324-327 - exec	0.01	0.01
○Loop 1998 - par_strength.c:289-294 - exec	0.00	0.00
○Loop 1983 - par_strength.c:311-314 - exec	0.00	0.00
○Loop 1976 - par_strength.c:351-353 - exec	0.00	0.00
○Loop 1997 - par_strength.c:297-302 - exec	0.00	0.00
○Loop 1982 - par_strength.c:311-314 - exec	0.00	0.00
○Loop 1995 - par_strength.c:405-411 - exec	0.00	0.00
○Loop 1980 - par_strength.c:424-433 - exec	0.00	0.00
○Loop 1981 - par_strength.c:316-319 - exec	0.00	0.00
○Loop 1993 - par_strength.c:278-283 - exec	0.00	0.00
○Loop 1994 - par_strength.c:270-275 - exec	0.00	0.00
○Loop 1988 - par_strength.c:329-332 - exec	0.00	0.00
○Loop 1985 - par_strength.c:463-468 - exec	0.00	0.00
○Loop 1978 - par_strength.c:436-441 - exec	0.00	0.00
○Loop 1974 - par_strength.c:316-319 - exec	0.00	0.00
○Loop 1992 - par_strength.c:363-369 - exec	0.00	0.00
○Loop 1996 - par_strength.c:392-398 - exec	0.00	0.00
○Loop 1991 - par_strength.c:376-382 - exec	0.00	0.00
○Loop 1984 - par_strength.c:329-332 - exec	0.00	0.00
○Loop 1986 - par_strength.c:463-472 - exec	0.00	0.00
○Loop 1979 - par_strength.c:436-445 - exec	0.00	0.00
○Loop 1977 - par_strength.c:345-347 - exec	0.00	0.00
▼Loop 1970 - par_strength.c:492-513 - exec–	0.01	0.01
○Loop 1973 - par_strength.c:498-503 - exec	0.07	0.02
▼Loop 1971 - par_strength.c:508-513 - exec–	0.00	0.00
○Loop 1972 - par_strength.c:508-513 - exec	0.00	0.00

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