| Function: hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1 | Module: exec | Source: IJMatrix_parcsr.c:3240-3500 [...] | Coverage (incl. loops): 0.17% | (excl. loops): 0.00% |
|---|
| Function: hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1 | Module: exec | Source: IJMatrix_parcsr.c:3240-3500 [...] | Coverage (incl. loops): 0.17% | (excl. loops): 0.00% |
|---|
/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c: 3240 - 3500 |
-------------------------------------------------------------------------------- |
3240: #pragma omp parallel |
[...] |
3256: num_threads = hypre_NumActiveThreads(); |
3257: my_thread_num = hypre_GetThreadNum(); |
3258: |
3259: len = nrows/num_threads; |
3260: rest = nrows - len*num_threads; |
3261: |
3262: if (my_thread_num < rest) |
3263: { |
3264: ns = my_thread_num*(len+1); |
3265: ne = (my_thread_num+1)*(len+1); |
3266: } |
3267: else |
3268: { |
3269: ns = my_thread_num*len+rest; |
3270: ne = (my_thread_num+1)*len+rest; |
3271: } |
3272: |
3273: value_start[my_thread_num] = 0; |
3274: for (ii=ns; ii < ne; ii++) |
3275: value_start[my_thread_num] += ncols[ii]; |
3276: |
3277: #ifdef HYPRE_USING_OPENMP |
3278: #pragma omp barrier |
3279: #endif |
3280: if (my_thread_num == 0) |
3281: { |
3282: for (i=0; i < max_num_threads; i++) |
3283: value_start[i+1] += value_start[i]; |
3284: } |
3285: #ifdef HYPRE_USING_OPENMP |
3286: #pragma omp barrier |
3287: #endif |
3288: indx = 0; |
3289: if (my_thread_num) |
3290: indx = value_start[my_thread_num-1]; |
3291: for (ii=ns; ii < ne; ii++) |
3292: { |
3293: row = rows[ii]; |
3294: n = ncols[ii]; |
3295: /* processor owns the row */ |
3296: if (row >= row_partitioning[pstart] && row < row_partitioning[pstart+1]) |
3297: { |
3298: row_local = row - row_partitioning[pstart]; |
3299: /* compute local row number */ |
3300: if (need_aux) |
3301: { |
3302: local_j = aux_j[row_local]; |
3303: local_data = aux_data[row_local]; |
3304: space = row_space[row_local]; |
3305: old_size = row_length[row_local]; |
3306: size = space - old_size; |
3307: if (size < n) |
3308: { |
3309: size = n - size; |
3310: tmp_j = hypre_CTAlloc(HYPRE_Int,size); |
3311: tmp_data = hypre_CTAlloc(HYPRE_Complex,size); |
3312: } |
3313: tmp_indx = 0; |
3314: not_found = 1; |
3315: size = old_size; |
3316: for (i=0; i < n; i++) |
3317: { |
3318: for (j=0; j < old_size; j++) |
3319: { |
3320: if (local_j[j] == cols[indx]) |
3321: { |
3322: local_data[j] = values[indx]; |
[...] |
3329: if (size < space) |
3330: { |
3331: local_j[size] = cols[indx]; |
3332: local_data[size++] = values[indx]; |
3333: } |
3334: else |
3335: { |
3336: tmp_j[tmp_indx] = cols[indx]; |
3337: tmp_data[tmp_indx++] = values[indx]; |
3338: } |
3339: } |
3340: not_found = 1; |
3341: indx++; |
3342: } |
3343: |
3344: row_length[row_local] = size+tmp_indx; |
3345: |
3346: if (tmp_indx) |
3347: { |
3348: aux_j[row_local] = hypre_TReAlloc(aux_j[row_local],HYPRE_Int, |
3349: size+tmp_indx); |
3350: aux_data[row_local] = hypre_TReAlloc(aux_data[row_local], |
3351: HYPRE_Complex,size+tmp_indx); |
3352: row_space[row_local] = size+tmp_indx; |
3353: local_j = aux_j[row_local]; |
[...] |
3359: for (i=0; i < tmp_indx; i++) |
3360: { |
3361: local_j[cnt] = tmp_j[i]; |
3362: local_data[cnt++] = tmp_data[i]; |
3363: } |
3364: |
3365: if (tmp_j) |
3366: { |
3367: hypre_TFree(tmp_j); |
3368: hypre_TFree(tmp_data); |
[...] |
3376: offd_indx = hypre_AuxParCSRMatrixIndxOffd(aux_matrix)[row_local]; |
3377: diag_indx = hypre_AuxParCSRMatrixIndxDiag(aux_matrix)[row_local]; |
3378: cnt_diag = diag_indx; |
3379: cnt_offd = offd_indx; |
3380: diag_space = diag_i[row_local+1]; |
3381: offd_space = offd_i[row_local+1]; |
3382: not_found = 1; |
3383: for (i=0; i < n; i++) |
3384: { |
3385: if (cols[indx] < col_0 || cols[indx] > col_n) |
3386: /* insert into offd */ |
3387: { |
3388: for (j=offd_i[row_local]; j < offd_indx; j++) |
3389: { |
3390: if (offd_j[j] == cols[indx]) |
3391: { |
3392: offd_data[j] = values[indx]; |
3393: not_found = 0; |
3394: break; |
3395: } |
3396: } |
3397: if (not_found) |
3398: { |
3399: if (cnt_offd < offd_space) |
3400: { |
3401: offd_j[cnt_offd] = cols[indx]; |
3402: offd_data[cnt_offd++] = values[indx]; |
3403: } |
3404: else |
3405: { |
3406: hypre_error(HYPRE_ERROR_GENERIC); |
3407: #ifdef HYPRE_USING_OPENMP |
3408: #pragma omp atomic |
3409: #endif |
3410: error_flag++; |
3411: if (print_level) |
3412: hypre_printf("Error in row %d ! Too many elements!\n", |
[...] |
3422: for (j=diag_i[row_local]; j < diag_indx; j++) |
3423: { |
3424: if (diag_j[j] == cols[indx]) |
3425: { |
3426: diag_data[j] = values[indx]; |
3427: not_found = 0; |
3428: break; |
3429: } |
3430: } |
3431: if (not_found) |
3432: { |
3433: if (cnt_diag < diag_space) |
3434: { |
3435: diag_j[cnt_diag] = cols[indx]; |
3436: diag_data[cnt_diag++] = values[indx]; |
3437: } |
3438: else |
3439: { |
3440: hypre_error(HYPRE_ERROR_GENERIC); |
3441: #ifdef HYPRE_USING_OPENMP |
3442: #pragma omp atomic |
3443: #endif |
3444: error_flag++; |
3445: if (print_level) |
3446: hypre_printf("Error in row %d ! Too many elements !\n", |
[...] |
3454: indx++; |
3455: } |
3456: |
3457: hypre_AuxParCSRMatrixIndxDiag(aux_matrix)[row_local] = cnt_diag; |
3458: hypre_AuxParCSRMatrixIndxOffd(aux_matrix)[row_local] = cnt_offd; |
[...] |
3466: indx += n; |
3467: if (aux_matrix) |
3468: { |
3469: col_indx = 0; |
3470: for (i=0; i < off_proc_i_indx; i=i+2) |
3471: { |
3472: row_len = off_proc_i[i+1]; |
3473: if (off_proc_i[i] == row) |
3474: { |
3475: for (j=0; j < n; j++) |
3476: { |
3477: cnt1 = col_indx; |
3478: for (k=0; k < row_len; k++) |
3479: { |
3480: if (off_proc_j[cnt1] == cols[j]) |
3481: { |
3482: off_proc_j[cnt1++] = -1; |
3483: /*cancel_indx++;*/ |
3484: offproc_cnt[my_thread_num]++; |
[...] |
3500: col_indx += row_len; |
0x505980 STP X29, X30, [SP, #688]! |
0x505984 ORR X12, XZR, X0 |
0x505988 ADD X29, SP, #0 |
0x50598c STP X19, X20, [SP, #16] |
0x505990 STP X21, X22, [SP, #32] |
0x505994 STP X23, X24, [SP, #48] |
0x505998 STP X25, X26, [SP, #64] |
0x50599c STP X27, X28, [SP, #80] |
0x5059a0 LDR X11, [X12, #40] |
0x5059a4 LDP X28, X5, [X12, #24] |
0x5059a8 LDP X8, X7, [X12, #56] |
0x5059ac LDP X22, X0, [X0] |
0x5059b0 STP X7, X8, [SP, #240] |
0x5059b4 STP X11, X5, [SP, #256] |
0x5059b8 LDR X1, [X12, #16] |
0x5059bc STR X12, [SP, #104] |
0x5059c0 LDR X2, [X12, #48] |
0x5059c4 STR X0, [SP, #120] |
0x5059c8 LDR X3, [X12, #72] |
0x5059cc STR X1, [SP, #128] |
0x5059d0 LDR X4, [X12, #80] |
0x5059d4 STR X2, [SP, #136] |
0x5059d8 LDR X6, [X12, #88] |
0x5059dc STR X3, [SP, #208] |
0x5059e0 LDR X9, [X12, #96] |
0x5059e4 STR X4, [SP, #200] |
0x5059e8 STR X6, [SP, #184] |
0x5059ec STR X9, [SP, #216] |
0x5059f0 LDR X10, [X12, #104] |
0x5059f4 LDP X18, X23, [X12, #136] |
0x5059f8 LDP X21, X20, [X12, #192] |
0x5059fc STR X18, [SP, #144] |
0x505a00 LDR X13, [X12, #112] |
0x505a04 STR X10, [SP, #176] |
0x505a08 LDR X14, [X12, #128] |
0x505a0c LDR X15, [X12, #152] |
0x505a10 STR X13, [SP, #192] |
0x505a14 LDR X16, [X12, #160] |
0x505a18 STR X14, [SP, #232] |
0x505a1c LDR X17, [X12, #168] |
0x505a20 STR X15, [SP, #224] |
0x505a24 LDR X19, [X12, #176] |
0x505a28 STR X16, [SP, #112] |
0x505a2c LDR X25, [X12, #184] |
0x505a30 STR X17, [SP, #152] |
0x505a34 LDR X27, [X12, #208] |
0x505a38 STR X19, [SP, #160] |
0x505a3c LDR X24, [X12, #120] |
0x505a40 STR X25, [SP, #168] |
0x505a44 LDR X26, [X12, #216] |
0x505a48 STR X27, [SP, #280] |
0x505a4c BL 52c080 |
0x505a50 ORR X19, XZR, X0 |
0x505a54 BL 52c0a0 |
0x505a58 SDIV X1, X22, X19 |
0x505a5c LDR X12, [SP, #104] |
0x505a60 ORR X25, XZR, X0 |
0x505a64 LDP X7, X8, [SP, #240] |
0x505a68 LDP X11, X5, [SP, #256] |
0x505a6c LDR X6, [SP, #144] |
0x505a70 MSUB X22, X1, X19, X22 |
0x505a74 CMP X0, X22 |
0x505a78 B.GE 5067d0 |
0x505a7c MADD X27, X1, X0, X0 |
0x505a80 ADD X2, X1, #1 |
0x505a84 UBFM X19, X25, #61, #60 |
0x505a88 ADD X22, X21, X25,LSL #3 |
0x505a8c STR XZR, [X21, X19] |
0x505a90 ADD X3, X2, X27 |
0x505a94 STR X3, [SP, #104] |
0x505a98 CMP X27, X3 |
0x505a9c B.GE 5067f8 |
0x505aa0 LDR X4, [SP, #120] |
0x505aa4 MOVZ X0, #0 |
0x505aa8 ADD X1, X4, X27,LSL #3 |
0x505aac ADD X9, X4, X3,LSL #3 |
0x505ab0 SUB X10, X9, X1 |
0x505ab4 SUB X18, X10, #8 |
0x505ab8 UBFM X13, X18, #3, #63 |
0x505abc ADD X14, X13, #1 |
0x505ac0 ANDS X15, X14, #0x7 |
0x505ac4 B.EQ 505b48 |
0x505ac8 CMP X15, #1 |
0x505acc B.EQ 505b34 |
0x505ad0 CMP X15, #2 |
0x505ad4 B.EQ 505b28 |
0x505ad8 CMP X15, #3 |
0x505adc B.EQ 505b1c |
0x505ae0 CMP X15, #4 |
0x505ae4 B.EQ 505b10 |
0x505ae8 CMP X15, #5 |
0x505aec B.EQ 505b04 |
0x505af0 CMP X15, #6 |
0x505af4 B.NE 506958 |
0x505af8 LDR X16, [X1], #8 |
0x505afc ADD X0, X0, X16 |
0x505b00 STR X0, [X22] |
0x505b04 LDR X17, [X1], #8 |
0x505b08 ADD X0, X0, X17 |
0x505b0c STR X0, [X22] |
0x505b10 LDR X30, [X1], #8 |
0x505b14 ADD X0, X0, X30 |
0x505b18 STR X0, [X22] |
0x505b1c LDR X2, [X1], #8 |
0x505b20 ADD X0, X0, X2 |
0x505b24 STR X0, [X22] |
0x505b28 LDR X3, [X1], #8 |
0x505b2c ADD X0, X0, X3 |
0x505b30 STR X0, [X22] |
0x505b34 LDR X4, [X1], #8 |
0x505b38 ADD X0, X0, X4 |
0x505b3c STR X0, [X22] |
0x505b40 CMP X1, X9 |
0x505b44 B.EQ 505bb8 |
(3032) 0x505b48 ORR X10, XZR, X1 |
(3032) 0x505b4c ADD X1, X1, #64 |
(3032) 0x505b50 LDR X18, [X10], #8 |
(3032) 0x505b54 ADD X13, X0, X18 |
(3032) 0x505b58 STR X13, [X22] |
(3032) 0x505b5c LDUR X14, [X1, #456] |
(3032) 0x505b60 ADD X15, X13, X14 |
(3032) 0x505b64 STR X15, [X22] |
(3032) 0x505b68 LDR X16, [X10, #8] |
(3032) 0x505b6c ADD X17, X15, X16 |
(3032) 0x505b70 STR X17, [X22] |
(3032) 0x505b74 LDUR X30, [X1, #472] |
(3032) 0x505b78 ADD X3, X17, X30 |
(3032) 0x505b7c STR X3, [X22] |
(3032) 0x505b80 LDUR X2, [X1, #480] |
(3032) 0x505b84 ADD X4, X3, X2 |
(3032) 0x505b88 STR X4, [X22] |
(3032) 0x505b8c LDUR X0, [X1, #488] |
(3032) 0x505b90 ADD X10, X4, X0 |
(3032) 0x505b94 STR X10, [X22] |
(3032) 0x505b98 LDUR X18, [X1, #496] |
(3032) 0x505b9c ADD X13, X10, X18 |
(3032) 0x505ba0 STR X13, [X22] |
(3032) 0x505ba4 LDUR X14, [X1, #504] |
(3032) 0x505ba8 ADD X0, X13, X14 |
(3032) 0x505bac STR X0, [X22] |
(3032) 0x505bb0 CMP X1, X9 |
(3032) 0x505bb4 B.NE 505b48 |
0x505bb8 STR X6, [SP, #144] |
0x505bbc STP X7, X8, [SP, #240] |
0x505bc0 STP X11, X5, [SP, #256] |
0x505bc4 STR X12, [SP, #272] |
0x505bc8 BL 410120 |
0x505bcc LDR X9, [SP, #144] |
0x505bd0 LDP X7, X8, [SP, #240] |
0x505bd4 LDP X11, X5, [SP, #256] |
0x505bd8 LDR X12, [SP, #272] |
0x505bdc CBNZ X25, 5068b8 |
0x505be0 CMP X26, #0 |
0x505be4 B.LE 505cfc |
0x505be8 ORR X0, XZR, X21 |
0x505bec UBFM X21, X26, #61, #60 |
0x505bf0 LDR X18, [X0], #8 |
0x505bf4 SUB X25, X21, #8 |
0x505bf8 UBFM X6, X25, #3, #63 |
0x505bfc ADD X22, X6, #1 |
0x505c00 ANDS X15, X22, #0x7 |
0x505c04 ADD X26, X0, X26,LSL #3 |
0x505c08 B.EQ 505c98 |
0x505c0c CMP X15, #1 |
0x505c10 B.EQ 505c84 |
0x505c14 CMP X15, #2 |
0x505c18 B.EQ 505c78 |
0x505c1c CMP X15, #3 |
0x505c20 B.EQ 505c6c |
0x505c24 CMP X15, #4 |
0x505c28 B.EQ 505c60 |
0x505c2c CMP X15, #5 |
0x505c30 B.EQ 505c54 |
0x505c34 CMP X15, #6 |
0x505c38 B.EQ 505c48 |
0x505c3c LDR X16, [X0] |
0x505c40 ADD X18, X18, X16 |
0x505c44 STR X18, [X0], #8 |
0x505c48 LDR X17, [X0] |
0x505c4c ADD X18, X18, X17 |
0x505c50 STR X18, [X0], #8 |
0x505c54 LDR X30, [X0] |
0x505c58 ADD X18, X18, X30 |
0x505c5c STR X18, [X0], #8 |
0x505c60 LDR X3, [X0] |
0x505c64 ADD X18, X18, X3 |
0x505c68 STR X18, [X0], #8 |
0x505c6c LDR X2, [X0] |
0x505c70 ADD X18, X18, X2 |
0x505c74 STR X18, [X0], #8 |
0x505c78 LDR X4, [X0] |
0x505c7c ADD X18, X18, X4 |
0x505c80 STR X18, [X0], #8 |
0x505c84 LDR X10, [X0] |
0x505c88 ADD X18, X18, X10 |
0x505c8c STR X18, [X0], #8 |
0x505c90 CMP X0, X26 |
0x505c94 B.EQ 505cfc |
(3045) 0x505c98 LDR X14, [X0] |
(3045) 0x505c9c ORR X13, XZR, X0 |
(3045) 0x505ca0 ADD X1, X18, X14 |
(3045) 0x505ca4 STR X1, [X13], #8 |
(3045) 0x505ca8 LDR X21, [X0, #8] |
(3045) 0x505cac ADD X25, X1, X21 |
(3045) 0x505cb0 STR X25, [X0, #8] |
(3045) 0x505cb4 LDR X6, [X13, #8] |
(3045) 0x505cb8 ADD X22, X25, X6 |
(3045) 0x505cbc STR X22, [X13, #8] |
(3045) 0x505cc0 LDP X15, X16, [X0, #24] |
(3045) 0x505cc4 ADD X0, X0, #64 |
(3045) 0x505cc8 LDUR X17, [X0, #488] |
(3045) 0x505ccc ADD X30, X22, X15 |
(3045) 0x505cd0 LDUR X2, [X0, #496] |
(3045) 0x505cd4 ADD X3, X30, X16 |
(3045) 0x505cd8 LDUR X18, [X0, #504] |
(3045) 0x505cdc ADD X4, X3, X17 |
(3045) 0x505ce0 STP X30, X3, [X0, #984] |
(3045) 0x505ce4 ADD X10, X4, X2 |
(3045) 0x505ce8 ADD X18, X10, X18 |
(3045) 0x505cec STP X4, X10, [X0, #1000] |
(3045) 0x505cf0 STUR X18, [X0, #504] |
(3045) 0x505cf4 CMP X0, X26 |
(3045) 0x505cf8 B.NE 505c98 |
0x505cfc STR X9, [SP, #144] |
0x505d00 MOVZ X21, #0 |
0x505d04 STP X7, X8, [SP, #240] |
0x505d08 STP X11, X5, [SP, #256] |
0x505d0c STR X12, [SP, #272] |
0x505d10 BL 410120 |
0x505d14 LDR X18, [SP, #144] |
0x505d18 LDP X7, X8, [SP, #240] |
0x505d1c LDP X11, X5, [SP, #256] |
0x505d20 LDR X12, [SP, #272] |
0x505d24 LDR X9, [SP, #104] |
0x505d28 CMP X27, X9 |
0x505d2c B.GE 505fb8 |
0x505d30 LDR X1, [SP, #152] |
0x505d34 MOVZ X9, #0 |
0x505d38 MOVN X22, #0 |
0x505d3c ORR X26, XZR, X5 |
0x505d40 LDR X13, [SP, #112] |
0x505d44 LDR X14, [SP, #136] |
0x505d48 SUB X25, X1, #1 |
0x505d4c LDR X17, [SP, #160] |
0x505d50 UBFM X15, X25, #1, #63 |
0x505d54 LDR X5, [SP, #224] |
0x505d58 ADD X6, X14, X13,LSL #3 |
0x505d5c STR X12, [SP, #224] |
0x505d60 ADD X30, X17, #16 |
0x505d64 ADD X3, X6, #8 |
0x505d68 ADD X4, X30, X15,LSL #4 |
0x505d6c STP X6, X3, [SP, #136] |
(3033) 0x505d70 LDR X0, [SP, #136] |
(3033) 0x505d74 LDP X2, X10, [SP, #120] |
(3033) 0x505d78 LDR X13, [X0] |
(3033) 0x505d7c LDR X25, [X10, X27,LSL #3] |
(3033) 0x505d80 LDR X12, [X2, X27,LSL #3] |
(3033) 0x505d84 CMP X25, X13 |
(3033) 0x505d88 B.LT 506150 |
(3033) 0x505d8c LDR X14, [SP, #144] |
(3033) 0x505d90 LDR X1, [X14] |
(3033) 0x505d94 CMP X25, X1 |
(3033) 0x505d98 B.GE 506150 |
(3033) 0x505d9c LDR X16, [SP, #176] |
(3033) 0x505da0 SUB X30, X25, X13 |
(3033) 0x505da4 UBFM X13, X30, #61, #60 |
(3033) 0x505da8 CBNZ X16, 506490 |
(3033) 0x505dac LDP X1, X0, [X11, #56] |
(3033) 0x505db0 ADD X17, X13, #8 |
(3033) 0x505db4 ADD X16, X21, X12 |
(3033) 0x505db8 LDR X10, [SP, #192] |
(3033) 0x505dbc ADD X6, X0, X13 |
(3033) 0x505dc0 LDR X2, [X0, X13] |
(3033) 0x505dc4 ADD X0, X1, X13 |
(3033) 0x505dc8 LDR X3, [X1, X13] |
(3033) 0x505dcc LDR X30, [X18, X17] |
(3033) 0x505dd0 ORR X14, XZR, X2 |
(3033) 0x505dd4 LDR X17, [X10, X17] |
(3033) 0x505dd8 ORR X15, XZR, X3 |
(3033) 0x505ddc CMP X12, #0 |
(3033) 0x505de0 B.LE 506bbc |
(3033) 0x505de4 LDR X10, [SP, #192] |
(3033) 0x505de8 STP X25, X6, [SP, #240] |
(3033) 0x505dec ORR X6, XZR, X0 |
(3033) 0x505df0 LDR X12, [SP, #232] |
(3033) 0x505df4 HINT #0 |
(3033) 0x505df8 HINT #0 |
(3033) 0x505dfc HINT #0 |
(3042) 0x505e00 LDR X1, [X28, X21,LSL #3] |
(3042) 0x505e04 CMP X8, X1 |
(3042) 0x505e08 CCMP X7, X1, #1, #13 |
(3042) 0x505e0c B.GE 505fd4 |
(3042) 0x505e10 LDR X0, [X18, X13] |
(3042) 0x505e14 CMP X2, X0 |
(3042) 0x505e18 B.LE 505f6c |
(3042) 0x505e1c SUB X25, X2, X0 |
(3042) 0x505e20 ANDS X25, X25, #0x7 |
(3042) 0x505e24 B.EQ 505ed0 |
(3042) 0x505e28 CMP X25, #1 |
(3042) 0x505e2c B.EQ 505eb8 |
(3042) 0x505e30 CMP X25, #2 |
(3042) 0x505e34 B.EQ 505ea8 |
(3042) 0x505e38 CMP X25, #3 |
(3042) 0x505e3c B.EQ 505e98 |
(3042) 0x505e40 CMP X25, #4 |
(3042) 0x505e44 B.EQ 505e88 |
(3042) 0x505e48 CMP X25, #5 |
(3042) 0x505e4c B.EQ 505e78 |
(3042) 0x505e50 CMP X25, #6 |
(3042) 0x505e54 B.EQ 505e68 |
(3042) 0x505e58 LDR X25, [X23, X0,LSL #3] |
(3042) 0x505e5c CMP X1, X25 |
(3042) 0x505e60 B.EQ 506470 |
(3042) 0x505e64 ADD X0, X0, #1 |
(3042) 0x505e68 LDR X25, [X23, X0,LSL #3] |
(3042) 0x505e6c CMP X1, X25 |
(3042) 0x505e70 B.EQ 506470 |
(3042) 0x505e74 ADD X0, X0, #1 |
(3042) 0x505e78 LDR X25, [X23, X0,LSL #3] |
(3042) 0x505e7c CMP X1, X25 |
(3042) 0x505e80 B.EQ 506470 |
(3042) 0x505e84 ADD X0, X0, #1 |
(3042) 0x505e88 LDR X25, [X23, X0,LSL #3] |
(3042) 0x505e8c CMP X1, X25 |
(3042) 0x505e90 B.EQ 506470 |
(3042) 0x505e94 ADD X0, X0, #1 |
(3042) 0x505e98 LDR X25, [X23, X0,LSL #3] |
(3042) 0x505e9c CMP X1, X25 |
(3042) 0x505ea0 B.EQ 506470 |
(3042) 0x505ea4 ADD X0, X0, #1 |
(3042) 0x505ea8 LDR X25, [X23, X0,LSL #3] |
(3042) 0x505eac CMP X1, X25 |
(3042) 0x505eb0 B.EQ 506470 |
(3042) 0x505eb4 ADD X0, X0, #1 |
(3042) 0x505eb8 LDR X25, [X23, X0,LSL #3] |
(3042) 0x505ebc CMP X1, X25 |
(3042) 0x505ec0 B.EQ 506470 |
(3042) 0x505ec4 ADD X0, X0, #1 |
(3042) 0x505ec8 CMP X2, X0 |
(3042) 0x505ecc B.EQ 505f6c |
(3042) 0x505ed0 ORR X25, XZR, X9 |
(3042) 0x505ed4 STR X3, [SP, #112] |
(3044) 0x505ed8 LDR X9, [X23, X0,LSL #3] |
(3044) 0x505edc CMP X1, X9 |
(3044) 0x505ee0 B.EQ 506468 |
(3044) 0x505ee4 ADD X0, X0, #1 |
(3044) 0x505ee8 LDR X3, [X23, X0,LSL #3] |
(3044) 0x505eec ORR X9, XZR, X0 |
(3044) 0x505ef0 CMP X1, X3 |
(3044) 0x505ef4 B.EQ 506468 |
(3044) 0x505ef8 ADD X0, X0, #1 |
(3044) 0x505efc LDR X3, [X23, X0,LSL #3] |
(3044) 0x505f00 CMP X1, X3 |
(3044) 0x505f04 B.EQ 506468 |
(3044) 0x505f08 ADD X0, X9, #2 |
(3044) 0x505f0c LDR X3, [X23, X0,LSL #3] |
(3044) 0x505f10 CMP X1, X3 |
(3044) 0x505f14 B.EQ 506468 |
(3044) 0x505f18 ADD X0, X9, #3 |
(3044) 0x505f1c LDR X3, [X23, X0,LSL #3] |
(3044) 0x505f20 CMP X1, X3 |
(3044) 0x505f24 B.EQ 506468 |
(3044) 0x505f28 ADD X0, X9, #4 |
(3044) 0x505f2c LDR X3, [X23, X0,LSL #3] |
(3044) 0x505f30 CMP X1, X3 |
(3044) 0x505f34 B.EQ 506468 |
(3044) 0x505f38 ADD X0, X9, #5 |
(3044) 0x505f3c LDR X3, [X23, X0,LSL #3] |
(3044) 0x505f40 CMP X1, X3 |
(3044) 0x505f44 B.EQ 506468 |
(3044) 0x505f48 ADD X0, X9, #6 |
(3044) 0x505f4c LDR X3, [X23, X0,LSL #3] |
(3044) 0x505f50 CMP X1, X3 |
(3044) 0x505f54 B.EQ 506468 |
(3044) 0x505f58 ADD X0, X9, #7 |
(3044) 0x505f5c CMP X2, X0 |
(3044) 0x505f60 B.NE 505ed8 |
(3042) 0x505f64 LDR X3, [SP, #112] |
(3042) 0x505f68 ORR X9, XZR, X25 |
(3042) 0x505f6c CMP X30, X14 |
(3042) 0x505f70 B.LE 5068e4 |
(3042) 0x505f74 LDR D1, [X26, X21,LSL #3] |
(3042) 0x505f78 UBFM X25, X14, #61, #60 |
(3042) 0x505f7c ADD X14, X14, #1 |
(3042) 0x505f80 STR X1, [X23, X25] |
(3042) 0x505f84 STR D1, [X5, X25] |
(3042) 0x505f88 ADD X21, X21, #1 |
(3042) 0x505f8c CMP X21, X16 |
(3042) 0x505f90 B.NE 505e00 |
(3033) 0x505f94 ORR X0, XZR, X6 |
(3033) 0x505f98 LDR X6, [SP, #248] |
(3033) 0x505f9c STR X15, [X0] |
(3033) 0x505fa0 ADD X27, X27, #1 |
(3033) 0x505fa4 ORR X21, XZR, X16 |
(3033) 0x505fa8 LDR X12, [SP, #104] |
(3033) 0x505fac STR X14, [X6] |
(3033) 0x505fb0 CMP X12, X27 |
(3033) 0x505fb4 B.NE 505d70 |
0x505fb8 LDP X19, X20, [SP, #16] |
0x505fbc LDP X21, X22, [SP, #32] |
0x505fc0 LDP X23, X24, [SP, #48] |
0x505fc4 LDP X25, X26, [SP, #64] |
0x505fc8 LDP X27, X28, [SP, #80] |
0x505fcc LDP X29, X30, [SP], #336 |
0x505fd0 RET |
(3042) 0x505fd4 LDR X0, [X10, X13] |
(3042) 0x505fd8 CMP X3, X0 |
(3042) 0x505fdc B.LE 506130 |
(3042) 0x505fe0 SUB X25, X3, X0 |
(3042) 0x505fe4 ANDS X25, X25, #0x7 |
(3042) 0x505fe8 B.EQ 506094 |
(3042) 0x505fec CMP X25, #1 |
(3042) 0x505ff0 B.EQ 50607c |
(3042) 0x505ff4 CMP X25, #2 |
(3042) 0x505ff8 B.EQ 50606c |
(3042) 0x505ffc CMP X25, #3 |
(3042) 0x506000 B.EQ 50605c |
(3042) 0x506004 CMP X25, #4 |
(3042) 0x506008 B.EQ 50604c |
(3042) 0x50600c CMP X25, #5 |
(3042) 0x506010 B.EQ 50603c |
(3042) 0x506014 CMP X25, #6 |
(3042) 0x506018 B.EQ 50602c |
(3042) 0x50601c LDR X25, [X24, X0,LSL #3] |
(3042) 0x506020 CMP X1, X25 |
(3042) 0x506024 B.EQ 506484 |
(3042) 0x506028 ADD X0, X0, #1 |
(3042) 0x50602c LDR X25, [X24, X0,LSL #3] |
(3042) 0x506030 CMP X1, X25 |
(3042) 0x506034 B.EQ 506484 |
(3042) 0x506038 ADD X0, X0, #1 |
(3042) 0x50603c LDR X25, [X24, X0,LSL #3] |
(3042) 0x506040 CMP X1, X25 |
(3042) 0x506044 B.EQ 506484 |
(3042) 0x506048 ADD X0, X0, #1 |
(3042) 0x50604c LDR X25, [X24, X0,LSL #3] |
(3042) 0x506050 CMP X1, X25 |
(3042) 0x506054 B.EQ 506484 |
(3042) 0x506058 ADD X0, X0, #1 |
(3042) 0x50605c LDR X25, [X24, X0,LSL #3] |
(3042) 0x506060 CMP X1, X25 |
(3042) 0x506064 B.EQ 506484 |
(3042) 0x506068 ADD X0, X0, #1 |
(3042) 0x50606c LDR X25, [X24, X0,LSL #3] |
(3042) 0x506070 CMP X1, X25 |
(3042) 0x506074 B.EQ 506484 |
(3042) 0x506078 ADD X0, X0, #1 |
(3042) 0x50607c LDR X25, [X24, X0,LSL #3] |
(3042) 0x506080 CMP X1, X25 |
(3042) 0x506084 B.EQ 506484 |
(3042) 0x506088 ADD X0, X0, #1 |
(3042) 0x50608c CMP X3, X0 |
(3042) 0x506090 B.EQ 506130 |
(3042) 0x506094 ORR X25, XZR, X9 |
(3042) 0x506098 STR X2, [SP, #112] |
(3043) 0x50609c LDR X9, [X24, X0,LSL #3] |
(3043) 0x5060a0 CMP X1, X9 |
(3043) 0x5060a4 B.EQ 50647c |
(3043) 0x5060a8 ADD X0, X0, #1 |
(3043) 0x5060ac LDR X2, [X24, X0,LSL #3] |
(3043) 0x5060b0 ORR X9, XZR, X0 |
(3043) 0x5060b4 CMP X1, X2 |
(3043) 0x5060b8 B.EQ 50647c |
(3043) 0x5060bc ADD X0, X0, #1 |
(3043) 0x5060c0 LDR X2, [X24, X0,LSL #3] |
(3043) 0x5060c4 CMP X1, X2 |
(3043) 0x5060c8 B.EQ 50647c |
(3043) 0x5060cc ADD X0, X9, #2 |
(3043) 0x5060d0 LDR X2, [X24, X0,LSL #3] |
(3043) 0x5060d4 CMP X1, X2 |
(3043) 0x5060d8 B.EQ 50647c |
(3043) 0x5060dc ADD X0, X9, #3 |
(3043) 0x5060e0 LDR X2, [X24, X0,LSL #3] |
(3043) 0x5060e4 CMP X1, X2 |
(3043) 0x5060e8 B.EQ 50647c |
(3043) 0x5060ec ADD X0, X9, #4 |
(3043) 0x5060f0 LDR X2, [X24, X0,LSL #3] |
(3043) 0x5060f4 CMP X1, X2 |
(3043) 0x5060f8 B.EQ 50647c |
(3043) 0x5060fc ADD X0, X9, #5 |
(3043) 0x506100 LDR X2, [X24, X0,LSL #3] |
(3043) 0x506104 CMP X1, X2 |
(3043) 0x506108 B.EQ 50647c |
(3043) 0x50610c ADD X0, X9, #6 |
(3043) 0x506110 LDR X2, [X24, X0,LSL #3] |
(3043) 0x506114 CMP X1, X2 |
(3043) 0x506118 B.EQ 50647c |
(3043) 0x50611c ADD X0, X9, #7 |
(3043) 0x506120 CMP X3, X0 |
(3043) 0x506124 B.NE 50609c |
(3042) 0x506128 LDR X2, [SP, #112] |
(3042) 0x50612c ORR X9, XZR, X25 |
(3042) 0x506130 CMP X17, X15 |
(3042) 0x506134 B.LE 5069b8 |
(3042) 0x506138 LDR D31, [X26, X21,LSL #3] |
(3042) 0x50613c UBFM X0, X15, #61, #60 |
(3042) 0x506140 ADD X15, X15, #1 |
(3042) 0x506144 STR X1, [X24, X0] |
(3042) 0x506148 STR D31, [X12, X0] |
(3042) 0x50614c B 505f88 |
(3033) 0x506150 CBNZ X11, 506184 |
(3033) 0x506154 ADD X21, X21, X12 |
(3033) 0x506158 LDR X12, [SP, #104] |
(3033) 0x50615c ADD X27, X27, #1 |
(3033) 0x506160 CMP X12, X27 |
(3033) 0x506164 B.NE 505d70 |
0x506168 LDP X19, X20, [SP, #16] |
0x50616c LDP X21, X22, [SP, #32] |
0x506170 LDP X23, X24, [SP, #48] |
0x506174 LDP X25, X26, [SP, #64] |
0x506178 LDP X27, X28, [SP, #80] |
0x50617c LDP X29, X30, [SP], #336 |
0x506180 RET |
(3033) 0x506184 LDR X6, [SP, #152] |
(3033) 0x506188 CMP X6, #0 |
(3033) 0x50618c B.LE 506154 |
(3033) 0x506190 LDP X2, X0, [SP, #160] |
(3033) 0x506194 ADD X15, X28, X12,LSL #3 |
(3033) 0x506198 MOVZ X14, #0 |
(3033) 0x50619c B 5061ac |
(3034) 0x5061a0 ADD X2, X2, #16 |
(3034) 0x5061a4 CMP X2, X4 |
(3034) 0x5061a8 B.EQ 506154 |
(3034) 0x5061ac LDP X17, X30, [X2] |
(3034) 0x5061b0 ORR X16, XZR, X14 |
(3034) 0x5061b4 ADD X14, X14, X30 |
(3034) 0x5061b8 CMP X25, X17 |
(3034) 0x5061bc B.NE 5061a0 |
(3034) 0x5061c0 CMP X12, #0 |
(3034) 0x5061c4 B.LE 5061a0 |
(3034) 0x5061c8 CMP X30, #0 |
(3034) 0x5061cc B.LE 5061a0 |
(3034) 0x5061d0 ADD X10, X0, X16,LSL #3 |
(3034) 0x5061d4 ORR X3, XZR, X28 |
(3034) 0x5061d8 ADD X6, X0, X14,LSL #3 |
(3034) 0x5061dc HINT #0 |
(3036) 0x5061e0 SUB X16, X6, X10 |
(3036) 0x5061e4 ORR X1, XZR, X10 |
(3036) 0x5061e8 SUB X17, X16, #8 |
(3036) 0x5061ec UBFM X30, X17, #3, #63 |
(3036) 0x5061f0 ADD X13, X30, #1 |
(3036) 0x5061f4 ANDS X16, X13, #0x7 |
(3036) 0x5061f8 B.EQ 5062d0 |
(3036) 0x5061fc CMP X16, #1 |
(3036) 0x506200 B.EQ 5062a4 |
(3036) 0x506204 CMP X16, #2 |
(3036) 0x506208 B.EQ 506290 |
(3036) 0x50620c CMP X16, #3 |
(3036) 0x506210 B.EQ 50627c |
(3036) 0x506214 CMP X16, #4 |
(3036) 0x506218 B.EQ 506268 |
(3036) 0x50621c CMP X16, #5 |
(3036) 0x506220 B.EQ 506254 |
(3036) 0x506224 CMP X16, #6 |
(3036) 0x506228 B.EQ 506240 |
(3036) 0x50622c LDR X17, [X3] |
(3036) 0x506230 LDR X1, [X10] |
(3036) 0x506234 CMP X17, X1 |
(3036) 0x506238 B.EQ 506454 |
(3036) 0x50623c ADD X1, X10, #8 |
(3036) 0x506240 LDR X17, [X1] |
(3036) 0x506244 LDR X16, [X3] |
(3036) 0x506248 CMP X16, X17 |
(3036) 0x50624c B.EQ 506440 |
(3036) 0x506250 ADD X1, X1, #8 |
(3036) 0x506254 LDR X17, [X1] |
(3036) 0x506258 LDR X16, [X3] |
(3036) 0x50625c CMP X16, X17 |
(3036) 0x506260 B.EQ 50642c |
(3036) 0x506264 ADD X1, X1, #8 |
(3036) 0x506268 LDR X17, [X1] |
(3036) 0x50626c LDR X16, [X3] |
(3036) 0x506270 CMP X16, X17 |
(3036) 0x506274 B.EQ 506418 |
(3036) 0x506278 ADD X1, X1, #8 |
(3036) 0x50627c LDR X17, [X1] |
(3036) 0x506280 LDR X16, [X3] |
(3036) 0x506284 CMP X16, X17 |
(3036) 0x506288 B.EQ 506404 |
(3036) 0x50628c ADD X1, X1, #8 |
(3036) 0x506290 LDR X17, [X1] |
(3036) 0x506294 LDR X16, [X3] |
(3036) 0x506298 CMP X16, X17 |
(3036) 0x50629c B.EQ 5063f0 |
(3036) 0x5062a0 ADD X1, X1, #8 |
(3036) 0x5062a4 LDR X17, [X1] |
(3036) 0x5062a8 LDR X16, [X3] |
(3036) 0x5062ac CMP X16, X17 |
(3036) 0x5062b0 B.NE 5062c4 |
(3036) 0x5062b4 STR X22, [X1] |
(3036) 0x5062b8 LDR X30, [X20, X19] |
(3036) 0x5062bc ADD X13, X30, #1 |
(3036) 0x5062c0 STR X13, [X20, X19] |
(3036) 0x5062c4 ADD X1, X1, #8 |
(3036) 0x5062c8 CMP X6, X1 |
(3036) 0x5062cc B.EQ 5063e0 |
(3035) 0x5062d0 LDR X17, [X1] |
(3035) 0x5062d4 LDR X16, [X3] |
(3035) 0x5062d8 CMP X16, X17 |
(3035) 0x5062dc B.NE 5062f0 |
(3035) 0x5062e0 STR X22, [X1] |
(3035) 0x5062e4 LDR X30, [X20, X19] |
(3035) 0x5062e8 ADD X13, X30, #1 |
(3035) 0x5062ec STR X13, [X20, X19] |
(3035) 0x5062f0 LDR X17, [X3] |
(3035) 0x5062f4 ADD X30, X1, #8 |
(3035) 0x5062f8 LDR X16, [X1, #8] |
(3035) 0x5062fc CMP X17, X16 |
(3035) 0x506300 B.NE 506314 |
(3035) 0x506304 STR X22, [X1, #8] |
(3035) 0x506308 LDR X1, [X20, X19] |
(3035) 0x50630c ADD X13, X1, #1 |
(3035) 0x506310 STR X13, [X20, X19] |
(3035) 0x506314 LDR X16, [X3] |
(3035) 0x506318 LDR X17, [X30, #8] |
(3035) 0x50631c CMP X16, X17 |
(3035) 0x506320 B.NE 506334 |
(3035) 0x506324 STR X22, [X30, #8] |
(3035) 0x506328 LDR X1, [X20, X19] |
(3035) 0x50632c ADD X13, X1, #1 |
(3035) 0x506330 STR X13, [X20, X19] |
(3035) 0x506334 LDR X16, [X3] |
(3035) 0x506338 LDR X17, [X30, #16] |
(3035) 0x50633c CMP X16, X17 |
(3035) 0x506340 B.NE 506354 |
(3035) 0x506344 STR X22, [X30, #16] |
(3035) 0x506348 LDR X1, [X20, X19] |
(3035) 0x50634c ADD X13, X1, #1 |
(3035) 0x506350 STR X13, [X20, X19] |
(3035) 0x506354 LDR X16, [X3] |
(3035) 0x506358 LDR X17, [X30, #24] |
(3035) 0x50635c CMP X16, X17 |
(3035) 0x506360 B.NE 506374 |
(3035) 0x506364 STR X22, [X30, #24] |
(3035) 0x506368 LDR X1, [X20, X19] |
(3035) 0x50636c ADD X13, X1, #1 |
(3035) 0x506370 STR X13, [X20, X19] |
(3035) 0x506374 LDR X16, [X3] |
(3035) 0x506378 LDR X17, [X30, #32] |
(3035) 0x50637c CMP X16, X17 |
(3035) 0x506380 B.NE 506394 |
(3035) 0x506384 STR X22, [X30, #32] |
(3035) 0x506388 LDR X1, [X20, X19] |
(3035) 0x50638c ADD X13, X1, #1 |
(3035) 0x506390 STR X13, [X20, X19] |
(3035) 0x506394 LDR X16, [X3] |
(3035) 0x506398 LDR X17, [X30, #40] |
(3035) 0x50639c CMP X16, X17 |
(3035) 0x5063a0 B.NE 5063b4 |
(3035) 0x5063a4 STR X22, [X30, #40] |
(3035) 0x5063a8 LDR X1, [X20, X19] |
(3035) 0x5063ac ADD X13, X1, #1 |
(3035) 0x5063b0 STR X13, [X20, X19] |
(3035) 0x5063b4 LDR X16, [X3] |
(3035) 0x5063b8 LDR X17, [X30, #48] |
(3035) 0x5063bc CMP X16, X17 |
(3035) 0x5063c0 B.NE 5063d4 |
(3035) 0x5063c4 STR X22, [X30, #48] |
(3035) 0x5063c8 LDR X1, [X20, X19] |
(3035) 0x5063cc ADD X13, X1, #1 |
(3035) 0x5063d0 STR X13, [X20, X19] |
(3035) 0x5063d4 ADD X1, X30, #56 |
(3035) 0x5063d8 CMP X6, X1 |
(3035) 0x5063dc B.NE 5062d0 |
(3036) 0x5063e0 ADD X3, X3, #8 |
(3036) 0x5063e4 CMP X3, X15 |
(3036) 0x5063e8 B.NE 5061e0 |
(3034) 0x5063ec B 5061a0 |
(3036) 0x5063f0 STR X22, [X1] |
(3036) 0x5063f4 LDR X30, [X20, X19] |
(3036) 0x5063f8 ADD X13, X30, #1 |
(3036) 0x5063fc STR X13, [X20, X19] |
(3036) 0x506400 B 5062a0 |
(3036) 0x506404 STR X22, [X1] |
(3036) 0x506408 LDR X30, [X20, X19] |
(3036) 0x50640c ADD X13, X30, #1 |
(3036) 0x506410 STR X13, [X20, X19] |
(3036) 0x506414 B 50628c |
(3036) 0x506418 STR X22, [X1] |
(3036) 0x50641c LDR X30, [X20, X19] |
(3036) 0x506420 ADD X13, X30, #1 |
(3036) 0x506424 STR X13, [X20, X19] |
(3036) 0x506428 B 506278 |
(3036) 0x50642c STR X22, [X1] |
(3036) 0x506430 LDR X30, [X20, X19] |
(3036) 0x506434 ADD X13, X30, #1 |
(3036) 0x506438 STR X13, [X20, X19] |
(3036) 0x50643c B 506264 |
(3036) 0x506440 STR X22, [X1] |
(3036) 0x506444 LDR X30, [X20, X19] |
(3036) 0x506448 ADD X13, X30, #1 |
(3036) 0x50644c STR X13, [X20, X19] |
(3036) 0x506450 B 506250 |
(3036) 0x506454 STR X22, [X10] |
(3036) 0x506458 LDR X30, [X20, X19] |
(3036) 0x50645c ADD X13, X30, #1 |
(3036) 0x506460 STR X13, [X20, X19] |
(3036) 0x506464 B 50623c |
(3042) 0x506468 LDR X3, [SP, #112] |
(3042) 0x50646c ORR X9, XZR, X25 |
(3042) 0x506470 LDR D2, [X26, X21,LSL #3] |
(3042) 0x506474 STR D2, [X5, X0,LSL #3] |
(3042) 0x506478 B 505f88 |
(3042) 0x50647c LDR X2, [SP, #112] |
(3042) 0x506480 ORR X9, XZR, X25 |
(3042) 0x506484 LDR D0, [X26, X21,LSL #3] |
(3042) 0x506488 STR D0, [X12, X0,LSL #3] |
(3042) 0x50648c B 505f88 |
(3033) 0x506490 LDR X3, [SP, #184] |
(3033) 0x506494 LDR X15, [SP, #216] |
(3033) 0x506498 LDR X1, [SP, #200] |
(3033) 0x50649c LDR X2, [X3, X13] |
(3033) 0x5064a0 LDR X10, [X15, X13] |
(3033) 0x5064a4 LDR X14, [SP, #208] |
(3033) 0x5064a8 LDR X6, [X1, X13] |
(3033) 0x5064ac SUB X16, X10, X2 |
(3033) 0x5064b0 LDR X25, [X14, X13] |
(3033) 0x5064b4 CMP X12, X16 |
(3033) 0x5064b8 B.GT 506844 |
(3033) 0x5064bc CMP X12, #0 |
(3033) 0x5064c0 B.LE 506158 |
(3033) 0x5064c4 MOVZ X14, #0 |
(3033) 0x5064c8 MOVZ X3, #0 |
(3033) 0x5064cc ADD X12, X21, X12 |
(3033) 0x5064d0 ORR X15, XZR, X2 |
(3033) 0x5064d4 HINT #0 |
(3033) 0x5064d8 HINT #0 |
(3033) 0x5064dc HINT #0 |
(3037) 0x5064e0 LDR X1, [X28, X21,LSL #3] |
(3037) 0x5064e4 CMP X2, #0 |
(3037) 0x5064e8 B.LE 50662c |
(3040) 0x5064ec ANDS X17, X2, #0x7 |
(3040) 0x5064f0 MOVZ X0, #0 |
(3040) 0x5064f4 B.EQ 5065a0 |
(3040) 0x5064f8 CMP X17, #1 |
(3040) 0x5064fc B.EQ 506588 |
(3040) 0x506500 CMP X17, #2 |
(3040) 0x506504 B.EQ 506578 |
(3040) 0x506508 CMP X17, #3 |
(3040) 0x50650c B.EQ 506568 |
(3040) 0x506510 CMP X17, #4 |
(3040) 0x506514 B.EQ 506558 |
(3040) 0x506518 CMP X17, #5 |
(3040) 0x50651c B.EQ 506548 |
(3040) 0x506520 CMP X17, #6 |
(3040) 0x506524 B.EQ 506538 |
(3040) 0x506528 LDR X30, [X25] |
(3040) 0x50652c CMP X1, X30 |
(3040) 0x506530 B.EQ 5066a8 |
(3040) 0x506534 MOVZ X0, #1 |
(3040) 0x506538 LDR X16, [X25, X0,LSL #3] |
(3040) 0x50653c CMP X1, X16 |
(3040) 0x506540 B.EQ 5066a8 |
(3040) 0x506544 ADD X0, X0, #1 |
(3040) 0x506548 LDR X17, [X25, X0,LSL #3] |
(3040) 0x50654c CMP X1, X17 |
(3040) 0x506550 B.EQ 5066a8 |
(3040) 0x506554 ADD X0, X0, #1 |
(3040) 0x506558 LDR X30, [X25, X0,LSL #3] |
(3040) 0x50655c CMP X1, X30 |
(3040) 0x506560 B.EQ 5066a8 |
(3040) 0x506564 ADD X0, X0, #1 |
(3040) 0x506568 LDR X16, [X25, X0,LSL #3] |
(3040) 0x50656c CMP X1, X16 |
(3040) 0x506570 B.EQ 5066a8 |
(3040) 0x506574 ADD X0, X0, #1 |
(3040) 0x506578 LDR X17, [X25, X0,LSL #3] |
(3040) 0x50657c CMP X1, X17 |
(3040) 0x506580 B.EQ 5066a8 |
(3040) 0x506584 ADD X0, X0, #1 |
(3040) 0x506588 LDR X30, [X25, X0,LSL #3] |
(3040) 0x50658c CMP X1, X30 |
(3040) 0x506590 B.EQ 5066a8 |
(3040) 0x506594 ADD X0, X0, #1 |
(3040) 0x506598 CMP X2, X0 |
(3040) 0x50659c B.EQ 50662c |
(3041) 0x5065a0 LDR X16, [X25, X0,LSL #3] |
(3041) 0x5065a4 CMP X1, X16 |
(3041) 0x5065a8 B.EQ 5066a8 |
(3041) 0x5065ac ADD X0, X0, #1 |
(3041) 0x5065b0 LDR X17, [X25, X0,LSL #3] |
(3041) 0x5065b4 ORR X30, XZR, X0 |
(3041) 0x5065b8 CMP X1, X17 |
(3041) 0x5065bc B.EQ 5066a8 |
(3041) 0x5065c0 ADD X0, X0, #1 |
(3041) 0x5065c4 LDR X16, [X25, X0,LSL #3] |
(3041) 0x5065c8 CMP X1, X16 |
(3041) 0x5065cc B.EQ 5066a8 |
(3041) 0x5065d0 ADD X0, X30, #2 |
(3041) 0x5065d4 LDR X17, [X25, X0,LSL #3] |
(3041) 0x5065d8 CMP X1, X17 |
(3041) 0x5065dc B.EQ 5066a8 |
(3041) 0x5065e0 ADD X0, X30, #3 |
(3041) 0x5065e4 LDR X16, [X25, X0,LSL #3] |
(3041) 0x5065e8 CMP X1, X16 |
(3041) 0x5065ec B.EQ 5066a8 |
(3041) 0x5065f0 ADD X0, X30, #4 |
(3041) 0x5065f4 LDR X17, [X25, X0,LSL #3] |
(3041) 0x5065f8 CMP X1, X17 |
(3041) 0x5065fc B.EQ 5066a8 |
(3041) 0x506600 ADD X0, X30, #5 |
(3041) 0x506604 LDR X16, [X25, X0,LSL #3] |
(3041) 0x506608 CMP X1, X16 |
(3041) 0x50660c B.EQ 5066a8 |
(3041) 0x506610 ADD X0, X30, #6 |
(3041) 0x506614 LDR X17, [X25, X0,LSL #3] |
(3041) 0x506618 CMP X1, X17 |
(3041) 0x50661c B.EQ 5066a8 |
(3041) 0x506620 ADD X0, X30, #7 |
(3041) 0x506624 CMP X2, X0 |
(3041) 0x506628 B.NE 5065a0 |
(3037) 0x50662c LDR D3, [X26, X21,LSL #3] |
(3037) 0x506630 CMP X10, X15 |
(3037) 0x506634 B.LE 5066c4 |
(3037) 0x506638 UBFM X16, X15, #61, #60 |
(3037) 0x50663c ADD X15, X15, #1 |
(3037) 0x506640 STR X1, [X25, X16] |
(3037) 0x506644 STR D3, [X6, X16] |
(3037) 0x506648 ADD X21, X21, #1 |
(3037) 0x50664c CMP X21, X12 |
(3037) 0x506650 B.NE 5064e0 |
(3033) 0x506654 LDR X1, [SP, #184] |
(3033) 0x506658 ADD X21, X3, X15 |
(3033) 0x50665c STR X21, [X1, X13] |
(3033) 0x506660 CBNZ X3, 5066d8 |
(3033) 0x506664 ORR X21, XZR, X12 |
(3033) 0x506668 CBZ X14, 506158 |
(3033) 0x50666c ORR X0, XZR, X14 |
(3033) 0x506670 STR X9, [SP, #112] |
(3033) 0x506674 STP X4, X5, [SP, #240] |
(3033) 0x506678 STP X18, X7, [SP, #256] |
(3033) 0x50667c STR X8, [SP, #272] |
(3033) 0x506680 STR X11, [SP, #288] |
(3033) 0x506684 BL 5294c0 |
(3033) 0x506688 LDR X0, [SP, #112] |
(3033) 0x50668c BL 5294c0 |
(3033) 0x506690 LDR X8, [SP, #272] |
(3033) 0x506694 MOVZ X9, #0 |
(3033) 0x506698 LDP X4, X5, [SP, #240] |
(3033) 0x50669c LDP X18, X7, [SP, #256] |
(3033) 0x5066a0 LDR X11, [SP, #288] |
(3033) 0x5066a4 B 506158 |
(3040) 0x5066a8 LDR D4, [X26, X21,LSL #3] |
(3040) 0x5066ac ADD X21, X21, #1 |
(3040) 0x5066b0 STR D4, [X6, X0,LSL #3] |
(3040) 0x5066b4 CMP X21, X12 |
(3040) 0x5066b8 B.EQ 506654 |
(3040) 0x5066bc LDR X1, [X28, X21,LSL #3] |
(3040) 0x5066c0 B 5064ec |
(3037) 0x5066c4 UBFM X30, X3, #61, #60 |
(3037) 0x5066c8 ADD X3, X3, #1 |
(3037) 0x5066cc STR X1, [X14, X30] |
(3037) 0x5066d0 STR D3, [X9, X30] |
(3037) 0x5066d4 B 506648 |
(3033) 0x5066d8 LDR X6, [SP, #208] |
(3033) 0x5066dc UBFM X25, X21, #61, #60 |
(3033) 0x5066e0 ORR X1, XZR, X25 |
(3033) 0x5066e4 STR X13, [SP, #112] |
(3033) 0x5066e8 STR X9, [SP, #272] |
(3033) 0x5066ec LDR X0, [X6, X13] |
(3033) 0x5066f0 STP X14, X15, [SP, #240] |
(3033) 0x5066f4 STP X3, X12, [SP, #256] |
(3033) 0x5066f8 STP X4, X5, [SP, #288] |
(3033) 0x5066fc STP X18, X7, [SP, #304] |
(3033) 0x506700 STP X8, X11, [SP, #320] |
(3033) 0x506704 BL 529468 |
(3033) 0x506708 LDR X14, [SP, #112] |
(3033) 0x50670c ORR X1, XZR, X25 |
(3033) 0x506710 ORR X9, XZR, X0 |
(3033) 0x506714 LDP X10, X25, [SP, #200] |
(3033) 0x506718 LDR X0, [X10, X14] |
(3033) 0x50671c STR X9, [X25, X14] |
(3033) 0x506720 BL 529468 |
(3033) 0x506724 LDP X14, X15, [SP, #240] |
(3033) 0x506728 ORR X17, XZR, X0 |
(3033) 0x50672c MOVZ X1, #0 |
(3033) 0x506730 LDP X12, X9, [SP, #264] |
(3033) 0x506734 ADD X0, X0, X15,LSL #3 |
(3033) 0x506738 ADD X6, X14, #8 |
(3033) 0x50673c LDP X4, X5, [SP, #288] |
(3033) 0x506740 ADD X2, X9, #8 |
(3033) 0x506744 SUB X30, X0, X2 |
(3033) 0x506748 LDP X18, X7, [SP, #304] |
(3033) 0x50674c LDP X8, X11, [SP, #320] |
(3033) 0x506750 LDR X13, [SP, #112] |
(3033) 0x506754 LDR X3, [SP, #200] |
(3033) 0x506758 LDR X2, [SP, #216] |
(3033) 0x50675c LDR X16, [X25, X13] |
(3033) 0x506760 UBFM X25, X15, #61, #60 |
(3033) 0x506764 ADD X10, X25, #8 |
(3033) 0x506768 STR X17, [X3, X13] |
(3033) 0x50676c LDR X3, [SP, #256] |
(3033) 0x506770 STR X21, [X2, X13] |
(3033) 0x506774 CNTB X21, ALL |
(3033) 0x506778 ADD X13, X16, X10 |
(3033) 0x50677c ADD X15, X16, X15,LSL #3 |
(3033) 0x506780 SUB X10, X21, #16 |
(3033) 0x506784 SUB X2, X0, X13 |
(3033) 0x506788 CMP X2, X30 |
(3033) 0x50678c SUB X21, X15, X6 |
(3033) 0x506790 CSEL X30, X2, X30, #9 |
(3033) 0x506794 CMP X30, X21 |
(3033) 0x506798 CSEL X13, X30, X21, #9 |
(3033) 0x50679c CNTD X2, ALL |
(3033) 0x5067a0 WHILELO P7.D, XZR, X3 |
(3033) 0x5067a4 CMP X13, X10 |
(3033) 0x5067a8 B.LS 506a40 |
(3039) 0x5067ac LD1D {Z30.D}, P7/Z, [X14, X1,LSL #3] |
(3039) 0x5067b0 ST1D {Z30.D}, P7, [X15, X1,LSL #3] |
(3039) 0x5067b4 LD1D {Z5.D}, P7/Z, [X9, X1,LSL #3] |
(3039) 0x5067b8 ST1D {Z5.D}, P7, [X0, X1,LSL #3] |
(3039) 0x5067bc ADD X1, X1, X2 |
(3039) 0x5067c0 WHILELO P7.D, X1, X3 |
(3039) 0x5067c4 B.NE 5067ac |
(3033) 0x5067c8 ORR X21, XZR, X12 |
(3033) 0x5067cc B 506668 |
0x5067d0 MUL X30, X0, X1 |
0x5067d4 UBFM X19, X25, #61, #60 |
0x5067d8 STR XZR, [X21, X19] |
0x5067dc ADD X0, X1, X30 |
0x5067e0 ADD X27, X30, X22 |
0x5067e4 ADD X3, X0, X22 |
0x5067e8 ADD X22, X21, X25,LSL #3 |
0x5067ec STR X3, [SP, #104] |
0x5067f0 CMP X27, X3 |
0x5067f4 B.LT 505aa0 |
0x5067f8 STR X6, [SP, #144] |
0x5067fc STP X7, X8, [SP, #240] |
0x506800 STP X11, X5, [SP, #256] |
0x506804 STR X12, [SP, #272] |
0x506808 BL 410120 |
0x50680c LDR X9, [SP, #144] |
0x506810 LDP X7, X8, [SP, #240] |
0x506814 LDP X11, X5, [SP, #256] |
0x506818 LDR X12, [SP, #272] |
0x50681c CBNZ X25, 506828 |
0x506820 CMP X26, #0 |
0x506824 B.GT 505be8 |
0x506828 LDP X19, X20, [SP, #16] |
0x50682c LDP X21, X22, [SP, #32] |
0x506830 LDP X23, X24, [SP, #48] |
0x506834 LDP X25, X26, [SP, #64] |
0x506838 LDP X27, X28, [SP, #80] |
0x50683c LDP X29, X30, [SP], #336 |
0x506840 B 410120 |
(3033) 0x506844 SUB X9, X12, X16 |
(3033) 0x506848 MOVZ X1, #8 |
(3033) 0x50684c STP X12, X6, [SP, #240] |
(3033) 0x506850 ORR X0, XZR, X9 |
(3033) 0x506854 STR X9, [SP, #112] |
(3033) 0x506858 STP X10, X2, [SP, #256] |
(3033) 0x50685c STR X13, [SP, #272] |
(3033) 0x506860 STP X4, X5, [SP, #288] |
(3033) 0x506864 STP X18, X7, [SP, #304] |
(3033) 0x506868 STP X8, X11, [SP, #320] |
(3033) 0x50686c BL 529428 |
(3033) 0x506870 ORR X7, XZR, X0 |
(3033) 0x506874 LDR X0, [SP, #112] |
(3033) 0x506878 MOVZ X1, #8 |
(3033) 0x50687c STR X7, [SP, #112] |
(3033) 0x506880 BL 529428 |
(3033) 0x506884 LDP X12, X6, [SP, #240] |
(3033) 0x506888 ORR X9, XZR, X0 |
(3033) 0x50688c LDP X10, X2, [SP, #256] |
(3033) 0x506890 LDP X4, X5, [SP, #288] |
(3033) 0x506894 LDP X18, X7, [SP, #304] |
(3033) 0x506898 LDP X8, X11, [SP, #320] |
(3033) 0x50689c LDR X14, [SP, #112] |
(3033) 0x5068a0 LDR X13, [SP, #272] |
(3033) 0x5068a4 CMP X12, #0 |
(3033) 0x5068a8 B.GT 5064c8 |
(3033) 0x5068ac LDR X25, [SP, #184] |
(3033) 0x5068b0 STR X2, [X25, X13] |
(3033) 0x5068b4 B 506668 |
0x5068b8 STR X9, [SP, #144] |
0x5068bc STP X7, X8, [SP, #240] |
0x5068c0 STP X11, X5, [SP, #256] |
0x5068c4 STR X12, [SP, #272] |
0x5068c8 BL 410120 |
0x5068cc LDUR X21, [X22, #504] |
0x5068d0 LDP X7, X8, [SP, #240] |
0x5068d4 LDP X11, X5, [SP, #256] |
0x5068d8 LDR X18, [SP, #144] |
0x5068dc LDR X12, [SP, #272] |
0x5068e0 B 505d24 |
(3033) 0x5068e4 ADRP X30, |
(3033) 0x5068e8 MOVZ X3, #0 |
(3033) 0x5068ec LDR X25, [SP, #240] |
(3033) 0x5068f0 ADD X0, X30, #2960 |
(3033) 0x5068f4 MOVZ X2, #1 |
(3033) 0x5068f8 STR X13, [SP, #112] |
(3033) 0x5068fc MOVZ X1, #3406 |
(3033) 0x506900 STP X11, X8, [SP, #248] |
(3033) 0x506904 STP X7, X18, [SP, #264] |
(3033) 0x506908 STP X5, X4, [SP, #288] |
(3033) 0x50690c STP X14, X15, [SP, #304] |
(3033) 0x506910 STR X9, [SP, #320] |
(3033) 0x506914 BL 52cf20 |
(3033) 0x506918 LDR X18, [SP, #224] |
(3033) 0x50691c MOVZ X4, #1 |
(3033) 0x506920 LDR X5, [X18, #224] |
(3033) 0x506924 LDADD X4, X1, [X5] |
(3033) 0x506928 LDP X10, X5, [SP, #280] |
(3033) 0x50692c LDP X11, X8, [SP, #248] |
(3033) 0x506930 LDP X7, X18, [SP, #264] |
(3033) 0x506934 LDP X4, X14, [SP, #296] |
(3033) 0x506938 LDP X15, X9, [SP, #312] |
(3033) 0x50693c LDR X13, [SP, #112] |
(3033) 0x506940 CBNZ X10, 506964 |
(3033) 0x506944 ORR X16, XZR, X21 |
(3033) 0x506948 LDP X21, X17, [X11, #56] |
(3033) 0x50694c ADD X0, X21, X13 |
(3033) 0x506950 ADD X6, X17, X13 |
(3033) 0x506954 B 505f9c |
0x506958 LDR X0, [X1], #8 |
0x50695c STR X0, [X22] |
0x506960 B 505af8 |
(3033) 0x506964 ADRP X16, |
(3033) 0x506968 ORR X1, XZR, X25 |
(3033) 0x50696c STR X15, [SP, #112] |
(3033) 0x506970 ADD X0, X16, #3120 |
(3033) 0x506974 STP X14, X13, [SP, #240] |
(3033) 0x506978 STP X9, X4, [SP, #256] |
(3033) 0x50697c STR X5, [SP, #272] |
(3033) 0x506980 STP X18, X7, [SP, #288] |
(3033) 0x506984 STP X8, X11, [SP, #304] |
(3033) 0x506988 BL 529660 |
(3033) 0x50698c LDP X8, X11, [SP, #304] |
(3033) 0x506990 ORR X16, XZR, X21 |
(3033) 0x506994 LDP X14, X2, [SP, #240] |
(3033) 0x506998 LDP X12, X1, [X11, #56] |
(3033) 0x50699c LDP X9, X4, [SP, #256] |
(3033) 0x5069a0 ADD X0, X12, X2 |
(3033) 0x5069a4 ADD X6, X1, X2 |
(3033) 0x5069a8 LDP X18, X7, [SP, #288] |
(3033) 0x5069ac LDR X15, [SP, #112] |
(3033) 0x5069b0 LDR X5, [SP, #272] |
(3033) 0x5069b4 B 505f9c |
(3033) 0x5069b8 ADRP X12, |
(3033) 0x5069bc MOVZ X3, #0 |
(3033) 0x5069c0 LDR X25, [SP, #240] |
(3033) 0x5069c4 ADD X0, X12, #2960 |
(3033) 0x5069c8 MOVZ X2, #1 |
(3033) 0x5069cc STR X13, [SP, #112] |
(3033) 0x5069d0 MOVZ X1, #3440 |
(3033) 0x5069d4 STP X11, X8, [SP, #248] |
(3033) 0x5069d8 STP X7, X18, [SP, #264] |
(3033) 0x5069dc STP X5, X4, [SP, #288] |
(3033) 0x5069e0 STP X14, X15, [SP, #304] |
(3033) 0x5069e4 STR X9, [SP, #320] |
(3033) 0x5069e8 BL 52cf20 |
(3033) 0x5069ec LDR X8, [SP, #224] |
(3033) 0x5069f0 MOVZ X7, #1 |
(3033) 0x5069f4 LDR X11, [X8, #224] |
(3033) 0x5069f8 LDADD X7, X1, [X11] |
(3033) 0x5069fc LDP X6, X5, [SP, #280] |
(3033) 0x506a00 LDP X11, X8, [SP, #248] |
(3033) 0x506a04 LDP X7, X18, [SP, #264] |
(3033) 0x506a08 LDP X4, X14, [SP, #296] |
(3033) 0x506a0c LDP X15, X9, [SP, #312] |
(3033) 0x506a10 LDR X13, [SP, #112] |
(3033) 0x506a14 CBZ X6, 506944 |
(3033) 0x506a18 ADRP X3, |
(3033) 0x506a1c ORR X1, XZR, X25 |
(3033) 0x506a20 STR X15, [SP, #112] |
(3033) 0x506a24 ADD X0, X3, #3160 |
(3033) 0x506a28 STP X14, X13, [SP, #240] |
(3033) 0x506a2c STP X9, X4, [SP, #256] |
(3033) 0x506a30 STR X5, [SP, #272] |
(3033) 0x506a34 STP X18, X7, [SP, #288] |
(3033) 0x506a38 STP X8, X11, [SP, #304] |
(3033) 0x506a3c B 506988 |
(3033) 0x506a40 ANDS X10, X3, #0x7 |
(3033) 0x506a44 B.EQ 506b0c |
(3033) 0x506a48 CMP X10, #1 |
(3033) 0x506a4c B.EQ 506af0 |
(3033) 0x506a50 CMP X10, #2 |
(3033) 0x506a54 B.EQ 506adc |
(3033) 0x506a58 CMP X10, #3 |
(3033) 0x506a5c B.EQ 506ac8 |
(3033) 0x506a60 CMP X10, #4 |
(3033) 0x506a64 B.EQ 506ab4 |
(3033) 0x506a68 CMP X10, #5 |
(3033) 0x506a6c B.EQ 506aa0 |
(3033) 0x506a70 CMP X10, #6 |
(3033) 0x506a74 B.EQ 506a8c |
(3033) 0x506a78 LDR D6, [X9] |
(3033) 0x506a7c MOVZ X1, #1 |
(3033) 0x506a80 LDR X6, [X14] |
(3033) 0x506a84 STR X6, [X16, X25] |
(3033) 0x506a88 STR D6, [X17, X25] |
(3033) 0x506a8c LDR D7, [X9, X1,LSL #3] |
(3033) 0x506a90 LDR X17, [X14, X1,LSL #3] |
(3033) 0x506a94 STR X17, [X15, X1,LSL #3] |
(3033) 0x506a98 STR D7, [X0, X1,LSL #3] |
(3033) 0x506a9c ADD X1, X1, #1 |
(3033) 0x506aa0 LDR D16, [X9, X1,LSL #3] |
(3033) 0x506aa4 LDR X16, [X14, X1,LSL #3] |
(3033) 0x506aa8 STR X16, [X15, X1,LSL #3] |
(3033) 0x506aac STR D16, [X0, X1,LSL #3] |
(3033) 0x506ab0 ADD X1, X1, #1 |
(3033) 0x506ab4 LDR D17, [X9, X1,LSL #3] |
(3033) 0x506ab8 LDR X25, [X14, X1,LSL #3] |
(3033) 0x506abc STR X25, [X15, X1,LSL #3] |
(3033) 0x506ac0 STR D17, [X0, X1,LSL #3] |
(3033) 0x506ac4 ADD X1, X1, #1 |
(3033) 0x506ac8 LDR D18, [X9, X1,LSL #3] |
(3033) 0x506acc LDR X21, [X14, X1,LSL #3] |
(3033) 0x506ad0 STR X21, [X15, X1,LSL #3] |
(3033) 0x506ad4 STR D18, [X0, X1,LSL #3] |
(3033) 0x506ad8 ADD X1, X1, #1 |
(3033) 0x506adc LDR D19, [X9, X1,LSL #3] |
(3033) 0x506ae0 LDR X30, [X14, X1,LSL #3] |
(3033) 0x506ae4 STR X30, [X15, X1,LSL #3] |
(3033) 0x506ae8 STR D19, [X0, X1,LSL #3] |
(3033) 0x506aec ADD X1, X1, #1 |
(3033) 0x506af0 LDR D20, [X9, X1,LSL #3] |
(3033) 0x506af4 LDR X13, [X14, X1,LSL #3] |
(3033) 0x506af8 STR X13, [X15, X1,LSL #3] |
(3033) 0x506afc STR D20, [X0, X1,LSL #3] |
(3033) 0x506b00 ADD X1, X1, #1 |
(3033) 0x506b04 CMP X1, X3 |
(3033) 0x506b08 B.EQ 506bb4 |
(3038) 0x506b0c LDR X10, [X14, X1,LSL #3] |
(3038) 0x506b10 ADD X2, X1, #1 |
(3038) 0x506b14 ADD X17, X1, #2 |
(3038) 0x506b18 ADD X16, X1, #3 |
(3038) 0x506b1c ADD X25, X1, #4 |
(3038) 0x506b20 LDR D21, [X9, X1,LSL #3] |
(3038) 0x506b24 STR X10, [X15, X1,LSL #3] |
(3038) 0x506b28 ADD X10, X1, #5 |
(3038) 0x506b2c LDR X6, [X14, X2,LSL #3] |
(3038) 0x506b30 STR D21, [X0, X1,LSL #3] |
(3038) 0x506b34 LDR D22, [X9, X2,LSL #3] |
(3038) 0x506b38 STR X6, [X15, X2,LSL #3] |
(3038) 0x506b3c ADD X6, X1, #6 |
(3038) 0x506b40 LDR X21, [X14, X17,LSL #3] |
(3038) 0x506b44 STR D22, [X0, X2,LSL #3] |
(3038) 0x506b48 ADD X2, X1, #7 |
(3038) 0x506b4c ADD X1, X1, #8 |
(3038) 0x506b50 LDR D23, [X9, X17,LSL #3] |
(3038) 0x506b54 STR X21, [X15, X17,LSL #3] |
(3038) 0x506b58 LDR X30, [X14, X16,LSL #3] |
(3038) 0x506b5c STR D23, [X0, X17,LSL #3] |
(3038) 0x506b60 LDR D24, [X9, X16,LSL #3] |
(3038) 0x506b64 STR X30, [X15, X16,LSL #3] |
(3038) 0x506b68 LDR X13, [X14, X25,LSL #3] |
(3038) 0x506b6c STR D24, [X0, X16,LSL #3] |
(3038) 0x506b70 LDR D25, [X9, X25,LSL #3] |
(3038) 0x506b74 STR X13, [X15, X25,LSL #3] |
(3038) 0x506b78 LDR X16, [X14, X10,LSL #3] |
(3038) 0x506b7c STR D25, [X0, X25,LSL #3] |
(3038) 0x506b80 LDR D26, [X9, X10,LSL #3] |
(3038) 0x506b84 STR X16, [X15, X10,LSL #3] |
(3038) 0x506b88 LDR X17, [X14, X6,LSL #3] |
(3038) 0x506b8c STR D26, [X0, X10,LSL #3] |
(3038) 0x506b90 LDR D27, [X9, X6,LSL #3] |
(3038) 0x506b94 STR X17, [X15, X6,LSL #3] |
(3038) 0x506b98 LDR X25, [X14, X2,LSL #3] |
(3038) 0x506b9c STR D27, [X0, X6,LSL #3] |
(3038) 0x506ba0 LDR D28, [X9, X2,LSL #3] |
(3038) 0x506ba4 STR X25, [X15, X2,LSL #3] |
(3038) 0x506ba8 STR D28, [X0, X2,LSL #3] |
(3038) 0x506bac CMP X1, X3 |
(3038) 0x506bb0 B.NE 506b0c |
(3033) 0x506bb4 ORR X21, XZR, X12 |
(3033) 0x506bb8 B 50666c |
(3033) 0x506bbc ORR X16, XZR, X21 |
(3033) 0x506bc0 B 505f9c |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►98.12+ | omp_fulfill_event | libgomp.so.1.0.0 | |
| ○ | start_thread | libc.so.6 | |
| ○ | thread_start | libc.so.6 | |
| ►1.88+ | GOMP_parallel | libgomp.so.1.0.0 | |
| ○ | hypre_IJMatrixSetValuesOMPParC[...] | IJMatrix_parcsr.c:3509 | exec |
| ○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
| ○ | main | amg.c:274 | exec |
| ○ | __libc_start_call_main | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | amg.c:253 | exec |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_1
| Source file and lines | IJMatrix_parcsr.c:3240-3500 |
| Module | exec |
| nb instructions | 256 |
| nb uops | 256 |
| loop length | 1024 |
| used w registers | 0 |
| used x registers | 32 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 1 |
| used d registers | 0 |
| used q registers | 0 |
| used v registers | 0 |
| used z registers | 0 |
| nb stack references | 91 |
| micro-operation queue | 32.00 cycles |
| front end | 32.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 17.50 | 17.50 | 22.50 | 22.50 | 22.50 | 22.50 | 0.00 | 0.00 | 0.00 | 0.00 | 48.67 | 48.67 | 48.67 | 31.00 | 31.00 |
| cycles | 17.50 | 17.50 | 22.50 | 22.50 | 22.50 | 22.50 | 0.00 | 0.00 | 0.00 | 0.00 | 48.67 | 48.67 | 48.67 | 31.00 | 31.00 |
| Cycles executing div or sqrt instructions | 5.00-20.00 |
| Front-end | 32.00 |
| Dispatch | 48.67 |
| DIV/SQRT | 5.00-20.00 |
| Overall L1 | 48.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | 0% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 30% |
| load | 33% |
| store | 31% |
| mul | 25% |
| add-sub | 25% |
| fma | 25% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STP X29, X30, [SP, #688]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X12, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X11, [X12, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X28, X5, [X12, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X8, X7, [X12, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X22, X0, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X1, [X12, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X2, [X12, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X0, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X3, [X12, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X1, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X4, [X12, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X2, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X6, [X12, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X3, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X9, [X12, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X4, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X6, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X9, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X10, [X12, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X18, X23, [X12, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X21, X20, [X12, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STR X18, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X13, [X12, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X14, [X12, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X15, [X12, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X13, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X16, [X12, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X14, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X17, [X12, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X15, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X19, [X12, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X16, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X25, [X12, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X17, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X27, [X12, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X19, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X24, [X12, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X25, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X26, [X12, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X27, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 52c080 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 52c0a0 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SDIV X1, X22, X19 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 5-20 | N/A |
| LDR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X25, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X6, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| MSUB X22, X1, X19, X22 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | N/A |
| CMP X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GE 5067d0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xe50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MADD X27, X1, X0, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | scal (25.0%) |
| ADD X2, X1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X3, X2, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GE 5067f8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xe78> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X4, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| MOVZ X0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X1, X4, X27,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X4, X3,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| SUB X10, X9, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| SUB X18, X10, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X13, X18, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X14, X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ANDS X15, X14, #0x7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b48 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b34 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b28 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b1c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x19c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b10 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x190> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b04 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x184> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.NE 506958 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfd8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X16, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X17, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X30, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X2, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X3, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X4, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X1, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505bb8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x238> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X6, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBNZ X25, 5068b8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xf38> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LE 505cfc <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x37c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| UBFM X21, X26, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X18, [X0], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| SUB X25, X21, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X6, X25, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X22, X6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ANDS X15, X22, #0x7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ADD X26, X0, X26,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| B.EQ 505c98 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x318> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c84 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x304> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c78 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c6c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c60 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c54 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c48 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X16, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X17, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X30, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X3, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X2, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X4, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X10, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X0, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505cfc <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x37c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| MOVZ X21, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X18, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| CMP X27, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GE 505fb8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x638> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X1, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| MOVN X22, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X26, XZR, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X13, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X14, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| SUB X25, X1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X17, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| UBFM X15, X25, #1, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X5, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X6, X14, X13,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X30, X17, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X3, X6, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X4, X30, X15,LSL #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STP X6, X3, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MUL X30, X0, X1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X0, X1, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X27, X30, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X3, X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 505aa0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x120> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X6, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBNZ X25, 506828 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xea8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.GT 505be8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x268> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| B 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X21, [X22, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X18, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 505d24 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x3a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| B 505af8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x178> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run gcc_1
| Source file and lines | IJMatrix_parcsr.c:3240-3500 |
| Module | exec |
| nb instructions | 256 |
| nb uops | 256 |
| loop length | 1024 |
| used w registers | 0 |
| used x registers | 32 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 1 |
| used d registers | 0 |
| used q registers | 0 |
| used v registers | 0 |
| used z registers | 0 |
| nb stack references | 91 |
| micro-operation queue | 32.00 cycles |
| front end | 32.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 17.50 | 17.50 | 22.50 | 22.50 | 22.50 | 22.50 | 0.00 | 0.00 | 0.00 | 0.00 | 48.67 | 48.67 | 48.67 | 31.00 | 31.00 |
| cycles | 17.50 | 17.50 | 22.50 | 22.50 | 22.50 | 22.50 | 0.00 | 0.00 | 0.00 | 0.00 | 48.67 | 48.67 | 48.67 | 31.00 | 31.00 |
| Cycles executing div or sqrt instructions | 5.00-20.00 |
| Front-end | 32.00 |
| Dispatch | 48.67 |
| DIV/SQRT | 5.00-20.00 |
| Overall L1 | 48.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | 0% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 30% |
| load | 33% |
| store | 31% |
| mul | 25% |
| add-sub | 25% |
| fma | 25% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| STP X29, X30, [SP, #688]! | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| ORR X12, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X29, SP, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X11, [X12, #40] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X28, X5, [X12, #24] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X8, X7, [X12, #56] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X22, X0, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDR X1, [X12, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X2, [X12, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X0, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X3, [X12, #72] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X1, [SP, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X4, [X12, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X2, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X6, [X12, #88] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X3, [SP, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X9, [X12, #96] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X4, [SP, #200] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X6, [SP, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STR X9, [SP, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X10, [X12, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X18, X23, [X12, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X21, X20, [X12, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| STR X18, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X13, [X12, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X10, [SP, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X14, [X12, #128] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X15, [X12, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X13, [SP, #192] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X16, [X12, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X14, [SP, #232] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X17, [X12, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X15, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X19, [X12, #176] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X16, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X25, [X12, #184] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X17, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X27, [X12, #208] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X19, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X24, [X12, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| STR X25, [SP, #168] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X26, [X12, #216] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X27, [SP, #280] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 52c080 <hypre_NumActiveThreads> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X19, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| BL 52c0a0 <hypre_GetThreadNum> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| SDIV X1, X22, X19 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5-20 | 5-20 | N/A |
| LDR X12, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| ORR X25, XZR, X0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X6, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| MSUB X22, X1, X19, X22 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | N/A |
| CMP X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GE 5067d0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xe50> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MADD X27, X1, X0, X0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | scal (25.0%) |
| ADD X2, X1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X3, X2, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GE 5067f8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xe78> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X4, [SP, #120] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| MOVZ X0, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X1, X4, X27,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X9, X4, X3,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| SUB X10, X9, X1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| SUB X18, X10, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X13, X18, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X14, X13, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ANDS X15, X14, #0x7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b48 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b34 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1b4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b28 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x1a8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b1c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x19c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b10 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x190> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505b04 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x184> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.NE 506958 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xfd8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X16, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X17, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X30, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X2, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X3, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X4, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X0, X0, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X1, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505bb8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x238> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X6, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBNZ X25, 5068b8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xf38> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LE 505cfc <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x37c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| ORR X0, XZR, X21 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| UBFM X21, X26, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X18, [X0], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| SUB X25, X21, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| UBFM X6, X25, #3, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X22, X6, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ANDS X15, X22, #0x7 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| ADD X26, X0, X26,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| B.EQ 505c98 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x318> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c84 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x304> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c78 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2f8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c6c <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2ec> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c60 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2e0> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c54 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2d4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X15, #6 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505c48 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x2c8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X16, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X17, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X30, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X3, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X2, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X2 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X4, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| LDR X10, [X0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X18, X18, X10 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X18, [X0], #8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X0, X26 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.EQ 505cfc <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x37c> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| MOVZ X21, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X18, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDR X9, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| CMP X27, X9 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.GE 505fb8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x638> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X1, [SP, #152] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| MOVZ X9, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| MOVN X22, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ORR X26, XZR, X5 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LDR X13, [SP, #112] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X14, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| SUB X25, X1, #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X17, [SP, #160] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| UBFM X15, X25, #1, #63 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LDR X5, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| ADD X6, X14, X13,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STR X12, [SP, #224] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X30, X17, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X3, X6, #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X4, X30, X15,LSL #4 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| STP X6, X3, [SP, #136] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| RET | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| MUL X30, X0, X1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | scal (25.0%) |
| UBFM X19, X25, #61, #60 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR XZR, [X21, X19] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| ADD X0, X1, X30 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X27, X30, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X3, X0, X22 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X22, X21, X25,LSL #3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| STR X3, [SP, #104] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| CMP X27, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (25.0%) |
| B.LT 505aa0 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x120> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X6, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| CBNZ X25, 506828 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0xea8> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| CMP X26, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.GT 505be8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x268> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDP X19, X20, [SP, #16] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X21, X22, [SP, #32] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X23, X24, [SP, #48] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X25, X26, [SP, #64] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | N/A |
| LDP X27, X28, [SP, #80] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X29, X30, [SP], #336 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| B 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| STR X9, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| STP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (50.0%) |
| STR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| BL 410120 <@plt_start@+0x100> | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDUR X21, [X22, #504] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| LDP X7, X8, [SP, #240] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDP X11, X5, [SP, #256] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 1 | scal (50.0%) |
| LDR X18, [SP, #144] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | scal (25.0%) |
| LDR X12, [SP, #272] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| B 505d24 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x3a4> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| LDR X0, [X1], #8 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 4 | 0.33 | N/A |
| STR X0, [X22] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0.50 | 1 | 0.50 | scal (25.0%) |
| B 505af8 <hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1+0x178> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ▼hypre_IJMatrixSetValuesOMPParCSR._omp_fn.1– | 0.17 | 0.07 |
| ▼Loop 3033 - IJMatrix_parcsr.c:3291-3500 - exec– | 0.03 | 0.01 |
| ▼Loop 3042 - IJMatrix_parcsr.c:3383-3484 - exec– | 0.13 | 0.04 |
| ○Loop 3043 - IJMatrix_parcsr.c:3422-3424 - exec | 0.00 | 0.00 |
| ○Loop 3044 - IJMatrix_parcsr.c:3388-3390 - exec | 0.00 | 0.00 |
| ○Loop 3039 - IJMatrix_parcsr.c:3359-3362 - exec | 0.00 | 0.00 |
| ○Loop 3038 - IJMatrix_parcsr.c:3359-3362 - exec | 0.00 | 0.00 |
| ▼Loop 3034 - IJMatrix_parcsr.c:3470-3500 - exec– | 0.00 | 0.00 |
| ▼Loop 3036 - IJMatrix_parcsr.c:3475-3484 - exec– | 0.00 | 0.00 |
| ○Loop 3035 - IJMatrix_parcsr.c:3478-3484 - exec | 0.00 | 0.00 |
| ▼Loop 3037 - IJMatrix_parcsr.c:3316-3341 - exec– | 0.00 | 0.00 |
| ▼Loop 3040 - IJMatrix_parcsr.c:3316-3341 - exec– | 0.00 | 0.00 |
| ○Loop 3041 - IJMatrix_parcsr.c:3318-3320 - exec | 0.00 | 0.00 |
| ○Loop 3032 - IJMatrix_parcsr.c:3274-3275 - exec | 0.01 | 0.00 |
| ○Loop 3045 - IJMatrix_parcsr.c:3282-3283 - exec | 0.00 | 0.00 |
