| Loop Id: 814 | Module: exec | Source: par_lr_interp.c:1624-1628 | Coverage: 0.05% |
|---|
| Loop Id: 814 | Module: exec | Source: par_lr_interp.c:1624-1628 | Coverage: 0.05% |
|---|
0x462130 LD1D {Z30.D}, P4/Z, [X9, X3,LSL #3] [3] |
0x462134 ADD X3, X3, X11 |
0x462138 LD1D {Z6.D}, P4/Z, [X19, Z30.D,LSL #3] [2] |
0x46213c CMPEQ P5.D, P4/Z, Z30.D, Z2.D |
0x462140 CMPGE P15.D, P4/Z, Z6.D, Z3.D |
0x462144 ORR P6.B, P4/Z, P5.B, P15.B |
0x462148 LD1D {Z7.D}, P6/Z, [X5, MUL VL] [1] |
0x46214c ADD X5, X5, X25 |
0x462150 FMUL Z16.D, Z7.D, Z5.D |
0x462154 FCMLT P7.D, P6/Z, Z16.D, #0.0000000 |
0x462158 FADD Z31.D, P7/M, Z31.D, Z7.D |
0x46215c CMP X13, X3 |
0x462160 B.CS 462130 |
/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1624 - 1628 |
-------------------------------------------------------------------------------- |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►98.54+ | omp_fulfill_event | libgomp.so.1.0.0 | |
| ○ | start_thread | libc.so.6 | |
| ○ | thread_start | libc.so.6 | |
| ►1.46+ | GOMP_parallel | libgomp.so.1.0.0 | |
| ○ | hypre_BoomerAMGBuildExtPIInter[...] | par_lr_interp.c:1196 | exec |
| ○ | hypre_BoomerAMGSetup | par_amg_setup.c:850 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| ○ | main | amg.c:398 | exec |
| ○ | __libc_start_call_main | libc.so.6 | |
| ○ | __libc_start_main | libc.so.6 | |
| ○ | _start | amg.c:253 | exec |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.50 |
| Bottlenecks | P4, P6, |
| Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
| Source | par_lr_interp.c:1624-1628 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.00 |
| CQA cycles if no scalar integer | 3.00 |
| CQA cycles if FP arith vectorized | 3.00 |
| CQA cycles if fully vectorized | 3.00 |
| Front-end cycles | 1.63 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 1.00 |
| P3 cycles | 1.00 |
| P4 cycles | 3.00 |
| P5 cycles | 1.00 |
| P6 cycles | 3.00 |
| P7 cycles | 2.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 1.50 |
| P11 cycles | 1.50 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 2 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 13.00 |
| Nb uops | 13.00 |
| Nb loads | NA |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.67 |
| Nb FLOP add-sub | 4.00 |
| Nb FLOP mul | 4.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 32.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 96.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 90.28 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 78.13 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.50 |
| Bottlenecks | P4, P6, |
| Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
| Source | par_lr_interp.c:1624-1628 |
| Source loop unroll info | multi-versionned |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.00 |
| CQA cycles if no scalar integer | 3.00 |
| CQA cycles if FP arith vectorized | 3.00 |
| CQA cycles if fully vectorized | 3.00 |
| Front-end cycles | 1.63 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 1.00 |
| P3 cycles | 1.00 |
| P4 cycles | 3.00 |
| P5 cycles | 1.00 |
| P6 cycles | 3.00 |
| P7 cycles | 2.00 |
| P8 cycles | 1.00 |
| P9 cycles | 1.00 |
| P10 cycles | 1.50 |
| P11 cycles | 1.50 |
| P12 cycles | 0.00 |
| P13 cycles | 0.00 |
| P14 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 2 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 13.00 |
| Nb uops | 13.00 |
| Nb loads | NA |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.67 |
| Nb FLOP add-sub | 4.00 |
| Nb FLOP mul | 4.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 32.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 96.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 90.28 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | 100.00 |
| Vector-efficiency ratio add_sub | 100.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 78.13 |
| Path / |
| Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
| Source file and lines | par_lr_interp.c:1624-1628 |
| Module | exec |
| nb instructions | 13 |
| nb uops | 13 |
| loop length | 52 |
| used w registers | 0 |
| used x registers | 7 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 0 |
| used d registers | 0 |
| used q registers | 0 |
| used v registers | 0 |
| used z registers | 8 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 1.00 |
| micro-operation queue | 1.63 cycles |
| front end | 1.63 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 1.00 | 1.00 | 3.00 | 1.00 | 3.00 | 2.00 | 0.00 | 0.00 | 1.50 | 1.50 | 0.00 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 1.00 | 1.00 | 3.00 | 1.00 | 3.00 | 2.00 | 1.00 | 1.00 | 1.50 | 1.50 | 0.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 2.00 |
| Front-end | 1.63 |
| Dispatch | 3.00 |
| Data deps. | 2.00 |
| Overall L1 | 3.00 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 85% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 70% |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 90% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 78% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LD1D {Z30.D}, P4/Z, [X9, X3,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| ADD X3, X3, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LD1D {Z6.D}, P4/Z, [X19, Z30.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| CMPEQ P5.D, P4/Z, Z30.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | vect (100.0%) |
| CMPGE P15.D, P4/Z, Z6.D, Z3.D | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | vect (100.0%) |
| ORR P6.B, P4/Z, P5.B, P15.B | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | vect (12.5%) |
| LD1D {Z7.D}, P6/Z, [X5, MUL VL] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| ADD X5, X5, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| FMUL Z16.D, Z7.D, Z5.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| FCMLT P7.D, P6/Z, Z16.D, #0.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | vect (100.0%) |
| FADD Z31.D, P7/M, Z31.D, Z7.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| CMP X13, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.CS 462130 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1024> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| Function | hypre_BoomerAMGBuildExtPIInterp._omp_fn.0 |
| Source file and lines | par_lr_interp.c:1624-1628 |
| Module | exec |
| nb instructions | 13 |
| nb uops | 13 |
| loop length | 52 |
| used w registers | 0 |
| used x registers | 7 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 0 |
| used d registers | 0 |
| used q registers | 0 |
| used v registers | 0 |
| used z registers | 8 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 1.00 |
| micro-operation queue | 1.63 cycles |
| front end | 1.63 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 1.00 | 1.00 | 3.00 | 1.00 | 3.00 | 2.00 | 0.00 | 0.00 | 1.50 | 1.50 | 0.00 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 1.00 | 1.00 | 3.00 | 1.00 | 3.00 | 2.00 | 1.00 | 1.00 | 1.50 | 1.50 | 0.00 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 2.00 |
| Front-end | 1.63 |
| Dispatch | 3.00 |
| Data deps. | 2.00 |
| Overall L1 | 3.00 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 85% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 70% |
| all | 100% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 90% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 100% |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 78% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LD1D {Z30.D}, P4/Z, [X9, X3,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| ADD X3, X3, X11 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| LD1D {Z6.D}, P4/Z, [X19, Z30.D,LSL #3] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| CMPEQ P5.D, P4/Z, Z30.D, Z2.D | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | vect (100.0%) |
| CMPGE P15.D, P4/Z, Z6.D, Z3.D | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 1 | vect (100.0%) |
| ORR P6.B, P4/Z, P5.B, P15.B | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | vect (12.5%) |
| LD1D {Z7.D}, P6/Z, [X5, MUL VL] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | vect (100.0%) |
| ADD X5, X5, X25 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| FMUL Z16.D, Z7.D, Z5.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| FCMLT P7.D, P6/Z, Z16.D, #0.0000000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 1 | vect (100.0%) |
| FADD Z31.D, P7/M, Z31.D, Z7.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| CMP X13, X3 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.CS 462130 <hypre_BoomerAMGBuildExtPIInterp._omp_fn.0+0x1024> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
