OV - exec - Function hypre_IJMatrixSetDiagOffdSizesParCSR

	Function: hypre_IJMatrixSetDiagOffdSizesParCSR	Module: exec	Source: IJMatrix_parcsr.c:178-221 [...]	Coverage (incl. loops): 0.02% \| (excl. loops): 0.00%

/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c: 178 - 221

--------------------------------------------------------------------------------

178: {

179:    HYPRE_Int local_num_rows;

180:    HYPRE_Int i;

181:    hypre_ParCSRMatrix *par_matrix = (hypre_ParCSRMatrix *)hypre_IJMatrixObject(matrix);

182:    hypre_AuxParCSRMatrix *aux_matrix = (hypre_AuxParCSRMatrix *)hypre_IJMatrixTranslator(matrix);

[...]

188:    if (!par_matrix)

189:    {

190:       hypre_IJMatrixCreateParCSR(matrix);

191:       par_matrix = (hypre_ParCSRMatrix *)hypre_IJMatrixObject(matrix);

192:    }

193:

194:    diag =  hypre_ParCSRMatrixDiag(par_matrix);

195:    diag_i =  hypre_CSRMatrixI(diag);

196:    local_num_rows = hypre_CSRMatrixNumRows(diag);

197:    if (!diag_i)

198:       diag_i = hypre_CTAlloc(HYPRE_Int, local_num_rows+1);

199:    for (i = 0; i < local_num_rows; i++)

200:       diag_i[i+1] = diag_i[i] + diag_sizes[i];

201:    hypre_CSRMatrixI(diag) = diag_i;

202:    hypre_CSRMatrixNumNonzeros(diag) = diag_i[local_num_rows];

203:    offd =  hypre_ParCSRMatrixOffd(par_matrix);

204:    offd_i =  hypre_CSRMatrixI(offd);

205:    if (!offd_i)

206:       offd_i = hypre_CTAlloc(HYPRE_Int, local_num_rows+1);

207:    for (i = 0; i < local_num_rows; i++)

208:       offd_i[i+1] = offd_i[i] + offdiag_sizes[i];

209:    hypre_CSRMatrixI(offd) = offd_i;

210:    hypre_CSRMatrixNumNonzeros(offd) = offd_i[local_num_rows];

211:    if (!aux_matrix)

212:    {

213:       hypre_AuxParCSRMatrixCreate(&aux_matrix, local_num_rows,

214:                                   hypre_CSRMatrixNumCols(diag), NULL);

215:       hypre_IJMatrixTranslator(matrix) = aux_matrix;

216:    }

217:    hypre_AuxParCSRMatrixNeedAux(aux_matrix) = 0;

218:

219:    return hypre_error_flag;

220:

221: }

0x508b28 STP	X29, X30, [SP, #928]!

0x508b2c ADD	X29, SP, #0

0x508b30 STP	X19, X20, [SP, #16]

0x508b34 ORR	X20, XZR, X1

0x508b38 ORR	X19, XZR, X2

0x508b3c STP	X21, X22, [SP, #32]

0x508b40 ORR	X22, XZR, X0

0x508b44 STP	X23, X24, [SP, #48]

0x508b48 LDP	X24, X3, [X0, #32]

0x508b4c STR	X25, [SP, #64]

0x508b50 STR	X3, [SP, #88]

0x508b54 CBZ	X24, 508e78

0x508b58 LDR	X23, [X24, #56]

0x508b5c LDR	X0, [X23]

0x508b60 LDR	X21, [X23, #16]

0x508b64 CBZ	X0, 508e90

0x508b68 ADD	X11, X0, X21,LSL #3

0x508b6c UBFM	X25, X21, #61, #60

0x508b70 LDR	X24, [X24, #64]

0x508b74 CMP	X21, #0

0x508b78 B.LE	508eb0

0x508b7c ORR	X13, XZR, X0

0x508b80 ANDS	X2, X21, #0x7

0x508b84 LDR	X14, [X13], #8

0x508b88 MOVZ	X4, #0

0x508b8c B.EQ	508c28

0x508b90 CMP	X2, #1

0x508b94 B.EQ	508c10

0x508b98 CMP	X2, #2

0x508b9c B.EQ	508c00

0x508ba0 CMP	X2, #3

0x508ba4 B.EQ	508bf0

0x508ba8 CMP	X2, #4

0x508bac B.EQ	508be0

0x508bb0 CMP	X2, #5

0x508bb4 B.EQ	508bd0

0x508bb8 CMP	X2, #6

0x508bbc B.NE	508e30

0x508bc0 LDR	X6, [X20, X4,LSL #3]

0x508bc4 ADD	X14, X14, X6

0x508bc8 STR	X14, [X13, X4,LSL #3]

0x508bcc ADD	X4, X4, #1

0x508bd0 LDR	X7, [X20, X4,LSL #3]

0x508bd4 ADD	X14, X14, X7

0x508bd8 STR	X14, [X13, X4,LSL #3]

0x508bdc ADD	X4, X4, #1

0x508be0 LDR	X8, [X20, X4,LSL #3]

0x508be4 ADD	X14, X14, X8

0x508be8 STR	X14, [X13, X4,LSL #3]

0x508bec ADD	X4, X4, #1

0x508bf0 LDR	X9, [X20, X4,LSL #3]

0x508bf4 ADD	X14, X14, X9

0x508bf8 STR	X14, [X13, X4,LSL #3]

0x508bfc ADD	X4, X4, #1

0x508c00 LDR	X10, [X20, X4,LSL #3]

0x508c04 ADD	X14, X14, X10

0x508c08 STR	X14, [X13, X4,LSL #3]

0x508c0c ADD	X4, X4, #1

0x508c10 LDR	X12, [X20, X4,LSL #3]

0x508c14 ADD	X14, X14, X12

0x508c18 STR	X14, [X13, X4,LSL #3]

0x508c1c ADD	X4, X4, #1

0x508c20 CMP	X21, X4

0x508c24 B.EQ	508cb0

(3065) 0x508c28 LDR	X15, [X20, X4,LSL #3]

(3065) 0x508c2c ADD	X16, X4, #1

(3065) 0x508c30 ADD	X18, X4, #2

(3065) 0x508c34 ADD	X17, X4, #3

(3065) 0x508c38 ADD	X30, X4, #4

(3065) 0x508c3c ADD	X1, X4, #5

(3065) 0x508c40 ADD	X6, X4, #6

(3065) 0x508c44 ADD	X5, X4, #7

(3065) 0x508c48 ADD	X3, X14, X15

(3065) 0x508c4c STR	X3, [X13, X4,LSL #3]

(3065) 0x508c50 ADD	X4, X4, #8

(3065) 0x508c54 LDR	X2, [X20, X16,LSL #3]

(3065) 0x508c58 ADD	X7, X3, X2

(3065) 0x508c5c STR	X7, [X13, X16,LSL #3]

(3065) 0x508c60 LDR	X8, [X20, X18,LSL #3]

(3065) 0x508c64 ADD	X9, X7, X8

(3065) 0x508c68 STR	X9, [X13, X18,LSL #3]

(3065) 0x508c6c LDR	X10, [X20, X17,LSL #3]

(3065) 0x508c70 ADD	X12, X9, X10

(3065) 0x508c74 STR	X12, [X13, X17,LSL #3]

(3065) 0x508c78 LDR	X14, [X20, X30,LSL #3]

(3065) 0x508c7c ADD	X15, X12, X14

(3065) 0x508c80 STR	X15, [X13, X30,LSL #3]

(3065) 0x508c84 LDR	X16, [X20, X1,LSL #3]

(3065) 0x508c88 ADD	X17, X15, X16

(3065) 0x508c8c STR	X17, [X13, X1,LSL #3]

(3065) 0x508c90 LDR	X18, [X20, X6,LSL #3]

(3065) 0x508c94 ADD	X30, X17, X18

(3065) 0x508c98 STR	X30, [X13, X6,LSL #3]

(3065) 0x508c9c LDR	X1, [X20, X5,LSL #3]

(3065) 0x508ca0 ADD	X14, X30, X1

(3065) 0x508ca4 STR	X14, [X13, X5,LSL #3]

(3065) 0x508ca8 CMP	X21, X4

(3065) 0x508cac B.NE	508c28

0x508cb0 LDR	X20, [X11]

0x508cb4 STR	X0, [X23]

0x508cb8 LDR	X0, [X24]

0x508cbc STR	X20, [X23, #32]

0x508cc0 CBZ	X0, 508ed4

0x508cc4 ORR	X13, XZR, X0

0x508cc8 ANDS	X11, X21, #0x7

0x508ccc LDR	X12, [X13], #8

0x508cd0 MOVZ	X3, #0

0x508cd4 B.EQ	508d70

0x508cd8 CMP	X11, #1

0x508cdc B.EQ	508d58

0x508ce0 CMP	X11, #2

0x508ce4 B.EQ	508d48

0x508ce8 CMP	X11, #3

0x508cec B.EQ	508d38

0x508cf0 CMP	X11, #4

0x508cf4 B.EQ	508d28

0x508cf8 CMP	X11, #5

0x508cfc B.EQ	508d18

0x508d00 CMP	X11, #6

0x508d04 B.NE	508e44

0x508d08 LDR	X6, [X19, X3,LSL #3]

0x508d0c ADD	X12, X12, X6

0x508d10 STR	X12, [X13, X3,LSL #3]

0x508d14 ADD	X3, X3, #1

0x508d18 LDR	X5, [X19, X3,LSL #3]

0x508d1c ADD	X12, X12, X5

0x508d20 STR	X12, [X13, X3,LSL #3]

0x508d24 ADD	X3, X3, #1

0x508d28 LDR	X2, [X19, X3,LSL #3]

0x508d2c ADD	X12, X12, X2

0x508d30 STR	X12, [X13, X3,LSL #3]

0x508d34 ADD	X3, X3, #1

0x508d38 LDR	X7, [X19, X3,LSL #3]

0x508d3c ADD	X12, X12, X7

0x508d40 STR	X12, [X13, X3,LSL #3]

0x508d44 ADD	X3, X3, #1

0x508d48 LDR	X8, [X19, X3,LSL #3]

0x508d4c ADD	X12, X12, X8

0x508d50 STR	X12, [X13, X3,LSL #3]

0x508d54 ADD	X3, X3, #1

0x508d58 LDR	X9, [X19, X3,LSL #3]

0x508d5c ADD	X12, X12, X9

0x508d60 STR	X12, [X13, X3,LSL #3]

0x508d64 ADD	X3, X3, #1

0x508d68 CMP	X21, X3

0x508d6c B.EQ	508df8

(3066) 0x508d70 LDR	X14, [X19, X3,LSL #3]

(3066) 0x508d74 ADD	X15, X3, #1

(3066) 0x508d78 ADD	X10, X3, #2

(3066) 0x508d7c ADD	X16, X3, #3

(3066) 0x508d80 ADD	X17, X3, #4

(3066) 0x508d84 ADD	X18, X3, #5

(3066) 0x508d88 ADD	X30, X3, #6

(3066) 0x508d8c ADD	X20, X3, #7

(3066) 0x508d90 ADD	X1, X12, X14

(3066) 0x508d94 STR	X1, [X13, X3,LSL #3]

(3066) 0x508d98 ADD	X3, X3, #8

(3066) 0x508d9c LDR	X11, [X19, X15,LSL #3]

(3066) 0x508da0 ADD	X6, X1, X11

(3066) 0x508da4 STR	X6, [X13, X15,LSL #3]

(3066) 0x508da8 LDR	X4, [X19, X10,LSL #3]

(3066) 0x508dac ADD	X5, X6, X4

(3066) 0x508db0 STR	X5, [X13, X10,LSL #3]

(3066) 0x508db4 LDR	X2, [X19, X16,LSL #3]

(3066) 0x508db8 ADD	X7, X5, X2

(3066) 0x508dbc STR	X7, [X13, X16,LSL #3]

(3066) 0x508dc0 LDR	X8, [X19, X17,LSL #3]

(3066) 0x508dc4 ADD	X9, X7, X8

(3066) 0x508dc8 STR	X9, [X13, X17,LSL #3]

(3066) 0x508dcc LDR	X12, [X19, X18,LSL #3]

(3066) 0x508dd0 ADD	X14, X9, X12

(3066) 0x508dd4 STR	X14, [X13, X18,LSL #3]

(3066) 0x508dd8 LDR	X15, [X19, X30,LSL #3]

(3066) 0x508ddc ADD	X16, X14, X15

(3066) 0x508de0 STR	X16, [X13, X30,LSL #3]

(3066) 0x508de4 LDR	X10, [X19, X20,LSL #3]

(3066) 0x508de8 ADD	X12, X16, X10

(3066) 0x508dec STR	X12, [X13, X20,LSL #3]

(3066) 0x508df0 CMP	X21, X3

(3066) 0x508df4 B.NE	508d70

0x508df8 LDR	X19, [X0, X25]

0x508dfc STR	X0, [X24]

0x508e00 LDR	X0, [SP, #88]

0x508e04 STR	X19, [X24, #32]

0x508e08 CBZ	X0, 508e58

0x508e0c LDR	X25, [SP, #64]

0x508e10 ADRP	X22,

0x508e14 STR	XZR, [X0, #16]

0x508e18 LDR	X0, [X22, #3856]

0x508e1c LDP	X19, X20, [SP, #16]

0x508e20 LDP	X21, X22, [SP, #32]

0x508e24 LDP	X23, X24, [SP, #48]

0x508e28 LDP	X29, X30, [SP], #96

0x508e2c RET

0x508e30 LDR	X5, [X20]

0x508e34 MOVZ	X4, #1

0x508e38 ADD	X14, X14, X5

0x508e3c STR	X14, [X13]

0x508e40 B	508bc0

0x508e44 LDR	X4, [X19]

0x508e48 MOVZ	X3, #1

0x508e4c ADD	X12, X12, X4

0x508e50 STR	X12, [X13]

0x508e54 B	508d08

0x508e58 LDR	X2, [X23, #24]

0x508e5c ORR	X1, XZR, X21

0x508e60 MOVZ	X3, #0

0x508e64 ADD	X0, SP, #88

0x508e68 BL	515de0

0x508e6c LDR	X0, [SP, #88]

0x508e70 STR	X0, [X22, #40]

0x508e74 B	508e0c

0x508e78 BL	508640

0x508e7c LDR	X24, [X22, #32]

0x508e80 LDR	X23, [X24, #56]

0x508e84 LDR	X0, [X23]

0x508e88 LDR	X21, [X23, #16]

0x508e8c CBNZ	X0, 508b68

0x508e90 MOVZ	X1, #8

0x508e94 ADD	X0, X21, #1

0x508e98 BL	529428

0x508e9c LDR	X24, [X24, #64]

0x508ea0 ADD	X11, X0, X21,LSL #3

0x508ea4 UBFM	X25, X21, #61, #60

0x508ea8 CMP	X21, #0

0x508eac B.GT	508b7c

0x508eb0 LDR	X1, [X0, X25]

0x508eb4 STR	X0, [X23]

0x508eb8 LDR	X0, [X24]

0x508ebc STR	X1, [X23, #32]

0x508ec0 CBNZ	X0, 508df8

0x508ec4 MOVZ	X1, #8

0x508ec8 ADD	X0, X21, #1

0x508ecc BL	529428

0x508ed0 B	508df8

0x508ed4 MOVZ	X1, #8

0x508ed8 ADD	X0, X21, #1

0x508edc BL	529428

0x508ee0 B	508cc4

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	HYPRE_IJMatrixSetDiagOffdSizes	HYPRE_IJMatrix.c:770	exec
○	BuildIJLaplacian27pt._omp_fn.0	amg.c:1389	exec
○	GOMP_parallel		libgomp.so.1.0.0
○	BuildIJLaplacian27pt	amg.c:760	exec
○	main	amg.c:274	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1

Source file and lines	IJMatrix_parcsr.c:178-221
Module	exec

The function is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:178-182,188-221.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 26% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 22.67 to 6.08 cycles (3.73x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

hypre_AuxParCSRMatrixCreate: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:213
hypre_CAlloc: 3 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:198
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:206
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:206
hypre_IJMatrixCreateParCSR: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:190

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function does not load or store any data.

General properties

nb instructions	171
nb uops	171
loop length	684
used w registers	0
used x registers	25
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	13

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	21.38 cycles
front end	21.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	17.50	17.50	19.00	19.00	19.00	19.00	0.00	0.00	0.00	0.00	22.67	22.67	22.67	14.00	14.00
cycles	17.50	17.50	19.00	19.00	19.00	19.00	0.00	0.00	0.00	0.00	22.67	22.67	22.67	14.00	14.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	21.38
Dispatch	22.67
Overall L1	22.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	26%
load	26%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 22.67 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 508b28

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X24, X3, [X0, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
STR X25, [SP, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X3, [SP, #88]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X24, 508e78 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x350>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X23, [X24, #56]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X23, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X0, 508e90 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x368>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X11, X0, X21,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
UBFM X25, X21, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X24, [X24, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X21, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 508eb0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x388>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X13, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ANDS X2, X21, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
LDR X14, [X13], #8	1	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
B.EQ 508c28 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508c10 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xe8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508c00 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508bf0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508be0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508bd0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xa8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 508e30 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X8, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X9, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X12, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X21, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508cb0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x188>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X11]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X23]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [X23, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X0, 508ed4 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x3ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X13, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ANDS X11, X21, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	N/A
LDR X12, [X13], #8	1	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
B.EQ 508d70 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x248>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d58 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d48 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d38 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x210>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d28 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x200>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d18 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x1f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 508e44 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x31c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X2, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X8, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X9, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X21, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508df8 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X0, X25]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X24]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [SP, #88]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [X24, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X0, 508e58 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [SP, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X22, <571e10>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STR XZR, [X0, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X22, #3856]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X14, X14, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 508bc0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X19]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X12, X12, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 508d08 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x1e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X23, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X1, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X0, SP, #88	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 515de0 <hypre_AuxParCSRMatrixCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #88]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X22, #40]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 508e0c <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 508640 <hypre_IJMatrixCreateParCSR>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X22, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [X24, #56]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X23, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 508b68 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 529428 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X24, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X0, X21,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
UBFM X25, X21, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X21, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GT 508b7c <hypre_IJMatrixSetDiagOffdSizesParCSR+0x54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X0, X25]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X0, [X23]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X23, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBNZ X0, 508df8 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 529428 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
B 508df8 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 529428 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
B 508cc4 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x19c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1

Source file and lines	IJMatrix_parcsr.c:178-221
Module	exec

The function is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:178-182,188-221.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

hypre_AuxParCSRMatrixCreate: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:213
hypre_CAlloc: 3 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:198
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:206
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:206
hypre_IJMatrixCreateParCSR: 1 occurrences►
- /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c:190

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function does not load or store any data.

General properties

nb instructions	171
nb uops	171
loop length	684
used w registers	0
used x registers	25
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	13

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	21.38 cycles
front end	21.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	17.50	17.50	19.00	19.00	19.00	19.00	0.00	0.00	0.00	0.00	22.67	22.67	22.67	14.00	14.00
cycles	17.50	17.50	19.00	19.00	19.00	19.00	0.00	0.00	0.00	0.00	22.67	22.67	22.67	14.00	14.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	21.38
Dispatch	22.67
Overall L1	22.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	26%
load	26%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 22.67 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 508b28

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.25	0.25	0.25	0.25	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X20, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X22, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X24, X3, [X0, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
STR X25, [SP, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X3, [SP, #88]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X24, 508e78 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x350>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X23, [X24, #56]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X23, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X0, 508e90 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x368>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X11, X0, X21,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
UBFM X25, X21, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X24, [X24, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X21, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 508eb0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x388>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X13, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ANDS X2, X21, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
LDR X14, [X13], #8	1	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ X4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
B.EQ 508c28 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x100>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508c10 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xe8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508c00 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508bf0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508be0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508bd0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0xa8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X2, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 508e30 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X8, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X9, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X12, [X20, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X14, X14, X12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13, X4,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X21, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508cb0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x188>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X11]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X23]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X20, [X23, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X0, 508ed4 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x3ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X13, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ANDS X11, X21, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	N/A
LDR X12, [X13], #8	1	0	0	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
B.EQ 508d70 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x248>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d58 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x230>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d48 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x220>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d38 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x210>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d28 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x200>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508d18 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x1f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 508e44 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x31c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X2, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X7, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X8, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X9, [X19, X3,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X12, X12, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13, X3,LSL #3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X21, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 508df8 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X0, X25]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X24]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [SP, #88]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X19, [X24, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X0, 508e58 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x330>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [SP, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X22, <571e10>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STR XZR, [X0, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X22, #3856]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X14, X14, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X14, [X13]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 508bc0 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X19]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X12, X12, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
STR X12, [X13]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 508d08 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x1e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X23, #24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X1, XZR, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X3, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X0, SP, #88	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 515de0 <hypre_AuxParCSRMatrixCreate>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDR X0, [SP, #88]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X22, #40]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 508e0c <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2e4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 508640 <hypre_IJMatrixCreateParCSR>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X22, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X23, [X24, #56]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X21, [X23, #16]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBNZ X0, 508b68 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x40>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 529428 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X24, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X0, X21,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
UBFM X25, X21, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X21, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GT 508b7c <hypre_IJMatrixSetDiagOffdSizesParCSR+0x54>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X0, X25]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X0, [X23]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X0, [X24]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X1, [X23, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBNZ X0, 508df8 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 529428 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
B 508df8 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x2d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X21, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
BL 529428 <hypre_CAlloc>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
B 508cc4 <hypre_IJMatrixSetDiagOffdSizesParCSR+0x19c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

▶Scalability Runs Description

Run 1x1	Number processes: 1Number nodes: NARun Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_NUM_THREADS: 1OMP_PLACES: threads
Run 1x2	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x4	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x8	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x16	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x24	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x32	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 32OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x40	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 40OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x48	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 48OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x56	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 56OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x64	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 64OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(1x1) Efficiency	(1x1) Potential Speed-Up (%)	(1x2) Efficiency	(1x2) Potential Speed-Up (%)	(1x4) Efficiency	(1x4) Potential Speed-Up (%)	(1x8) Efficiency	(1x8) Potential Speed-Up (%)	(1x16) Efficiency	(1x16) Potential Speed-Up (%)	(1x24) Efficiency	(1x24) Potential Speed-Up (%)	(1x32) Efficiency	(1x32) Potential Speed-Up (%)	(1x40) Efficiency	(1x40) Potential Speed-Up (%)	(1x48) Efficiency	(1x48) Potential Speed-Up (%)	(1x56) Efficiency	(1x56) Potential Speed-Up (%)	(1x64) Efficiency	(1x64) Potential Speed-Up (%)
1	0	3.08	0	3.6	0	5.77	0	13.07	0	21.72	0	21.56	0	30.56	0	41.19	0	27.47	0	41.76	0

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
1x1	1	1	1	1	0.079999998211861	0.023114750161767
1x2	1	3.08	3.08	2	0.049999997019768	0.013848435133696
1x4	1	3.6	3.6	4	0.079999998211861	0.02167359739542
1x8	1	5.77	5.77	8	0.089999996125698	0.022413088008761
1x16	1	13.07	13.07	16	0.075000002980232	0.011645053513348
1x24	1	21.72	21.72	24	0.064999997615814	0.0073774079792202
1x32	1	21.56	21.56	32	0.08500000089407	0.0079418709501624
1x40	1	30.56	30.56	40	0.074999995529652	0.0059265070594847
1x48	1	41.19	41.19	48	0.064999997615814	0.0043834773823619
1x56	1	27.47	27.47	56	0.11499999463558	0.0066807018592954
1x64	1	41.76	41.76	64	0.084999993443489	0.004312529694289

Name	Coverage (%)	Time (s)
▼hypre_IJMatrixSetDiagOffdSizesParCSR–	0.02	0.08
○Loop 3066 - IJMatrix_parcsr.c:207-208 - exec	0.01	0.05
○Loop 3065 - IJMatrix_parcsr.c:199-200 - exec	0.01	0.04

Report Configuration

Vectorization

Details

Workaround

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency