OV - exec - Loop 784

	Loop Id: 784	Module: exec	Source: par_multi_interp.c:550-576 [...]	Coverage: 0.26%

0x45cf84 ADD	X9, X27, X4,LSL #3

0x45cf88 LDR	X5, [X27, X4,LSL #3]

0x45cf8c UBFM	X2, X5, #61, #60

0x45cf90 ADD	X6, X2, #8

0x45cf94 LDR	X0, [X28, X2]

0x45cf98 LDR	X3, [X28, X6]

0x45cf9c CMP	X0, X3

0x45cfa0 B.GE	45d11c

0x45cfa4 SUB	X16, X3, X0

0x45cfa8 ANDS	X17, X16, #0x7

0x45cfac B.EQ	45d074

0x45cfb0 CMP	X17, #1

0x45cfb4 B.EQ	45d058

0x45cfb8 CMP	X17, #2

0x45cfbc B.EQ	45d044

0x45cfc0 CMP	X17, #3

0x45cfc4 B.EQ	45d030

0x45cfc8 CMP	X17, #4

0x45cfcc B.EQ	45d01c

0x45cfd0 CMP	X17, #5

0x45cfd4 B.EQ	45d008

0x45cfd8 CMP	X17, #6

0x45cfdc B.EQ	45cff4

0x45cfe0 LDR	X18, [X20, X0,LSL #3]

0x45cfe4 ADD	X0, X0, #1

0x45cfe8 LDR	X1, [X22, X18,LSL #3]

0x45cfec CMP	X1, X19

0x45cff0 B.EQ	45d4e8

0x45cff4 LDR	X13, [X20, X0,LSL #3]

0x45cff8 ADD	X0, X0, #1

0x45cffc LDR	X14, [X22, X13,LSL #3]

0x45d000 CMP	X14, X19

0x45d004 B.EQ	45d4e8

0x45d008 LDR	X12, [X20, X0,LSL #3]

0x45d00c ADD	X0, X0, #1

0x45d010 LDR	X10, [X22, X12,LSL #3]

0x45d014 CMP	X10, X19

0x45d018 B.EQ	45d4e8

0x45d01c LDR	X15, [X20, X0,LSL #3]

0x45d020 ADD	X0, X0, #1

0x45d024 LDR	X16, [X22, X15,LSL #3]

0x45d028 CMP	X16, X19

0x45d02c B.EQ	45d4e8

0x45d030 LDR	X17, [X20, X0,LSL #3]

0x45d034 ADD	X0, X0, #1

0x45d038 LDR	X18, [X22, X17,LSL #3]

0x45d03c CMP	X18, X19

0x45d040 B.EQ	45d4e8

0x45d044 LDR	X1, [X20, X0,LSL #3]

0x45d048 ADD	X0, X0, #1

0x45d04c LDR	X13, [X22, X1,LSL #3]

0x45d050 CMP	X13, X19

0x45d054 B.EQ	45d4e8

0x45d058 LDR	X14, [X20, X0,LSL #3]

0x45d05c LDR	X12, [X22, X14,LSL #3]

0x45d060 CMP	X12, X19

0x45d064 B.EQ	45d4e8

0x45d068 ADD	X0, X0, #1

0x45d06c CMP	X0, X3

0x45d070 B.EQ	45d11c

  (786) 0x45d074 LDR	X18, [X20, X0,LSL #3]

  (786) 0x45d078 ADD	X10, X0, #1

  (786) 0x45d07c ADD	X16, X0, #3

  (786) 0x45d080 ADD	X15, X0, #4

  (786) 0x45d084 ADD	X14, X0, #5

  (786) 0x45d088 ADD	X13, X0, #6

  (786) 0x45d08c ADD	X17, X0, #7

  (786) 0x45d090 ADD	X12, X10, #1

  (786) 0x45d094 ADD	X0, X0, #8

  (786) 0x45d098 LDR	X1, [X22, X18,LSL #3]

  (786) 0x45d09c CMP	X1, X19

  (786) 0x45d0a0 B.EQ	45d4e8

  (786) 0x45d0a4 LDR	X10, [X20, X10,LSL #3]

  (786) 0x45d0a8 LDR	X18, [X22, X10,LSL #3]

  (786) 0x45d0ac CMP	X18, X19

  (786) 0x45d0b0 B.EQ	45d4e8

  (786) 0x45d0b4 LDR	X12, [X20, X12,LSL #3]

  (786) 0x45d0b8 LDR	X1, [X22, X12,LSL #3]

  (786) 0x45d0bc CMP	X1, X19

  (786) 0x45d0c0 B.EQ	45d4e8

  (786) 0x45d0c4 LDR	X16, [X20, X16,LSL #3]

  (786) 0x45d0c8 LDR	X10, [X22, X16,LSL #3]

  (786) 0x45d0cc CMP	X10, X19

  (786) 0x45d0d0 B.EQ	45d4e8

  (786) 0x45d0d4 LDR	X15, [X20, X15,LSL #3]

  (786) 0x45d0d8 LDR	X18, [X22, X15,LSL #3]

  (786) 0x45d0dc CMP	X18, X19

  (786) 0x45d0e0 B.EQ	45d4e8

  (786) 0x45d0e4 LDR	X14, [X20, X14,LSL #3]

  (786) 0x45d0e8 LDR	X12, [X22, X14,LSL #3]

  (786) 0x45d0ec CMP	X12, X19

  (786) 0x45d0f0 B.EQ	45d4e8

  (786) 0x45d0f4 LDR	X13, [X20, X13,LSL #3]

  (786) 0x45d0f8 LDR	X1, [X22, X13,LSL #3]

  (786) 0x45d0fc CMP	X1, X19

  (786) 0x45d100 B.EQ	45d4e8

  (786) 0x45d104 LDR	X17, [X20, X17,LSL #3]

  (786) 0x45d108 LDR	X16, [X22, X17,LSL #3]

  (786) 0x45d10c CMP	X16, X19

  (786) 0x45d110 B.EQ	45d4e8

  (786) 0x45d114 CMP	X0, X3

  (786) 0x45d118 B.NE	45d074

0x45d11c LDR	X3, [X8, X6]

0x45d120 LDR	X0, [X8, X2]

0x45d124 CMP	X0, X3

0x45d128 B.GE	45d2a4

0x45d12c SUB	X6, X3, X0

0x45d130 ANDS	X10, X6, #0x7

0x45d134 B.EQ	45d1fc

0x45d138 CMP	X10, #1

0x45d13c B.EQ	45d1e0

0x45d140 CMP	X10, #2

0x45d144 B.EQ	45d1cc

0x45d148 CMP	X10, #3

0x45d14c B.EQ	45d1b8

0x45d150 CMP	X10, #4

0x45d154 B.EQ	45d1a4

0x45d158 CMP	X10, #5

0x45d15c B.EQ	45d190

0x45d160 CMP	X10, #6

0x45d164 B.EQ	45d17c

0x45d168 LDR	X15, [X21, X0,LSL #3]

0x45d16c ADD	X0, X0, #1

0x45d170 LDR	X18, [X26, X15,LSL #3]

0x45d174 CMP	X18, X19

0x45d178 B.EQ	45d4e8

0x45d17c LDR	X14, [X21, X0,LSL #3]

0x45d180 ADD	X0, X0, #1

0x45d184 LDR	X12, [X26, X14,LSL #3]

0x45d188 CMP	X12, X19

0x45d18c B.EQ	45d4e8

0x45d190 LDR	X13, [X21, X0,LSL #3]

0x45d194 ADD	X0, X0, #1

0x45d198 LDR	X1, [X26, X13,LSL #3]

0x45d19c CMP	X1, X19

0x45d1a0 B.EQ	45d4e8

0x45d1a4 LDR	X17, [X21, X0,LSL #3]

0x45d1a8 ADD	X0, X0, #1

0x45d1ac LDR	X16, [X26, X17,LSL #3]

0x45d1b0 CMP	X16, X19

0x45d1b4 B.EQ	45d4e8

0x45d1b8 LDR	X6, [X21, X0,LSL #3]

0x45d1bc ADD	X0, X0, #1

0x45d1c0 LDR	X10, [X26, X6,LSL #3]

0x45d1c4 CMP	X10, X19

0x45d1c8 B.EQ	45d4e8

0x45d1cc LDR	X15, [X21, X0,LSL #3]

0x45d1d0 ADD	X0, X0, #1

0x45d1d4 LDR	X18, [X26, X15,LSL #3]

0x45d1d8 CMP	X18, X19

0x45d1dc B.EQ	45d4e8

0x45d1e0 LDR	X14, [X21, X0,LSL #3]

0x45d1e4 LDR	X12, [X26, X14,LSL #3]

0x45d1e8 CMP	X12, X19

0x45d1ec B.EQ	45d4e8

0x45d1f0 ADD	X0, X0, #1

0x45d1f4 CMP	X0, X3

0x45d1f8 B.EQ	45d2a4

  (785) 0x45d1fc LDR	X17, [X21, X0,LSL #3]

  (785) 0x45d200 ADD	X1, X0, #1

  (785) 0x45d204 ADD	X10, X0, #3

  (785) 0x45d208 ADD	X15, X0, #4

  (785) 0x45d20c ADD	X18, X0, #5

  (785) 0x45d210 ADD	X6, X0, #6

  (785) 0x45d214 ADD	X13, X0, #7

  (785) 0x45d218 ADD	X16, X1, #1

  (785) 0x45d21c ADD	X0, X0, #8

  (785) 0x45d220 LDR	X14, [X26, X17,LSL #3]

  (785) 0x45d224 CMP	X14, X19

  (785) 0x45d228 B.EQ	45d4e8

  (785) 0x45d22c LDR	X12, [X21, X1,LSL #3]

  (785) 0x45d230 LDR	X1, [X26, X12,LSL #3]

  (785) 0x45d234 CMP	X1, X19

  (785) 0x45d238 B.EQ	45d4e8

  (785) 0x45d23c LDR	X17, [X21, X16,LSL #3]

  (785) 0x45d240 LDR	X16, [X26, X17,LSL #3]

  (785) 0x45d244 CMP	X16, X19

  (785) 0x45d248 B.EQ	45d4e8

  (785) 0x45d24c LDR	X10, [X21, X10,LSL #3]

  (785) 0x45d250 LDR	X14, [X26, X10,LSL #3]

  (785) 0x45d254 CMP	X14, X19

  (785) 0x45d258 B.EQ	45d4e8

  (785) 0x45d25c LDR	X15, [X21, X15,LSL #3]

  (785) 0x45d260 LDR	X12, [X26, X15,LSL #3]

  (785) 0x45d264 CMP	X12, X19

  (785) 0x45d268 B.EQ	45d4e8

  (785) 0x45d26c LDR	X18, [X21, X18,LSL #3]

  (785) 0x45d270 LDR	X1, [X26, X18,LSL #3]

  (785) 0x45d274 CMP	X1, X19

  (785) 0x45d278 B.EQ	45d4e8

  (785) 0x45d27c LDR	X6, [X21, X6,LSL #3]

  (785) 0x45d280 LDR	X17, [X26, X6,LSL #3]

  (785) 0x45d284 CMP	X17, X19

  (785) 0x45d288 B.EQ	45d4e8

  (785) 0x45d28c LDR	X13, [X21, X13,LSL #3]

  (785) 0x45d290 LDR	X16, [X26, X13,LSL #3]

  (785) 0x45d294 CMP	X16, X19

  (785) 0x45d298 B.EQ	45d4e8

  (785) 0x45d29c CMP	X0, X3

  (785) 0x45d2a0 B.NE	45d1fc

0x45d2a4 SUB	X4, X4, #1

0x45d2a8 CMP	X23, X4

0x45d2ac B.LE	45cf84

0x45d4e8 UBFM	X3, X23, #61, #60

0x45d4ec ADD	X23, X23, #1

0x45d4f0 LDR	X0, [X27, X3]

0x45d4f4 STR	X0, [X9]

0x45d4f8 STR	X5, [X27, X3]

0x45d4fc STR	X7, [X22, X2]

0x45d500 B	45d2a8

/home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 550 - 576

--------------------------------------------------------------------------------

550:       for (i = pass_array_size-1; i > cnt-1; i--)

551:       {

552:          i1 = pass_array[i];

553:          no_break = 1;

554:          for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++)

555:          {

556:             j1 = S_diag_j[j];

557:             if (assigned[j1] == pass-1)

[...]

568:             for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++)

569:             {

570:                j1 = S_offd_j[j];

571:                if (assigned_offd[j1] == pass-1)

572:                {

573:                   pass_array[i++] = pass_array[cnt];

574:                   pass_array[cnt++] = i1;

575:                   assigned[i1] = pass;

576:                   break;

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

Coverage (%)	Name	Source Location	Module
►100.00+	hypre_BoomerAMGSetup	par_amg_setup.c:737	exec
○	hypre_PCGSetup	pcg.c:234	exec
○	main	amg.c:398	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	amg.c:253	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.08
Bottlenecks	P0, P1,
Function	hypre_BoomerAMGBuildMultipass
Source	par_multi_interp.c:550-554,par_multi_interp.c:557-557,par_multi_interp.c:568-568,par_multi_interp.c:571-576
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	17.00
CQA cycles if no scalar integer	17.00
CQA cycles if FP arith vectorized	17.00
CQA cycles if fully vectorized	4.25
Front-end cycles	15.75
P0 cycles	17.00
P1 cycles	17.00
P2 cycles	13.75
P3 cycles	13.75
P4 cycles	13.75
P5 cycles	13.75
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	12.50
P11 cycles	12.17
P12 cycles	12.33
P13 cycles	1.50
P14 cycles	1.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	126.00
Nb uops	126.00
Nb loads	NA
Nb stores	3.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	0.00
Bytes prefetched	0.00
Bytes loaded	0.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	25.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.08
Bottlenecks	P0, P1,
Function	hypre_BoomerAMGBuildMultipass
Source	par_multi_interp.c:550-554,par_multi_interp.c:557-557,par_multi_interp.c:568-568,par_multi_interp.c:571-576
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	17.00
CQA cycles if no scalar integer	17.00
CQA cycles if FP arith vectorized	17.00
CQA cycles if fully vectorized	4.25
Front-end cycles	15.75
P0 cycles	17.00
P1 cycles	17.00
P2 cycles	13.75
P3 cycles	13.75
P4 cycles	13.75
P5 cycles	13.75
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	12.50
P11 cycles	12.17
P12 cycles	12.33
P13 cycles	1.50
P14 cycles	1.50
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	126.00
Nb uops	126.00
Nb loads	NA
Nb stores	3.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	0.00
Bytes prefetched	0.00
Bytes loaded	0.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	0.00
Vectorization ratio store	0.00
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	25.00
Vector-efficiency ratio store	25.00
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	25.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	hypre_BoomerAMGBuildMultipass
Source file and lines	par_multi_interp.c:550-576
Module	exec

The loop is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:550-557,568-576.

Analyzed code is defined in /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c:550-554,557,568,571-576.

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 1820 paths individually, rerun with max-paths=1820
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 1820 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 17.00 to 4.25 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop does not load or store any data.

General properties

nb instructions	126
nb uops	126
loop length	504
used w registers	0
used x registers	26
used b registers	0
used h registers	0
used s registers	0
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.75 cycles
front end	15.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	17.00	17.00	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	12.50	12.17	12.33	1.50	1.50
cycles	17.00	17.00	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	12.50	12.17	12.33	1.50	1.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.75
Dispatch	17.00
Overall L1	17.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	25%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 17.00 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 45cf84

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
ADD X9, X27, X4,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X27, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
UBFM X2, X5, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X6, X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X0, [X28, X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X28, X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 45d11c <hypre_BoomerAMGBuildMultipass+0xf3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X16, X3, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ANDS X17, X16, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	N/A
B.EQ 45d074 <hypre_BoomerAMGBuildMultipass+0xe94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d058 <hypre_BoomerAMGBuildMultipass+0xe78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d044 <hypre_BoomerAMGBuildMultipass+0xe64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d030 <hypre_BoomerAMGBuildMultipass+0xe50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d01c <hypre_BoomerAMGBuildMultipass+0xe3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d008 <hypre_BoomerAMGBuildMultipass+0xe28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45cff4 <hypre_BoomerAMGBuildMultipass+0xe14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X1, [X22, X18,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X14, [X22, X13,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X22, X12,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X10, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X22, X15,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X18, [X22, X17,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X13, [X22, X1,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X22, X14,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d11c <hypre_BoomerAMGBuildMultipass+0xf3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X8, X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 45d2a4 <hypre_BoomerAMGBuildMultipass+0x10c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X6, X3, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ANDS X10, X6, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1fc <hypre_BoomerAMGBuildMultipass+0x101c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1e0 <hypre_BoomerAMGBuildMultipass+0x1000>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1cc <hypre_BoomerAMGBuildMultipass+0xfec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1b8 <hypre_BoomerAMGBuildMultipass+0xfd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1a4 <hypre_BoomerAMGBuildMultipass+0xfc4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d190 <hypre_BoomerAMGBuildMultipass+0xfb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d17c <hypre_BoomerAMGBuildMultipass+0xf9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X18, [X26, X15,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X12, [X26, X14,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X1, [X26, X13,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X26, X6,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X10, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X18, [X26, X15,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26, X14,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d2a4 <hypre_BoomerAMGBuildMultipass+0x10c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X23, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 45cf84 <hypre_BoomerAMGBuildMultipass+0xda4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X23, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X23, X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X0, [X27, X3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X9]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X5, [X27, X3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X7, [X22, X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 45d2a8 <hypre_BoomerAMGBuildMultipass+0x10c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	hypre_BoomerAMGBuildMultipass
Source file and lines	par_multi_interp.c:550-576
Module	exec

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. If you really need to analyze all of the 1820 paths individually, rerun with max-paths=1820
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop does not load or store any data.

General properties

nb instructions	126
nb uops	126
loop length	504
used w registers	0
used x registers	26
used b registers	0
used h registers	0
used s registers	0
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	15.75 cycles
front end	15.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	17.00	17.00	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	12.50	12.17	12.33	1.50	1.50
cycles	17.00	17.00	13.75	13.75	13.75	13.75	0.00	0.00	0.00	0.00	12.50	12.17	12.33	1.50	1.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	15.75
Dispatch	17.00
Overall L1	17.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	25%
load	25%
store	25%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 17.00 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 45cf84

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
ADD X9, X27, X4,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X5, [X27, X4,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
UBFM X2, X5, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X6, X2, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X0, [X28, X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X28, X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 45d11c <hypre_BoomerAMGBuildMultipass+0xf3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X16, X3, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ANDS X17, X16, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	N/A
B.EQ 45d074 <hypre_BoomerAMGBuildMultipass+0xe94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d058 <hypre_BoomerAMGBuildMultipass+0xe78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d044 <hypre_BoomerAMGBuildMultipass+0xe64>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d030 <hypre_BoomerAMGBuildMultipass+0xe50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d01c <hypre_BoomerAMGBuildMultipass+0xe3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d008 <hypre_BoomerAMGBuildMultipass+0xe28>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45cff4 <hypre_BoomerAMGBuildMultipass+0xe14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X1, [X22, X18,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X14, [X22, X13,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X14, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X22, X12,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X10, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X22, X15,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X18, [X22, X17,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X13, [X22, X1,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X13, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X20, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X22, X14,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d11c <hypre_BoomerAMGBuildMultipass+0xf3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X8, X6]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X8, X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 45d2a4 <hypre_BoomerAMGBuildMultipass+0x10c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X6, X3, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ANDS X10, X6, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1fc <hypre_BoomerAMGBuildMultipass+0x101c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1e0 <hypre_BoomerAMGBuildMultipass+0x1000>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1cc <hypre_BoomerAMGBuildMultipass+0xfec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1b8 <hypre_BoomerAMGBuildMultipass+0xfd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d1a4 <hypre_BoomerAMGBuildMultipass+0xfc4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d190 <hypre_BoomerAMGBuildMultipass+0xfb0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X10, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d17c <hypre_BoomerAMGBuildMultipass+0xf9c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X18, [X26, X15,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X12, [X26, X14,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X1, [X26, X13,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X1, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X16, [X26, X17,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X10, [X26, X6,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X10, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X18, [X26, X15,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X21, X0,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X12, [X26, X14,LSL #3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X12, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d4e8 <hypre_BoomerAMGBuildMultipass+0x1308>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X0, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 45d2a4 <hypre_BoomerAMGBuildMultipass+0x10c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X4, X4, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
CMP X23, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 45cf84 <hypre_BoomerAMGBuildMultipass+0xda4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UBFM X3, X23, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X23, X23, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR X0, [X27, X3]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR X0, [X9]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X5, [X27, X3]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X7, [X22, X2]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 45d2a8 <hypre_BoomerAMGBuildMultipass+0x10c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

▶Scalability Runs Description

Run 1x1	Number processes: 1Number nodes: NARun Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_NUM_THREADS: 1OMP_PLACES: threads
Run 1x2	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x4	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x8	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x16	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x24	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x32	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 32OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x40	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 40OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x48	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 48OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x56	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 56OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x64	Number processes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-188-3659/intel/AMG/run/oneview_runs/multicore/gcc_1/oneview_run_1781892409OMP_NUM_THREADS: 64OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(1x1) Efficiency	(1x1) Potential Speed-Up (%)	(1x2) Efficiency	(1x2) Potential Speed-Up (%)	(1x4) Efficiency	(1x4) Potential Speed-Up (%)	(1x8) Efficiency	(1x8) Potential Speed-Up (%)	(1x16) Efficiency	(1x16) Potential Speed-Up (%)	(1x24) Efficiency	(1x24) Potential Speed-Up (%)	(1x32) Efficiency	(1x32) Potential Speed-Up (%)	(1x40) Efficiency	(1x40) Potential Speed-Up (%)	(1x48) Efficiency	(1x48) Potential Speed-Up (%)	(1x56) Efficiency	(1x56) Potential Speed-Up (%)	(1x64) Efficiency	(1x64) Potential Speed-Up (%)
1	0	1.8	0	3.6	0	6.19	0	11.2	0	16.9	0	22.05	0	28.03	0	34.22	0	40.83	0	45.12	0

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
1x1	1	1	1	1	0.90500009059906	0.26148560643196
1x2	1	1.8	1.8	2	0.96999996900558	0.26865965127945
1x4	1	3.6	3.6	4	0.90499997138977	0.24518255889416
1x8	1	6.19	6.19	8	0.94999998807907	0.23658262193203
1x16	1	11.2	11.2	16	0.99000006914139	0.15371470153332
1x24	1	16.9	16.9	24	0.9449999332428	0.10725617408752
1x32	1	22.05	22.05	32	0.93999993801117	0.087827749550343
1x40	1	28.03	28.03	40	0.92500001192093	0.073093585669994
1x48	1	34.22	34.22	48	0.88499999046326	0.059682734310627
1x56	1	40.83	40.83	56	0.87499994039536	0.05083142593503
1x64	1	45.12	45.12	64	0.88999992609024	0.045154720544815

Report Configuration

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency