OV - exec - Function advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer2D<double>&, clover::Buffer1D<double>&, clover::Buffer1D<double>&, int, int, int) [clone ._omp

	Function: advec_mom_kernel(int, int, int, int, clover::Buffer2D<double>&, clover::Buffer2D<double>&, ...	Module: exec	Source: advec_mom.cpp:167-172 [...]	Coverage (incl. loops): 1.76% \| (excl. loops): 0.01%

/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp: 167 - 172

--------------------------------------------------------------------------------

167: #pragma omp parallel for simd collapse(2)

168:       for (int j = (y_min - 1 + 1); j < (y_max + 2 + 2); j++) {

169:         for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) {

170:           node_mass_post(i, j) = 0.25 * (density1(i + 0, j - 1) * post_vol(i + 0, j - 1) + density1(i, j) * post_vol(i, j) +

171:                                          density1(i - 1, j - 1) * post_vol(i - 1, j - 1) + density1(i - 1, j + 0) * post_vol(i - 1, j + 0));

172:           node_mass_pre(i, j) = node_mass_post(i, j) - node_flux(i + 0, j - 1) + node_flux(i, j);

0x430280 STP	X29, X30, [SP, #752]!

0x430284 ADD	X29, SP, #0

0x430288 STP	X19, X20, [SP, #16]

0x43028c ORR	X20, XZR, X0

0x430290 STP	X23, X24, [SP, #48]

0x430294 LDR	W1, [X0, #40]

0x430298 LDR	W2, [X0, #52]

0x43029c LDR	W23, [X20, #48]

0x4302a0 ADD	W4, W1, #1

0x4302a4 LDR	W0, [X0, #44]

0x4302a8 ADD	W3, W2, #4

0x4302ac STP	W3, W4, [SP, #208]

0x4302b0 CMP	W23, W3

0x4302b4 B.GE	43069c

0x4302b8 ADD	W19, W0, #3

0x4302bc STP	X21, X22, [SP, #32]

0x4302c0 SUB	W22, W3, W23

0x4302c4 CMP	W4, W19

0x4302c8 B.GE	430698

0x4302cc SUB	W5, W19, W4

0x4302d0 MUL	W24, W22, W5

0x4302d4 STR	W5, [SP, #264]

0x4302d8 BL	410210

0x4302dc ORR	W21, WZR, W0

0x4302e0 BL	410240

0x4302e4 UDIV	W7, W24, W21

0x4302e8 ORR	W6, WZR, W0

0x4302ec MSUB	W8, W7, W21, W24

0x4302f0 CMP	W0, W8

0x4302f4 B.CC	4306c8

0x4302f8 MADD	W1, W7, W6, W8

0x4302fc ADD	W9, W7, W1

0x430300 STR	W9, [SP, #268]

0x430304 CMP	W1, W9

0x430308 B.CS	430698

0x43030c LDR	W10, [SP, #264]

0x430310 FMOV	D31, #0.2500000

0x430314 FMOV	V30.2D, #0.2500000

0x430318 STP	X25, X26, [SP, #64]

0x43031c LDR	W14, [SP, #212]

0x430320 UDIV	W11, W1, W10

0x430324 STP	X27, X28, [SP, #80]

0x430328 LDP	X15, X27, [X20, #16]

0x43032c LDP	X22, X26, [X20]

0x430330 ORR	X25, XZR, X15

0x430334 MSUB	W12, W11, W10, W1

0x430338 LDR	X24, [X20, #32]

0x43033c ADD	W13, W11, W23

0x430340 SBFM	X23, X13, #0, #31

0x430344 ADD	W28, W12, W14

0x430348 SUB	W4, W19, W28

(195) 0x43034c CMP	W7, W4

(195) 0x430350 CSEL	W2, W7, W4, #9

(195) 0x430354 ADD	W16, W1, W2

(195) 0x430358 STR	W16, [SP, #140]

(195) 0x43035c CMP	W1, W16

(195) 0x430360 B.CS	430674

(195) 0x430364 LDR	X30, [X22]

(195) 0x430368 SUB	W17, W23, #1

(195) 0x43036c SBFM	X18, X17, #0, #31

(195) 0x430370 LDR	X1, [X24]

(195) 0x430374 LDR	X4, [X26]

(195) 0x430378 MUL	X20, X18, X30

(195) 0x43037c LDR	X0, [X25]

(195) 0x430380 MUL	X21, X30, X23

(195) 0x430384 MUL	X3, X18, X1

(195) 0x430388 LDR	X19, [X27]

(195) 0x43038c MUL	X30, X1, X23

(195) 0x430390 MUL	X10, X18, X4

(195) 0x430394 LDR	X7, [X27, #16]

(195) 0x430398 MUL	X11, X4, X23

(195) 0x43039c MUL	X12, X23, X0

(195) 0x4303a0 LDR	X14, [X25, #16]

(195) 0x4303a4 MUL	X13, X23, X19

(195) 0x4303a8 LDR	X6, [X22, #16]

(195) 0x4303ac STR	X7, [SP, #104]

(195) 0x4303b0 LDR	X5, [X24, #16]

(195) 0x4303b4 LDR	X16, [X26, #16]

(195) 0x4303b8 STP	X14, X11, [SP, #144]

(195) 0x4303bc STP	X13, X10, [SP, #160]

(195) 0x4303c0 STP	X12, X21, [SP, #176]

(195) 0x4303c4 STP	X3, X20, [SP, #192]

(195) 0x4303c8 CMP	W2, #1

(195) 0x4303cc B.EQ	4305cc

(195) 0x4303d0 SBFM	X18, X28, #0, #31

(195) 0x4303d4 UBFM	W19, W2, #1, #31

(195) 0x4303d8 ADD	X8, X20, X18

(195) 0x4303dc ADD	X9, X3, X18

(195) 0x4303e0 ADD	X21, X21, X18

(195) 0x4303e4 ADD	X1, X30, X18

(195) 0x4303e8 ADD	X15, X6, X8,LSL #3

(195) 0x4303ec UBFM	X17, X8, #61, #60

(195) 0x4303f0 UBFM	X20, X1, #61, #60

(195) 0x4303f4 ADD	X4, X5, X9,LSL #3

(195) 0x4303f8 UBFM	X8, X9, #61, #60

(195) 0x4303fc UBFM	X9, X21, #61, #60

(195) 0x430400 ADD	X3, X6, X21,LSL #3

(195) 0x430404 SUB	X7, X8, #8

(195) 0x430408 SUB	X21, X17, #8

(195) 0x43040c ADD	X1, X5, X1,LSL #3

(195) 0x430410 STP	X20, X9, [SP, #216]

(195) 0x430414 SUB	X9, X9, #8

(195) 0x430418 SUB	X20, X20, #8

(195) 0x43041c ADD	X12, X12, X18

(195) 0x430420 MOVZ	X0, #0

(195) 0x430424 STR	X7, [SP, #112]

(195) 0x430428 ADD	X7, X10, X18

(195) 0x43042c ADD	X10, X14, X12,LSL #3

(195) 0x430430 STP	X9, X20, [SP, #120]

(195) 0x430434 ADD	X9, X16, X7,LSL #3

(195) 0x430438 UBFM	X7, X7, #61, #60

(195) 0x43043c ADD	X20, X11, X18

(195) 0x430440 ADD	X18, X13, X18

(195) 0x430444 SUB	X14, X17, #8

(195) 0x430448 STP	X8, X21, [SP, #232]

(195) 0x43044c ADD	X14, X6, X14

(195) 0x430450 UBFM	X21, X12, #61, #60

(195) 0x430454 LDR	X8, [SP, #112]

(195) 0x430458 STR	X7, [SP, #248]

(195) 0x43045c LDR	X7, [SP, #104]

(195) 0x430460 LDR	X11, [SP, #120]

(195) 0x430464 ADD	X13, X5, X8

(195) 0x430468 LDR	X8, [SP, #128]

(195) 0x43046c ADD	X7, X7, X18,LSL #3

(195) 0x430470 UBFM	X18, X18, #61, #60

(195) 0x430474 STR	X18, [SP, #256]

(195) 0x430478 ADD	X12, X6, X11

(195) 0x43047c UBFM	X18, X19, #60, #59

(195) 0x430480 ADD	X11, X5, X8

(195) 0x430484 ADD	X8, X16, X20,LSL #3

(195) 0x430488 UBFM	X20, X20, #61, #60

(195) 0x43048c TBZ	W19, #0, 430510

(195) 0x430490 LDP	X0, X19, [SP, #216]

(195) 0x430494 LDR	Q20, [X6, X17]

(195) 0x430498 LDR	Q18, [X6, X19]

(195) 0x43049c LDR	X19, [SP, #128]

(195) 0x4304a0 LDR	X17, [SP, #112]

(195) 0x4304a4 LDR	Q19, [X5, X0]

(195) 0x4304a8 MOVZ	X0, #16

(195) 0x4304ac LDR	Q7, [X5, X19]

(195) 0x4304b0 LDR	X19, [SP, #120]

(195) 0x4304b4 LDR	Q17, [X5, X17]

(195) 0x4304b8 FMUL	V0.2D, V19.2D, V18.2D

(195) 0x4304bc LDR	X17, [SP, #240]

(195) 0x4304c0 LDR	Q6, [X6, X19]

(195) 0x4304c4 LDR	X19, [SP, #232]

(195) 0x4304c8 LDR	Q16, [X6, X17]

(195) 0x4304cc FMUL	V1.2D, V7.2D, V6.2D

(195) 0x4304d0 LDR	X17, [SP, #144]

(195) 0x4304d4 LDR	Q21, [X5, X19]

(195) 0x4304d8 FMLA	V1.2D, V17.2D, V16.2D

(195) 0x4304dc FMLA	V0.2D, V21.2D, V20.2D

(195) 0x4304e0 FADD	V2.2D, V0.2D, V1.2D

(195) 0x4304e4 FMUL	V3.2D, V2.2D, V30.2D

(195) 0x4304e8 STR	Q3, [X17, X21]

(195) 0x4304ec LDR	Q5, [X16, X20]

(195) 0x4304f0 LDP	X21, X20, [SP, #248]

(195) 0x4304f4 LDR	X17, [SP, #104]

(195) 0x4304f8 LDR	Q4, [X16, X21]

(195) 0x4304fc FSUB	V22.2D, V5.2D, V4.2D

(195) 0x430500 FADD	V23.2D, V22.2D, V3.2D

(195) 0x430504 STR	Q23, [X17, X20]

(195) 0x430508 CMP	X0, X18

(195) 0x43050c B.EQ	4305c0

  (196) 0x430510 LDR	Q24, [X1, X0]

  (196) 0x430514 ADD	X19, X0, #16

  (196) 0x430518 LDR	Q25, [X3, X0]

  (196) 0x43051c LDR	Q28, [X11, X0]

  (196) 0x430520 LDR	Q27, [X12, X0]

  (196) 0x430524 LDR	Q29, [X4, X0]

  (196) 0x430528 FMUL	V26.2D, V24.2D, V25.2D

  (196) 0x43052c LDR	Q20, [X15, X0]

  (196) 0x430530 LDR	Q19, [X13, X0]

  (196) 0x430534 FMUL	V18.2D, V28.2D, V27.2D

  (196) 0x430538 LDR	Q0, [X14, X0]

  (196) 0x43053c FMLA	V26.2D, V29.2D, V20.2D

  (196) 0x430540 FMLA	V18.2D, V19.2D, V0.2D

  (196) 0x430544 FADD	V17.2D, V26.2D, V18.2D

  (196) 0x430548 FMUL	V7.2D, V17.2D, V30.2D

  (196) 0x43054c STR	Q7, [X10, X0]

  (196) 0x430550 LDR	Q16, [X8, X0]

  (196) 0x430554 LDR	Q6, [X9, X0]

  (196) 0x430558 FSUB	V1.2D, V16.2D, V6.2D

  (196) 0x43055c FADD	V21.2D, V1.2D, V7.2D

  (196) 0x430560 STR	Q21, [X7, X0]

  (196) 0x430564 ADD	X0, X0, #32

  (196) 0x430568 LDR	Q2, [X1, X19]

  (196) 0x43056c LDR	Q3, [X3, X19]

  (196) 0x430570 LDR	Q5, [X11, X19]

  (196) 0x430574 LDR	Q4, [X12, X19]

  (196) 0x430578 LDR	Q22, [X4, X19]

  (196) 0x43057c FMUL	V23.2D, V2.2D, V3.2D

  (196) 0x430580 LDR	Q24, [X15, X19]

  (196) 0x430584 LDR	Q25, [X13, X19]

  (196) 0x430588 FMUL	V28.2D, V5.2D, V4.2D

  (196) 0x43058c LDR	Q27, [X14, X19]

  (196) 0x430590 FMLA	V23.2D, V22.2D, V24.2D

  (196) 0x430594 FMLA	V28.2D, V25.2D, V27.2D

  (196) 0x430598 FADD	V29.2D, V23.2D, V28.2D

  (196) 0x43059c FMUL	V26.2D, V29.2D, V30.2D

  (196) 0x4305a0 STR	Q26, [X10, X19]

  (196) 0x4305a4 LDR	Q20, [X8, X19]

  (196) 0x4305a8 LDR	Q19, [X9, X19]

  (196) 0x4305ac FSUB	V18.2D, V20.2D, V19.2D

  (196) 0x4305b0 FADD	V0.2D, V18.2D, V26.2D

  (196) 0x4305b4 STR	Q0, [X7, X19]

  (196) 0x4305b8 CMP	X0, X18

  (196) 0x4305bc B.NE	430510

(195) 0x4305c0 TBZ	W2, #0, 430670

(195) 0x4305c4 AND	W2, W2, #0xfffffffe

(195) 0x4305c8 ADD	W28, W28, W2

(195) 0x4305cc LDP	X10, X3, [SP, #176]

(195) 0x4305d0 SUB	W15, W28, #1

(195) 0x4305d4 SBFM	X14, X28, #0, #31

(195) 0x4305d8 SBFM	X1, X15, #0, #31

(195) 0x4305dc ADD	X4, X30, X14

(195) 0x4305e0 ADD	X30, X30, X1

(195) 0x4305e4 LDP	X13, X9, [SP, #192]

(195) 0x4305e8 ADD	X12, X3, X1

(195) 0x4305ec ADD	X7, X3, X14

(195) 0x4305f0 ADD	X18, X10, X14

(195) 0x4305f4 LDR	D17, [X5, X4,LSL #3]

(195) 0x4305f8 ADD	X0, X13, X1

(195) 0x4305fc ADD	X21, X9, X1

(195) 0x430600 LDR	D7, [X5, X30,LSL #3]

(195) 0x430604 ADD	X11, X13, X14

(195) 0x430608 ADD	X8, X9, X14

(195) 0x43060c LDR	D16, [X6, X12,LSL #3]

(195) 0x430610 LDR	D6, [X6, X7,LSL #3]

(195) 0x430614 LDR	D21, [X5, X0,LSL #3]

(195) 0x430618 LDR	D2, [X6, X21,LSL #3]

(195) 0x43061c FMUL	D1, D7, D16

(195) 0x430620 LDR	D3, [X5, X11,LSL #3]

(195) 0x430624 FMUL	D5, D17, D6

(195) 0x430628 LDR	D4, [X6, X8,LSL #3]

(195) 0x43062c LDP	X6, X5, [SP, #144]

(195) 0x430630 FMADD	D22, D21, D2, D1

(195) 0x430634 LDR	X2, [SP, #168]

(195) 0x430638 FMADD	D23, D3, D4, D5

(195) 0x43063c ADD	X17, X5, X14

(195) 0x430640 LDR	X20, [SP, #160]

(195) 0x430644 LDR	X19, [SP, #104]

(195) 0x430648 ADD	X28, X2, X14

(195) 0x43064c ADD	X15, X20, X14

(195) 0x430650 FADD	D24, D23, D22

(195) 0x430654 FMUL	D28, D24, D31

(195) 0x430658 STR	D28, [X6, X18,LSL #3]

(195) 0x43065c LDR	D27, [X16, X17,LSL #3]

(195) 0x430660 LDR	D25, [X16, X28,LSL #3]

(195) 0x430664 FSUB	D29, D27, S25

(195) 0x430668 FADD	D26, D29, D28

(195) 0x43066c STR	D26, [X19, X15,LSL #3]

(195) 0x430670 LDR	W1, [SP, #140]

(195) 0x430674 ADD	X23, X23, #1

(195) 0x430678 LDR	W16, [SP, #208]

(195) 0x43067c CMP	W16, W23

(195) 0x430680 B.LE	4306ac

(195) 0x430684 LDR	W14, [SP, #268]

(195) 0x430688 LDR	W28, [SP, #212]

(195) 0x43068c LDR	W4, [SP, #264]

(195) 0x430690 SUB	W7, W14, W1

(195) 0x430694 B	43034c

0x430698 LDP	X21, X22, [SP, #32]

0x43069c LDP	X19, X20, [SP, #16]

0x4306a0 LDP	X23, X24, [SP, #48]

0x4306a4 LDP	X29, X30, [SP], #272

0x4306a8 RET

0x4306ac LDP	X21, X22, [SP, #32]

0x4306b0 LDP	X25, X26, [SP, #64]

0x4306b4 LDP	X27, X28, [SP, #80]

0x4306b8 LDP	X19, X20, [SP, #16]

0x4306bc LDP	X23, X24, [SP, #48]

0x4306c0 LDP	X29, X30, [SP], #272

0x4306c4 RET

0x4306c8 ADD	W7, W7, #1

0x4306cc MOVZ	W8, #0

0x4306d0 B	4302f8

0x4306d4 HINT	#0

0x4306d8 HINT	#0

0x4306dc HINT	#0

Coverage (%)	Name	Source Location	Module
►50.55+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►49.45+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►49.68+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►25.42+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►24.91+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►74.47+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►12.86+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►12.67+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►87.21+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►6.44+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►6.35+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►93.51+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►3.30+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►3.19+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►95.77+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►2.15+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►2.09+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►96.77+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.62+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►1.61+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►97.48+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.28+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►1.24+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Source Location	Module
►97.91+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.06+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:101	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec
►1.04+	GOMP_parallel		libgomp.so.1.0.0
○	advec_mom_kernel(int, int, int[...]	advec_mom.cpp:167	exec
○	advec_mom_driver(global_variab[...]	advec_mom.cpp:244	exec
○	advection(global_variables&)	advection.cpp:70	exec
○	hydro(global_variables&, paral[...]	basic_string.h:1231	exec
○	main	clover_leaf.cpp:209	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	clover_leaf.cpp:51	exec

Coverage (%)	Name	Module
►98.22+	omp_fulfill_event	libgomp.so.1.0.0
○	start_thread	libc.so.6
○	thread_start	libc.so.6

Coverage (%)	Name	Module
►98.41+	omp_fulfill_event	libgomp.so.1.0.0
○	start_thread	libc.so.6
○	thread_start	libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run 1x1

Source file and lines	advec_mom.cpp:167-172
Module	exec

The function is defined in:

/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:167-172

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.00 to 12.50 cycles (2.00x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 27% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 25.00 to 15.62 cycles (1.60x speedup).

Details

Store and arithmetical VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 25.00 to 9.50 cycles (2.63x speedup).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:169
- /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:169

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 18 bytes. The binary function is storing 6 bytes.

General properties

nb instructions	69
nb uops	66
loop length	276
used w registers	22
used x registers	16
used b registers	0
used h registers	0
used s registers	1
used d registers	1
used q registers	0
used v registers	1
used z registers	0
nb stack references	21

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	8.25 cycles
front end	8.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	4.50	4.50	7.50	7.50	7.50	7.50	0.50	0.50	0.50	0.50	9.50	9.17	9.33	4.50	4.50
cycles	4.50	4.50	7.50	7.50	7.50	7.50	0.50	0.50	0.50	0.50	9.50	9.17	9.33	4.50	4.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-25.00

Cycles summary

Front-end	8.25
Dispatch	9.50
DIV/SQRT	10.00-25.00
Overall L1	10.00-25.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
other	0%

all	50%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

INT+FP

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	9%

Vector efficiency ratios

INT

all	27%
load	36%
store	38%
mul	12%
add-sub	13%
fma	12%
other	22%

all	37%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	37%

INT+FP

all	27%
load	36%
store	38%
mul	12%
add-sub	13%
fma	12%
div/sqrt	12%
other	26%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.00 cycles. At this rate:

0% of peak load performance is reached (0.72 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
0% of peak store performance is reached (0.24 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 430280

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #752]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR W1, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W2, [X0, #52]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W23, [X20, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ADD W4, W1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDR W0, [X0, #44]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD W3, W2, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STP W3, W4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CMP W23, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.GE 43069c <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x41c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W19, W0, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB W22, W3, W23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMP W4, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.GE 430698 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB W5, W19, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MUL W24, W22, W5	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (12.5%)
STR W5, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 410210 <@plt_start@+0x1f0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W21, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410240 <@plt_start@+0x220>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UDIV W7, W24, W21	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	N/A
ORR W6, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MSUB W8, W7, W21, W24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
CMP W0, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.CC 4306c8 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x448>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MADD W1, W7, W6, W8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
ADD W9, W7, W1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STR W9, [SP, #268]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
CMP W1, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.CS 430698 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W10, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
FMOV D31, #0.2500000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
FMOV V30.2D, #0.2500000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR W14, [SP, #212]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
UDIV W11, W1, W10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	scal (12.5%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X15, X27, [X20, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X22, X26, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ORR X25, XZR, X15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MSUB W12, W11, W10, W1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LDR X24, [X20, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W13, W11, W23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SBFM X23, X13, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (100.0%)
ADD W28, W12, W14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W4, W19, W28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #272	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #272	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W7, W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W8, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 4302f8 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run 1x1

Source file and lines	advec_mom.cpp:167-172
Module	exec

The function is defined in:

/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/context.h:69
/home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:167-172

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 25.00 to 9.50 cycles (2.63x speedup).

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:169
- /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/build/CloverLeaf2.0-CXX/src/omp/advec_mom.cpp:169

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 18 bytes. The binary function is storing 6 bytes.

General properties

nb instructions	69
nb uops	66
loop length	276
used w registers	22
used x registers	16
used b registers	0
used h registers	0
used s registers	1
used d registers	1
used q registers	0
used v registers	1
used z registers	0
nb stack references	21

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	8.25 cycles
front end	8.25 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	4.50	4.50	7.50	7.50	7.50	7.50	0.50	0.50	0.50	0.50	9.50	9.17	9.33	4.50	4.50
cycles	4.50	4.50	7.50	7.50	7.50	7.50	0.50	0.50	0.50	0.50	9.50	9.17	9.33	4.50	4.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-25.00

Cycles summary

Front-end	8.25
Dispatch	9.50
DIV/SQRT	10.00-25.00
Overall L1	10.00-25.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
other	0%

all	50%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	50%

INT+FP

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	9%

Vector efficiency ratios

INT

all	27%
load	36%
store	38%
mul	12%
add-sub	13%
fma	12%
other	22%

all	37%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	37%

INT+FP

all	27%
load	36%
store	38%
mul	12%
add-sub	13%
fma	12%
div/sqrt	12%
other	26%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.00 cycles. At this rate:

0% of peak load performance is reached (0.72 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
0% of peak store performance is reached (0.24 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 430280

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #752]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X20, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR W1, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W2, [X0, #52]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W23, [X20, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ADD W4, W1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDR W0, [X0, #44]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD W3, W2, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STP W3, W4, [SP, #208]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CMP W23, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.GE 43069c <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x41c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W19, W0, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
SUB W22, W3, W23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMP W4, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.GE 430698 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB W5, W19, W4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MUL W24, W22, W5	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (12.5%)
STR W5, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 410210 <@plt_start@+0x1f0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W21, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410240 <@plt_start@+0x220>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UDIV W7, W24, W21	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	N/A
ORR W6, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MSUB W8, W7, W21, W24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
CMP W0, W8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.CC 4306c8 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x448>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MADD W1, W7, W6, W8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
ADD W9, W7, W1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STR W9, [SP, #268]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
CMP W1, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.CS 430698 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x418>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W10, [SP, #264]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
FMOV D31, #0.2500000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
FMOV V30.2D, #0.2500000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	vect (50.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR W14, [SP, #212]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
UDIV W11, W1, W10	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	scal (12.5%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X15, X27, [X20, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X22, X26, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ORR X25, XZR, X15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MSUB W12, W11, W10, W1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
LDR X24, [X20, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W13, W11, W23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SBFM X23, X13, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (100.0%)
ADD W28, W12, W14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W4, W19, W28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #272	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #272	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD W7, W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W8, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 4302f8 <_Z16advec_mom_kerneliiiiRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_RNS_8Buffer1DIdEES5_iii._omp_fn.9+0x78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A

▶Scalability Runs Description

Run 1x1	Number processes: 1Number nodes: NARun Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_NUM_THREADS: 1OMP_PLACES: threads
Run 1x2	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x4	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x8	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x16	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x24	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x32	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 32OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x40	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 40OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x48	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 48OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x56	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 56OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads
Run 1x64	Number processes: 1Run Command: <executable>MPI Command: mpirun -n <number_processes> --bind-to core --map-by package:PE=64 --rank-by fill --report-bindings Dataset: Run Directory: /home/eoseret/qaas/qaas_runs/178-219-7589/intel/CloverLeaf2.0-CXX/run/oneview_runs/multicore/gcc_4/oneview_run_1782227431OMP_NUM_THREADS: 64OMP_PROC_BIND: spreadOMP_DISPLAY_AFFINITY: TRUEOMP_AFFINITY_FORMAT: 'OMP: pid %P tid %i thread %n bound to OS proc set {%A}'OMP_DISPLAY_ENV: TRUEOMP_PLACES: threads

(1x1) Efficiency	(1x1) Potential Speed-Up (%)	(1x2) Efficiency	(1x2) Potential Speed-Up (%)	(1x4) Efficiency	(1x4) Potential Speed-Up (%)	(1x8) Efficiency	(1x8) Potential Speed-Up (%)	(1x16) Efficiency	(1x16) Potential Speed-Up (%)	(1x24) Efficiency	(1x24) Potential Speed-Up (%)	(1x32) Efficiency	(1x32) Potential Speed-Up (%)	(1x40) Efficiency	(1x40) Potential Speed-Up (%)	(1x48) Efficiency	(1x48) Potential Speed-Up (%)	(1x56) Efficiency	(1x56) Potential Speed-Up (%)	(1x64) Efficiency	(1x64) Potential Speed-Up (%)
1	0	0.98	0.03	0.96	0.07	0.78	0.42	0.4	1.44	0.26	1.96	0.2	2.31	0.16	2.49	0.13	2.64	0.11	2.76	0.1	2.85

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
1x1	1	1	1	1	26.124996185303	1.7577086687088
1x2	2	0.98	1.97	2	13.304998397827	1.768475651741
1x4	4	0.96	3.85	4	6.8700008392334	1.7706933021545
1x8	8	0.78	6.26	8	4.2050004005432	1.9215832948685
1x16	16	0.4	6.43	16	4.0499997138977	2.4149403572083
1x24	24	0.26	6.28	24	4.1049995422363	2.6529285907745
1x32	32	0.2	6.29	32	4.159999370575	2.8739354610443
1x40	40	0.16	6.42	40	4.0099987983704	2.9710590839386
1x48	48	0.13	6.38	48	4.0449991226196	3.0446021556854
1x56	56	0.11	6.27	56	4.1249990463257	3.1036736965179
1x64	64	0.1	6.17	64	4.1900005340576	3.1495859622955

Name	Coverage (%)	Time (s)
▼advec_mom_kernel(int, int, int, int, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clover::Buffer2D&, clo...–	1.76	26.13
▼Loop 195 - advec_mom.cpp:169-172 - exec–	0.00	0.00
○Loop 196 - advec_mom.cpp:170-172 - exec	1.75	26.04

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency