OV - exec - Function _QMviscosity_kernel_modulePviscosity_kernel..omp

	Function: _QMviscosity_kernel_modulePviscosity_kernel..omp_par	Module: exec	Source: viscosity_kernel.f90:28-98 [...]	Coverage (incl. loops): 2.44% \| (excl. loops): 0.00%

/home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90: 28 - 98

--------------------------------------------------------------------------------

28:   SUBROUTINE viscosity_kernel(x_min,x_max,y_min,y_max,    &

[...]

52:     !$OMP DO PRIVATE(ugrad,vgrad,div,strain2,pgradx,pgrady,pgradx2,pgrady2,limiter,pgrad,xgrad,ygrad,grad,grad2,dirx,diry)

53:     DO k=y_min,y_max

54:     !$OMP SIMD

55:       DO j=x_min,x_max

56:         ugrad=(xvel0(j+1,k  )+xvel0(j+1,k+1))-(xvel0(j  ,k  )+xvel0(j  ,k+1))

57:

58:         vgrad=(yvel0(j  ,k+1)+yvel0(j+1,k+1))-(yvel0(j  ,k  )+yvel0(j+1,k  ))

59:

60:         div = (celldx(j)*(ugrad)+  celldy(k)*(vgrad))

61:

62:         strain2 = 0.5_8*(xvel0(j,  k+1) + xvel0(j+1,k+1)-xvel0(j  ,k  )-xvel0(j+1,k  ))/celldy(k) &

63:           + 0.5_8*(yvel0(j+1,k  ) + yvel0(j+1,k+1)-yvel0(j  ,k  )-yvel0(j  ,k+1))/celldx(j)

64:

65:         pgradx=(pressure(j+1,k)-pressure(j-1,k))/(celldx(j)+celldx(j+1))

66:         pgrady=(pressure(j,k+1)-pressure(j,k-1))/(celldy(k)+celldy(k+1))

67:

68:         pgradx2 = pgradx*pgradx

69:         pgrady2 = pgrady*pgrady

70:

71:         limiter = ((0.5_8*(ugrad)/celldx(j))*pgradx2+(0.5_8*(vgrad)/celldy(k))*pgrady2+strain2*pgradx*pgrady)  &

72:           /MAX(pgradx2+pgrady2,1.0e-16_8)

73:

74:         IF ((limiter.GT.0.0).OR.(div.GE.0.0))THEN

75:           viscosity(j,k) = 0.0

76:         ELSE

77:           dirx=1.0_8

78:           IF(pgradx.LT.0.0) dirx=-1.0_8

79:           pgradx = dirx*MAX(1.0e-16_8,ABS(pgradx))

80:           diry=1.0_8

81:           IF(pgradx.LT.0.0) diry=-1.0_8

82:           pgrady = diry*MAX(1.0e-16_8,ABS(pgrady))

83:           pgrad = SQRT(pgradx**2+pgrady**2)

84:           xgrad = ABS(celldx(j)*pgrad/pgradx)

85:           ygrad = ABS(celldy(k)*pgrad/pgrady)

86:           grad  = MIN(xgrad,ygrad)

87:           grad2 = grad*grad

88:

89:           viscosity(j,k)=2.0_8*density0(j,k)*grad2*limiter*limiter

[...]

98:   END SUBROUTINE viscosity_kernel

0x449710 SUB	SP, SP, #176

0x449714 STP	X29, X30, [SP, #80]

0x449718 STP	X28, X27, [SP, #96]

0x44971c STP	X26, X25, [SP, #112]

0x449720 STP	X24, X23, [SP, #128]

0x449724 STP	X22, X21, [SP, #144]

0x449728 STP	X20, X19, [SP, #160]

0x44972c ADD	X29, SP, #80

0x449730 LDP	X8, X9, [X2]

0x449734 LDP	X12, X13, [X2, #48]

0x449738 ADRP	X19,

0x44973c ADD	X19, X19, #936

0x449740 ORR	X0, XZR, X19

0x449744 LDR	X10, [X2, #16]

0x449748 LDP	X15, X14, [X2, #64]

0x44974c LDR	X11, [X2, #32]

0x449750 LDR	X27, [X2, #128]

0x449754 LDR	X28, [X8]

0x449758 LDR	X8, [X9]

0x44975c LDR	W9, [X12]

0x449760 LDR	X20, [X10]

0x449764 STR	X14, [SP, #24]

0x449768 LDP	X23, X14, [X2, #96]

0x44976c LDR	X24, [X11]

0x449770 STUR	X15, [X29, #488]

0x449774 STR	X8, [SP, #40]

0x449778 LDR	W8, [X13]

0x44977c LDP	X21, X22, [X2, #80]

0x449780 LDP	X25, X26, [X2, #112]

0x449784 SUBS	W8, W8, W9

0x449788 STUR	X14, [X29, #480]

0x44978c STR	W9, [SP, #36]

0x449790 CSINV	W8, W8, WZR, #10

0x449794 STP	W8, WZR, [X29, #500]

0x449798 MOVZ	W8, #1

0x44979c STUR	W8, [X29, #496]

0x4497a0 BL	4101f0

0x4497a4 SUB	X3, X29, #4

0x4497a8 SUB	X4, X29, #8

0x4497ac SUB	X5, X29, #12

0x4497b0 SUB	X6, X29, #16

0x4497b4 ORR	W1, WZR, W0

0x4497b8 STR	WZR, [SP]

0x4497bc ORR	X0, XZR, X19

0x4497c0 MOVZ	W2, #34

0x4497c4 MOVZ	W7, #1

0x4497c8 STR	W1, [SP, #20]

0x4497cc BL	410090

0x4497d0 LDP	W8, W10, [X29, #500]

0x4497d4 SUB	W8, W8, W10

0x4497d8 CMN	W8, #1

0x4497dc B.EQ	449c38

0x4497e0 LDR	W11, [SP, #36]

0x4497e4 FMOV	D1, #1.0000000

0x4497e8 FMOV	D2, #0.5000000

0x4497ec PTRUE	P1.D, ALL

0x4497f0 MOVI	V4.2D, #0

0x4497f4 ORR	W9, WZR, WZR

0x4497f8 ADD	W10, W10, W11

0x4497fc STR	W10, [SP, #36]

0x449800 LDUR	X10, [X29, #488]

0x449804 LDR	W11, [X10]

0x449808 LDR	X10, [SP, #24]

0x44980c LDR	W14, [X10]

0x449810 ADD	W15, W11, #1

0x449814 SUBS	W12, W14, W11

0x449818 ADD	W16, W14, #1

0x44981c SUB	W14, W14, #1

0x449820 CSINC	W13, WZR, WZR, #11

0x449824 ADDS	W12, W12, #1

0x449828 CSEL	W10, WZR, W13, #0

0x44982c CMP	W16, W15

0x449830 ADRP	X16,

0x449834 SUB	W15, W11, #1

0x449838 LDR	D0, [X16, #2840]

0x44983c CCMP	W14, W15, #8, #10

0x449840 CNTD	X15, ALL

0x449844 STUR	W10, [X29, #488]

0x449848 CSINC	W10, WZR, WZR, #10

0x44984c SUBS	W16, W12, W15

0x449850 CSEL	W16, WZR, W16, #3

0x449854 WHILELO	P0.D, WZR, W12

0x449858 STR	W10, [SP, #24]

0x44985c DUP	Z3.D, Z0.D[0]

0x449860 B	449870

    (1060) 0x449864 CMP	W9, W8

    (1060) 0x449868 ADD	W9, W9, #1

    (1060) 0x44986c B.EQ	449c38

    (1060) 0x449870 LDUR	W10, [X29, #488]

    (1060) 0x449874 CBZ	W10, 449864

    (1060) 0x449878 LDR	W10, [SP, #36]

    (1060) 0x44987c ADD	W3, W10, W9

    (1060) 0x449880 LDR	X10, [SP, #40]

    (1060) 0x449884 ADD	W18, W3, #1

    (1060) 0x449888 SBFM	X17, X3, #0, #31

    (1060) 0x44988c SUB	W3, W3, #1

    (1060) 0x449890 SBFM	X18, X18, #0, #31

    (1060) 0x449894 SUB	X0, X17, X20

    (1060) 0x449898 SBFM	X3, X3, #0, #31

    (1060) 0x44989c SUB	X4, X18, X20

    (1060) 0x4498a0 SUB	X3, X3, X20

    (1060) 0x4498a4 MUL	X17, X0, X10

    (1060) 0x4498a8 MUL	X18, X4, X10

    (1060) 0x4498ac LDUR	X10, [X29, #480]

    (1060) 0x4498b0 MUL	X2, X4, X24

    (1060) 0x4498b4 MUL	X3, X3, X24

    (1060) 0x4498b8 ADD	X2, X25, X2,LSL #3

    (1060) 0x4498bc ADD	X3, X25, X3,LSL #3

    (1060) 0x4498c0 LDR	D5, [X10, X0,LSL #3]

    (1060) 0x4498c4 LDR	D6, [X10, X4,LSL #3]

    (1060) 0x4498c8 LDR	W10, [SP, #24]

    (1060) 0x4498cc MUL	X0, X0, X24

    (1060) 0x4498d0 ADD	X1, X25, X0,LSL #3

    (1060) 0x4498d4 ADD	X4, X27, X0,LSL #3

    (1060) 0x4498d8 FADD	D7, D6, D5

    (1060) 0x4498dc FDIV	D6, D1, D5

    (1060) 0x4498e0 FDIV	D7, D1, D7

    (1060) 0x4498e4 CBZ	W10, 449a88

  (1063) 0x4498e8 ORR	W5, WZR, WZR

  (1063) 0x4498ec B	449910

0x4498f0 HINT	#0

0x4498f4 HINT	#0

0x4498f8 HINT	#0

0x4498fc HINT	#0

(1062) 0x449900 STR	XZR, [X4, X6,LSL #3]

  (1063) 0x449904 ADD	W5, W5, #1

  (1063) 0x449908 CMP	W12, W5

  (1063) 0x44990c B.LS	449864

  (1063) 0x449910 ADD	W30, W11, W5

  (1063) 0x449914 ADD	W10, W30, #1

  (1063) 0x449918 SBFM	X6, X30, #0, #31

  (1063) 0x44991c SBFM	X10, X10, #0, #31

  (1063) 0x449920 SUB	X6, X6, X28

  (1063) 0x449924 SUB	X7, X10, X28

  (1063) 0x449928 ADD	X19, X6, X17

  (1063) 0x44992c ADD	X13, X6, X18

  (1063) 0x449930 ADD	X10, X7, X17

  (1063) 0x449934 ADD	X14, X7, X18

  (1063) 0x449938 LDR	D21, [X21, X19,LSL #3]

  (1063) 0x44993c LDR	D22, [X21, X13,LSL #3]

  (1063) 0x449940 LDR	D23, [X22, X13,LSL #3]

  (1063) 0x449944 LDR	D26, [X22, X19,LSL #3]

  (1063) 0x449948 LDR	D19, [X21, X10,LSL #3]

  (1063) 0x44994c LDR	D20, [X21, X14,LSL #3]

  (1063) 0x449950 LDR	D24, [X22, X14,LSL #3]

  (1063) 0x449954 LDR	D25, [X22, X10,LSL #3]

  (1063) 0x449958 FADD	D17, D21, D22

  (1063) 0x44995c FADD	D16, D20, D19

  (1063) 0x449960 FADD	D18, D26, D25

  (1063) 0x449964 FSUB	D17, D16, S17

  (1063) 0x449968 FADD	D16, D24, D23

  (1063) 0x44996c FSUB	D18, D16, S18

  (1063) 0x449970 LDR	D16, [X23, X6,LSL #3]

  (1063) 0x449974 FMUL	D27, D16, D17

  (1063) 0x449978 FMADD	D27, D5, D18, D27

  (1063) 0x44997c FCMP	D27, #0

  (1063) 0x449980 B.GE	449900

  (1063) 0x449984 FADD	D19, D19, D21

  (1063) 0x449988 SUB	W10, W30, #1

  (1063) 0x44998c FMUL	D17, D17, D2

  (1063) 0x449990 FMUL	D18, D18, D2

  (1063) 0x449994 SBFM	X10, X10, #0, #31

  (1063) 0x449998 FSUB	D19, D20, S19

  (1063) 0x44999c FADD	D20, D23, D26

  (1063) 0x4499a0 SUB	X10, X10, X28

  (1063) 0x4499a4 FSUB	D20, D24, S20

  (1063) 0x4499a8 FADD	D19, D19, D22

  (1063) 0x4499ac LDR	D22, [X3, X6,LSL #3]

  (1063) 0x4499b0 FADD	D20, D20, D25

  (1063) 0x4499b4 FMUL	D19, D19, D2

  (1063) 0x4499b8 FMUL	D20, D20, D2

  (1063) 0x4499bc FDIV	D20, D20, D16

  (1063) 0x4499c0 FMADD	D21, D19, D6, D20

  (1063) 0x4499c4 LDR	D19, [X1, X7,LSL #3]

  (1063) 0x4499c8 LDR	D20, [X1, X10,LSL #3]

  (1063) 0x4499cc FSUB	D19, D19, S20

  (1063) 0x4499d0 LDR	D20, [X23, X7,LSL #3]

  (1063) 0x4499d4 FADD	D20, D20, D16

  (1063) 0x4499d8 FDIV	D19, D19, D20

  (1063) 0x4499dc LDR	D20, [X2, X6,LSL #3]

  (1063) 0x4499e0 FSUB	D20, D20, S22

  (1063) 0x4499e4 FMUL	D20, D20, D7

  (1063) 0x4499e8 FMUL	D23, D20, D20

  (1063) 0x4499ec FMUL	D18, D18, D23

  (1063) 0x4499f0 FMUL	D22, D19, D19

  (1063) 0x4499f4 FMUL	D21, D19, D21

  (1063) 0x4499f8 FMUL	D17, D17, D22

  (1063) 0x4499fc FDIV	D17, D17, D16

  (1063) 0x449a00 FMADD	D17, D21, D20, D17

  (1063) 0x449a04 FMADD	D17, D18, D6, D17

  (1063) 0x449a08 FADD	D18, D23, D22

  (1063) 0x449a0c FMAXNM	D18, D18, D0

  (1063) 0x449a10 FDIV	D17, D17, D18

  (1063) 0x449a14 FCMP	D17, #0

  (1063) 0x449a18 B.GT	449900

  (1063) 0x449a1c FABS	D18, D19

  (1063) 0x449a20 FCMP	D19, #0

  (1063) 0x449a24 FABS	D19, D20

  (1063) 0x449a28 ADD	X10, X6, X0

  (1063) 0x449a2c FMAXNM	D18, D18, D0

  (1063) 0x449a30 FMAXNM	D19, D19, D0

  (1063) 0x449a34 FNEG	D21, D18

  (1063) 0x449a38 FNEG	D20, D19

  (1063) 0x449a3c FCSEL	D18, D21, D18, #11

  (1063) 0x449a40 FCSEL	D19, D20, D19, #11

  (1063) 0x449a44 FMUL	D20, D18, D18

  (1063) 0x449a48 FMADD	D20, D19, D19, D20

  (1063) 0x449a4c FSQRT	D20, D20

  (1063) 0x449a50 FMUL	D16, D20, D16

  (1063) 0x449a54 FDIV	D16, D16, D18

  (1063) 0x449a58 FMUL	D18, D20, D5

  (1063) 0x449a5c FDIV	D18, D18, D19

  (1063) 0x449a60 FABS	D16, D16

  (1063) 0x449a64 FABS	D18, D18

  (1063) 0x449a68 FMINNM	D16, D16, D18

  (1063) 0x449a6c LDR	D18, [X26, X10,LSL #3]

  (1063) 0x449a70 FMUL	D16, D16, D17

  (1063) 0x449a74 FMUL	D16, D16, D16

  (1063) 0x449a78 FADD	D17, D18, D18

  (1063) 0x449a7c FMUL	D16, D16, D17

  (1063) 0x449a80 STR	D16, [X27, X10,LSL #3]

  (1063) 0x449a84 B	449904

    (1060) 0x449a88 DUP	Z5.D, Z5.D[0]

    (1060) 0x449a8c DUP	Z6.D, Z6.D[0]

    (1060) 0x449a90 SUB	X6, XZR, X15

    (1060) 0x449a94 ORR	P2.B, P0/Z, P0.B, P0.B

    (1060) 0x449a98 ORR	W5, WZR, W11

    (1060) 0x449a9c DUP	Z7.D, Z7.D[0]

      (1061) 0x449aa0 ADD	W7, W5, #1

      (1061) 0x449aa4 SUB	W30, W5, #1

      (1061) 0x449aa8 SBFM	X10, X5, #0, #31

      (1061) 0x449aac ADD	W6, W6, W15

      (1061) 0x449ab0 ADD	W5, W5, W15

      (1061) 0x449ab4 SBFM	X14, X7, #0, #31

      (1061) 0x449ab8 SBFM	X30, X30, #0, #31

      (1061) 0x449abc SUB	X7, X10, X28

      (1061) 0x449ac0 LD1D	{Z16.D}, P2/Z, [X23, X7,LSL #3]

      (1061) 0x449ac4 SUB	X10, X14, X28

      (1061) 0x449ac8 SUB	X14, X30, X28

      (1061) 0x449acc ADD	X30, X7, X18

      (1061) 0x449ad0 LD1D	{Z21.D}, P2/Z, [X2, X7,LSL #3]

      (1061) 0x449ad4 LD1D	{Z22.D}, P2/Z, [X3, X7,LSL #3]

      (1061) 0x449ad8 LD1D	{Z17.D}, P2/Z, [X1, X10,LSL #3]

      (1061) 0x449adc LD1D	{Z18.D}, P2/Z, [X1, X14,LSL #3]

      (1061) 0x449ae0 LD1D	{Z19.D}, P2/Z, [X23, X10,LSL #3]

      (1061) 0x449ae4 ADD	X14, X7, X17

      (1061) 0x449ae8 ADD	X19, X10, X18

      (1061) 0x449aec ADD	X10, X10, X17

      (1061) 0x449af0 LD1D	{Z24.D}, P2/Z, [X21, X30,LSL #3]

      (1061) 0x449af4 LD1D	{Z20.D}, P2/Z, [X22, X14,LSL #3]

      (1061) 0x449af8 LD1D	{Z23.D}, P2/Z, [X21, X14,LSL #3]

      (1061) 0x449afc LD1D	{Z25.D}, P2/Z, [X21, X10,LSL #3]

      (1061) 0x449b00 FSUB	Z21.D, Z21.D, Z22.D

      (1061) 0x449b04 LD1D	{Z26.D}, P2/Z, [X21, X19,LSL #3]

      (1061) 0x449b08 FSUB	Z17.D, Z17.D, Z18.D

      (1061) 0x449b0c FADD	Z18.D, Z19.D, Z16.D

      (1061) 0x449b10 LD1D	{Z19.D}, P2/Z, [X22, X30,LSL #3]

      (1061) 0x449b14 FADD	Z22.D, Z23.D, Z24.D

      (1061) 0x449b18 FMUL	Z21.D, Z21.D, Z7.D

      (1061) 0x449b1c FDIVR	Z18.D, P1/M, Z18.D, Z17.D

      (1061) 0x449b20 LD1D	{Z17.D}, P2/Z, [X22, X19,LSL #3]

      (1061) 0x449b24 FADD	Z27.D, Z19.D, Z20.D

      (1061) 0x449b28 FADD	Z19.D, Z17.D, Z19.D

      (1061) 0x449b2c FSUB	Z27.D, Z17.D, Z27.D

      (1061) 0x449b30 FADD	Z17.D, Z26.D, Z25.D

      (1061) 0x449b34 FSUB	Z17.D, Z17.D, Z22.D

      (1061) 0x449b38 LD1D	{Z22.D}, P2/Z, [X22, X10,LSL #3]

      (1061) 0x449b3c ADD	X10, X7, X0

      (1061) 0x449b40 FADD	Z27.D, Z27.D, Z22.D

      (1061) 0x449b44 FADD	Z20.D, Z20.D, Z22.D

      (1061) 0x449b48 FADD	Z22.D, Z25.D, Z23.D

      (1061) 0x449b4c MOVPRFX	Z23, Z21

      (1061) 0x449b50 FABS	Z23.D, P1/M, Z21.D

      (1061) 0x449b54 MOVPRFX	Z25, Z18

      (1061) 0x449b58 FABS	Z25.D, P1/M, Z18.D

      (1061) 0x449b5c FCMLT	P3.D, P1/Z, Z18.D, #0.0000000

      (1061) 0x449b60 FMUL	Z27.D, P1/M, Z27.D, #0.0000000

      (1061) 0x449b64 FSUB	Z22.D, Z26.D, Z22.D

      (1061) 0x449b68 FMAXNM	Z23.D, P1/M, Z23.D, Z3.D

      (1061) 0x449b6c FSUB	Z19.D, Z19.D, Z20.D

      (1061) 0x449b70 FMUL	Z20.D, Z21.D, Z21.D

      (1061) 0x449b74 FMAXNM	Z25.D, P1/M, Z25.D, Z3.D

      (1061) 0x449b78 FADD	Z22.D, Z22.D, Z24.D

      (1061) 0x449b7c FNEG	Z23.D, P3/M, Z23.D

      (1061) 0x449b80 MOVPRFX	Z24, Z17

      (1061) 0x449b84 FMUL	Z24.D, P1/M, Z24.D, #0.0000000

      (1061) 0x449b88 FDIV	Z27.D, P1/M, Z27.D, Z16.D

      (1061) 0x449b8c FNEG	Z25.D, P3/M, Z25.D

      (1061) 0x449b90 FMUL	Z22.D, P1/M, Z22.D, #0.0000000

      (1061) 0x449b94 FMUL	Z26.D, Z23.D, Z23.D

      (1061) 0x449b98 FMAD	Z22.D, P1/M, Z6.D, Z27.D

      (1061) 0x449b9c FMUL	Z27.D, Z25.D, Z25.D

      (1061) 0x449ba0 FADD	Z26.D, Z26.D, Z27.D

      (1061) 0x449ba4 FMUL	Z27.D, Z18.D, Z18.D

      (1061) 0x449ba8 FMUL	Z18.D, Z18.D, Z22.D

      (1061) 0x449bac MOVPRFX	Z22, Z19

      (1061) 0x449bb0 FMUL	Z22.D, P1/M, Z22.D, #0.0000000

      (1061) 0x449bb4 FSQRT	Z26.D, P1/M, Z26.D

      (1061) 0x449bb8 FMUL	Z24.D, Z24.D, Z27.D

      (1061) 0x449bbc FDIV	Z24.D, P1/M, Z24.D, Z16.D

      (1061) 0x449bc0 FMAD	Z18.D, P1/M, Z21.D, Z24.D

      (1061) 0x449bc4 FMUL	Z21.D, Z22.D, Z20.D

      (1061) 0x449bc8 FADD	Z20.D, Z20.D, Z27.D

      (1061) 0x449bcc FMUL	Z22.D, Z26.D, Z5.D

      (1061) 0x449bd0 FMAXNM	Z20.D, P1/M, Z20.D, Z3.D

      (1061) 0x449bd4 FMLA	Z18.D, P1/M, Z21.D, Z6.D

      (1061) 0x449bd8 FMUL	Z21.D, Z26.D, Z16.D

      (1061) 0x449bdc FDIV	Z22.D, P1/M, Z22.D, Z23.D

      (1061) 0x449be0 FMUL	Z16.D, Z16.D, Z17.D

      (1061) 0x449be4 FDIV	Z21.D, P1/M, Z21.D, Z25.D

      (1061) 0x449be8 FMLA	Z16.D, P1/M, Z5.D, Z19.D

      (1061) 0x449bec FDIV	Z18.D, P1/M, Z18.D, Z20.D

      (1061) 0x449bf0 FCMGE	P3.D, P1/Z, Z16.D, #0.0000000

      (1061) 0x449bf4 FABS	Z22.D, P1/M, Z22.D

      (1061) 0x449bf8 FABS	Z21.D, P1/M, Z21.D

      (1061) 0x449bfc FCMGT	P4.D, P1/Z, Z18.D, #0.0000000

      (1061) 0x449c00 FMINNM	Z21.D, P1/M, Z21.D, Z22.D

      (1061) 0x449c04 SEL	P3.B, P3, P3.B, P4.B

      (1061) 0x449c08 BIC	P4.B, P2/Z, P2.B, P3.B

      (1061) 0x449c0c FMUL	Z17.D, Z21.D, Z18.D

      (1061) 0x449c10 AND	P2.B, P2/Z, P2.B, P3.B

      (1061) 0x449c14 LD1D	{Z16.D}, P4/Z, [X26, X10,LSL #3]

      (1061) 0x449c18 FMUL	Z17.D, Z17.D, Z17.D

      (1061) 0x449c1c FADD	Z16.D, Z16.D, Z16.D

      (1061) 0x449c20 FMUL	Z16.D, Z17.D, Z16.D

      (1061) 0x449c24 ST1D	{Z16.D}, P4, [X27, X10,LSL #3]

      (1061) 0x449c28 ST1D	{Z4.D}, P2, [X4, X7,LSL #3]

      (1061) 0x449c2c WHILELO	P2.D, W6, W16

      (1061) 0x449c30 B.MI	449aa0

    (1060) 0x449c34 B	449864

0x449c38 LDR	W19, [SP, #20]

0x449c3c ADRP	X0,

0x449c40 ADD	X0, X0, #936

0x449c44 ORR	W1, WZR, W19

0x449c48 BL	410380

0x449c4c ADRP	X0,

0x449c50 ADD	X0, X0, #960

0x449c54 ORR	W1, WZR, W19

0x449c58 BL	410050

0x449c5c LDP	X20, X19, [SP, #160]

0x449c60 LDP	X22, X21, [SP, #144]

0x449c64 LDP	X24, X23, [SP, #128]

0x449c68 LDP	X26, X25, [SP, #112]

0x449c6c LDP	X28, X27, [SP, #96]

0x449c70 LDP	X29, X30, [SP, #80]

0x449c74 ADD	SP, SP, #176

0x449c78 RET

0x449c7c HINT	#0

Coverage (%)	Name	Source Location	Module
►98.40+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_launch_thread		libomp.so
○	__kmp_launch_worker(void*)		libomp.so
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.60+	__kmp_invoke_microtask		libomp.so
○	__kmp_invoke_task_func		libomp.so
○	__kmp_fork_call		libomp.so
○	__kmpc_fork_call		libomp.so
○	viscosity_kernel	viscosity_kernel.f90:98	exec
○	viscosity	viscosity.f90:38	exec
○	timestep	timestep.f90:76	exec
○	hydro	hydro.f90:54	exec
○	main	clover_leaf.f90:76	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start		exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_6

Source file and lines	viscosity_kernel.f90:28-98
Module	exec

The function is defined in /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:28,52-89,98.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 15.67 to 1.00 cycles (15.67x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Your function is probably not vectorized. Only 29% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 15.67 to 8.06 cycles (1.94x speedup).

Details

Store and arithmetical VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 4 occurrences►
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 18 bytes. The binary function is storing 21 bytes.

General properties

nb instructions	107
nb uops	102
loop length	428
used w registers	15
used x registers	28
used b registers	0
used h registers	0
used s registers	1
used d registers	3
used q registers	0
used v registers	1
used z registers	2
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	12.75 cycles
front end	12.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	12.00	12.00	12.00	12.00	1.00	1.00	1.00	1.00	15.67	15.67	15.67	9.00	9.00
cycles	3.50	3.50	12.00	12.00	12.00	12.00	1.00	1.00	1.00	1.00	15.67	15.67	15.67	9.00	9.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.75
Dispatch	15.67
Overall L1	15.67

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	6%

Vector efficiency ratios

INT

all	29%
load	37%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	22%
fma	NA (no fma vectorizable/vectorized instructions)
other	29%

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	29%
load	37%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	22%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	29%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.67 cycles. At this rate:

1% of peak load performance is reached (1.15 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.34 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 449710

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
SUB SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X29, X30, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X28, X27, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X26, X25, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X24, X23, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X22, X21, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #80	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDP X8, X9, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X12, X13, [X2, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADRP X19, <48f738>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X19, X19, #936	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X10, [X2, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X15, X14, [X2, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X11, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [X2, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X28, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X8, [X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W9, [X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X20, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X14, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDP X23, X14, [X2, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X24, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STUR X15, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X8, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR W8, [X13]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X21, X22, [X2, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [X2, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STUR X14, [X29, #480]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR W9, [SP, #36]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #500]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STUR W8, [X29, #496]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 4101f0 <@plt_start@+0x1d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X3, X29, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STR W1, [SP, #20]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W10, [X29, #500]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 449c38 <_QMviscosity_kernel_modulePviscosity_kernel..omp_par+0x528>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W11, [SP, #36]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
FMOV D2, #0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
PTRUE P1.D, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVI V4.2D, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
ORR W9, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD W10, W10, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR W10, [SP, #36]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
LDUR X10, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W11, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W14, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ADD W15, W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUBS W12, W14, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD W16, W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W14, W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W13, WZR, WZR, #11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADDS W12, W12, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSEL W10, WZR, W13, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP W16, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
ADRP X16, <47c830>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W15, W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDR D0, [X16, #2840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
CCMP W14, W15, #8, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CNTD X15, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
STUR W10, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
CSINC W10, WZR, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W16, W12, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSEL W16, WZR, W16, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
WHILELO P0.D, WZR, W12	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2	N/A
STR W10, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
DUP Z3.D, Z0.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	vect (100.0%)
B 449870 <_QMviscosity_kernel_modulePviscosity_kernel..omp_par+0x160>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
LDR W19, [SP, #20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ADRP X0, <48fc3c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #936	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <48fc4c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #960	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X22, X21, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X24, X23, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X26, X25, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X28, X27, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_6

Source file and lines	viscosity_kernel.f90:28-98
Module	exec

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)
To reference allocatable arrays, use "allocatable" instead of "pointer" pointers or qualify them with the "contiguous" attribute (Fortran 2008)
For structures, limit to one indirection. For example, use a_b%c instead of a%b%c with a_b set to a%b before this function

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 4 occurrences►
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/kernels/viscosity_kernel.f90:52

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 18 bytes. The binary function is storing 21 bytes.

General properties

nb instructions	107
nb uops	102
loop length	428
used w registers	15
used x registers	28
used b registers	0
used h registers	0
used s registers	1
used d registers	3
used q registers	0
used v registers	1
used z registers	2
nb stack references	22

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	12.75 cycles
front end	12.75 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	12.00	12.00	12.00	12.00	1.00	1.00	1.00	1.00	15.67	15.67	15.67	9.00	9.00
cycles	3.50	3.50	12.00	12.00	12.00	12.00	1.00	1.00	1.00	1.00	15.67	15.67	15.67	9.00	9.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	12.75
Dispatch	15.67
Overall L1	15.67

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	7%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	1%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	6%

Vector efficiency ratios

INT

all	29%
load	37%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	22%
fma	NA (no fma vectorizable/vectorized instructions)
other	29%

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	29%
load	37%
store	28%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	22%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	29%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 15.67 cycles. At this rate:

1% of peak load performance is reached (1.15 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
2% of peak store performance is reached (1.34 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 449710

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
SUB SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X29, X30, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X28, X27, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X26, X25, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X24, X23, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X22, X21, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #80	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDP X8, X9, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X12, X13, [X2, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADRP X19, <48f738>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X19, X19, #936	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X10, [X2, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X15, X14, [X2, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X11, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [X2, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X28, [X8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X8, [X9]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W9, [X12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X20, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X14, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDP X23, X14, [X2, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X24, [X11]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STUR X15, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X8, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR W8, [X13]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDP X21, X22, [X2, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [X2, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
STUR X14, [X29, #480]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR W9, [SP, #36]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #500]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STUR W8, [X29, #496]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 4101f0 <@plt_start@+0x1d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X3, X29, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
STR W1, [SP, #20]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W10, [X29, #500]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 449c38 <_QMviscosity_kernel_modulePviscosity_kernel..omp_par+0x528>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W11, [SP, #36]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FMOV D1, #1.0000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
FMOV D2, #0.5000000	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
PTRUE P1.D, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVI V4.2D, #0	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
ORR W9, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD W10, W10, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR W10, [SP, #36]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
LDUR X10, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W11, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X10, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR W14, [X10]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ADD W15, W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUBS W12, W14, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
ADD W16, W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W14, W14, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W13, WZR, WZR, #11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADDS W12, W12, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSEL W10, WZR, W13, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP W16, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
ADRP X16, <47c830>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W15, W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDR D0, [X16, #2840]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
CCMP W14, W15, #8, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CNTD X15, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
STUR W10, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
CSINC W10, WZR, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W16, W12, W15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSEL W16, WZR, W16, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
WHILELO P0.D, WZR, W12	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	2	N/A
STR W10, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
DUP Z3.D, Z0.D[0]	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	vect (100.0%)
B 449870 <_QMviscosity_kernel_modulePviscosity_kernel..omp_par+0x160>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
LDR W19, [SP, #20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ADRP X0, <48fc3c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #936	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <48fc4c>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #960	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X22, X21, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X24, X23, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X26, X25, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X28, X27, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD SP, SP, #176	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A

Name	Coverage (%)	Time (s)
▼_QMviscosity_kernel_modulePviscosity_kernel..omp_par–	2.44	3.33
▼Loop 1062 - viscosity_kernel.f90:52-89 - exec–	0.00	0.00
▼Loop 1063 - viscosity_kernel.f90:52-89 - exec–	0.00	0.00
▼Loop 1060 - viscosity_kernel.f90:52-89 - exec–	0.01	0.02
○Loop 1061 - viscosity_kernel.f90:54-89 - exec	2.43	3.31

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