OV - exec - Function build_field_..omp

	Function: build_field_..omp_par	Module: exec	Source: build_field.f90:93-185 [...]	Coverage (incl. loops): 0.09% \| (excl. loops): 0.00%

/home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90: 93 - 185

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93:     ALLOCATE(chunk%tiles(tile)%field%yarea   (chunk%tiles(tile)%t_xmin-2:chunk%tiles(tile)%t_xmax+2, &

[...]

101:     !$OMP DO

102:     DO k=chunk%tiles(tile)%t_ymin-2,chunk%tiles(tile)%t_ymax+3

103:       DO j=chunk%tiles(tile)%t_xmin-2,chunk%tiles(tile)%t_xmax+3

104:         chunk%tiles(tile)%field%work_array1(j,k)=0.0

105:         chunk%tiles(tile)%field%work_array2(j,k)=0.0

106:         chunk%tiles(tile)%field%work_array3(j,k)=0.0

107:         chunk%tiles(tile)%field%work_array4(j,k)=0.0

108:         chunk%tiles(tile)%field%work_array5(j,k)=0.0

109:         chunk%tiles(tile)%field%work_array6(j,k)=0.0

110:         chunk%tiles(tile)%field%work_array7(j,k)=0.0

111:

112:         chunk%tiles(tile)%field%xvel0(j,k)=0.0

113:         chunk%tiles(tile)%field%xvel1(j,k)=0.0

114:         chunk%tiles(tile)%field%yvel0(j,k)=0.0

115:         chunk%tiles(tile)%field%yvel1(j,k)=0.0

116:       ENDDO

117:     ENDDO

118:     !$OMP END DO

119:

120:     !$OMP DO

121:     DO k=chunk%tiles(tile)%t_ymin-2,chunk%tiles(tile)%t_ymax+2

122:       DO j=chunk%tiles(tile)%t_xmin-2,chunk%tiles(tile)%t_xmax+2

123:         chunk%tiles(tile)%field%density0(j,k)=0.0

124:         chunk%tiles(tile)%field%density1(j,k)=0.0

125:         chunk%tiles(tile)%field%energy0(j,k)=0.0

126:         chunk%tiles(tile)%field%energy1(j,k)=0.0

127:         chunk%tiles(tile)%field%pressure(j,k)=0.0

128:         chunk%tiles(tile)%field%viscosity(j,k)=0.0

129:         chunk%tiles(tile)%field%soundspeed(j,k)=0.0

130:         chunk%tiles(tile)%field%volume(j,k)=0.0

131:       ENDDO

132:     ENDDO

133:     !$OMP END DO

134:

135:     !$OMP DO

136:     DO k=chunk%tiles(tile)%t_ymin-2,chunk%tiles(tile)%t_ymax+2

137:       DO j=chunk%tiles(tile)%t_xmin-2,chunk%tiles(tile)%t_xmax+3

138:         chunk%tiles(tile)%field%vol_flux_x(j,k)=0.0

139:         chunk%tiles(tile)%field%mass_flux_x(j,k)=0.0

140:         chunk%tiles(tile)%field%xarea(j,k)=0.0

141:       ENDDO

142:     ENDDO

143:     !$OMP END DO

144:     !$OMP DO

145:     DO k=chunk%tiles(tile)%t_ymin-2,chunk%tiles(tile)%t_ymax+3

146:       DO j=chunk%tiles(tile)%t_xmin-2,chunk%tiles(tile)%t_xmax+2

147:         chunk%tiles(tile)%field%vol_flux_y(j,k)=0.0

148:         chunk%tiles(tile)%field%mass_flux_y(j,k)=0.0

149:         chunk%tiles(tile)%field%yarea(j,k)=0.0

150:       ENDDO

151:     ENDDO

152:     !$OMP END DO

153:

154:

155:     !$OMP DO

156:     DO j=chunk%tiles(tile)%t_xmin-2,chunk%tiles(tile)%t_xmax+2

157:       chunk%tiles(tile)%field%cellx(j)=0.0

158:       chunk%tiles(tile)%field%celldx(j)=0.0

159:     ENDDO

160:     !$OMP END DO

161:     !$OMP DO

162:     DO k=chunk%tiles(tile)%t_ymin-2,chunk%tiles(tile)%t_ymax+2

163:       chunk%tiles(tile)%field%celly(k)=0.0

164:       chunk%tiles(tile)%field%celldy(k)=0.0

165:     ENDDO

166:     !$OMP END DO

167:

168:     !$OMP DO

169:     DO j=chunk%tiles(tile)%t_xmin-2,chunk%tiles(tile)%t_xmax+3

170:       chunk%tiles(tile)%field%vertexx(j)=0.0

171:       chunk%tiles(tile)%field%vertexdx(j)=0.0

172:     ENDDO

173:     !$OMP END DO

174:     !$OMP DO

175:     DO k=chunk%tiles(tile)%t_ymin-2,chunk%tiles(tile)%t_ymax+3

176:       chunk%tiles(tile)%field%vertexy(k)=0.0

177:       chunk%tiles(tile)%field%vertexdy(k)=0.0

[...]

185: END SUBROUTINE build_field

0x4128a0 SUB	SP, SP, #192

0x4128a4 STP	X29, X30, [SP, #128]

0x4128a8 STR	X23, [SP, #144]

0x4128ac STP	X22, X21, [SP, #160]

0x4128b0 STP	X20, X19, [SP, #176]

0x4128b4 ADD	X29, SP, #128

0x4128b8 ADRP	X21,

0x4128bc LDR	X20, [X2]

0x4128c0 MOVZ	W22, #1

0x4128c4 ADRP	X0,

0x4128c8 ADD	X0, X0, #40

0x4128cc LDR	X21, [X21, #3944]

0x4128d0 LDRSW	X10, [X20]

0x4128d4 LDR	X9, [X21, #432]

0x4128d8 LDR	X8, [X21, #408]

0x4128dc SUB	X9, X10, X9

0x4128e0 MOVZ	W10, #2248

0x4128e4 MADD	X8, X9, X10, X8

0x4128e8 LDR	W23, [X8, #2224]

0x4128ec LDR	W8, [X8, #2228]

0x4128f0 STR	W22, [SP, #8]

0x4128f4 SUB	W9, W23, #2

0x4128f8 ADD	W8, W8, #3

0x4128fc SUBS	W8, W8, W9

0x412900 CSINV	W8, W8, WZR, #10

0x412904 STP	W8, WZR, [SP, #12]

0x412908 BL	4101f0

0x41290c ORR	W19, WZR, W0

0x412910 ADRP	X0,

0x412914 ADD	X0, X0, #3752

0x412918 ADD	X3, SP, #20

0x41291c ADD	X4, SP, #16

0x412920 STR	WZR, [SP]

0x412924 ORR	W1, WZR, W19

0x412928 ADD	X5, SP, #12

0x41292c ADD	X6, SP, #8

0x412930 MOVZ	W2, #34

0x412934 MOVZ	W7, #1

0x412938 BL	410090

0x41293c LDP	W8, W12, [SP, #12]

0x412940 SUB	W8, W8, W12

0x412944 CMN	W8, #1

0x412948 B.EQ	412bcc

0x41294c LDR	X9, [X21, #408]

0x412950 LDR	X10, [X21, #432]

0x412954 ADD	W12, W23, W12

0x412958 ORR	W11, WZR, WZR

0x41295c SUB	W13, W12, #2

0x412960 MOVZ	W12, #2248

0x412964 B	412978

(20) 0x412968 CMP	W11, W8

(20) 0x41296c ADD	W11, W11, #1

(20) 0x412970 ADD	W13, W13, #1

(20) 0x412974 B.EQ	412bcc

(20) 0x412978 LDRSW	X14, [X20]

(20) 0x41297c SBFM	X13, X13, #0, #31

(20) 0x412980 SUB	X14, X14, X10

(20) 0x412984 MADD	X15, X14, X12, X9

(20) 0x412988 LDRSW	X14, [X15, #2216]

(20) 0x41298c LDRSW	X15, [X15, #2220]

(20) 0x412990 SUB	X15, X15, X14

(20) 0x412994 CMN	X15, #5

(20) 0x412998 B.MI	412968

(20) 0x41299c UBFM	X14, X14, #61, #60

(20) 0x4129a0 ADD	X15, X15, #7

(20) 0x4129a4 SUB	X14, X14, #16

  (21) 0x4129a8 LDRSW	X16, [X20]

  (21) 0x4129ac SUB	X15, X15, #1

  (21) 0x4129b0 CMP	X15, #1

  (21) 0x4129b4 SUB	X16, X16, X10

  (21) 0x4129b8 MADD	X16, X16, X12, X9

  (21) 0x4129bc LDR	X17, [X16, #1080]

  (21) 0x4129c0 LDR	X18, [X16, #1104]

  (21) 0x4129c4 LDR	X0, [X16, #1112]

  (21) 0x4129c8 LDR	X16, [X16, #1128]

  (21) 0x4129cc SUB	X16, X13, X16

  (21) 0x4129d0 SUB	X17, X17, X18,LSL #3

  (21) 0x4129d4 MUL	X16, X0, X16

  (21) 0x4129d8 ADD	X16, X17, X16,LSL #3

  (21) 0x4129dc STR	XZR, [X16, X14]

  (21) 0x4129e0 LDRSW	X16, [X20]

  (21) 0x4129e4 SUB	X16, X16, X10

  (21) 0x4129e8 MADD	X16, X16, X12, X9

  (21) 0x4129ec LDR	X17, [X16, #1152]

  (21) 0x4129f0 LDR	X18, [X16, #1176]

  (21) 0x4129f4 LDR	X0, [X16, #1184]

  (21) 0x4129f8 LDR	X16, [X16, #1200]

  (21) 0x4129fc SUB	X16, X13, X16

  (21) 0x412a00 SUB	X17, X17, X18,LSL #3

  (21) 0x412a04 MUL	X16, X0, X16

  (21) 0x412a08 ADD	X16, X17, X16,LSL #3

  (21) 0x412a0c STR	XZR, [X16, X14]

  (21) 0x412a10 LDRSW	X16, [X20]

  (21) 0x412a14 SUB	X16, X16, X10

  (21) 0x412a18 MADD	X16, X16, X12, X9

  (21) 0x412a1c LDR	X17, [X16, #1224]

  (21) 0x412a20 LDR	X18, [X16, #1248]

  (21) 0x412a24 LDR	X0, [X16, #1256]

  (21) 0x412a28 LDR	X16, [X16, #1272]

  (21) 0x412a2c SUB	X16, X13, X16

  (21) 0x412a30 SUB	X17, X17, X18,LSL #3

  (21) 0x412a34 MUL	X16, X0, X16

  (21) 0x412a38 ADD	X16, X17, X16,LSL #3

  (21) 0x412a3c STR	XZR, [X16, X14]

  (21) 0x412a40 LDRSW	X16, [X20]

  (21) 0x412a44 SUB	X16, X16, X10

  (21) 0x412a48 MADD	X16, X16, X12, X9

  (21) 0x412a4c LDR	X17, [X16, #1296]

  (21) 0x412a50 LDR	X18, [X16, #1320]

  (21) 0x412a54 LDR	X0, [X16, #1328]

  (21) 0x412a58 LDR	X16, [X16, #1344]

  (21) 0x412a5c SUB	X16, X13, X16

  (21) 0x412a60 SUB	X17, X17, X18,LSL #3

  (21) 0x412a64 MUL	X16, X0, X16

  (21) 0x412a68 ADD	X16, X17, X16,LSL #3

  (21) 0x412a6c STR	XZR, [X16, X14]

  (21) 0x412a70 LDRSW	X16, [X20]

  (21) 0x412a74 SUB	X16, X16, X10

  (21) 0x412a78 MADD	X16, X16, X12, X9

  (21) 0x412a7c LDR	X17, [X16, #1368]

  (21) 0x412a80 LDR	X18, [X16, #1392]

  (21) 0x412a84 LDR	X0, [X16, #1400]

  (21) 0x412a88 LDR	X16, [X16, #1416]

  (21) 0x412a8c SUB	X16, X13, X16

  (21) 0x412a90 SUB	X17, X17, X18,LSL #3

  (21) 0x412a94 MUL	X16, X0, X16

  (21) 0x412a98 ADD	X16, X17, X16,LSL #3

  (21) 0x412a9c STR	XZR, [X16, X14]

  (21) 0x412aa0 LDRSW	X16, [X20]

  (21) 0x412aa4 SUB	X16, X16, X10

  (21) 0x412aa8 MADD	X16, X16, X12, X9

  (21) 0x412aac LDR	X17, [X16, #1440]

  (21) 0x412ab0 LDR	X18, [X16, #1464]

  (21) 0x412ab4 LDR	X0, [X16, #1472]

  (21) 0x412ab8 LDR	X16, [X16, #1488]

  (21) 0x412abc SUB	X16, X13, X16

  (21) 0x412ac0 SUB	X17, X17, X18,LSL #3

  (21) 0x412ac4 MUL	X16, X0, X16

  (21) 0x412ac8 ADD	X16, X17, X16,LSL #3

  (21) 0x412acc STR	XZR, [X16, X14]

  (21) 0x412ad0 LDRSW	X16, [X20]

  (21) 0x412ad4 SUB	X16, X16, X10

  (21) 0x412ad8 MADD	X16, X16, X12, X9

  (21) 0x412adc LDR	X17, [X16, #1512]

  (21) 0x412ae0 LDR	X18, [X16, #1536]

  (21) 0x412ae4 LDR	X0, [X16, #1544]

  (21) 0x412ae8 LDR	X16, [X16, #1560]

  (21) 0x412aec SUB	X16, X13, X16

  (21) 0x412af0 SUB	X17, X17, X18,LSL #3

  (21) 0x412af4 MUL	X16, X0, X16

  (21) 0x412af8 ADD	X16, X17, X16,LSL #3

  (21) 0x412afc STR	XZR, [X16, X14]

  (21) 0x412b00 LDRSW	X16, [X20]

  (21) 0x412b04 SUB	X16, X16, X10

  (21) 0x412b08 MADD	X16, X16, X12, X9

  (21) 0x412b0c LDR	X17, [X16, #504]

  (21) 0x412b10 LDR	X18, [X16, #528]

  (21) 0x412b14 LDR	X0, [X16, #536]

  (21) 0x412b18 LDR	X16, [X16, #552]

  (21) 0x412b1c SUB	X16, X13, X16

  (21) 0x412b20 SUB	X17, X17, X18,LSL #3

  (21) 0x412b24 MUL	X16, X0, X16

  (21) 0x412b28 ADD	X16, X17, X16,LSL #3

  (21) 0x412b2c STR	XZR, [X16, X14]

  (21) 0x412b30 LDRSW	X16, [X20]

  (21) 0x412b34 SUB	X16, X16, X10

  (21) 0x412b38 MADD	X16, X16, X12, X9

  (21) 0x412b3c LDR	X17, [X16, #576]

  (21) 0x412b40 LDR	X18, [X16, #600]

  (21) 0x412b44 LDR	X0, [X16, #608]

  (21) 0x412b48 LDR	X16, [X16, #624]

  (21) 0x412b4c SUB	X16, X13, X16

  (21) 0x412b50 SUB	X17, X17, X18,LSL #3

  (21) 0x412b54 MUL	X16, X0, X16

  (21) 0x412b58 ADD	X16, X17, X16,LSL #3

  (21) 0x412b5c STR	XZR, [X16, X14]

  (21) 0x412b60 LDRSW	X16, [X20]

  (21) 0x412b64 SUB	X16, X16, X10

  (21) 0x412b68 MADD	X16, X16, X12, X9

  (21) 0x412b6c LDR	X17, [X16, #648]

  (21) 0x412b70 LDR	X18, [X16, #672]

  (21) 0x412b74 LDR	X0, [X16, #680]

  (21) 0x412b78 LDR	X16, [X16, #696]

  (21) 0x412b7c SUB	X16, X13, X16

  (21) 0x412b80 SUB	X17, X17, X18,LSL #3

  (21) 0x412b84 MUL	X16, X0, X16

  (21) 0x412b88 ADD	X16, X17, X16,LSL #3

  (21) 0x412b8c STR	XZR, [X16, X14]

  (21) 0x412b90 LDRSW	X16, [X20]

  (21) 0x412b94 SUB	X16, X16, X10

  (21) 0x412b98 MADD	X16, X16, X12, X9

  (21) 0x412b9c LDR	X17, [X16, #720]

  (21) 0x412ba0 LDR	X18, [X16, #744]

  (21) 0x412ba4 LDR	X0, [X16, #752]

  (21) 0x412ba8 LDR	X16, [X16, #768]

  (21) 0x412bac SUB	X16, X13, X16

  (21) 0x412bb0 SUB	X17, X17, X18,LSL #3

  (21) 0x412bb4 MUL	X16, X0, X16

  (21) 0x412bb8 ADD	X16, X17, X16,LSL #3

  (21) 0x412bbc STR	XZR, [X16, X14]

  (21) 0x412bc0 ADD	X14, X14, #8

  (21) 0x412bc4 B.HI	4129a8

(20) 0x412bc8 B	412968

0x412bcc ADRP	X0,

0x412bd0 ADD	X0, X0, #3752

0x412bd4 ORR	W1, WZR, W19

0x412bd8 BL	410380

0x412bdc ADRP	X0,

0x412be0 ADD	X0, X0, #3776

0x412be4 ORR	W1, WZR, W19

0x412be8 BL	410050

0x412bec LDR	X9, [X21, #432]

0x412bf0 LDRSW	X10, [X20]

0x412bf4 LDR	X8, [X21, #408]

0x412bf8 ADRP	X0,

0x412bfc ADD	X0, X0, #3800

0x412c00 ADD	X3, SP, #36

0x412c04 ADD	X4, SP, #32

0x412c08 ADD	X5, SP, #28

0x412c0c ADD	X6, SP, #24

0x412c10 MOVZ	W2, #34

0x412c14 MOVZ	W7, #1

0x412c18 ORR	W1, WZR, W19

0x412c1c SUB	X9, X10, X9

0x412c20 MOVZ	W10, #2248

0x412c24 MADD	X8, X9, X10, X8

0x412c28 LDR	W23, [X8, #2224]

0x412c2c LDR	W8, [X8, #2228]

0x412c30 STR	W22, [SP, #24]

0x412c34 STR	WZR, [SP]

0x412c38 SUB	W9, W23, #2

0x412c3c ADD	W8, W8, #2

0x412c40 SUBS	W8, W8, W9

0x412c44 CSINV	W8, W8, WZR, #10

0x412c48 STP	W8, WZR, [SP, #28]

0x412c4c BL	410090

0x412c50 LDP	W8, W12, [SP, #28]

0x412c54 SUB	W8, W8, W12

0x412c58 CMN	W8, #1

0x412c5c B.EQ	412e38

0x412c60 LDR	X9, [X21, #408]

0x412c64 LDR	X10, [X21, #432]

0x412c68 ADD	W12, W23, W12

0x412c6c ORR	W11, WZR, WZR

0x412c70 SUB	W13, W12, #2

0x412c74 MOVZ	W12, #2248

0x412c78 B	412c90

0x412c7c HINT	#0

(18) 0x412c80 CMP	W11, W8

(18) 0x412c84 ADD	W11, W11, #1

(18) 0x412c88 ADD	W13, W13, #1

(18) 0x412c8c B.EQ	412e38

(18) 0x412c90 LDRSW	X14, [X20]

(18) 0x412c94 SBFM	X13, X13, #0, #31

(18) 0x412c98 SUB	X14, X14, X10

(18) 0x412c9c MADD	X15, X14, X12, X9

(18) 0x412ca0 LDRSW	X14, [X15, #2216]

(18) 0x412ca4 LDRSW	X15, [X15, #2220]

(18) 0x412ca8 SUB	X15, X15, X14

(18) 0x412cac CMN	X15, #4

(18) 0x412cb0 B.MI	412c80

(18) 0x412cb4 UBFM	X14, X14, #61, #60

(18) 0x412cb8 ADD	X15, X15, #6

(18) 0x412cbc SUB	X14, X14, #16

  (19) 0x412cc0 LDRSW	X16, [X20]

  (19) 0x412cc4 SUB	X15, X15, #1

  (19) 0x412cc8 CMP	X15, #1

  (19) 0x412ccc SUB	X16, X16, X10

  (19) 0x412cd0 MADD	X16, X16, X12, X9

  (19) 0x412cd4 LDR	X17, [X16]

  (19) 0x412cd8 LDP	X18, X0, [X16, #24]

  (19) 0x412cdc LDR	X16, [X16, #48]

  (19) 0x412ce0 SUB	X16, X13, X16

  (19) 0x412ce4 SUB	X17, X17, X18,LSL #3

  (19) 0x412ce8 MUL	X16, X0, X16

  (19) 0x412cec ADD	X16, X17, X16,LSL #3

  (19) 0x412cf0 STR	XZR, [X16, X14]

  (19) 0x412cf4 LDRSW	X16, [X20]

  (19) 0x412cf8 SUB	X16, X16, X10

  (19) 0x412cfc MADD	X16, X16, X12, X9

  (19) 0x412d00 LDR	X17, [X16, #72]

  (19) 0x412d04 LDP	X18, X0, [X16, #96]

  (19) 0x412d08 LDR	X16, [X16, #120]

  (19) 0x412d0c SUB	X16, X13, X16

  (19) 0x412d10 SUB	X17, X17, X18,LSL #3

  (19) 0x412d14 MUL	X16, X0, X16

  (19) 0x412d18 ADD	X16, X17, X16,LSL #3

  (19) 0x412d1c STR	XZR, [X16, X14]

  (19) 0x412d20 LDRSW	X16, [X20]

  (19) 0x412d24 SUB	X16, X16, X10

  (19) 0x412d28 MADD	X16, X16, X12, X9

  (19) 0x412d2c LDR	X17, [X16, #144]

  (19) 0x412d30 LDP	X18, X0, [X16, #168]

  (19) 0x412d34 LDR	X16, [X16, #192]

  (19) 0x412d38 SUB	X16, X13, X16

  (19) 0x412d3c SUB	X17, X17, X18,LSL #3

  (19) 0x412d40 MUL	X16, X0, X16

  (19) 0x412d44 ADD	X16, X17, X16,LSL #3

  (19) 0x412d48 STR	XZR, [X16, X14]

  (19) 0x412d4c LDRSW	X16, [X20]

  (19) 0x412d50 SUB	X16, X16, X10

  (19) 0x412d54 MADD	X16, X16, X12, X9

  (19) 0x412d58 LDR	X17, [X16, #216]

  (19) 0x412d5c LDP	X18, X0, [X16, #240]

  (19) 0x412d60 LDR	X16, [X16, #264]

  (19) 0x412d64 SUB	X16, X13, X16

  (19) 0x412d68 SUB	X17, X17, X18,LSL #3

  (19) 0x412d6c MUL	X16, X0, X16

  (19) 0x412d70 ADD	X16, X17, X16,LSL #3

  (19) 0x412d74 STR	XZR, [X16, X14]

  (19) 0x412d78 LDRSW	X16, [X20]

  (19) 0x412d7c SUB	X16, X16, X10

  (19) 0x412d80 MADD	X16, X16, X12, X9

  (19) 0x412d84 LDR	X17, [X16, #288]

  (19) 0x412d88 LDP	X18, X0, [X16, #312]

  (19) 0x412d8c LDR	X16, [X16, #336]

  (19) 0x412d90 SUB	X16, X13, X16

  (19) 0x412d94 SUB	X17, X17, X18,LSL #3

  (19) 0x412d98 MUL	X16, X0, X16

  (19) 0x412d9c ADD	X16, X17, X16,LSL #3

  (19) 0x412da0 STR	XZR, [X16, X14]

  (19) 0x412da4 LDRSW	X16, [X20]

  (19) 0x412da8 SUB	X16, X16, X10

  (19) 0x412dac MADD	X16, X16, X12, X9

  (19) 0x412db0 LDR	X17, [X16, #360]

  (19) 0x412db4 LDP	X18, X0, [X16, #384]

  (19) 0x412db8 LDR	X16, [X16, #408]

  (19) 0x412dbc SUB	X16, X13, X16

  (19) 0x412dc0 SUB	X17, X17, X18,LSL #3

  (19) 0x412dc4 MUL	X16, X0, X16

  (19) 0x412dc8 ADD	X16, X17, X16,LSL #3

  (19) 0x412dcc STR	XZR, [X16, X14]

  (19) 0x412dd0 LDRSW	X16, [X20]

  (19) 0x412dd4 SUB	X16, X16, X10

  (19) 0x412dd8 MADD	X16, X16, X12, X9

  (19) 0x412ddc LDR	X17, [X16, #432]

  (19) 0x412de0 LDP	X18, X0, [X16, #456]

  (19) 0x412de4 LDR	X16, [X16, #480]

  (19) 0x412de8 SUB	X16, X13, X16

  (19) 0x412dec SUB	X17, X17, X18,LSL #3

  (19) 0x412df0 MUL	X16, X0, X16

  (19) 0x412df4 ADD	X16, X17, X16,LSL #3

  (19) 0x412df8 STR	XZR, [X16, X14]

  (19) 0x412dfc LDRSW	X16, [X20]

  (19) 0x412e00 SUB	X16, X16, X10

  (19) 0x412e04 MADD	X16, X16, X12, X9

  (19) 0x412e08 LDR	X17, [X16, #1968]

  (19) 0x412e0c LDR	X18, [X16, #1992]

  (19) 0x412e10 LDR	X0, [X16, #2000]

  (19) 0x412e14 LDR	X16, [X16, #2016]

  (19) 0x412e18 SUB	X16, X13, X16

  (19) 0x412e1c SUB	X17, X17, X18,LSL #3

  (19) 0x412e20 MUL	X16, X0, X16

  (19) 0x412e24 ADD	X16, X17, X16,LSL #3

  (19) 0x412e28 STR	XZR, [X16, X14]

  (19) 0x412e2c ADD	X14, X14, #8

  (19) 0x412e30 B.HI	412cc0

(18) 0x412e34 B	412c80

0x412e38 ADRP	X0,

0x412e3c ADD	X0, X0, #3800

0x412e40 ORR	W1, WZR, W19

0x412e44 BL	410380

0x412e48 ADRP	X0,

0x412e4c ADD	X0, X0, #3824

0x412e50 ORR	W1, WZR, W19

0x412e54 BL	410050

0x412e58 LDR	X9, [X21, #432]

0x412e5c LDRSW	X10, [X20]

0x412e60 LDR	X8, [X21, #408]

0x412e64 MOVZ	W22, #1

0x412e68 ADRP	X0,

0x412e6c ADD	X0, X0, #3848

0x412e70 ADD	X3, SP, #52

0x412e74 ADD	X4, SP, #48

0x412e78 ADD	X5, SP, #44

0x412e7c ADD	X6, SP, #40

0x412e80 MOVZ	W2, #34

0x412e84 ORR	W1, WZR, W19

0x412e88 MOVZ	W7, #1

0x412e8c SUB	X9, X10, X9

0x412e90 MOVZ	W10, #2248

0x412e94 MADD	X8, X9, X10, X8

0x412e98 LDR	W23, [X8, #2224]

0x412e9c LDR	W8, [X8, #2228]

0x412ea0 STR	W22, [SP, #40]

0x412ea4 STR	WZR, [SP]

0x412ea8 SUB	W9, W23, #2

0x412eac ADD	W8, W8, #2

0x412eb0 SUBS	W8, W8, W9

0x412eb4 CSINV	W8, W8, WZR, #10

0x412eb8 STP	W8, WZR, [SP, #44]

0x412ebc BL	410090

0x412ec0 LDP	W8, W12, [SP, #44]

0x412ec4 SUB	W8, W8, W12

0x412ec8 CMN	W8, #1

0x412ecc B.EQ	412fd0

0x412ed0 LDR	X9, [X21, #408]

0x412ed4 LDR	X10, [X21, #432]

0x412ed8 ADD	W12, W23, W12

0x412edc ORR	W11, WZR, WZR

0x412ee0 SUB	W13, W12, #2

0x412ee4 MOVZ	W12, #2248

0x412ee8 B	412efc

(16) 0x412eec CMP	W11, W8

(16) 0x412ef0 ADD	W11, W11, #1

(16) 0x412ef4 ADD	W13, W13, #1

(16) 0x412ef8 B.EQ	412fd0

(16) 0x412efc LDRSW	X14, [X20]

(16) 0x412f00 SBFM	X13, X13, #0, #31

(16) 0x412f04 SUB	X14, X14, X10

(16) 0x412f08 MADD	X15, X14, X12, X9

(16) 0x412f0c LDRSW	X14, [X15, #2216]

(16) 0x412f10 LDRSW	X15, [X15, #2220]

(16) 0x412f14 SUB	X15, X15, X14

(16) 0x412f18 CMN	X15, #5

(16) 0x412f1c B.MI	412eec

(16) 0x412f20 UBFM	X14, X14, #61, #60

(16) 0x412f24 ADD	X15, X15, #7

(16) 0x412f28 SUB	X14, X14, #16

  (17) 0x412f2c LDRSW	X16, [X20]

  (17) 0x412f30 SUB	X15, X15, #1

  (17) 0x412f34 CMP	X15, #1

  (17) 0x412f38 SUB	X16, X16, X10

  (17) 0x412f3c MADD	X16, X16, X12, X9

  (17) 0x412f40 LDR	X17, [X16, #792]

  (17) 0x412f44 LDR	X18, [X16, #816]

  (17) 0x412f48 LDR	X0, [X16, #824]

  (17) 0x412f4c LDR	X16, [X16, #840]

  (17) 0x412f50 SUB	X16, X13, X16

  (17) 0x412f54 SUB	X17, X17, X18,LSL #3

  (17) 0x412f58 MUL	X16, X0, X16

  (17) 0x412f5c ADD	X16, X17, X16,LSL #3

  (17) 0x412f60 STR	XZR, [X16, X14]

  (17) 0x412f64 LDRSW	X16, [X20]

  (17) 0x412f68 SUB	X16, X16, X10

  (17) 0x412f6c MADD	X16, X16, X12, X9

  (17) 0x412f70 LDR	X17, [X16, #864]

  (17) 0x412f74 LDR	X18, [X16, #888]

  (17) 0x412f78 LDR	X0, [X16, #896]

  (17) 0x412f7c LDR	X16, [X16, #912]

  (17) 0x412f80 SUB	X16, X13, X16

  (17) 0x412f84 SUB	X17, X17, X18,LSL #3

  (17) 0x412f88 MUL	X16, X0, X16

  (17) 0x412f8c ADD	X16, X17, X16,LSL #3

  (17) 0x412f90 STR	XZR, [X16, X14]

  (17) 0x412f94 LDRSW	X16, [X20]

  (17) 0x412f98 SUB	X16, X16, X10

  (17) 0x412f9c MADD	X16, X16, X12, X9

  (17) 0x412fa0 LDR	X17, [X16, #2040]

  (17) 0x412fa4 LDR	X18, [X16, #2064]

  (17) 0x412fa8 LDR	X0, [X16, #2072]

  (17) 0x412fac LDR	X16, [X16, #2088]

  (17) 0x412fb0 SUB	X16, X13, X16

  (17) 0x412fb4 SUB	X17, X17, X18,LSL #3

  (17) 0x412fb8 MUL	X16, X0, X16

  (17) 0x412fbc ADD	X16, X17, X16,LSL #3

  (17) 0x412fc0 STR	XZR, [X16, X14]

  (17) 0x412fc4 ADD	X14, X14, #8

  (17) 0x412fc8 B.HI	412f2c

(16) 0x412fcc B	412eec

0x412fd0 ADRP	X0,

0x412fd4 ADD	X0, X0, #3848

0x412fd8 ORR	W1, WZR, W19

0x412fdc BL	410380

0x412fe0 ADRP	X0,

0x412fe4 ADD	X0, X0, #3872

0x412fe8 ORR	W1, WZR, W19

0x412fec BL	410050

0x412ff0 LDR	X9, [X21, #432]

0x412ff4 LDRSW	X10, [X20]

0x412ff8 LDR	X8, [X21, #408]

0x412ffc ADRP	X0,

0x413000 ADD	X0, X0, #3896

0x413004 SUB	X3, X29, #60

0x413008 ADD	X4, SP, #64

0x41300c ADD	X5, SP, #60

0x413010 ADD	X6, SP, #56

0x413014 MOVZ	W2, #34

0x413018 MOVZ	W7, #1

0x41301c ORR	W1, WZR, W19

0x413020 SUB	X9, X10, X9

0x413024 MOVZ	W10, #2248

0x413028 MADD	X8, X9, X10, X8

0x41302c LDR	W23, [X8, #2224]

0x413030 LDR	W8, [X8, #2228]

0x413034 STR	W22, [SP, #56]

0x413038 STR	WZR, [SP]

0x41303c SUB	W9, W23, #2

0x413040 ADD	W8, W8, #3

0x413044 SUBS	W8, W8, W9

0x413048 CSINV	W8, W8, WZR, #10

0x41304c STP	W8, WZR, [SP, #60]

0x413050 BL	410090

0x413054 LDP	W8, W12, [SP, #60]

0x413058 SUB	W8, W8, W12

0x41305c CMN	W8, #1

0x413060 B.EQ	413164

0x413064 LDR	X9, [X21, #408]

0x413068 LDR	X10, [X21, #432]

0x41306c ADD	W12, W23, W12

0x413070 ORR	W11, WZR, WZR

0x413074 SUB	W13, W12, #2

0x413078 MOVZ	W12, #2248

0x41307c B	413090

(14) 0x413080 CMP	W11, W8

(14) 0x413084 ADD	W11, W11, #1

(14) 0x413088 ADD	W13, W13, #1

(14) 0x41308c B.EQ	413164

(14) 0x413090 LDRSW	X14, [X20]

(14) 0x413094 SBFM	X13, X13, #0, #31

(14) 0x413098 SUB	X14, X14, X10

(14) 0x41309c MADD	X15, X14, X12, X9

(14) 0x4130a0 LDRSW	X14, [X15, #2216]

(14) 0x4130a4 LDRSW	X15, [X15, #2220]

(14) 0x4130a8 SUB	X15, X15, X14

(14) 0x4130ac CMN	X15, #4

(14) 0x4130b0 B.MI	413080

(14) 0x4130b4 UBFM	X14, X14, #61, #60

(14) 0x4130b8 ADD	X15, X15, #6

(14) 0x4130bc SUB	X14, X14, #16

  (15) 0x4130c0 LDRSW	X16, [X20]

  (15) 0x4130c4 SUB	X15, X15, #1

  (15) 0x4130c8 CMP	X15, #1

  (15) 0x4130cc SUB	X16, X16, X10

  (15) 0x4130d0 MADD	X16, X16, X12, X9

  (15) 0x4130d4 LDR	X17, [X16, #936]

  (15) 0x4130d8 LDR	X18, [X16, #960]

  (15) 0x4130dc LDR	X0, [X16, #968]

  (15) 0x4130e0 LDR	X16, [X16, #984]

  (15) 0x4130e4 SUB	X16, X13, X16

  (15) 0x4130e8 SUB	X17, X17, X18,LSL #3

  (15) 0x4130ec MUL	X16, X0, X16

  (15) 0x4130f0 ADD	X16, X17, X16,LSL #3

  (15) 0x4130f4 STR	XZR, [X16, X14]

  (15) 0x4130f8 LDRSW	X16, [X20]

  (15) 0x4130fc SUB	X16, X16, X10

  (15) 0x413100 MADD	X16, X16, X12, X9

  (15) 0x413104 LDR	X17, [X16, #1008]

  (15) 0x413108 LDR	X18, [X16, #1032]

  (15) 0x41310c LDR	X0, [X16, #1040]

  (15) 0x413110 LDR	X16, [X16, #1056]

  (15) 0x413114 SUB	X16, X13, X16

  (15) 0x413118 SUB	X17, X17, X18,LSL #3

  (15) 0x41311c MUL	X16, X0, X16

  (15) 0x413120 ADD	X16, X17, X16,LSL #3

  (15) 0x413124 STR	XZR, [X16, X14]

  (15) 0x413128 LDRSW	X16, [X20]

  (15) 0x41312c SUB	X16, X16, X10

  (15) 0x413130 MADD	X16, X16, X12, X9

  (15) 0x413134 LDR	X17, [X16, #2112]

  (15) 0x413138 LDR	X18, [X16, #2136]

  (15) 0x41313c LDR	X0, [X16, #2144]

  (15) 0x413140 LDR	X16, [X16, #2160]

  (15) 0x413144 SUB	X16, X13, X16

  (15) 0x413148 SUB	X17, X17, X18,LSL #3

  (15) 0x41314c MUL	X16, X0, X16

  (15) 0x413150 ADD	X16, X17, X16,LSL #3

  (15) 0x413154 STR	XZR, [X16, X14]

  (15) 0x413158 ADD	X14, X14, #8

  (15) 0x41315c B.HI	4130c0

(14) 0x413160 B	413080

0x413164 ADRP	X0,

0x413168 ADD	X0, X0, #3896

0x41316c ORR	W1, WZR, W19

0x413170 BL	410380

0x413174 ADRP	X0,

0x413178 ADD	X0, X0, #3920

0x41317c ORR	W1, WZR, W19

0x413180 BL	410050

0x413184 LDR	X9, [X21, #432]

0x413188 LDRSW	X10, [X20]

0x41318c LDR	X8, [X21, #408]

0x413190 MOVZ	W22, #1

0x413194 ADRP	X0,

0x413198 ADD	X0, X0, #3944

0x41319c SUB	X3, X29, #44

0x4131a0 SUB	X4, X29, #48

0x4131a4 SUB	X5, X29, #52

0x4131a8 SUB	X6, X29, #56

0x4131ac MOVZ	W2, #34

0x4131b0 ORR	W1, WZR, W19

0x4131b4 MOVZ	W7, #1

0x4131b8 SUB	X9, X10, X9

0x4131bc MOVZ	W10, #2248

0x4131c0 MADD	X8, X9, X10, X8

0x4131c4 LDR	W23, [X8, #2216]

0x4131c8 LDR	W8, [X8, #2220]

0x4131cc STUR	W22, [X29, #456]

0x4131d0 STR	WZR, [SP]

0x4131d4 SUB	W9, W23, #2

0x4131d8 ADD	W8, W8, #2

0x4131dc SUBS	W8, W8, W9

0x4131e0 CSINV	W8, W8, WZR, #10

0x4131e4 STP	W8, WZR, [X29, #460]

0x4131e8 BL	410090

0x4131ec LDP	W8, W11, [X29, #460]

0x4131f0 SUB	W10, W8, W11

0x4131f4 CMN	W10, #1

0x4131f8 B.EQ	413268

0x4131fc LDR	X8, [X21, #408]

0x413200 LDR	X9, [X21, #432]

0x413204 ADD	W11, W23, W11

0x413208 ADD	W10, W10, #1

0x41320c MOVZ	W12, #2248

0x413210 SUB	W11, W11, #2

0x413214 HINT	#0

0x413218 HINT	#0

0x41321c HINT	#0

(13) 0x413220 LDRSW	X13, [X20]

(13) 0x413224 SBFM	X15, X11, #0, #31

(13) 0x413228 SUBS	W10, W10, #1

(13) 0x41322c ADD	W11, W11, #1

(13) 0x413230 SUB	X13, X13, X9

(13) 0x413234 MADD	X13, X13, X12, X8

(13) 0x413238 LDR	X14, [X13, #1584]

(13) 0x41323c LDR	X13, [X13, #1608]

(13) 0x413240 SUB	X13, X15, X13

(13) 0x413244 STR	XZR, [X14, X13,LSL #3]

(13) 0x413248 LDRSW	X13, [X20]

(13) 0x41324c SUB	X13, X13, X9

(13) 0x413250 MADD	X13, X13, X12, X8

(13) 0x413254 LDR	X14, [X13, #1776]

(13) 0x413258 LDR	X13, [X13, #1800]

(13) 0x41325c SUB	X13, X15, X13

(13) 0x413260 STR	XZR, [X14, X13,LSL #3]

(13) 0x413264 B.NE	413220

0x413268 ADRP	X0,

0x41326c ADD	X0, X0, #3944

0x413270 ORR	W1, WZR, W19

0x413274 BL	410380

0x413278 ADRP	X0,

0x41327c ADD	X0, X0, #3968

0x413280 ORR	W1, WZR, W19

0x413284 BL	410050

0x413288 LDR	X9, [X21, #432]

0x41328c LDRSW	X10, [X20]

0x413290 LDR	X8, [X21, #408]

0x413294 ADRP	X0,

0x413298 ADD	X0, X0, #3992

0x41329c SUB	X3, X29, #28

0x4132a0 SUB	X4, X29, #32

0x4132a4 SUB	X5, X29, #36

0x4132a8 SUB	X6, X29, #40

0x4132ac MOVZ	W2, #34

0x4132b0 MOVZ	W7, #1

0x4132b4 ORR	W1, WZR, W19

0x4132b8 SUB	X9, X10, X9

0x4132bc MOVZ	W10, #2248

0x4132c0 MADD	X8, X9, X10, X8

0x4132c4 LDR	W23, [X8, #2224]

0x4132c8 LDR	W8, [X8, #2228]

0x4132cc STUR	W22, [X29, #472]

0x4132d0 STR	WZR, [SP]

0x4132d4 SUB	W9, W23, #2

0x4132d8 ADD	W8, W8, #2

0x4132dc SUBS	W8, W8, W9

0x4132e0 CSINV	W8, W8, WZR, #10

0x4132e4 STP	W8, WZR, [X29, #476]

0x4132e8 BL	410090

0x4132ec LDP	W8, W11, [X29, #476]

0x4132f0 SUB	W10, W8, W11

0x4132f4 CMN	W10, #1

0x4132f8 B.EQ	413368

0x4132fc LDR	X8, [X21, #408]

0x413300 LDR	X9, [X21, #432]

0x413304 ADD	W11, W23, W11

0x413308 ADD	W10, W10, #1

0x41330c MOVZ	W12, #2248

0x413310 SUB	W11, W11, #2

0x413314 HINT	#0

0x413318 HINT	#0

0x41331c HINT	#0

(12) 0x413320 LDRSW	X13, [X20]

(12) 0x413324 SBFM	X15, X11, #0, #31

(12) 0x413328 SUBS	W10, W10, #1

(12) 0x41332c ADD	W11, W11, #1

(12) 0x413330 SUB	X13, X13, X9

(12) 0x413334 MADD	X13, X13, X12, X8

(12) 0x413338 LDR	X14, [X13, #1632]

(12) 0x41333c LDR	X13, [X13, #1656]

(12) 0x413340 SUB	X13, X15, X13

(12) 0x413344 STR	XZR, [X14, X13,LSL #3]

(12) 0x413348 LDRSW	X13, [X20]

(12) 0x41334c SUB	X13, X13, X9

(12) 0x413350 MADD	X13, X13, X12, X8

(12) 0x413354 LDR	X14, [X13, #1824]

(12) 0x413358 LDR	X13, [X13, #1848]

(12) 0x41335c SUB	X13, X15, X13

(12) 0x413360 STR	XZR, [X14, X13,LSL #3]

(12) 0x413364 B.NE	413320

0x413368 ADRP	X0,

0x41336c ADD	X0, X0, #3992

0x413370 ORR	W1, WZR, W19

0x413374 BL	410380

0x413378 ADRP	X0,

0x41337c ADD	X0, X0, #4016

0x413380 ORR	W1, WZR, W19

0x413384 BL	410050

0x413388 LDR	X9, [X21, #432]

0x41338c LDRSW	X10, [X20]

0x413390 LDR	X8, [X21, #408]

0x413394 MOVZ	W22, #1

0x413398 ADRP	X0,

0x41339c ADD	X0, X0, #4040

0x4133a0 SUB	X3, X29, #12

0x4133a4 SUB	X4, X29, #16

0x4133a8 SUB	X5, X29, #20

0x4133ac SUB	X6, X29, #24

0x4133b0 MOVZ	W2, #34

0x4133b4 ORR	W1, WZR, W19

0x4133b8 MOVZ	W7, #1

0x4133bc SUB	X9, X10, X9

0x4133c0 MOVZ	W10, #2248

0x4133c4 MADD	X8, X9, X10, X8

0x4133c8 LDR	W23, [X8, #2216]

0x4133cc LDR	W8, [X8, #2220]

0x4133d0 STUR	W22, [X29, #488]

0x4133d4 STR	WZR, [SP]

0x4133d8 SUB	W9, W23, #2

0x4133dc ADD	W8, W8, #3

0x4133e0 SUBS	W8, W8, W9

0x4133e4 CSINV	W8, W8, WZR, #10

0x4133e8 STP	W8, WZR, [X29, #492]

0x4133ec BL	410090

0x4133f0 LDP	W8, W11, [X29, #492]

0x4133f4 SUB	W10, W8, W11

0x4133f8 CMN	W10, #1

0x4133fc B.EQ	413468

0x413400 LDR	X8, [X21, #408]

0x413404 LDR	X9, [X21, #432]

0x413408 ADD	W11, W23, W11

0x41340c ADD	W10, W10, #1

0x413410 MOVZ	W12, #2248

0x413414 SUB	W11, W11, #2

0x413418 HINT	#0

0x41341c HINT	#0

(11) 0x413420 LDRSW	X13, [X20]

(11) 0x413424 SBFM	X15, X11, #0, #31

(11) 0x413428 SUBS	W10, W10, #1

(11) 0x41342c ADD	W11, W11, #1

(11) 0x413430 SUB	X13, X13, X9

(11) 0x413434 MADD	X13, X13, X12, X8

(11) 0x413438 LDR	X14, [X13, #1680]

(11) 0x41343c LDR	X13, [X13, #1704]

(11) 0x413440 SUB	X13, X15, X13

(11) 0x413444 STR	XZR, [X14, X13,LSL #3]

(11) 0x413448 LDRSW	X13, [X20]

(11) 0x41344c SUB	X13, X13, X9

(11) 0x413450 MADD	X13, X13, X12, X8

(11) 0x413454 LDR	X14, [X13, #1872]

(11) 0x413458 LDR	X13, [X13, #1896]

(11) 0x41345c SUB	X13, X15, X13

(11) 0x413460 STR	XZR, [X14, X13,LSL #3]

(11) 0x413464 B.NE	413420

0x413468 ADRP	X0,

0x41346c ADD	X0, X0, #4040

0x413470 ORR	W1, WZR, W19

0x413474 BL	410380

0x413478 ADRP	X0,

0x41347c ADD	X0, X0, #4064

0x413480 ORR	W1, WZR, W19

0x413484 BL	410050

0x413488 LDR	X9, [X21, #432]

0x41348c LDRSW	X10, [X20]

0x413490 LDR	X8, [X21, #408]

0x413494 ADRP	X0,

0x413498 ADD	X0, X0, #4088

0x41349c ADD	X3, X29, #28

0x4134a0 ADD	X4, X29, #24

0x4134a4 SUB	X5, X29, #4

0x4134a8 SUB	X6, X29, #8

0x4134ac MOVZ	W2, #34

0x4134b0 MOVZ	W7, #1

0x4134b4 ORR	W1, WZR, W19

0x4134b8 SUB	X9, X10, X9

0x4134bc MOVZ	W10, #2248

0x4134c0 MADD	X8, X9, X10, X8

0x4134c4 LDR	W23, [X8, #2224]

0x4134c8 LDR	W8, [X8, #2228]

0x4134cc STR	WZR, [X29, #24]

0x4134d0 STR	WZR, [SP]

0x4134d4 SUB	W9, W23, #2

0x4134d8 ADD	W8, W8, #3

0x4134dc SUBS	W8, W8, W9

0x4134e0 CSINV	W8, W8, WZR, #10

0x4134e4 STP	W22, W8, [X29, #504]

0x4134e8 BL	410090

0x4134ec LDR	W11, [X29, #24]

0x4134f0 LDUR	W8, [X29, #508]

0x4134f4 SUB	W10, W8, W11

0x4134f8 CMN	W10, #1

0x4134fc B.EQ	413568

0x413500 LDR	X8, [X21, #408]

0x413504 LDR	X9, [X21, #432]

0x413508 ADD	W11, W23, W11

0x41350c ADD	W10, W10, #1

0x413510 MOVZ	W12, #2248

0x413514 SUB	W11, W11, #2

0x413518 HINT	#0

0x41351c HINT	#0

(10) 0x413520 LDRSW	X13, [X20]

(10) 0x413524 SBFM	X15, X11, #0, #31

(10) 0x413528 SUBS	W10, W10, #1

(10) 0x41352c ADD	W11, W11, #1

(10) 0x413530 SUB	X13, X13, X9

(10) 0x413534 MADD	X13, X13, X12, X8

(10) 0x413538 LDR	X14, [X13, #1728]

(10) 0x41353c LDR	X13, [X13, #1752]

(10) 0x413540 SUB	X13, X15, X13

(10) 0x413544 STR	XZR, [X14, X13,LSL #3]

(10) 0x413548 LDRSW	X13, [X20]

(10) 0x41354c SUB	X13, X13, X9

(10) 0x413550 MADD	X13, X13, X12, X8

(10) 0x413554 LDR	X14, [X13, #1920]

(10) 0x413558 LDR	X13, [X13, #1944]

(10) 0x41355c SUB	X13, X15, X13

(10) 0x413560 STR	XZR, [X14, X13,LSL #3]

(10) 0x413564 B.NE	413520

0x413568 ADRP	X0,

0x41356c ADD	X0, X0, #4088

0x413570 ORR	W1, WZR, W19

0x413574 BL	410380

0x413578 ADRP	X0,

0x41357c ADD	X0, X0, #16

0x413580 ORR	W1, WZR, W19

0x413584 BL	410050

0x413588 LDP	X20, X19, [SP, #176]

0x41358c LDP	X22, X21, [SP, #160]

0x413590 LDR	X23, [SP, #144]

0x413594 LDP	X29, X30, [SP, #128]

0x413598 ADD	SP, SP, #192

0x41359c RET

Coverage (%)	Name	Module
►99.10+	__kmp_invoke_microtask	libomp.so
○	__kmp_invoke_task_func	libomp.so
○	__kmp_launch_thread	libomp.so
○	__kmp_launch_worker(void*)	libomp.so
○	start_thread	libc.so.6
○	thread_start	libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_6

Source file and lines	build_field.f90:93-185
Module	exec

The function is defined in /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:93,101-177,185.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 18% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 65.00 to 10.94 cycles (5.94x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 25 occurrences►
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:101
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:101
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:101
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:120
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:120
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:120
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:135
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:135
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:135
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:144
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:144
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:144
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:155
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:155
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:155
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:161
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:161
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:161
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:168
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:168
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:168
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 78 bytes. The binary function is storing 48 bytes.

General properties

nb instructions	383
nb uops	372
loop length	1532
used w registers	14
used x registers	16
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	28

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	46.50 cycles
front end	46.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	19.00	19.00	65.00	65.00	65.00	65.00	0.00	0.00	0.00	0.00	33.00	33.00	33.00	14.00	14.00
cycles	19.00	19.00	65.00	65.00	65.00	65.00	0.00	0.00	0.00	0.00	33.00	33.00	33.00	14.00	14.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	46.50
Dispatch	65.00
Overall L1	65.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	18%
load	19%
store	20%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	21%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 65.00 cycles. At this rate:

1% of peak load performance is reached (1.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (0.74 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 4128a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
SUB SP, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X29, X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X22, X21, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADRP X21, <48f8b8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X20, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <4878c4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X21, [X21, #3944]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 4101f0 <@plt_start@+0x1d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486910>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3752	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, SP, #20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD X5, SP, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 412bcc <build_field_..omp_par+0x32c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 412978 <build_field_..omp_par+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486bcc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3752	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486bdc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3776	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486bf8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3800	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, SP, #36	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X5, SP, #28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 412e38 <build_field_..omp_par+0x598>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 412c90 <build_field_..omp_par+0x3f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
ADRP X0, <486e38>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3800	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486e48>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3824	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486e68>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3848	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, SP, #52	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #48	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X5, SP, #44	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #44]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #44]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 412fd0 <build_field_..omp_par+0x730>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 412efc <build_field_..omp_par+0x65c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486fd0>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3848	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486fe0>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3872	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486ffc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3896	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X5, SP, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #60]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #60]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413164 <build_field_..omp_par+0x8c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 413090 <build_field_..omp_par+0x7f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486164>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3896	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486174>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3920	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486194>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3944	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #44	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #48	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #52	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2220]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STUR W22, [X29, #456]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W11, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413268 <build_field_..omp_par+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486268>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3944	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486278>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3968	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486294>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3992	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #36	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STUR W22, [X29, #472]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #476]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W11, [X29, #476]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413368 <build_field_..omp_par+0xac8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486368>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3992	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486378>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4016	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486398>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4040	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2220]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STUR W22, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #492]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W11, [X29, #492]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413468 <build_field_..omp_par+0xbc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486468>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4040	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486478>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4064	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486494>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4088	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, X29, #28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, X29, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR WZR, [X29, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W22, W8, [X29, #504]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W11, [X29, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDUR W8, [X29, #508]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413568 <build_field_..omp_par+0xcc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486568>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4088	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <487578>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X22, X21, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDR X23, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X29, X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD SP, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run armclang_6

Source file and lines	build_field.f90:93-185
Module	exec

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): do i a(i)%x = b(i)%x (slow, non stride 1) => do i a%x(i) = b%x(i) (fast, stride 1)

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 25 occurrences►
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:101
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:101
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:101
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:120
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:120
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:120
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:135
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:135
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:135
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:144
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:144
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:144
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:155
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:155
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:155
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:161
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:161
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:161
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:168
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:168
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:168
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174
- /home/eoseret/qaas/qaas_runs/178-231-1255/intel/CloverLeaf1.3-FC/build/CloverLeaf1.3-FC/CloverLeaf_ref/build_field.f90:174

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 78 bytes. The binary function is storing 48 bytes.

General properties

nb instructions	383
nb uops	372
loop length	1532
used w registers	14
used x registers	16
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	28

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	46.50 cycles
front end	46.50 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	19.00	19.00	65.00	65.00	65.00	65.00	0.00	0.00	0.00	0.00	33.00	33.00	33.00	14.00	14.00
cycles	19.00	19.00	65.00	65.00	65.00	65.00	0.00	0.00	0.00	0.00	33.00	33.00	33.00	14.00	14.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	46.50
Dispatch	65.00
Overall L1	65.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	18%
load	19%
store	20%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	21%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	12%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 65.00 cycles. At this rate:

1% of peak load performance is reached (1.20 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
1% of peak store performance is reached (0.74 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 4128a0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
SUB SP, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X29, X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X23, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X22, X21, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #128	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADRP X21, <48f8b8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X20, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <4878c4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X21, [X21, #3944]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #8]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 4101f0 <@plt_start@+0x1d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486910>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3752	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, SP, #20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD X5, SP, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #12]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 412bcc <build_field_..omp_par+0x32c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 412978 <build_field_..omp_par+0xd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486bcc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3752	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486bdc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3776	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486bf8>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3800	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, SP, #36	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X5, SP, #28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #28]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 412e38 <build_field_..omp_par+0x598>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 412c90 <build_field_..omp_par+0x3f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
ADRP X0, <486e38>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3800	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486e48>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3824	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486e68>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3848	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, SP, #52	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #48	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X5, SP, #44	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #44]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #44]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 412fd0 <build_field_..omp_par+0x730>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 412efc <build_field_..omp_par+0x65c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486fd0>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3848	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486fe0>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3872	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486ffc>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3896	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X5, SP, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, SP, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR W22, [SP, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [SP, #60]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W12, [SP, #60]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W8, W8, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMN W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413164 <build_field_..omp_par+0x8c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W12, W23, W12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W11, WZR, WZR	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W13, W12, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 413090 <build_field_..omp_par+0x7f0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486164>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3896	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486174>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3920	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486194>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3944	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #44	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #48	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #52	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #56	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2220]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STUR W22, [X29, #456]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W11, [X29, #460]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413268 <build_field_..omp_par+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486268>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3944	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486278>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3968	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486294>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3992	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #36	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #40	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STUR W22, [X29, #472]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #476]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W11, [X29, #476]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413368 <build_field_..omp_par+0xac8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486368>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #3992	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486378>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4016	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W22, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <486398>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4040	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X29, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2216]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2220]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STUR W22, [X29, #488]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W8, WZR, [X29, #492]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP W8, W11, [X29, #492]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413468 <build_field_..omp_par+0xbc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486468>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4040	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <486478>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4064	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDRSW X10, [X20]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADRP X0, <486494>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4088	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X3, X29, #28	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, X29, #24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB X9, X10, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W10, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MADD X8, X9, X10, X8	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
LDR W23, [X8, #2224]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDR W8, [X8, #2228]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STR WZR, [X29, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
SUB W9, W23, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W8, W8, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W8, W8, W9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
CSINV W8, W8, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP W22, W8, [X29, #504]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 410090 <@plt_start@+0x70>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W11, [X29, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
LDUR W8, [X29, #508]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
SUB W10, W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CMN W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 413568 <build_field_..omp_par+0xcc8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X21, #408]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X21, #432]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W23, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
ADD W10, W10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W12, #2248	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SUB W11, W11, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
HINT #0																			N/A
ADRP X0, <486568>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #4088	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410380 <@plt_start@+0x360>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <487578>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 410050 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X22, X21, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDR X23, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDP X29, X30, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD SP, SP, #192	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Name	Coverage (%)	Time (s)
▼build_field_..omp_par–	0.09	0.12
○Loop 11 - build_field.f90:168-171 - exec	0.00	0.00
○Loop 10 - build_field.f90:174-177 - exec	0.00	0.00
▼Loop 14 - build_field.f90:144-149 - exec–	0.00	0.00
○Loop 15 - build_field.f90:146-149 - exec	0.01	0.02
▼Loop 18 - build_field.f90:120-130 - exec–	0.00	0.00
○Loop 19 - build_field.f90:122-130 - exec	0.03	0.04
○Loop 13 - build_field.f90:155-158 - exec	0.00	0.00
▼Loop 20 - build_field.f90:101-115 - exec–	0.00	0.00
○Loop 21 - build_field.f90:103-115 - exec	0.04	0.06
○Loop 12 - build_field.f90:161-164 - exec	0.00	0.00
▼Loop 16 - build_field.f90:135-140 - exec–	0.00	0.00
○Loop 17 - build_field.f90:137-140 - exec	0.01	0.02

Report Configuration

Vectorization

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Matching between your function (in the source code) and the binary function

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ASM code

Vectorization

Details

Workaround

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code