OV - exec - Function std::enable_if<camp::concepts::all_of<camp::concepts::metalib::negate_t<RAJA::internal::loop_data_has_reducers<camp::type::cv::rem_s<camp::type::ref::rem_s<RAJA::internal::LoopData<camp::tuple<RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Moment, long, Kripke::Moment*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Direction, long, Kripke::Direction*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Group, long, Kripke::Group*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Zone, long, Kripke::Zone*>, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator()<Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ> >(Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ>, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Direction>&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>::type>::type> > >::value, void>::type RAJA::internal::StatementExecutor<RAJA::statement::Collapse<RAJA::omp_parallel_collapse_exec, camp::int_seq<long, 0l, 2l>, RAJA::statement::For<1l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes<camp::list<void, void, void, void>, camp::list<void, void, void, void> > >::exec<RAJA::internal::LoopData<camp::tuple<RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Moment, long, Kripke::Moment*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Direction, long, Kripke::Direction*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Group, long, Kripke::Group*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Zone, long, Kripke::Zone*>, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator()<Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ> >(Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ>, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Direction>&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData<camp::tuple<RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Moment, long, Kripke::Moment*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Direction, long, Kripke::Direction*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Group, long, Kripke::Group*>, long>, RAJA::Span<RAJA::Iterators::numeric_iterator<Kripke::Zone, long, Kripke::Zone*>, long> >, camp::tuple<>, camp::resources::v1::Host, LTimesSdom::operator()<Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ> >(Kripke::ArchLayoutT<Kripke::ArchT_OpenMP, Kripke::LayoutT_DGZ>, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field<double, Kripke::Direction, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Group, Kripke::Zone>&, Kripke::Core::Field<double, Kripke::Moment, Kripke::Direction>&) const::{lambda(Kripke::Moment, Kripke::Direction, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp

	Function: std::enable_if<camp::concepts::all_of<camp::concepts::metalib::negate_t<RAJA::internal::lo ...	Module: exec	Source: Collapse.hpp:129-129 [...]	Coverage (incl. loops): 7.87% \| (excl. loops): 0.01%

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 187 - 187

--------------------------------------------------------------------------------

187:     return sum<IdxLin>((RangeInts == stride_one_dim

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 142 - 142

--------------------------------------------------------------------------------

142:     for (decltype(distance_it) i = 0; i < distance_it; ++i)

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 129 - 129

--------------------------------------------------------------------------------

129: #pragma omp parallel for private(i0, i1) firstprivate(privatizer)              \

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 366 - 369

--------------------------------------------------------------------------------

366:   RAJA_HOST_DEVICE constexpr Ret operator()(const Arg1& lhs,

367:                                             const Arg2& rhs) const

368:   {

369:     return Ret {lhs} + rhs;

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp: 216 - 216

--------------------------------------------------------------------------------

216:     return data[stripIndexType(layout(args...))];

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp: 232 - 291

--------------------------------------------------------------------------------

232:     return val - rhs.val;

[...]

291:     return value_type(val + rhs);

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62

--------------------------------------------------------------------------------

62:            phi(nm,g,z) += ell(nm, d) * psi(d, g, z);

0x48aea0 STP	X29, X30, [SP, #832]!

0x48aea4 ADD	X29, SP, #0

0x48aea8 STP	X19, X20, [SP, #16]

0x48aeac STP	X23, X24, [SP, #48]

0x48aeb0 LDP	X20, X23, [X0]

0x48aeb4 CMP	X20, #0

0x48aeb8 B.LE	48b234

0x48aebc CMP	X23, #0

0x48aec0 B.LE	48b234

0x48aec4 MUL	X24, X20, X23

0x48aec8 STP	X21, X22, [SP, #32]

0x48aecc ORR	X21, XZR, X0

0x48aed0 BL	4101e0

0x48aed4 SBFM	X19, X0, #0, #31

0x48aed8 BL	4101f0

0x48aedc UDIV	X1, X24, X19

0x48aee0 SBFM	X22, X0, #0, #31

0x48aee4 MSUB	X0, X1, X19, X24

0x48aee8 CMP	X22, X0

0x48aeec B.CC	48b454

0x48aef0 MADD	X2, X1, X22, X0

0x48aef4 ADD	X3, X1, X2

0x48aef8 CMP	X2, X3

0x48aefc B.CS	48b230

0x48af00 LDR	X6, [X21, #16]

0x48af04 UDIV	X8, X2, X23

0x48af08 STP	X27, X28, [SP, #80]

0x48af0c LDP	X10, X18, [X6, #16]

0x48af10 LDP	X27, X9, [X6, #48]

0x48af14 SUB	X11, X18, X10

0x48af18 MSUB	X22, X8, X23, X2

0x48af1c CMP	X11, #0

0x48af20 CSEL	X18, X11, XZR, #10

0x48af24 LDR	X4, [X6]

0x48af28 SUB	X9, X9, X27

0x48af2c LDR	X5, [X6, #32]

0x48af30 LDR	X12, [X6, #104]

0x48af34 STP	X8, X4, [SP, #176]

0x48af38 LDR	X13, [X6, #112]

0x48af3c STR	X12, [SP, #96]

0x48af40 LDR	X14, [X6, #176]

0x48af44 STR	X5, [SP, #104]

0x48af48 LDR	X15, [X6, #288]

0x48af4c STR	X13, [SP, #120]

0x48af50 LDR	X24, [X6, #72]

0x48af54 LDR	X30, [X6, #208]

0x48af58 STP	X14, X15, [SP, #128]

0x48af5c LDR	X7, [X6, #248]

0x48af60 LDR	X19, [X6, #280]

0x48af64 B.LE	48b460

0x48af68 CMP	X9, #0

0x48af6c B.LE	48b460

0x48af70 MUL	X16, X10, X19

0x48af74 SUB	X28, X1, #1

0x48af78 UBFM	X17, X9, #1, #63

0x48af7c MUL	X1, X10, X30

0x48af80 AND	X21, X9, #0xfffffffe

0x48af84 UBFM	X2, X9, #61, #60

0x48af88 UBFM	X11, X17, #60, #59

0x48af8c ADD	X6, X27, X21

0x48af90 STP	X25, X26, [SP, #64]

0x48af94 ADD	X0, X27, X16

0x48af98 UBFM	X20, X19, #61, #60

0x48af9c MOVZ	X25, #0

0x48afa0 ADD	X26, X8, X4

0x48afa4 UBFM	X30, X30, #61, #60

0x48afa8 STR	X1, [SP, #112]

0x48afac STP	X16, X28, [SP, #144]

0x48afb0 STR	X2, [SP, #160]

0x48afb4 STR	X0, [SP, #168]

0x48afb8 HINT	#0

0x48afbc HINT	#0

(2029) 0x48afc0 LDR	X3, [SP, #104]

(2029) 0x48afc4 MOVZ	X8, #0

(2029) 0x48afc8 LDR	X13, [SP, #120]

(2029) 0x48afcc LDR	X17, [SP, #96]

(2029) 0x48afd0 ADD	X10, X22, X3

(2029) 0x48afd4 LDR	X4, [SP, #112]

(2029) 0x48afd8 MUL	X14, X13, X10

(2029) 0x48afdc LDR	X12, [SP, #128]

(2029) 0x48afe0 LDR	X15, [SP, #136]

(2029) 0x48afe4 MADD	X28, X17, X26, X14

(2029) 0x48afe8 ADD	X5, X26, X4

(2029) 0x48afec LDR	X13, [SP, #160]

(2029) 0x48aff0 ADD	X3, X12, X5,LSL #3

(2029) 0x48aff4 ADD	X1, X27, X28

(2029) 0x48aff8 ADD	X0, X28, X6

(2029) 0x48affc LDR	X2, [SP, #168]

(2029) 0x48b000 ADD	X4, X24, X0,LSL #3

(2029) 0x48b004 MUL	X16, X15, X10

(2029) 0x48b008 UBFM	X10, X1, #61, #60

(2029) 0x48b00c LDR	X12, [SP, #144]

(2029) 0x48b010 ADD	X1, X24, X10

(2029) 0x48b014 ADD	X14, X13, X10

(2029) 0x48b018 ADD	X17, X24, X14

(2029) 0x48b01c ADD	X5, X2, X16

(2029) 0x48b020 ADD	X2, X7, X5,LSL #3

(2029) 0x48b024 ADD	X5, X16, X12

  (2028) 0x48b028 ADD	X15, X3, #8

  (2028) 0x48b02c ADD	X16, X2, #8

  (2028) 0x48b030 CMP	X15, X1

  (2028) 0x48b034 CCMP	X17, X3, #0, #8

  (2028) 0x48b038 CSINC	W28, WZR, WZR, #8

  (2028) 0x48b03c CMP	X16, X1

  (2028) 0x48b040 CCMP	X9, #1, #4, #1

  (2028) 0x48b044 CSINC	W0, WZR, WZR, #13

  (2028) 0x48b048 ANDS	WZR, W28, W0

  (2028) 0x48b04c B.EQ	48b260

  (2028) 0x48b050 SUB	X10, X11, #16

  (2028) 0x48b054 LD1R	{V0.2D}, [X3]

  (2028) 0x48b058 MOVZ	X0, #0

  (2028) 0x48b05c UBFM	X12, X10, #4, #63

  (2028) 0x48b060 ADD	X13, X12, #1

  (2028) 0x48b064 ANDS	X14, X13, #0x7

  (2028) 0x48b068 B.EQ	48b130

  (2028) 0x48b06c CMP	X14, #1

  (2028) 0x48b070 B.EQ	48b114

  (2028) 0x48b074 CMP	X14, #2

  (2028) 0x48b078 B.EQ	48b100

  (2028) 0x48b07c CMP	X14, #3

  (2028) 0x48b080 B.EQ	48b0ec

  (2028) 0x48b084 CMP	X14, #4

  (2028) 0x48b088 B.EQ	48b0d8

  (2028) 0x48b08c CMP	X14, #5

  (2028) 0x48b090 B.EQ	48b0c4

  (2028) 0x48b094 CMP	X14, #6

  (2028) 0x48b098 B.EQ	48b0b0

  (2028) 0x48b09c LDR	Q1, [X1]

  (2028) 0x48b0a0 MOVZ	X0, #16

  (2028) 0x48b0a4 LDR	Q2, [X2]

  (2028) 0x48b0a8 FMLA	V1.2D, V0.2D, V2.2D

  (2028) 0x48b0ac STR	Q1, [X1]

  (2028) 0x48b0b0 LDR	Q3, [X2, X0]

  (2028) 0x48b0b4 LDR	Q4, [X1, X0]

  (2028) 0x48b0b8 FMLA	V4.2D, V0.2D, V3.2D

  (2028) 0x48b0bc STR	Q4, [X1, X0]

  (2028) 0x48b0c0 ADD	X0, X0, #16

  (2028) 0x48b0c4 LDR	Q5, [X2, X0]

  (2028) 0x48b0c8 LDR	Q6, [X1, X0]

  (2028) 0x48b0cc FMLA	V6.2D, V0.2D, V5.2D

  (2028) 0x48b0d0 STR	Q6, [X1, X0]

  (2028) 0x48b0d4 ADD	X0, X0, #16

  (2028) 0x48b0d8 LDR	Q7, [X2, X0]

  (2028) 0x48b0dc LDR	Q16, [X1, X0]

  (2028) 0x48b0e0 FMLA	V16.2D, V0.2D, V7.2D

  (2028) 0x48b0e4 STR	Q16, [X1, X0]

  (2028) 0x48b0e8 ADD	X0, X0, #16

  (2028) 0x48b0ec LDR	Q17, [X2, X0]

  (2028) 0x48b0f0 LDR	Q18, [X1, X0]

  (2028) 0x48b0f4 FMLA	V18.2D, V0.2D, V17.2D

  (2028) 0x48b0f8 STR	Q18, [X1, X0]

  (2028) 0x48b0fc ADD	X0, X0, #16

  (2028) 0x48b100 LDR	Q19, [X2, X0]

  (2028) 0x48b104 LDR	Q20, [X1, X0]

  (2028) 0x48b108 FMLA	V20.2D, V0.2D, V19.2D

  (2028) 0x48b10c STR	Q20, [X1, X0]

  (2028) 0x48b110 ADD	X0, X0, #16

  (2028) 0x48b114 LDR	Q21, [X2, X0]

  (2028) 0x48b118 LDR	Q22, [X1, X0]

  (2028) 0x48b11c FMLA	V22.2D, V0.2D, V21.2D

  (2028) 0x48b120 STR	Q22, [X1, X0]

  (2028) 0x48b124 ADD	X0, X0, #16

  (2028) 0x48b128 CMP	X0, X11

  (2028) 0x48b12c B.EQ	48b1d8

    (2031) 0x48b130 LDR	Q23, [X2, X0]

    (2031) 0x48b134 ADD	X10, X0, #16

    (2031) 0x48b138 ADD	X28, X0, #32

    (2031) 0x48b13c ADD	X16, X0, #48

    (2031) 0x48b140 ADD	X15, X0, #64

    (2031) 0x48b144 LDR	Q24, [X1, X0]

    (2031) 0x48b148 ADD	X14, X0, #80

    (2031) 0x48b14c ADD	X13, X0, #96

    (2031) 0x48b150 ADD	X12, X0, #112

    (2031) 0x48b154 FMLA	V24.2D, V0.2D, V23.2D

    (2031) 0x48b158 STR	Q24, [X1, X0]

    (2031) 0x48b15c ADD	X0, X0, #128

    (2031) 0x48b160 LDR	Q25, [X2, X10]

    (2031) 0x48b164 LDR	Q26, [X1, X10]

    (2031) 0x48b168 FMLA	V26.2D, V0.2D, V25.2D

    (2031) 0x48b16c STR	Q26, [X1, X10]

    (2031) 0x48b170 LDR	Q27, [X2, X28]

    (2031) 0x48b174 LDR	Q28, [X1, X28]

    (2031) 0x48b178 FMLA	V28.2D, V0.2D, V27.2D

    (2031) 0x48b17c STR	Q28, [X1, X28]

    (2031) 0x48b180 LDR	Q29, [X2, X16]

    (2031) 0x48b184 LDR	Q30, [X1, X16]

    (2031) 0x48b188 FMLA	V30.2D, V0.2D, V29.2D

    (2031) 0x48b18c STR	Q30, [X1, X16]

    (2031) 0x48b190 LDR	Q31, [X2, X15]

    (2031) 0x48b194 LDR	Q1, [X1, X15]

    (2031) 0x48b198 FMLA	V1.2D, V0.2D, V31.2D

    (2031) 0x48b19c STR	Q1, [X1, X15]

    (2031) 0x48b1a0 LDR	Q2, [X2, X14]

    (2031) 0x48b1a4 LDR	Q3, [X1, X14]

    (2031) 0x48b1a8 FMLA	V3.2D, V0.2D, V2.2D

    (2031) 0x48b1ac STR	Q3, [X1, X14]

    (2031) 0x48b1b0 LDR	Q4, [X2, X13]

    (2031) 0x48b1b4 LDR	Q5, [X1, X13]

    (2031) 0x48b1b8 FMLA	V5.2D, V0.2D, V4.2D

    (2031) 0x48b1bc STR	Q5, [X1, X13]

    (2031) 0x48b1c0 LDR	Q6, [X2, X12]

    (2031) 0x48b1c4 LDR	Q7, [X1, X12]

    (2031) 0x48b1c8 FMLA	V7.2D, V0.2D, V6.2D

    (2031) 0x48b1cc STR	Q7, [X1, X12]

    (2031) 0x48b1d0 CMP	X0, X11

    (2031) 0x48b1d4 B.NE	48b130

  (2028) 0x48b1d8 CMP	X9, X21

  (2028) 0x48b1dc B.EQ	48b1f8

  (2028) 0x48b1e0 ADD	X0, X5, X6

  (2028) 0x48b1e4 LDR	D17, [X3]

  (2028) 0x48b1e8 LDR	D16, [X7, X0,LSL #3]

  (2028) 0x48b1ec LDR	D0, [X4]

  (2028) 0x48b1f0 FMADD	D18, D16, D17, D0

  (2028) 0x48b1f4 STR	D18, [X4]

  (2028) 0x48b1f8 ADD	X8, X8, #1

  (2028) 0x48b1fc ADD	X2, X2, X20

  (2028) 0x48b200 ADD	X3, X3, X30

  (2028) 0x48b204 ADD	X5, X5, X19

  (2028) 0x48b208 CMP	X8, X18

  (2028) 0x48b20c B.LT	48b028

(2029) 0x48b210 LDR	X0, [SP, #152]

(2029) 0x48b214 CMP	X25, X0

(2029) 0x48b218 B.EQ	48b438

(2029) 0x48b21c ADD	X22, X22, #1

(2029) 0x48b220 CMP	X23, X22

(2029) 0x48b224 B.LE	48b244

(2029) 0x48b228 ADD	X25, X25, #1

(2029) 0x48b22c B	48afc0

0x48b230 LDP	X21, X22, [SP, #32]

0x48b234 LDP	X19, X20, [SP, #16]

0x48b238 LDP	X23, X24, [SP, #48]

0x48b23c LDP	X29, X30, [SP], #192

0x48b240 RET

(2029) 0x48b244 LDP	X26, X1, [SP, #176]

(2029) 0x48b248 MOVZ	X22, #0

(2029) 0x48b24c ADD	X25, X25, #1

(2029) 0x48b250 ADD	X2, X26, #1

(2029) 0x48b254 ADD	X26, X2, X1

(2029) 0x48b258 STR	X2, [SP, #176]

(2029) 0x48b25c B	48afc0

  (2028) 0x48b260 LDR	D19, [X1]

  (2028) 0x48b264 SUB	X10, X9, #1

  (2028) 0x48b268 MOVZ	X0, #1

  (2028) 0x48b26c AND	X16, X10, #0x7

  (2028) 0x48b270 LDR	D20, [X2]

  (2028) 0x48b274 LDR	D21, [X3]

  (2028) 0x48b278 FMADD	D22, D20, D21, D19

  (2028) 0x48b27c STR	D22, [X1]

  (2028) 0x48b280 CMP	X9, X0

  (2028) 0x48b284 B.LE	48b1f8

  (2028) 0x48b288 CBZ	X16, 48b36c

  (2028) 0x48b28c CMP	X16, #1

  (2028) 0x48b290 B.EQ	48b34c

  (2028) 0x48b294 CMP	X16, #2

  (2028) 0x48b298 B.EQ	48b334

  (2028) 0x48b29c CMP	X16, #3

  (2028) 0x48b2a0 B.EQ	48b31c

  (2028) 0x48b2a4 CMP	X16, #4

  (2028) 0x48b2a8 B.EQ	48b304

  (2028) 0x48b2ac CMP	X16, #5

  (2028) 0x48b2b0 B.EQ	48b2ec

  (2028) 0x48b2b4 CMP	X16, #6

  (2028) 0x48b2b8 B.EQ	48b2d4

  (2028) 0x48b2bc LDR	D25, [X3]

  (2028) 0x48b2c0 MOVZ	X0, #2

  (2028) 0x48b2c4 LDR	D23, [X1, #8]

  (2028) 0x48b2c8 LDR	D24, [X2, #8]

  (2028) 0x48b2cc FMADD	D26, D24, D25, D23

  (2028) 0x48b2d0 STR	D26, [X1, #8]

  (2028) 0x48b2d4 LDR	D27, [X2, X0,LSL #3]

  (2028) 0x48b2d8 LDR	D28, [X1, X0,LSL #3]

  (2028) 0x48b2dc LDR	D29, [X3]

  (2028) 0x48b2e0 FMADD	D30, D27, D29, D28

  (2028) 0x48b2e4 STR	D30, [X1, X0,LSL #3]

  (2028) 0x48b2e8 ADD	X0, X0, #1

  (2028) 0x48b2ec LDR	D31, [X2, X0,LSL #3]

  (2028) 0x48b2f0 LDR	D2, [X1, X0,LSL #3]

  (2028) 0x48b2f4 LDR	D1, [X3]

  (2028) 0x48b2f8 FMADD	D3, D31, D1, D2

  (2028) 0x48b2fc STR	D3, [X1, X0,LSL #3]

  (2028) 0x48b300 ADD	X0, X0, #1

  (2028) 0x48b304 LDR	D4, [X2, X0,LSL #3]

  (2028) 0x48b308 LDR	D5, [X1, X0,LSL #3]

  (2028) 0x48b30c LDR	D6, [X3]

  (2028) 0x48b310 FMADD	D7, D4, D6, D5

  (2028) 0x48b314 STR	D7, [X1, X0,LSL #3]

  (2028) 0x48b318 ADD	X0, X0, #1

  (2028) 0x48b31c LDR	D16, [X2, X0,LSL #3]

  (2028) 0x48b320 LDR	D17, [X1, X0,LSL #3]

  (2028) 0x48b324 LDR	D0, [X3]

  (2028) 0x48b328 FMADD	D18, D16, D0, D17

  (2028) 0x48b32c STR	D18, [X1, X0,LSL #3]

  (2028) 0x48b330 ADD	X0, X0, #1

  (2028) 0x48b334 LDR	D19, [X2, X0,LSL #3]

  (2028) 0x48b338 LDR	D20, [X1, X0,LSL #3]

  (2028) 0x48b33c LDR	D21, [X3]

  (2028) 0x48b340 FMADD	D22, D19, D21, D20

  (2028) 0x48b344 STR	D22, [X1, X0,LSL #3]

  (2028) 0x48b348 ADD	X0, X0, #1

  (2028) 0x48b34c LDR	D23, [X2, X0,LSL #3]

  (2028) 0x48b350 LDR	D24, [X1, X0,LSL #3]

  (2028) 0x48b354 LDR	D25, [X3]

  (2028) 0x48b358 FMADD	D26, D23, D25, D24

  (2028) 0x48b35c STR	D26, [X1, X0,LSL #3]

  (2028) 0x48b360 ADD	X0, X0, #1

  (2028) 0x48b364 CMP	X9, X0

  (2028) 0x48b368 B.LE	48b1f8

    (2030) 0x48b36c LDR	D27, [X2, X0,LSL #3]

    (2030) 0x48b370 ADD	X10, X0, #1

    (2030) 0x48b374 ADD	X28, X0, #2

    (2030) 0x48b378 ADD	X16, X0, #3

    (2030) 0x48b37c ADD	X15, X0, #4

    (2030) 0x48b380 LDR	D28, [X1, X0,LSL #3]

    (2030) 0x48b384 ADD	X14, X0, #5

    (2030) 0x48b388 ADD	X13, X0, #6

    (2030) 0x48b38c ADD	X12, X0, #7

    (2030) 0x48b390 LDR	D29, [X3]

    (2030) 0x48b394 FMADD	D30, D27, D29, D28

    (2030) 0x48b398 STR	D30, [X1, X0,LSL #3]

    (2030) 0x48b39c ADD	X0, X0, #8

    (2030) 0x48b3a0 LDR	D31, [X2, X10,LSL #3]

    (2030) 0x48b3a4 LDR	D2, [X1, X10,LSL #3]

    (2030) 0x48b3a8 LDR	D1, [X3]

    (2030) 0x48b3ac FMADD	D3, D31, D1, D2

    (2030) 0x48b3b0 STR	D3, [X1, X10,LSL #3]

    (2030) 0x48b3b4 LDR	D4, [X2, X28,LSL #3]

    (2030) 0x48b3b8 LDR	D5, [X1, X28,LSL #3]

    (2030) 0x48b3bc LDR	D6, [X3]

    (2030) 0x48b3c0 FMADD	D7, D4, D6, D5

    (2030) 0x48b3c4 STR	D7, [X1, X28,LSL #3]

    (2030) 0x48b3c8 LDR	D16, [X2, X16,LSL #3]

    (2030) 0x48b3cc LDR	D17, [X1, X16,LSL #3]

    (2030) 0x48b3d0 LDR	D0, [X3]

    (2030) 0x48b3d4 FMADD	D18, D16, D0, D17

    (2030) 0x48b3d8 STR	D18, [X1, X16,LSL #3]

    (2030) 0x48b3dc LDR	D19, [X2, X15,LSL #3]

    (2030) 0x48b3e0 LDR	D20, [X1, X15,LSL #3]

    (2030) 0x48b3e4 LDR	D21, [X3]

    (2030) 0x48b3e8 FMADD	D22, D19, D21, D20

    (2030) 0x48b3ec STR	D22, [X1, X15,LSL #3]

    (2030) 0x48b3f0 LDR	D23, [X2, X14,LSL #3]

    (2030) 0x48b3f4 LDR	D24, [X1, X14,LSL #3]

    (2030) 0x48b3f8 LDR	D25, [X3]

    (2030) 0x48b3fc FMADD	D26, D23, D25, D24

    (2030) 0x48b400 STR	D26, [X1, X14,LSL #3]

    (2030) 0x48b404 LDR	D27, [X2, X13,LSL #3]

    (2030) 0x48b408 LDR	D28, [X1, X13,LSL #3]

    (2030) 0x48b40c LDR	D29, [X3]

    (2030) 0x48b410 FMADD	D30, D27, D29, D28

    (2030) 0x48b414 STR	D30, [X1, X13,LSL #3]

    (2030) 0x48b418 LDR	D31, [X2, X12,LSL #3]

    (2030) 0x48b41c LDR	D2, [X1, X12,LSL #3]

    (2030) 0x48b420 LDR	D1, [X3]

    (2030) 0x48b424 FMADD	D3, D31, D1, D2

    (2030) 0x48b428 STR	D3, [X1, X12,LSL #3]

    (2030) 0x48b42c CMP	X9, X0

    (2030) 0x48b430 B.GT	48b36c

  (2028) 0x48b434 B	48b1f8

0x48b438 LDP	X19, X20, [SP, #16]

0x48b43c LDP	X21, X22, [SP, #32]

0x48b440 LDP	X23, X24, [SP, #48]

0x48b444 LDP	X25, X26, [SP, #64]

0x48b448 LDP	X27, X28, [SP, #80]

0x48b44c LDP	X29, X30, [SP], #192

0x48b450 RET

0x48b454 ADD	X1, X1, #1

0x48b458 MOVZ	X0, #0

0x48b45c B	48aef0

0x48b460 LDP	X19, X20, [SP, #16]

0x48b464 LDP	X21, X22, [SP, #32]

0x48b468 LDP	X23, X24, [SP, #48]

0x48b46c LDP	X27, X28, [SP, #80]

0x48b470 LDP	X29, X30, [SP], #192

0x48b474 RET

0x48b478 HINT	#0

0x48b47c HINT	#0

Coverage (%)	Name	Source Location	Module
►98.43+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.57+	GOMP_parallel		libgomp.so.1.0.0
○	void Kripke::DispatchHelper<Kr[...]	Collapse.hpp:129	exec
○	Kripke::Kernel::LTimes(Kripke:[...]	ArchLayout.h:155	exec
○	Kripke::SteadyStateSolver(Krip[...]	new_allocator.h:82	exec
○	main	new_allocator.h:79	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	iostream:74	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_9

Source file and lines	Collapse.hpp:129-129
Module	exec

The function is defined in:

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:129
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:366-369
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:216
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp:232,291
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp:62

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 36% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 40.00 to 30.00 cycles (1.33x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 40.00 to 14.83 cycles (2.70x speedup).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:129
- /home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:129

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function does not load or store any data.

General properties

nb instructions	95
nb uops	91
loop length	380
used w registers	0
used x registers	32
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	30

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.38 cycles
front end	11.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	6.00	6.00	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	14.83	14.50	14.67	7.50	7.50
cycles	6.00	6.00	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	14.83	14.50	14.67	7.50	7.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-40.00

Cycles summary

Front-end	11.38
Dispatch	14.83
DIV/SQRT	10.00-40.00
Overall L1	14.83-40.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	0%

Vector efficiency ratios

all	36%
load	40%
store	40%
mul	25%
add-sub	25%
fma	25%
div/sqrt	25%
other	35%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 40.00 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 48aea0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #832]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X20, X23, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
CMP X20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 48b234 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X23, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 48b234 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MUL X24, X20, X23	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4101e0 <@plt_start@+0x1c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SBFM X19, X0, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (100.0%)
BL 4101f0 <@plt_start@+0x1d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UDIV X1, X24, X19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	5-20	N/A
SBFM X22, X0, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (100.0%)
MSUB X0, X1, X19, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
CMP X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CC 48b454 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x5b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MADD X2, X1, X22, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X3, X1, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X2, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CS 48b230 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x390>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UDIV X8, X2, X23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	5-20	scal (25.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X18, [X6, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X9, [X6, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
SUB X11, X18, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MSUB X22, X8, X23, X2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
CMP X11, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSEL X18, X11, XZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SUB X9, X9, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X5, [X6, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X12, [X6, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X8, X4, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X6, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X12, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X14, [X6, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X5, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X15, [X6, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X24, [X6, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X30, [X6, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X14, X15, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [X6, #248]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X19, [X6, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
B.LE 48b460 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 48b460 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MUL X16, X10, X19	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (25.0%)
SUB X28, X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X17, X9, #1, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MUL X1, X10, X30	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
AND X21, X9, #0xfffffffe	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
UBFM X2, X9, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X11, X17, #60, #59	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, X27, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X27, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
UBFM X20, X19, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X25, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X26, X8, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X30, X30, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X1, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X16, X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X2, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X0, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 48aef0 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_9

Source file and lines	Collapse.hpp:129-129
Module	exec

The function is defined in:

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:129
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp:366-369
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:216
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/internal/Iterators.hpp:232,291
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp:62

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 40.00 to 14.83 cycles (2.70x speedup).

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:129
- /home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp:129

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function does not load or store any data.

General properties

nb instructions	95
nb uops	91
loop length	380
used w registers	0
used x registers	32
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	30

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	11.38 cycles
front end	11.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	6.00	6.00	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	14.83	14.50	14.67	7.50	7.50
cycles	6.00	6.00	9.50	9.50	9.50	9.50	0.00	0.00	0.00	0.00	14.83	14.50	14.67	7.50	7.50

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

10.00-40.00

Cycles summary

Front-end	11.38
Dispatch	14.83
DIV/SQRT	10.00-40.00
Overall L1	14.83-40.00

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	0%
div/sqrt	0%
other	0%

Vector efficiency ratios

all	36%
load	40%
store	40%
mul	25%
add-sub	25%
fma	25%
div/sqrt	25%
other	35%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 40.00 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 48aea0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #832]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X20, X23, [X0]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
CMP X20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 48b234 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X23, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 48b234 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x394>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MUL X24, X20, X23	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X21, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4101e0 <@plt_start@+0x1c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SBFM X19, X0, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (100.0%)
BL 4101f0 <@plt_start@+0x1d0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
UDIV X1, X24, X19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	5-20	N/A
SBFM X22, X0, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (100.0%)
MSUB X0, X1, X19, X24	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	N/A
CMP X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CC 48b454 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x5b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MADD X2, X1, X22, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X3, X1, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X2, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CS 48b230 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x390>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X21, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
UDIV X8, X2, X23	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-20	5-20	scal (25.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X10, X18, [X6, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X9, [X6, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
SUB X11, X18, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MSUB X22, X8, X23, X2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
CMP X11, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSEL X18, X11, XZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X4, [X6]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SUB X9, X9, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X5, [X6, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X12, [X6, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X8, X4, [SP, #176]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X6, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X12, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X14, [X6, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X5, [SP, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X15, [X6, #288]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X13, [SP, #120]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDR X24, [X6, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X30, [X6, #208]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X14, X15, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [X6, #248]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X19, [X6, #280]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
B.LE 48b460 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LE 48b460 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x5c0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MUL X16, X10, X19	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	scal (25.0%)
SUB X28, X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X17, X9, #1, #63	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MUL X1, X10, X30	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
AND X21, X9, #0xfffffffe	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
UBFM X2, X9, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X11, X17, #60, #59	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X6, X27, X21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X0, X27, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
UBFM X20, X19, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X25, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X26, X8, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X30, X30, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X1, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STP X16, X28, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STR X2, [SP, #160]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR X0, [SP, #168]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X1, X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 48aef0 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl2EEEEJNS2_3ForILl1ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_9DirectionElPSX_EElEENSP_INSR_INSS_5GroupElPS11_EElEENSP_INSR_INSS_4ZoneElPS15_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK10LTimesSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdERKNSS_4Core3SetES1P_S1P_S1P_RNS1M_5FieldIdJSX_S11_S15_EEERNS1Q_IdJST_S11_S15_EEERNS1Q_IdJST_SX_EEEEUlST_SX_S11_S15_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS21_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS26_3ref5rem_sIS1K_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1K_._omp_fn.0+0x50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A

Name	Coverage (%)	Time (s)
▼std::enable_if–	7.87	4.84
▼Loop 2029 - For.hpp:142-142 - exec–	0.00	0.01
▼Loop 2028 - For.hpp:142-142 - exec–	0.00	0.01
○Loop 2031 - For.hpp:142-142 - exec	7.86	4.72
○Loop 2030 - For.hpp:142-142 - exec	0.00	0.00

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Vectorization

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Expensive FP math instructions/calls

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code