OV - exec - Loop 2214

	Loop Id: 2214	Module: exec	Source: For.hpp:142-142 [...]	Coverage: 0.02%

0x498540 ADD	X19, X30, X12

0x498544 MOVZ	X8, #0

0x498548 ADD	X6, X16, X19

  (2213) 0x49854c LDRSW	X0, [X14, X8,LSL #2]

  (2213) 0x498550 LDR	X9, [X15, X8,LSL #3]

  (2213) 0x498554 ADD	X7, X0, X9

  (2213) 0x498558 CMP	X9, X7

  (2213) 0x49855c B.GE	4987b8

  (2213) 0x498560 UBFM	X7, X7, #61, #60

  (2213) 0x498564 UBFM	X0, X9, #61, #60

  (2213) 0x498568 MOVI	D0, #0

  (2213) 0x49856c SUB	X28, X7, X0

  (2213) 0x498570 SUB	X1, X28, #8

  (2213) 0x498574 UBFM	X19, X1, #3, #63

  (2213) 0x498578 ADD	X28, X19, #1

  (2213) 0x49857c ANDS	X1, X28, #0x7

  (2213) 0x498580 B.EQ	498664

  (2213) 0x498584 CMP	X1, #1

  (2213) 0x498588 B.EQ	498644

  (2213) 0x49858c CMP	X1, #2

  (2213) 0x498590 B.EQ	49862c

  (2213) 0x498594 CMP	X1, #3

  (2213) 0x498598 B.EQ	498614

  (2213) 0x49859c CMP	X1, #4

  (2213) 0x4985a0 B.EQ	4985fc

  (2213) 0x4985a4 CMP	X1, #5

  (2213) 0x4985a8 B.EQ	4985e4

  (2213) 0x4985ac CMP	X1, #6

  (2213) 0x4985b0 B.EQ	4985cc

  (2213) 0x4985b4 LDR	X19, [X2, X9,LSL #3]

  (2213) 0x4985b8 ADD	X0, X0, #8

  (2213) 0x4985bc LDR	D2, [X4, X9,LSL #3]

  (2213) 0x4985c0 MADD	X9, X5, X19, X6

  (2213) 0x4985c4 LDR	D1, [X3, X9,LSL #3]

  (2213) 0x4985c8 FMADD	D0, D2, D1, D0

  (2213) 0x4985cc LDR	X28, [X2, X0]

  (2213) 0x4985d0 LDR	D3, [X4, X0]

  (2213) 0x4985d4 ADD	X0, X0, #8

  (2213) 0x4985d8 MADD	X1, X5, X28, X6

  (2213) 0x4985dc LDR	D4, [X3, X1,LSL #3]

  (2213) 0x4985e0 FMADD	D0, D3, D4, D0

  (2213) 0x4985e4 LDR	X19, [X2, X0]

  (2213) 0x4985e8 LDR	D5, [X4, X0]

  (2213) 0x4985ec ADD	X0, X0, #8

  (2213) 0x4985f0 MADD	X9, X5, X19, X6

  (2213) 0x4985f4 LDR	D6, [X3, X9,LSL #3]

  (2213) 0x4985f8 FMADD	D0, D5, D6, D0

  (2213) 0x4985fc LDR	X28, [X2, X0]

  (2213) 0x498600 LDR	D7, [X4, X0]

  (2213) 0x498604 ADD	X0, X0, #8

  (2213) 0x498608 MADD	X1, X5, X28, X6

  (2213) 0x49860c LDR	D16, [X3, X1,LSL #3]

  (2213) 0x498610 FMADD	D0, D7, D16, D0

  (2213) 0x498614 LDR	X19, [X2, X0]

  (2213) 0x498618 LDR	D17, [X4, X0]

  (2213) 0x49861c ADD	X0, X0, #8

  (2213) 0x498620 MADD	X9, X5, X19, X6

  (2213) 0x498624 LDR	D18, [X3, X9,LSL #3]

  (2213) 0x498628 FMADD	D0, D17, D18, D0

  (2213) 0x49862c LDR	X28, [X2, X0]

  (2213) 0x498630 LDR	D19, [X4, X0]

  (2213) 0x498634 ADD	X0, X0, #8

  (2213) 0x498638 MADD	X1, X5, X28, X6

  (2213) 0x49863c LDR	D20, [X3, X1,LSL #3]

  (2213) 0x498640 FMADD	D0, D19, D20, D0

  (2213) 0x498644 LDR	X19, [X2, X0]

  (2213) 0x498648 LDR	D21, [X4, X0]

  (2213) 0x49864c ADD	X0, X0, #8

  (2213) 0x498650 MADD	X9, X5, X19, X6

  (2213) 0x498654 LDR	D22, [X3, X9,LSL #3]

  (2213) 0x498658 FMADD	D0, D21, D22, D0

  (2213) 0x49865c CMP	X0, X7

  (2213) 0x498660 B.EQ	49872c

    (2216) 0x498664 LDR	X19, [X2, X0]

    (2216) 0x498668 ADD	X1, X0, #8

    (2216) 0x49866c ADD	X9, X0, #24

    (2216) 0x498670 LDR	X28, [X2, X1]

    (2216) 0x498674 LDR	D23, [X4, X0]

    (2216) 0x498678 MADD	X19, X5, X19, X6

    (2216) 0x49867c LDR	D24, [X4, X1]

    (2216) 0x498680 ADD	X1, X0, #16

    (2216) 0x498684 MADD	X28, X5, X28, X6

    (2216) 0x498688 LDR	D25, [X3, X19,LSL #3]

    (2216) 0x49868c LDR	X19, [X2, X1]

    (2216) 0x498690 LDR	D26, [X3, X28,LSL #3]

    (2216) 0x498694 ADD	X28, X0, #32

    (2216) 0x498698 FMADD	D27, D23, D25, D0

    (2216) 0x49869c LDR	D28, [X4, X1]

    (2216) 0x4986a0 MADD	X19, X5, X19, X6

    (2216) 0x4986a4 LDR	X1, [X2, X9]

    (2216) 0x4986a8 LDR	D29, [X3, X19,LSL #3]

    (2216) 0x4986ac ADD	X19, X0, #40

    (2216) 0x4986b0 FMADD	D30, D24, D26, D27

    (2216) 0x4986b4 LDR	D31, [X4, X9]

    (2216) 0x4986b8 MADD	X1, X5, X1, X6

    (2216) 0x4986bc LDR	X9, [X2, X28]

    (2216) 0x4986c0 LDR	D2, [X3, X1,LSL #3]

    (2216) 0x4986c4 FMADD	D1, D28, D29, D30

    (2216) 0x4986c8 LDR	X1, [X2, X19]

    (2216) 0x4986cc MADD	X9, X5, X9, X6

    (2216) 0x4986d0 LDR	D4, [X4, X28]

    (2216) 0x4986d4 ADD	X28, X0, #48

    (2216) 0x4986d8 LDR	D3, [X3, X9,LSL #3]

    (2216) 0x4986dc FMADD	D5, D31, D2, D1

    (2216) 0x4986e0 MADD	X1, X5, X1, X6

    (2216) 0x4986e4 LDR	X9, [X2, X28]

    (2216) 0x4986e8 LDR	D6, [X4, X19]

    (2216) 0x4986ec ADD	X19, X0, #56

    (2216) 0x4986f0 ADD	X0, X0, #64

    (2216) 0x4986f4 LDR	D7, [X3, X1,LSL #3]

    (2216) 0x4986f8 FMADD	D16, D4, D3, D5

    (2216) 0x4986fc LDR	D17, [X4, X28]

    (2216) 0x498700 MADD	X28, X5, X9, X6

    (2216) 0x498704 LDR	X1, [X2, X19]

    (2216) 0x498708 LDR	D18, [X3, X28,LSL #3]

    (2216) 0x49870c FMADD	D19, D6, D7, D16

    (2216) 0x498710 LDR	D20, [X4, X19]

    (2216) 0x498714 MADD	X19, X5, X1, X6

    (2216) 0x498718 LDR	D21, [X3, X19,LSL #3]

    (2216) 0x49871c FMADD	D22, D17, D18, D19

    (2216) 0x498720 FMADD	D0, D20, D21, D22

    (2216) 0x498724 CMP	X0, X7

    (2216) 0x498728 B.NE	498664

  (2213) 0x49872c LDR	D23, [X11, X8,LSL #3]

  (2213) 0x498730 LDR	D24, [X10, X8,LSL #3]

  (2213) 0x498734 FMADD	D0, D23, D0, D24

  (2213) 0x498738 STR	D0, [X10, X8,LSL #3]

  (2213) 0x49873c ADD	X8, X8, #1

  (2213) 0x498740 CMP	X8, X13

  (2213) 0x498744 B.LT	49854c

0x498748 ADD	X12, X12, #1

0x49874c ADD	X11, X11, X20

0x498750 CMP	X12, X17

0x498754 B.LT	498540

  (2213) 0x4987b8 LDR	D23, [X11, X8,LSL #3]

  (2213) 0x4987bc MOVI	D0, #0

  (2213) 0x4987c0 LDR	D24, [X10, X8,LSL #3]

  (2213) 0x4987c4 FMADD	D0, D23, D0, D24

  (2213) 0x4987c8 STR	D0, [X10, X8,LSL #3]

  (2213) 0x4987cc ADD	X8, X8, #1

  (2213) 0x4987d0 CMP	X8, X13

  (2213) 0x4987d4 B.LT	49854c

0x4987d8 B	498748

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp: 87 - 97

--------------------------------------------------------------------------------

87:             MixElem mix_start = zone_to_mixelem(z);

88:             MixElem mix_stop = mix_start + zone_to_num_mixelem(z);

89:

90:             double sigs_z = 0.0;

91:             for(MixElem mix = mix_start;mix < mix_stop;++ mix){

92:               Material mat = mixelem_to_material(mix);

93:               double fraction = mixelem_to_fraction(mix);

94:

95:               sigs_z += sigs(mat, n, global_g, global_gp) * fraction;

96:             }

97:             phi_out(nm, g, z) += sigs_z * phi(nm, gp, z);

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 187 - 187

--------------------------------------------------------------------------------

187:     return sum<IdxLin>((RangeInts == stride_one_dim

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 142 - 142

--------------------------------------------------------------------------------

142:     for (decltype(distance_it) i = 0; i < distance_it; ++i)

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp: 216 - 216

--------------------------------------------------------------------------------

216:     return data[stripIndexType(layout(args...))];

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp: 109 - 109

--------------------------------------------------------------------------------

109:     return TYPE(value + a);

Coverage (%)	Name	Source Location	Module
►96.72+	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►3.28+	GOMP_parallel		libgomp.so.1.0.0
○	void Kripke::DispatchHelper<Kr[...]	plugins.hpp:64	exec
○	Kripke::Kernel::scattering(Kri[...]	ArchLayout.h:155	exec
○	Kripke::SteadyStateSolver(Krip[...]	SteadyStateSolver.cpp:73	exec
○	main	new_allocator.h:79	exec
○	__libc_start_call_main		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	iostream:74	exec

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.50
Bottlenecks	P2, P3, P4, P5,
Function	std::enable_if, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>::type>::type> > >::value, void>::type RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	For.hpp:142-142,TypedViewBase.hpp:216-216
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	1.50
CQA cycles if no scalar integer	1.50
CQA cycles if FP arith vectorized	1.50
CQA cycles if fully vectorized	0.38
Front-end cycles	1.00
P0 cycles	1.00
P1 cycles	1.00
P2 cycles	1.50
P3 cycles	1.50
P4 cycles	1.50
P5 cycles	1.50
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	8.00
Nb uops	8.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	0.00
Bytes prefetched	0.00
Bytes loaded	0.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	NA
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	NA
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	25.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Metric	Value
CQA speedup if no scalar integer	1.00
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	4.00
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.50
Bottlenecks	P2, P3, P4, P5,
Function	std::enable_if, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>::type>::type> > >::value, void>::type RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source	For.hpp:142-142,TypedViewBase.hpp:216-216
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	1.50
CQA cycles if no scalar integer	1.50
CQA cycles if FP arith vectorized	1.50
CQA cycles if fully vectorized	0.38
Front-end cycles	1.00
P0 cycles	1.00
P1 cycles	1.00
P2 cycles	1.50
P3 cycles	1.50
P4 cycles	1.50
P5 cycles	1.50
P6 cycles	0.00
P7 cycles	0.00
P8 cycles	0.00
P9 cycles	0.00
P10 cycles	0.00
P11 cycles	0.00
P12 cycles	0.00
P13 cycles	0.00
P14 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	8.00
Nb uops	8.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	0.00
Bytes prefetched	0.00
Bytes loaded	0.00
Bytes stored	0.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	0.00
Vectorization ratio load	NA
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	0.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	25.00
Vector-efficiency ratio load	NA
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	25.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	25.00

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	std::enable_if, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>::type>::type> > >::value, void>::type RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	For.hpp:142-142
Module	exec

The loop is defined in:

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:87-97
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:216
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:109

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 16 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 1.50 to 0.37 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop does not load or store any data.

General properties

nb instructions	8
nb uops	8
loop length	32
used w registers	0
used x registers	9
used b registers	0
used h registers	0
used s registers	0
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	1.00 cycles
front end	1.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.00	1.00	1.50	1.50	1.50	1.50	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.00	1.00	1.50	1.50	1.50	1.50	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	1.00
Dispatch	1.50
Overall L1	1.50

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 1.50 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 498540

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	Latency	Recip. throughput	Vectorization
ADD X19, X30, X12	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
MOVZ X8, #0	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
ADD X6, X16, X19	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
ADD X12, X12, #1	1	0	0	0.25	0.25	0.25	0.25	1	0.25	N/A
ADD X11, X11, X20	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
CMP X12, X17	1	0	0	0.25	0.25	0.25	0.25	1	0.33	N/A
B.LT 498540 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_5GroupElPSX_EElEES10_NSP_INSR_INSS_4ZoneElPS11_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14ScatteringSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdES1H_RKNSS_4Core3SetES1L_S1L_RNS1I_5FieldIdJST_SX_S11_EEES1O_RNS1M_IdJNSS_8MaterialENSS_8LegendreENSS_11GlobalGroupES1R_EEERNS1M_INSS_7MixElemEJS11_EEERNS1M_IiJS11_EEERNS1M_IS1P_JS1U_EEERNS1M_IdJS1U_EEERNS1M_IS1Q_JST_EEEEUlST_SX_SX_S11_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS29_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS2E_3ref5rem_sIS1G_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1G_._omp_fn.0+0x180>	1	0.50	0.50	0	0	0	0	1	0.50	N/A
B 498748 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_5GroupElPSX_EElEES10_NSP_INSR_INSS_4ZoneElPS11_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14ScatteringSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdES1H_RKNSS_4Core3SetES1L_S1L_RNS1I_5FieldIdJST_SX_S11_EEES1O_RNS1M_IdJNSS_8MaterialENSS_8LegendreENSS_11GlobalGroupES1R_EEERNS1M_INSS_7MixElemEJS11_EEERNS1M_IiJS11_EEERNS1M_IS1P_JS1U_EEERNS1M_IdJS1U_EEERNS1M_IS1Q_JST_EEEEUlST_SX_SX_S11_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS29_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS2E_3ref5rem_sIS1G_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1G_._omp_fn.0+0x388>	1	0.50	0.50	0	0	0	0	1	0.50	N/A

Function	std::enable_if, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>::type>::type> > >::value, void>::type RAJA::internal::StatementExecutor, RAJA::statement::For<2l, RAJA::policy::sequential::seq_exec, RAJA::statement::For<3l, RAJA::policy::sequential::seq_exec, RAJA::statement::Lambda<0l> > > >, RAJA::internal::LoopTypes, camp::list > >::exec, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&>(RAJA::internal::LoopData, long>, RAJA::Span, long>, RAJA::Span, long>, RAJA::Span, long> >, camp::tuple<>, camp::resources::v1::Host, ScatteringSdom::operator() >(Kripke::ArchLayoutT, Kripke::SdomId, Kripke::SdomId, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Set const&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&, Kripke::Core::Field&) const::{lambda(Kripke::Moment, Kripke::Group, Kripke::Group, Kripke::Zone)#1}>&) [clone ._omp_fn.0]
Source file and lines	For.hpp:142-142
Module	exec

The loop is defined in:

/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp:87-97
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp:187
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp:142
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp:216
/home/eoseret/qaas/qaas_runs/178-172-5489/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp:109

Warnings:

Non-innermost loop: analyzing only self part (ignoring child loops).
Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Vectorization

Your loop is not vectorized. 4 data elements could be processed at once in vector registers. By vectorizing your loop, you can lower the cost of an iteration from 1.50 to 0.37 cycles (4.00x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop does not load or store any data.

General properties

nb instructions	8
nb uops	8
loop length	32
used w registers	0
used x registers	9
used b registers	0
used h registers	0
used s registers	0
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	1.00 cycles
front end	1.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.00	1.00	1.50	1.50	1.50	1.50	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	1.00	1.00	1.50	1.50	1.50	1.50	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	1.00
Dispatch	1.50
Overall L1	1.50

Vectorization ratios

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 1.50 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 498540

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	Latency	Recip. throughput	Vectorization
ADD X19, X30, X12	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
MOVZ X8, #0	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
ADD X6, X16, X19	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
ADD X12, X12, #1	1	0	0	0.25	0.25	0.25	0.25	1	0.25	N/A
ADD X11, X11, X20	1	0	0	0.25	0.25	0.25	0.25	1	0.25	scal (25.0%)
CMP X12, X17	1	0	0	0.25	0.25	0.25	0.25	1	0.33	N/A
B.LT 498540 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_5GroupElPSX_EElEES10_NSP_INSR_INSS_4ZoneElPS11_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14ScatteringSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdES1H_RKNSS_4Core3SetES1L_S1L_RNS1I_5FieldIdJST_SX_S11_EEES1O_RNS1M_IdJNSS_8MaterialENSS_8LegendreENSS_11GlobalGroupES1R_EEERNS1M_INSS_7MixElemEJS11_EEERNS1M_IiJS11_EEERNS1M_IS1P_JS1U_EEERNS1M_IdJS1U_EEERNS1M_IS1Q_JST_EEEEUlST_SX_SX_S11_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS29_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS2E_3ref5rem_sIS1G_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1G_._omp_fn.0+0x180>	1	0.50	0.50	0	0	0	0	1	0.50	N/A
B 498748 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy10sequential8seq_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEENS0_9LoopTypesINS5_4listIJvvvvEEESJ_EEE4execIRNS0_8LoopDataINS5_5tupleIJNS_4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPST_EElEENSP_INSR_INSS_5GroupElPSX_EElEES10_NSP_INSR_INSS_4ZoneElPS11_EElEEEEENSO_IJEEENS5_9resources2v14HostEJZNK14ScatteringSdomclINSS_11ArchLayoutTINSS_12ArchT_OpenMPENSS_11LayoutT_DGZEEEEEvT_NSS_6SdomIdES1H_RKNSS_4Core3SetES1L_S1L_RNS1I_5FieldIdJST_SX_S11_EEES1O_RNS1M_IdJNSS_8MaterialENSS_8LegendreENSS_11GlobalGroupES1R_EEERNS1M_INSS_7MixElemEJS11_EEERNS1M_IiJS11_EEERNS1M_IS1P_JS1U_EEERNS1M_IdJS1U_EEERNS1M_IS1Q_JST_EEEEUlST_SX_SX_S11_E_EEEEENSt9enable_ifIXsrNS5_8concepts6all_ofIJNS29_7metalib8negate_tINS0_22loop_data_has_reducersINS5_4type2cv5rem_sINS2E_3ref5rem_sIS1G_E4typeEE4typeEEEEEEEE5valueEvE4typeEOS1G_._omp_fn.0+0x388>	1	0.50	0.50	0	0	0	0	1	0.50	N/A

Report Configuration

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code