OV - exec - Function miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector<double, std::allocator<double> >&)

	Function: miniqmcreference::OneBodyJastrowRef<qmcplusplus::BsplineFunctor<double> >::evaluateRatios( ...	Module: exec	Source: OneBodyJastrowRef.h:132-155 [...]	Coverage (incl. loops): 0.07% \| (excl. loops): 0.01%

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h: 132 - 155

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132:   inline void evaluateRatios(VirtualParticleSet& VP, std::vector<ValueType>& ratios)

133:   {

134:     for (int k = 0; k < ratios.size(); ++k)

135:       ratios[k] = std::exp(Vat[VP.refPtcl] - computeU(VP.getDistTableAB(myTableID).getDistRow(k).data()));

136:   }

137:

138:   inline valT computeU(const valT* dist)

139:   {

140:     valT curVat(0);

141:     if (NumGroups > 0)

142:     {

143:       for (int jg = 0; jg < NumGroups; ++jg)

144:       {

145:         if (F[jg] != nullptr)

146:           curVat += F[jg]->evaluateV(-1, Ions.first(jg), Ions.last(jg), dist, DistCompressed.data());

147:       }

148:     }

149:     else

150:     {

151:       for (int c = 0; c < Nions; ++c)

152:       {

153:         int gid = Ions.GroupID[c];

154:         if (F[gid] != nullptr)

155:           curVat += F[gid]->evaluate(dist[c]);

/usr/include/c++/14/bits/stl_vector.h: 993 - 1131

--------------------------------------------------------------------------------

993:       { return size_type(this->_M_impl._M_finish - this->_M_impl._M_start); }

[...]

1128:       operator[](size_type __n) _GLIBCXX_NOEXCEPT

1129:       {

1130: 	__glibcxx_requires_subscript(__n);

1131: 	return *(this->_M_impl._M_start + __n);

/usr/include/c++/14/bits/shared_ptr_base.h: 1667 - 1667

--------------------------------------------------------------------------------

1667:       { return _M_ptr; }

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h: 223 - 249

--------------------------------------------------------------------------------

223:     return X[i];

[...]

229:     return X[i];

[...]

249:   inline const_pointer data() const { return X; }

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h: 313 - 316

--------------------------------------------------------------------------------

313:   inline int first(int igroup) const { return (*group_offsets_)[igroup]; }

314:

315:   ///return the last index of a group i

316:   inline int last(int igroup) const { return (*group_offsets_)[igroup + 1]; }

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h: 166 - 260

--------------------------------------------------------------------------------

166:     if (r >= cutoff_radius)

167:       return 0.0;

168:     r *= DeltaRInv;

169:     real_type ipart, t;

170:     t     = std::modf(r, &ipart);

171:     int i = (int)ipart;

172:     real_type tp[4];

173:     tp[0] = t * t * t;

[...]

179:       (SplineCoefs[i+0]*(A[ 0]*tp[0] + A[ 1]*tp[1] + A[ 2]*tp[2] + A[ 3]*tp[3])+

180:        SplineCoefs[i+1]*(A[ 4]*tp[0] + A[ 5]*tp[1] + A[ 6]*tp[2] + A[ 7]*tp[3])+

181:        SplineCoefs[i+2]*(A[ 8]*tp[0] + A[ 9]*tp[1] + A[10]*tp[2] + A[11]*tp[3])+

182:        SplineCoefs[i+3]*(A[12]*tp[0] + A[13]*tp[1] + A[14]*tp[2] + A[15]*tp[3]));

[...]

231:   ASSUME_ALIGNED(distArrayCompressed);

232:   int iCount       = 0;

233:   const int iLimit = iEnd - iStart;

234:

235: #pragma vector always

236:   for (int jat = 0; jat < iLimit; jat++)

237:   {

238:     real_type r = distArray[jat];

239:     // pick the distances smaller than the cutoff and avoid the reference atom

240:     if (r < cutoff_radius && iStart + jat != iat)

241:       distArrayCompressed[iCount++] = distArray[jat];

242:   }

243:

244:   real_type d = 0.0;

245:   //#pragma omp simd reduction(+:d)

246:   for (int jat = 0; jat < iCount; jat++)

247:   {

248:     real_type r = distArrayCompressed[jat];

249:     r *= DeltaRInv;

250:     int i         = (int)r;

251:     real_type t   = r - real_type(i);

252:     real_type tp0 = t * t * t;

253:     real_type tp1 = t * t;

254:     real_type tp2 = t;

255:

256:     real_type d1 = SplineCoefs[i + 0] * (A[0] * tp0 + A[1] * tp1 + A[2] * tp2 + A[3]);

257:     real_type d2 = SplineCoefs[i + 1] * (A[4] * tp0 + A[5] * tp1 + A[6] * tp2 + A[7]);

258:     real_type d3 = SplineCoefs[i + 2] * (A[8] * tp0 + A[9] * tp1 + A[10] * tp2 + A[11]);

259:     real_type d4 = SplineCoefs[i + 3] * (A[12] * tp0 + A[13] * tp1 + A[14] * tp2 + A[15]);

260:     d += (d1 + d2 + d3 + d4);

0x422f80 STP	X29, X30, [SP, #832]!

0x422f84 ADD	X29, SP, #0

0x422f88 STP	X21, X22, [SP, #32]

0x422f8c ORR	X21, XZR, X2

0x422f90 STP	X23, X24, [SP, #48]

0x422f94 ADD	X23, X0, #216

0x422f98 STP	X25, X26, [SP, #64]

0x422f9c ORR	X26, XZR, X0

0x422fa0 LDR	X2, [X2]

0x422fa4 LDR	X0, [X21, #8]

0x422fa8 CMP	X2, X0

0x422fac B.EQ	4234fc

0x422fb0 ORR	X22, XZR, X1

0x422fb4 STP	X19, X20, [SP, #16]

0x422fb8 MOVZ	X20, #0

0x422fbc MOVZ	X19, #0

0x422fc0 STP	X27, X28, [SP, #80]

0x422fc4 STP	D8, D9, [SP, #96]

0x422fc8 STP	D10, D11, [SP, #112]

0x422fcc STP	D12, D13, [SP, #128]

0x422fd0 STP	D14, D15, [SP, #144]

0x422fd4 HINT	#0

0x422fd8 HINT	#0

0x422fdc HINT	#0

(199) 0x422fe0 LDR	X4, [X23, #24]

(199) 0x422fe4 ORR	X0, XZR, X22

(199) 0x422fe8 LDRSW	X3, [X22, #672]

(199) 0x422fec LDR	W1, [X26, #168]

(199) 0x422ff0 LDR	D15, [X4, X3,LSL #3]

(199) 0x422ff4 BL	48fde0

(199) 0x422ff8 LDR	X1, [X0, #72]

(199) 0x422ffc LDR	W10, [X26, #152]

(199) 0x423000 ADD	X5, X1, X20

(199) 0x423004 LDR	X27, [X5, #24]

(199) 0x423008 CMP	W10, #0

(199) 0x42300c B.LE	423510

(199) 0x423010 LDR	X11, [X26, #456]

(199) 0x423014 MOVI	D1, #0

(199) 0x423018 MOVZ	X7, #0

(199) 0x42301c UBFM	X10, X10, #62, #31

(199) 0x423020 CNTW	X9, ALL

(199) 0x423024 PTRUE	P7.B, ALL

  (201) 0x423028 UBFM	X17, X7, #63, #62

  (201) 0x42302c LDR	X30, [X11, X17]

  (201) 0x423030 CBZ	X30, 4234b0

  (201) 0x423034 LDR	X28, [X26, #160]

  (201) 0x423038 LDR	X13, [X26, #328]

  (201) 0x42303c LDR	X8, [X28, #616]

  (201) 0x423040 LDR	X12, [X8, #24]

  (201) 0x423044 ADD	X14, X12, X7

  (201) 0x423048 LDR	W15, [X12, X7]

  (201) 0x42304c LDR	W18, [X14, #4]

  (201) 0x423050 CMP	W18, W15

  (201) 0x423054 B.LE	4234b0

  (201) 0x423058 SUB	W0, W18, W15

  (201) 0x42305c SBFM	X16, X15, #61, #31

  (201) 0x423060 LDR	D4, [X30, #8]

  (201) 0x423064 ANDS	W25, W0, #0x7

  (201) 0x423068 ADD	X12, X27, X16

  (201) 0x42306c MOVZ	W5, #0

  (201) 0x423070 ORR	W8, WZR, W15

  (201) 0x423074 B.EQ	4231ac

  (201) 0x423078 CMP	W25, #1

  (201) 0x42307c B.EQ	423180

  (201) 0x423080 CMP	W25, #2

  (201) 0x423084 B.EQ	42315c

  (201) 0x423088 CMP	W25, #3

  (201) 0x42308c B.EQ	423138

  (201) 0x423090 CMP	W25, #4

  (201) 0x423094 B.EQ	423114

  (201) 0x423098 CMP	W25, #5

  (201) 0x42309c B.EQ	4230f0

  (201) 0x4230a0 CMP	W25, #6

  (201) 0x4230a4 B.EQ	4230cc

  (201) 0x4230a8 LDR	D5, [X27, X16]

  (201) 0x4230ac FCMPE	D4, D5

  (201) 0x4230b0 B.LS	4230c4

  (201) 0x4230b4 CMN	W15, #1

  (201) 0x4230b8 B.EQ	4230c4

  (201) 0x4230bc MOVZ	W5, #1

  (201) 0x4230c0 STR	D5, [X13]

  (201) 0x4230c4 ADD	X12, X12, #8

  (201) 0x4230c8 ADD	W8, W15, #1

  (201) 0x4230cc LDR	D6, [X12]

  (201) 0x4230d0 FCMPE	D4, D6

  (201) 0x4230d4 B.LS	4230e8

  (201) 0x4230d8 CMN	W8, #1

  (201) 0x4230dc B.EQ	4230e8

  (201) 0x4230e0 STR	D6, [X13, W5,UXTW #3]

  (201) 0x4230e4 ADD	W5, W5, #1

  (201) 0x4230e8 ADD	X12, X12, #8

  (201) 0x4230ec ADD	W8, W8, #1

  (201) 0x4230f0 LDR	D7, [X12]

  (201) 0x4230f4 FCMPE	D4, D7

  (201) 0x4230f8 B.LS	42310c

  (201) 0x4230fc CMN	W8, #1

  (201) 0x423100 B.EQ	42310c

  (201) 0x423104 STR	D7, [X13, W5,UXTW #3]

  (201) 0x423108 ADD	W5, W5, #1

  (201) 0x42310c ADD	X12, X12, #8

  (201) 0x423110 ADD	W8, W8, #1

  (201) 0x423114 LDR	D8, [X12]

  (201) 0x423118 FCMPE	D4, D8

  (201) 0x42311c B.LS	423130

  (201) 0x423120 CMN	W8, #1

  (201) 0x423124 B.EQ	423130

  (201) 0x423128 STR	D8, [X13, W5,UXTW #3]

  (201) 0x42312c ADD	W5, W5, #1

  (201) 0x423130 ADD	X12, X12, #8

  (201) 0x423134 ADD	W8, W8, #1

  (201) 0x423138 LDR	D9, [X12]

  (201) 0x42313c FCMPE	D4, D9

  (201) 0x423140 B.LS	423154

  (201) 0x423144 CMN	W8, #1

  (201) 0x423148 B.EQ	423154

  (201) 0x42314c STR	D9, [X13, W5,UXTW #3]

  (201) 0x423150 ADD	W5, W5, #1

  (201) 0x423154 ADD	X12, X12, #8

  (201) 0x423158 ADD	W8, W8, #1

  (201) 0x42315c LDR	D10, [X12]

  (201) 0x423160 FCMPE	D4, D10

  (201) 0x423164 B.LS	423178

  (201) 0x423168 CMN	W8, #1

  (201) 0x42316c B.EQ	423178

  (201) 0x423170 STR	D10, [X13, W5,UXTW #3]

  (201) 0x423174 ADD	W5, W5, #1

  (201) 0x423178 ADD	X12, X12, #8

  (201) 0x42317c ADD	W8, W8, #1

  (201) 0x423180 LDR	D11, [X12]

  (201) 0x423184 FCMPE	D4, D11

  (201) 0x423188 B.LS	42319c

  (201) 0x42318c CMN	W8, #1

  (201) 0x423190 B.EQ	42319c

  (201) 0x423194 STR	D11, [X13, W5,UXTW #3]

  (201) 0x423198 ADD	W5, W5, #1

  (201) 0x42319c ADD	W8, W8, #1

  (201) 0x4231a0 ADD	X12, X12, #8

  (201) 0x4231a4 CMP	W18, W8

  (201) 0x4231a8 B.EQ	4232bc

    (202) 0x4231ac LDR	D12, [X12]

    (202) 0x4231b0 FCMPE	D4, D12

    (202) 0x4231b4 B.LS	4231c8

    (202) 0x4231b8 CMN	W8, #1

    (202) 0x4231bc B.EQ	4231c8

    (202) 0x4231c0 STR	D12, [X13, W5,UXTW #3]

    (202) 0x4231c4 ADD	W5, W5, #1

    (202) 0x4231c8 LDR	D13, [X12, #8]

    (202) 0x4231cc ADD	W4, W8, #1

    (202) 0x4231d0 ADD	X3, X12, #8

    (202) 0x4231d4 FCMPE	D4, D13

    (202) 0x4231d8 B.LS	4231ec

    (202) 0x4231dc CMN	W4, #1

    (202) 0x4231e0 B.EQ	4231ec

    (202) 0x4231e4 STR	D13, [X13, W5,UXTW #3]

    (202) 0x4231e8 ADD	W5, W5, #1

    (202) 0x4231ec LDR	D16, [X3, #8]

    (202) 0x4231f0 ADD	W2, W4, #1

    (202) 0x4231f4 FCMPE	D4, D16

    (202) 0x4231f8 B.LS	42320c

    (202) 0x4231fc CMN	W2, #1

    (202) 0x423200 B.EQ	42320c

    (202) 0x423204 STR	D16, [X13, W5,UXTW #3]

    (202) 0x423208 ADD	W5, W5, #1

    (202) 0x42320c LDR	D17, [X3, #16]

    (202) 0x423210 ADD	W1, W4, #2

    (202) 0x423214 FCMPE	D4, D17

    (202) 0x423218 B.LS	42322c

    (202) 0x42321c CMN	W1, #1

    (202) 0x423220 B.EQ	42322c

    (202) 0x423224 STR	D17, [X13, W5,UXTW #3]

    (202) 0x423228 ADD	W5, W5, #1

    (202) 0x42322c LDR	D18, [X3, #24]

    (202) 0x423230 ADD	W6, W4, #3

    (202) 0x423234 FCMPE	D4, D18

    (202) 0x423238 B.LS	42324c

    (202) 0x42323c CMN	W6, #1

    (202) 0x423240 B.EQ	42324c

    (202) 0x423244 STR	D18, [X13, W5,UXTW #3]

    (202) 0x423248 ADD	W5, W5, #1

    (202) 0x42324c LDR	D22, [X3, #32]

    (202) 0x423250 ADD	W24, W4, #4

    (202) 0x423254 FCMPE	D4, D22

    (202) 0x423258 B.LS	42326c

    (202) 0x42325c CMN	W24, #1

    (202) 0x423260 B.EQ	42326c

    (202) 0x423264 STR	D22, [X13, W5,UXTW #3]

    (202) 0x423268 ADD	W5, W5, #1

    (202) 0x42326c LDR	D26, [X3, #40]

    (202) 0x423270 ADD	W17, W4, #5

    (202) 0x423274 FCMPE	D4, D26

    (202) 0x423278 B.LS	42328c

    (202) 0x42327c CMN	W17, #1

    (202) 0x423280 B.EQ	42328c

    (202) 0x423284 STR	D26, [X13, W5,UXTW #3]

    (202) 0x423288 ADD	W5, W5, #1

    (202) 0x42328c LDR	D27, [X3, #48]

    (202) 0x423290 ADD	W28, W4, #6

    (202) 0x423294 FCMPE	D4, D27

    (202) 0x423298 B.LS	4232ac

    (202) 0x42329c CMN	W28, #1

    (202) 0x4232a0 B.EQ	4232ac

    (202) 0x4232a4 STR	D27, [X13, W5,UXTW #3]

    (202) 0x4232a8 ADD	W5, W5, #1

    (202) 0x4232ac ADD	W8, W4, #7

    (202) 0x4232b0 ADD	X12, X3, #56

    (202) 0x4232b4 CMP	W18, W8

    (202) 0x4232b8 B.NE	4231ac

  (201) 0x4232bc CBZ	W5, 4234b0

  (201) 0x4232c0 ADD	X15, X30, #568

  (201) 0x4232c4 LD1RD	{Z3.D}, P7/Z, [X30, #3]

  (201) 0x4232c8 LD1RD	{Z4.D}, P7/Z, [X30, #4]

  (201) 0x4232cc LD1RD	{Z5.D}, P7/Z, [X30, #5]

  (201) 0x4232d0 LD1RD	{Z6.D}, P7/Z, [X30, #6]

  (201) 0x4232d4 LD1RD	{Z7.D}, P7/Z, [X30, #7]

  (201) 0x4232d8 LD1RD	{Z16.D}, P7/Z, [X30, #8]

  (201) 0x4232dc LD1RD	{Z17.D}, P7/Z, [X30, #9]

  (201) 0x4232e0 LD1RD	{Z18.D}, P7/Z, [X30, #10]

  (201) 0x4232e4 LD1RD	{Z19.D}, P7/Z, [X30, #11]

  (201) 0x4232e8 LD1RD	{Z20.D}, P7/Z, [X30, #12]

  (201) 0x4232ec LD1RD	{Z21.D}, P7/Z, [X30, #13]

  (201) 0x4232f0 LD1RD	{Z22.D}, P7/Z, [X30, #14]

  (201) 0x4232f4 LD1RD	{Z23.D}, P7/Z, [X30, #15]

  (201) 0x4232f8 LD1RD	{Z24.D}, P7/Z, [X30, #16]

  (201) 0x4232fc LD1RD	{Z25.D}, P7/Z, [X30, #17]

  (201) 0x423300 LD1RD	{Z26.D}, P7/Z, [X30, #18]

  (201) 0x423304 LDR	X30, [X30, #536]

  (201) 0x423308 MOVZ	X0, #0

  (201) 0x42330c ADDVL	X14, X13, #1

  (201) 0x423310 DUP	Z28.D, #0

  (201) 0x423314 ORR	W18, WZR, W5

  (201) 0x423318 LD1RD	{Z2.D}, P7/Z, [X15]

  (201) 0x42331c UQDECD	W18, ALL

  (201) 0x423320 ORR	Z29.D, Z28.D, Z28.D

  (201) 0x423324 WHILELO	P5.D, WZR, W18

  (201) 0x423328 WHILELO	P6.D, WZR, W5

    (203) 0x42332c LD1D	{Z30.D}, P5/Z, [X14, X0,LSL #3]

    (203) 0x423330 LD1D	{Z0.D}, P6/Z, [X13, X0,LSL #3]

    (203) 0x423334 FMUL	Z31.D, Z2.D, Z30.D

    (203) 0x423338 MOVPRFX	Z8, Z31

    (203) 0x42333c FRINTZ	Z8.D, P7/M, Z31.D

    (203) 0x423340 FMUL	Z14.D, Z2.D, Z0.D

    (203) 0x423344 MOVPRFX	Z9, Z31

    (203) 0x423348 FCVTZS	Z9.S, P7/M, Z31.D

    (203) 0x42334c FSUB	Z31.D, Z31.D, Z8.D

    (203) 0x423350 FMUL	Z27.D, Z31.D, Z31.D

    (203) 0x423354 MOVPRFX	Z11, Z18

    (203) 0x423358 FMLA	Z11.D, P7/M, Z17.D, Z31.D

    (203) 0x42335c FMUL	Z0.D, Z27.D, Z31.D

    (203) 0x423360 FMUL	Z12.D, Z16.D, Z27.D

    (203) 0x423364 FMLA	Z12.D, P7/M, Z7.D, Z0.D

    (203) 0x423368 FADD	Z8.D, Z11.D, Z12.D

    (203) 0x42336c MOVPRFX	Z10, Z14

    (203) 0x423370 FCVTZS	Z10.S, P7/M, Z14.D

    (203) 0x423374 UZP1	Z30.S, Z10.S, Z9.S

    (203) 0x423378 MOVPRFX	Z13, Z30

    (203) 0x42337c ADD	Z13.S, Z13.S, #1

    (203) 0x423380 SUNPKHI	Z9.D, Z13

    (203) 0x423384 LD1D	{Z12.D}, P5/Z, [X30, Z9.D,LSL #3]

    (203) 0x423388 FMUL	Z11.D, Z8.D, Z12.D

    (203) 0x42338c MOVPRFX	Z8, Z6

    (203) 0x423390 FMLA	Z8.D, P7/M, Z5.D, Z31.D

    (203) 0x423394 SUNPKHI	Z9.D, Z30

    (203) 0x423398 FMUL	Z10.D, Z4.D, Z27.D

    (203) 0x42339c FMLA	Z10.D, P7/M, Z3.D, Z0.D

    (203) 0x4233a0 FADD	Z12.D, Z8.D, Z10.D

    (203) 0x4233a4 LD1D	{Z8.D}, P5/Z, [X30, Z9.D,LSL #3]

    (203) 0x4233a8 FMUL	Z10.D, Z20.D, Z27.D

    (203) 0x4233ac FMAD	Z12.D, P7/M, Z8.D, Z11.D

    (203) 0x4233b0 FMLA	Z10.D, P7/M, Z19.D, Z0.D

    (203) 0x4233b4 MOVPRFX	Z11, Z22

    (203) 0x4233b8 FMLA	Z11.D, P7/M, Z21.D, Z31.D

    (203) 0x4233bc FMUL	Z27.D, Z27.D, Z24.D

    (203) 0x4233c0 FADD	Z8.D, Z11.D, Z10.D

    (203) 0x4233c4 FMAD	Z0.D, P7/M, Z23.D, Z27.D

    (203) 0x4233c8 FADD	Z28.D, P5/M, Z28.D, Z12.D

    (203) 0x4233cc MOVPRFX	Z27, Z30

    (203) 0x4233d0 ADD	Z27.S, Z27.S, #3

    (203) 0x4233d4 MOVPRFX	Z12, Z30

    (203) 0x4233d8 ADD	Z12.S, Z12.S, #2

    (203) 0x4233dc SUNPKHI	Z10.D, Z27

    (203) 0x4233e0 SUNPKLO	Z30.D, Z30

    (203) 0x4233e4 LD1D	{Z11.D}, P5/Z, [X30, Z10.D,LSL #3]

    (203) 0x4233e8 FMAD	Z31.D, P7/M, Z25.D, Z26.D

    (203) 0x4233ec FADD	Z31.D, Z31.D, Z0.D

    (203) 0x4233f0 SUNPKHI	Z0.D, Z12

    (203) 0x4233f4 LD1D	{Z9.D}, P5/Z, [X30, Z0.D,LSL #3]

    (203) 0x4233f8 FMLA	Z28.D, P5/M, Z8.D, Z9.D

    (203) 0x4233fc SUNPKLO	Z8.D, Z12

    (203) 0x423400 FMLA	Z28.D, P5/M, Z11.D, Z31.D

    (203) 0x423404 LD1D	{Z0.D}, P6/Z, [X30, Z8.D,LSL #3]

    (203) 0x423408 LD1D	{Z11.D}, P6/Z, [X30, Z30.D,LSL #3]

    (203) 0x42340c SUNPKLO	Z12.D, Z27

    (203) 0x423410 MOVPRFX	Z31, Z14

    (203) 0x423414 FRINTZ	Z31.D, P7/M, Z14.D

    (203) 0x423418 SUNPKLO	Z13.D, Z13

    (203) 0x42341c FSUB	Z8.D, Z14.D, Z31.D

    (203) 0x423420 FMUL	Z30.D, Z8.D, Z8.D

    (203) 0x423424 FMUL	Z27.D, Z30.D, Z8.D

    (203) 0x423428 FMUL	Z14.D, Z16.D, Z30.D

    (203) 0x42342c FMLA	Z14.D, P7/M, Z7.D, Z27.D

    (203) 0x423430 LD1D	{Z10.D}, P6/Z, [X30, Z13.D,LSL #3]

    (203) 0x423434 ADD	X0, X0, X9

    (203) 0x423438 LD1D	{Z13.D}, P6/Z, [X30, Z12.D,LSL #3]

    (203) 0x42343c WHILELO	P5.D, W0, W18

    (203) 0x423440 MOVPRFX	Z12, Z18

    (203) 0x423444 FMLA	Z12.D, P7/M, Z17.D, Z8.D

    (203) 0x423448 FADD	Z31.D, Z12.D, Z14.D

    (203) 0x42344c MOVPRFX	Z14, Z6

    (203) 0x423450 FMLA	Z14.D, P7/M, Z5.D, Z8.D

    (203) 0x423454 FMUL	Z12.D, Z31.D, Z10.D

    (203) 0x423458 FMUL	Z9.D, Z4.D, Z30.D

    (203) 0x42345c FMUL	Z10.D, Z20.D, Z30.D

    (203) 0x423460 FMLA	Z9.D, P7/M, Z3.D, Z27.D

    (203) 0x423464 MOVPRFX	Z31, Z22

    (203) 0x423468 FMLA	Z31.D, P7/M, Z21.D, Z8.D

    (203) 0x42346c FADD	Z9.D, Z14.D, Z9.D

    (203) 0x423470 FMUL	Z30.D, Z30.D, Z24.D

    (203) 0x423474 FMAD	Z9.D, P7/M, Z11.D, Z12.D

    (203) 0x423478 FMAD	Z8.D, P7/M, Z25.D, Z26.D

    (203) 0x42347c MOVPRFX	Z11, Z10

    (203) 0x423480 FMLA	Z11.D, P7/M, Z19.D, Z27.D

    (203) 0x423484 FADD	Z29.D, P6/M, Z29.D, Z9.D

    (203) 0x423488 FMAD	Z27.D, P7/M, Z23.D, Z30.D

    (203) 0x42348c FADD	Z14.D, Z31.D, Z11.D

    (203) 0x423490 FMLA	Z29.D, P6/M, Z14.D, Z0.D

    (203) 0x423494 FADD	Z0.D, Z8.D, Z27.D

    (203) 0x423498 FMLA	Z29.D, P6/M, Z13.D, Z0.D

    (203) 0x42349c WHILELO	P6.D, W0, W5

    (203) 0x4234a0 B.NE	42332c

  (201) 0x4234a4 FADD	Z2.D, Z29.D, Z28.D

  (201) 0x4234a8 FADDV	D28, P7, Z2.D

  (201) 0x4234ac FADD	D1, D1, D28

  (201) 0x4234b0 ADD	X7, X7, #4

  (201) 0x4234b4 CMP	X10, X7

  (201) 0x4234b8 B.NE	423028

(199) 0x4234bc FSUB	D15, D15, S1

(199) 0x4234c0 FMOV	D0, D15

(199) 0x4234c4 ADD	X20, X20, #40

(199) 0x4234c8 BL	4100e0

(199) 0x4234cc LDP	X13, X25, [X21]

(199) 0x4234d0 SUB	X4, X25, X13

(199) 0x4234d4 STR	D0, [X13, W19,UXTW #3]

(199) 0x4234d8 ADD	X19, X19, #1

(199) 0x4234dc CMP	X19, X4,ASR #3

(199) 0x4234e0 B.CC	422fe0

0x4234e4 LDP	D8, D9, [SP, #96]

0x4234e8 LDP	X19, X20, [SP, #16]

0x4234ec LDP	X27, X28, [SP, #80]

0x4234f0 LDP	D10, D11, [SP, #112]

0x4234f4 LDP	D12, D13, [SP, #128]

0x4234f8 LDP	D14, D15, [SP, #144]

0x4234fc LDP	X21, X22, [SP, #32]

0x423500 LDP	X23, X24, [SP, #48]

0x423504 LDP	X25, X26, [SP, #64]

0x423508 LDP	X29, X30, [SP], #192

0x42350c RET

(199) 0x423510 LDR	W6, [X26, #144]

(199) 0x423514 CMP	W6, #0

(199) 0x423518 B.LE	4234c0

(199) 0x42351c LDR	X7, [X26, #160]

(199) 0x423520 MOVI	D14, #0

(199) 0x423524 SBFM	X2, X6, #0, #31

(199) 0x423528 MOVZ	X24, #0

(199) 0x42352c LDR	X10, [X26, #456]

(199) 0x423530 LDR	X28, [X7, #24]

(199) 0x423534 TBZ	W6, #0, 423620

(199) 0x423538 LDRSW	X8, [X28]

(199) 0x42353c LDR	X24, [X10, X8,LSL #3]

(199) 0x423540 CBZ	X24, 423610

(199) 0x423544 LDR	D31, [X27]

(199) 0x423548 LDR	D30, [X24, #8]

(199) 0x42354c FCMPE	D31, D30

(199) 0x423550 B.GE	423610

(199) 0x423554 LDR	D0, [X24, #568]

(199) 0x423558 ADD	X0, SP, #184

(199) 0x42355c STP	X2, X10, [SP, #160]

(199) 0x423560 FMUL	D0, D31, D0

(199) 0x423564 BL	4103a0

(199) 0x423568 FMUL	D1, D0, D0

(199) 0x42356c LDP	D25, D28, [X24, #24]

(199) 0x423570 LDP	X2, X10, [SP, #160]

(199) 0x423574 LDP	D21, D2, [X24, #88]

(199) 0x423578 FMUL	D5, D1, D0

(199) 0x42357c FMUL	D4, D1, D28

(199) 0x423580 LDR	D19, [X24, #128]

(199) 0x423584 LDP	D26, D29, [X24, #56]

(199) 0x423588 LDP	D20, D24, [X24, #104]

(199) 0x42358c FMUL	D6, D1, D2

(199) 0x423590 FMADD	D10, D5, D25, D4

(199) 0x423594 LDP	D27, D23, [X24, #40]

(199) 0x423598 FMUL	D9, D1, D19

(199) 0x42359c LDR	D25, [SP, #184]

(199) 0x4235a0 FMUL	D7, D1, D29

(199) 0x4235a4 FMADD	D11, D5, D21, D6

(199) 0x4235a8 LDR	D22, [X24, #120]

(199) 0x4235ac FMADD	D8, D0, D20, D24

(199) 0x4235b0 LDR	D20, [X24, #136]

(199) 0x4235b4 FMADD	D3, D0, D27, D23

(199) 0x4235b8 FMADD	D12, D5, D26, D7

(199) 0x4235bc LDR	D1, [X24, #144]

(199) 0x4235c0 FCVTZS	W11, D25

(199) 0x4235c4 LDP	D17, D18, [X24, #72]

(199) 0x4235c8 FMADD	D30, D5, D22, D9

(199) 0x4235cc LDR	X9, [X24, #536]

(199) 0x4235d0 SBFM	X12, X11, #61, #31

(199) 0x4235d4 FADD	D16, D11, D8

(199) 0x4235d8 FMADD	D31, D0, D17, D18

(199) 0x4235dc FMADD	D0, D0, D20, D1

(199) 0x4235e0 ADD	X13, X9, X12

(199) 0x4235e4 LDR	D28, [X9, X12]

(199) 0x4235e8 FADD	D13, D10, D3

(199) 0x4235ec LDP	D27, D23, [X13, #8]

(199) 0x4235f0 LDR	D29, [X13, #24]

(199) 0x4235f4 FMADD	D14, D28, D13, D14

(199) 0x4235f8 FMUL	D21, D16, D23

(199) 0x4235fc FADD	D26, D12, D31

(199) 0x423600 FADD	D24, D0, D30

(199) 0x423604 FMADD	D2, D27, D26, D21

(199) 0x423608 FMADD	D19, D29, D24, D14

(199) 0x42360c FADD	D14, D2, D19

(199) 0x423610 MOVZ	X24, #1

(199) 0x423614 CMP	X2, X24

(199) 0x423618 B.EQ	4237e0

(199) 0x42361c HINT	#0

  (200) 0x423620 LDRSW	X14, [X28, X24,LSL #2]

  (200) 0x423624 LDR	X25, [X10, X14,LSL #3]

  (200) 0x423628 CBZ	X25, 4236f8

  (200) 0x42362c LDR	D3, [X27, X24,LSL #3]

  (200) 0x423630 LDR	D4, [X25, #8]

  (200) 0x423634 FCMPE	D3, D4

  (200) 0x423638 B.GE	4236f8

  (200) 0x42363c LDR	D5, [X25, #568]

  (200) 0x423640 ADD	X0, SP, #184

  (200) 0x423644 STP	X2, X10, [SP, #160]

  (200) 0x423648 FMUL	D0, D3, D5

  (200) 0x42364c BL	4103a0

  (200) 0x423650 FMUL	D6, D0, D0

  (200) 0x423654 LDP	D7, D8, [X25, #24]

  (200) 0x423658 LDP	X2, X10, [SP, #160]

  (200) 0x42365c LDP	D13, D16, [X25, #88]

  (200) 0x423660 FMUL	D27, D6, D0

  (200) 0x423664 FMUL	D26, D6, D8

  (200) 0x423668 LDP	D17, D18, [X25, #104]

  (200) 0x42366c LDR	D22, [X25, #128]

  (200) 0x423670 LDP	D11, D12, [X25, #56]

  (200) 0x423674 FMUL	D31, D6, D16

  (200) 0x423678 FMADD	D28, D27, D7, D26

  (200) 0x42367c LDP	D9, D10, [X25, #40]

  (200) 0x423680 FMADD	D23, D0, D17, D18

  (200) 0x423684 LDR	D8, [SP, #184]

  (200) 0x423688 FMUL	D30, D6, D22

  (200) 0x42368c FMADD	D21, D27, D13, D31

  (200) 0x423690 LDR	D3, [X25, #120]

  (200) 0x423694 FMUL	D25, D6, D12

  (200) 0x423698 LDR	D17, [X25, #136]

  (200) 0x42369c FMADD	D1, D0, D9, D10

  (200) 0x4236a0 LDR	D4, [X25, #144]

  (200) 0x4236a4 FCVTZS	W18, D8

  (200) 0x4236a8 FMADD	D29, D27, D11, D25

  (200) 0x4236ac LDP	D20, D24, [X25, #72]

  (200) 0x4236b0 FMADD	D6, D27, D3, D30

  (200) 0x4236b4 LDR	X15, [X25, #536]

  (200) 0x4236b8 FADD	D19, D21, D23

  (200) 0x4236bc SBFM	X0, X18, #61, #31

  (200) 0x4236c0 FMADD	D5, D0, D20, D24

  (200) 0x4236c4 FMADD	D0, D0, D17, D4

  (200) 0x4236c8 ADD	X3, X15, X0

  (200) 0x4236cc LDR	D9, [X15, X0]

  (200) 0x4236d0 FADD	D2, D28, D1

  (200) 0x4236d4 LDP	D10, D11, [X3, #8]

  (200) 0x4236d8 LDR	D12, [X3, #24]

  (200) 0x4236dc FMADD	D14, D9, D2, D14

  (200) 0x4236e0 FMUL	D13, D19, D11

  (200) 0x4236e4 FADD	D7, D29, D5

  (200) 0x4236e8 FADD	D18, D0, D6

  (200) 0x4236ec FMADD	D16, D10, D7, D13

  (200) 0x4236f0 FMADD	D22, D12, D18, D14

  (200) 0x4236f4 FADD	D14, D16, D22

  (200) 0x4236f8 ADD	X24, X24, #1

  (200) 0x4236fc LDRSW	X16, [X28, X24,LSL #2]

  (200) 0x423700 LDR	X25, [X10, X16,LSL #3]

  (200) 0x423704 CBZ	X25, 4237d4

  (200) 0x423708 LDR	D1, [X27, X24,LSL #3]

  (200) 0x42370c LDR	D26, [X25, #8]

  (200) 0x423710 FCMPE	D1, D26

  (200) 0x423714 B.GE	4237d4

  (200) 0x423718 LDR	D27, [X25, #568]

  (200) 0x42371c ADD	X0, SP, #184

  (200) 0x423720 STP	X2, X10, [SP, #160]

  (200) 0x423724 FMUL	D0, D1, D27

  (200) 0x423728 BL	4103a0

  (200) 0x42372c FMUL	D30, D0, D0

  (200) 0x423730 LDP	D25, D28, [X25, #24]

  (200) 0x423734 LDP	X2, X10, [SP, #160]

  (200) 0x423738 LDP	D21, D31, [X25, #88]

  (200) 0x42373c FMUL	D6, D30, D0

  (200) 0x423740 FMUL	D5, D30, D28

  (200) 0x423744 LDP	D20, D24, [X25, #104]

  (200) 0x423748 LDR	D19, [X25, #128]

  (200) 0x42374c LDP	D3, D29, [X25, #56]

  (200) 0x423750 FMUL	D7, D30, D31

  (200) 0x423754 FMADD	D11, D6, D25, D5

  (200) 0x423758 LDP	D2, D23, [X25, #40]

  (200) 0x42375c FMADD	D9, D0, D20, D24

  (200) 0x423760 LDR	D25, [SP, #184]

  (200) 0x423764 FMUL	D10, D30, D19

  (200) 0x423768 FMADD	D12, D6, D21, D7

  (200) 0x42376c LDR	D1, [X25, #120]

  (200) 0x423770 FMUL	D8, D30, D29

  (200) 0x423774 LDR	D20, [X25, #136]

  (200) 0x423778 FMADD	D4, D0, D2, D23

  (200) 0x42377c LDR	D26, [X25, #144]

  (200) 0x423780 FCVTZS	W1, D25

  (200) 0x423784 FMADD	D13, D6, D3, D8

  (200) 0x423788 LDP	D18, D22, [X25, #72]

  (200) 0x42378c FMADD	D30, D6, D1, D10

  (200) 0x423790 LDR	X4, [X25, #536]

  (200) 0x423794 FADD	D17, D12, D9

  (200) 0x423798 SBFM	X5, X1, #61, #31

  (200) 0x42379c FMADD	D27, D0, D18, D22

  (200) 0x4237a0 FMADD	D0, D0, D20, D26

  (200) 0x4237a4 ADD	X6, X4, X5

  (200) 0x4237a8 LDR	D28, [X4, X5]

  (200) 0x4237ac FADD	D16, D11, D4

  (200) 0x4237b0 LDP	D3, D23, [X6, #8]

  (200) 0x4237b4 LDR	D29, [X6, #24]

  (200) 0x4237b8 FMADD	D14, D28, D16, D14

  (200) 0x4237bc FMUL	D21, D17, D23

  (200) 0x4237c0 FADD	D2, D13, D27

  (200) 0x4237c4 FADD	D24, D0, D30

  (200) 0x4237c8 FMADD	D31, D3, D2, D21

  (200) 0x4237cc FMADD	D19, D29, D24, D14

  (200) 0x4237d0 FADD	D14, D31, D19

  (200) 0x4237d4 ADD	X24, X24, #1

  (200) 0x4237d8 CMP	X2, X24

  (200) 0x4237dc B.NE	423620

(199) 0x4237e0 FSUB	D15, D15, S14

(199) 0x4237e4 B	4234c0

0x4237e8 HINT	#0

0x4237ec HINT	#0

0x4237f0 HINT	#0

0x4237f4 HINT	#0

0x4237f8 HINT	#0

0x4237fc HINT	#0

Coverage (%)	Name	Source Location	Module
►97.96+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:993	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_0

Source file and lines	OneBodyJastrowRef.h:132-155
Module	exec

The function is defined in:

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:132-155
/usr/include/c++/14/bits/stl_vector.h:993,1128-1131
/usr/include/c++/14/bits/shared_ptr_base.h:1667
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:166-173,179-182,231-260

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 7.33 to 3.33 cycles (2.20x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is poorly vectorized. Only 44% of vector register length is used (average across all VPU instructions). By fully vectorizing your function, you can lower the cost of an iteration from 7.33 to 3.42 cycles (2.15x speedup).

Details

32% of VPU instructions are used in vector version (process two or more data elements in vector registers):

44% of VPU loads are used in vector version.
40% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function does not load or store any data.

General properties

nb instructions	41
nb uops	32
loop length	164
used w registers	0
used x registers	16
used b registers	0
used h registers	0
used s registers	1
used d registers	8
used q registers	0
used v registers	0
used z registers	0
nb stack references	20

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	4.00 cycles
front end	4.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.00	1.00	2.25	2.25	2.25	2.25	2.00	2.00	0.00	0.00	7.33	7.33	7.33	3.00	3.00
cycles	1.00	1.00	2.25	2.25	2.25	2.25	2.00	2.00	0.00	0.00	7.33	7.33	7.33	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.00
Dispatch	7.33
Overall L1	7.33

Vectorization ratios

all	32%
load	44%
store	40%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	44%
load	50%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.33 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 422f80

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #832]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X21, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X23, X0, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4234fc <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x57c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X22, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X19, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
LDP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A

The code analyzed by CQA in that panel excludes loops and represents 0.01% of application time for run gcc_0

Source file and lines	OneBodyJastrowRef.h:132-155
Module	exec

The function is defined in:

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/OneBodyJastrowRef.h:132-155
/usr/include/c++/14/bits/stl_vector.h:993,1128-1131
/usr/include/c++/14/bits/shared_ptr_base.h:1667
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Numerics/OhmmsPETE/OhmmsVector.h:223,229,249
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Particle/ParticleSet.h:313-316
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/QMCWaveFunctions/Jastrow/BsplineFunctor.h:166-173,179-182,231-260

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 7.33 to 3.33 cycles (2.20x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

32% of VPU instructions are used in vector version (process two or more data elements in vector registers):

44% of VPU loads are used in vector version.
40% of VPU stores are used in vector version.
0% of VPU addition or subtraction instructions are used in vector version.
0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function does not load or store any data.

General properties

nb instructions	41
nb uops	32
loop length	164
used w registers	0
used x registers	16
used b registers	0
used h registers	0
used s registers	1
used d registers	8
used q registers	0
used v registers	0
used z registers	0
nb stack references	20

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	4.00 cycles
front end	4.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	1.00	1.00	2.25	2.25	2.25	2.25	2.00	2.00	0.00	0.00	7.33	7.33	7.33	3.00	3.00
cycles	1.00	1.00	2.25	2.25	2.25	2.25	2.00	2.00	0.00	0.00	7.33	7.33	7.33	3.00	3.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	4.00
Dispatch	7.33
Overall L1	7.33

Vectorization ratios

all	32%
load	44%
store	40%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	44%
load	50%
store	50%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.33 cycles.

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 422f80

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #832]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X21, XZR, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X23, X0, #216	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR X2, [X2]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X21, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X2, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4234fc <_ZN16miniqmcreference17OneBodyJastrowRefIN11qmcplusplus14BsplineFunctorIdEEE14evaluateRatiosERNS1_18VirtualParticleSetERSt6vectorIdSaIdEE+0x57c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X22, XZR, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
MOVZ X20, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ X19, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
STP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
STP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
STP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	vect (50.0%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
LDP D8, D9, [SP, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP D10, D11, [SP, #112]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP D12, D13, [SP, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP D14, D15, [SP, #144]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDP X29, X30, [SP], #192	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A

Name	Coverage (%)	Time (s)
▼miniqmcreference::OneBodyJastrowRef >::evaluateRatios(qmcplusplus::VirtualParticleSet&, std::vector >&)–	0.07	0.10
▼Loop 199 - OneBodyJastrowRef.h:134-155 - exec–	0.01	0.03
▼Loop 201 - OneBodyJastrowRef.h:143-146 - exec–	0.00	0.02
○Loop 202 - BsplineFunctor.h:236-241 - exec	0.04	0.06
○Loop 203 - BsplineFunctor.h:246-260 - exec	0.00	0.00
○Loop 200 - OneBodyJastrowRef.h:151-155 - exec	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code