OV - exec - Function qmcplusplus::TimerType<std::chrono::_V2::system

	Function: qmcplusplus::TimerType<std::chrono::_V2::system_clock>::stop()	Module: exec	Source: NewTimer.cpp:84-120 [...]	Coverage (incl. loops): 0.03% \| (excl. loops): 0.02%

/usr/include/c++/14/bits/chrono.h: 214 - 716

--------------------------------------------------------------------------------

214: 	      static_cast<_CR>(__d.count()) / static_cast<_CR>(_CF::den)));

[...]

716: 	return __cd(__cd(__lhs).count() - __cd(__rhs).count());

/usr/include/c++/14/bits/stl_map.h: 511 - 511

--------------------------------------------------------------------------------

511: 	if (__i == end() || key_comp()(__k, (*__i).first))

/usr/include/c++/14/tuple: 2887 - 2888

--------------------------------------------------------------------------------

2887:       : first(std::forward<_Args1>(std::get<_Indexes1>(__tuple1))...),

2888: 	second(std::forward<_Args2>(std::get<_Indexes2>(__tuple2))...)

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h: 119 - 124

--------------------------------------------------------------------------------

119:       if (!(this->long_buckets[j] == rhs.long_buckets[j]))

120:       {

121:         return this->long_buckets[j] < rhs.long_buckets[j];

122:       }

123:     }

124:     return this->long_buckets[N - 1] < rhs.long_buckets[N - 1];

/usr/include/c++/14/bits/stl_tree.h: 269 - 2459

--------------------------------------------------------------------------------

269:       _Rb_tree_iterator(_Base_ptr __x) _GLIBCXX_NOEXCEPT

[...]

283: 	_M_node = _Rb_tree_increment(_M_node);

[...]

298: 	_M_node = _Rb_tree_decrement(_M_node);

299: 	return *this;

[...]

631:       }

[...]

733:       { return static_cast<_Link_type>(this->_M_impl._M_header._M_parent); }

[...]

748:       { return &this->_M_impl._M_header; }

[...]

778:       { return static_cast<_Link_type>(__x->_M_left); }

[...]

786:       { return static_cast<_Link_type>(__x->_M_right); }

[...]

1636: 	~_Auto_node()

[...]

1947:       while (__x != 0)

1948: 	if (!_M_impl._M_key_compare(_S_key(__x), __k))

1949: 	  __y = __x, __x = _S_left(__x);

[...]

2109:       _Base_ptr __y = _M_end();

2110:       bool __comp = true;

2111:       while (__x != 0)

2112: 	{

2113: 	  __y = __x;

2114: 	  __comp = _M_impl._M_key_compare(__k, _S_key(__x));

2115: 	  __x = __comp ? _S_left(__x) : _S_right(__x);

2116: 	}

2117:       iterator __j = iterator(__y);

2118:       if (__comp)

2119: 	{

2120: 	  if (__j == begin())

2121: 	    return _Res(__x, __y);

2122: 	  else

2123: 	    --__j;

2124: 	}

2125:       if (_M_impl._M_key_compare(_S_key(__j._M_node), __k))

[...]

2217: 	      && _M_impl._M_key_compare(_S_key(_M_rightmost()), __k))

2218: 	    return _Res(0, _M_rightmost());

2219: 	  else

2220: 	    return _M_get_insert_unique_pos(__k);

2221: 	}

2222:       else if (_M_impl._M_key_compare(__k, _S_key(__pos._M_node)))

2223: 	{

2224: 	  // First, try before...

2225: 	  iterator __before = __pos;

2226: 	  if (__pos._M_node == _M_leftmost()) // begin()

2227: 	    return _Res(_M_leftmost(), _M_leftmost());

2228: 	  else if (_M_impl._M_key_compare(_S_key((--__before)._M_node), __k))

2229: 	    {

2230: 	      if (_S_right(__before._M_node) == 0)

[...]

2242: 	  if (__pos._M_node == _M_rightmost())

2243: 	    return _Res(0, _M_rightmost());

2244: 	  else if (_M_impl._M_key_compare(__k, _S_key((++__after)._M_node)))

2245: 	    {

2246: 	      if (_S_right(__pos._M_node) == 0)

[...]

2373:     _Rb_tree<_Key, _Val, _KeyOfValue, _Compare, _Alloc>::

2374:     _M_insert_node(_Base_ptr __x, _Base_ptr __p, _Link_type __z)

2375:     -> iterator

2376:     {

2377:       bool __insert_left = (__x != 0 || __p == _M_end()

2378: 			    || _M_impl._M_key_compare(_S_key(__z),

2379: 						      _S_key(__p)));

2380:

2381:       _Rb_tree_insert_and_rebalance(__insert_left, __z, __p,

2382: 				    this->_M_impl._M_header);

2383:       ++_M_impl._M_node_count;

[...]

2459: 	auto __res = _M_get_insert_hint_unique_pos(__pos, __z._M_key());

/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp: 84 - 120

--------------------------------------------------------------------------------

84: void TimerType<CLOCK>::stop()

85: {

86:   if (active)

[...]

98:     bool is_true_master(true);

99:     for (int level = omp_get_level(); level > 0; level--)

100:       if (omp_get_ancestor_thread_num(level) != 0)

101:         is_true_master = false;

102:     if (is_true_master)

103:     {

104:       std::chrono::duration<double> elapsed = CLOCK::now() - start_time;

105:       total_time += elapsed.count();

106:       num_calls++;

107:

108:       per_stack_total_time[current_stack_key] += elapsed.count();

109:       per_stack_num_calls[current_stack_key] += 1;

110:

111:       if (manager)

112:         manager->pop_timer(this);

[...]

120: }

/usr/include/c++/14/bits/new_allocator.h: 151 - 172

--------------------------------------------------------------------------------

151: 	return static_cast<_Tp*>(_GLIBCXX_OPERATOR_NEW(__n * sizeof(_Tp)));

[...]

172: 	_GLIBCXX_OPERATOR_DELETE(_GLIBCXX_SIZED_DEALLOC(__p, __n));

0x4cf8e0 STP	X29, X30, [SP, #928]!

0x4cf8e4 ADD	X29, SP, #0

0x4cf8e8 STP	X21, X22, [SP, #32]

0x4cf8ec LDRB	W21, [X0, #56]

0x4cf8f0 TBNZ	W21, #0, 4cf900

0x4cf8f4 LDP	X21, X22, [SP, #32]

0x4cf8f8 LDP	X29, X30, [SP], #96

0x4cf8fc RET

0x4cf900 STP	X19, X20, [SP, #16]

0x4cf904 ORR	W20, WZR, W21

0x4cf908 STP	X23, X24, [SP, #48]

0x4cf90c ORR	X23, XZR, X0

0x4cf910 BL	410730

0x4cf914 ORR	W19, WZR, W0

0x4cf918 CMP	W0, #0

0x4cf91c B.LE	4cfacc

0x4cf920 ANDS	W1, W0, #0x7

0x4cf924 SUB	W22, W0, #1

0x4cf928 B.EQ	4cf9f0

0x4cf92c CMP	W1, #1

0x4cf930 B.EQ	4cf9d4

0x4cf934 CMP	W1, #2

0x4cf938 B.EQ	4cf9bc

0x4cf93c CMP	W1, #3

0x4cf940 B.EQ	4cf9a4

0x4cf944 CMP	W1, #4

0x4cf948 B.EQ	4cf98c

0x4cf94c CMP	W1, #5

0x4cf950 B.EQ	4cf974

0x4cf954 CMP	W1, #6

0x4cf958 B.NE	4cfc64

0x4cf95c ORR	W0, WZR, W19

0x4cf960 SUB	W19, W19, #1

0x4cf964 BL	410470

0x4cf968 CMP	W0, #0

0x4cf96c CCMP	W20, #0, #4, #0

0x4cf970 CSINC	W20, WZR, WZR, #0

0x4cf974 ORR	W0, WZR, W19

0x4cf978 SUB	W19, W19, #1

0x4cf97c BL	410470

0x4cf980 CMP	W0, #0

0x4cf984 CCMP	W20, #0, #4, #0

0x4cf988 CSINC	W20, WZR, WZR, #0

0x4cf98c ORR	W0, WZR, W19

0x4cf990 SUB	W19, W19, #1

0x4cf994 BL	410470

0x4cf998 CMP	W0, #0

0x4cf99c CCMP	W20, #0, #4, #0

0x4cf9a0 CSINC	W20, WZR, WZR, #0

0x4cf9a4 ORR	W0, WZR, W19

0x4cf9a8 SUB	W19, W19, #1

0x4cf9ac BL	410470

0x4cf9b0 CMP	W0, #0

0x4cf9b4 CCMP	W20, #0, #4, #0

0x4cf9b8 CSINC	W20, WZR, WZR, #0

0x4cf9bc ORR	W0, WZR, W19

0x4cf9c0 SUB	W19, W19, #1

0x4cf9c4 BL	410470

0x4cf9c8 CMP	W0, #0

0x4cf9cc CCMP	W20, #0, #4, #0

0x4cf9d0 CSINC	W20, WZR, WZR, #0

0x4cf9d4 ORR	W0, WZR, W19

0x4cf9d8 BL	410470

0x4cf9dc CMP	W0, #0

0x4cf9e0 CCMP	W20, #0, #4, #0

0x4cf9e4 CSINC	W20, WZR, WZR, #0

0x4cf9e8 SUBS	W19, W19, #1

0x4cf9ec B.EQ	4cfab4

(1971) 0x4cf9f0 ORR	W0, WZR, W19

(1971) 0x4cf9f4 SUB	W24, W19, #1

(1971) 0x4cf9f8 BL	410470

(1971) 0x4cf9fc CMP	W0, #0

(1971) 0x4cfa00 ORR	W0, WZR, W24

(1971) 0x4cfa04 CCMP	W20, #0, #4, #0

(1971) 0x4cfa08 CSINC	W22, WZR, WZR, #0

(1971) 0x4cfa0c BL	410470

(1971) 0x4cfa10 ORR	W2, WZR, W0

(1971) 0x4cfa14 SUB	W0, W24, #1

(1971) 0x4cfa18 CMP	W2, #0

(1971) 0x4cfa1c CCMP	W22, #0, #4, #0

(1971) 0x4cfa20 CSINC	W20, WZR, WZR, #0

(1971) 0x4cfa24 BL	410470

(1971) 0x4cfa28 ORR	W3, WZR, W0

(1971) 0x4cfa2c SUB	W0, W19, #3

(1971) 0x4cfa30 CMP	W3, #0

(1971) 0x4cfa34 CCMP	W20, #0, #4, #0

(1971) 0x4cfa38 CSINC	W24, WZR, WZR, #0

(1971) 0x4cfa3c BL	410470

(1971) 0x4cfa40 ORR	W4, WZR, W0

(1971) 0x4cfa44 SUB	W0, W19, #4

(1971) 0x4cfa48 CMP	W4, #0

(1971) 0x4cfa4c CCMP	W24, #0, #4, #0

(1971) 0x4cfa50 CSINC	W22, WZR, WZR, #0

(1971) 0x4cfa54 BL	410470

(1971) 0x4cfa58 ORR	W5, WZR, W0

(1971) 0x4cfa5c SUB	W0, W19, #5

(1971) 0x4cfa60 CMP	W5, #0

(1971) 0x4cfa64 CCMP	W22, #0, #4, #0

(1971) 0x4cfa68 CSINC	W20, WZR, WZR, #0

(1971) 0x4cfa6c BL	410470

(1971) 0x4cfa70 ORR	W6, WZR, W0

(1971) 0x4cfa74 SUB	W0, W19, #6

(1971) 0x4cfa78 CMP	W6, #0

(1971) 0x4cfa7c CCMP	W20, #0, #4, #0

(1971) 0x4cfa80 CSINC	W24, WZR, WZR, #0

(1971) 0x4cfa84 BL	410470

(1971) 0x4cfa88 ORR	W7, WZR, W0

(1971) 0x4cfa8c SUB	W0, W19, #7

(1971) 0x4cfa90 CMP	W7, #0

(1971) 0x4cfa94 CCMP	W24, #0, #4, #0

(1971) 0x4cfa98 CSINC	W22, WZR, WZR, #0

(1971) 0x4cfa9c BL	410470

(1971) 0x4cfaa0 CMP	W0, #0

(1971) 0x4cfaa4 CCMP	W22, #0, #4, #0

(1971) 0x4cfaa8 CSINC	W20, WZR, WZR, #0

(1971) 0x4cfaac SUBS	W19, W19, #8

(1971) 0x4cfab0 B.NE	4cf9f0

0x4cfab4 TBNZ	W20, #0, 4cfacc

0x4cfab8 LDP	X19, X20, [SP, #16]

0x4cfabc LDP	X23, X24, [SP, #48]

0x4cfac0 LDP	X21, X22, [SP, #32]

0x4cfac4 LDP	X29, X30, [SP], #96

0x4cfac8 RET

0x4cfacc STP	X25, X26, [SP, #64]

0x4cfad0 ADD	X24, X23, #104

0x4cfad4 ADD	X20, X23, #112

0x4cfad8 STR	D15, [SP, #88]

0x4cfadc BL	4104e0

0x4cfae0 LDR	X9, [X23]

0x4cfae4 ADRP	X8,

0x4cfae8 LDR	D15, [X8, #3352]

0x4cfaec LDR	D0, [X23, #8]

0x4cfaf0 SUB	X0, X0, X9

0x4cfaf4 LDR	X10, [X23, #16]

0x4cfaf8 SCVTF	D1, X0

0x4cfafc LDR	X15, [X24, #16]

0x4cfb00 ADD	X11, X10, #1

0x4cfb04 FMUL	D15, D1, D15

0x4cfb08 STR	X11, [X23, #16]

0x4cfb0c FADD	D2, D0, D15

0x4cfb10 STR	D2, [X23, #8]

0x4cfb14 CBZ	X15, 4cfd18

0x4cfb18 LDR	X16, [X23, #80]

0x4cfb1c ORR	X19, XZR, X20

(1968) 0x4cfb20 ADD	X12, X15, #32

(1968) 0x4cfb24 LDR	X13, [X15, #32]

(1968) 0x4cfb28 CMP	X13, X16

(1968) 0x4cfb2c B.NE	4cfc3c

(1968) 0x4cfb30 LDR	X13, [X12, #8]

(1968) 0x4cfb34 LDR	X14, [X23, #88]

(1968) 0x4cfb38 CMP	X14, X13

(1968) 0x4cfb3c B.NE	4cfc40

(1968) 0x4cfb40 ORR	X19, XZR, X15

(1968) 0x4cfb44 LDR	X15, [X15, #16]

(1968) 0x4cfb48 CBNZ	X15, 4cfb20

0x4cfb4c CMP	X20, X19

0x4cfb50 B.EQ	4cfd18

0x4cfb54 LDR	X17, [X19, #32]

0x4cfb58 ADD	X25, X19, #32

0x4cfb5c CMP	X17, X16

0x4cfb60 B.NE	4cfe58

0x4cfb64 LDR	X17, [X25, #8]

0x4cfb68 LDR	X16, [X23, #88]

0x4cfb6c CMP	X16, X17

0x4cfb70 B.NE	4cfe58

0x4cfb74 LDR	D31, [X19, #56]

0x4cfb78 ADD	X24, X23, #152

0x4cfb7c ADD	X20, X23, #160

0x4cfb80 LDR	X26, [X24, #16]

0x4cfb84 FADD	D3, D31, D15

0x4cfb88 STR	D3, [X19, #56]

0x4cfb8c CBZ	X26, 4cfc7c

0x4cfb90 LDR	X22, [X23, #80]

0x4cfb94 ORR	X19, XZR, X20

0x4cfb98 HINT	#0

0x4cfb9c HINT	#0

(1964) 0x4cfba0 ADD	X30, X26, #32

(1964) 0x4cfba4 LDR	X3, [X26, #32]

(1964) 0x4cfba8 CMP	X3, X22

(1964) 0x4cfbac B.NE	4cfc28

(1964) 0x4cfbb0 LDR	X3, [X30, #8]

(1964) 0x4cfbb4 LDR	X6, [X23, #88]

(1964) 0x4cfbb8 CMP	X6, X3

(1964) 0x4cfbbc B.NE	4cfc2c

(1964) 0x4cfbc0 ORR	X19, XZR, X26

(1964) 0x4cfbc4 LDR	X26, [X26, #16]

(1964) 0x4cfbc8 CBNZ	X26, 4cfba0

0x4cfbcc CMP	X20, X19

0x4cfbd0 B.EQ	4cfc7c

0x4cfbd4 LDR	X5, [X19, #32]

0x4cfbd8 ADD	X25, X19, #32

0x4cfbdc CMP	X5, X22

0x4cfbe0 B.NE	4cffd4

0x4cfbe4 LDR	X5, [X25, #8]

0x4cfbe8 LDR	X22, [X23, #88]

0x4cfbec CMP	X22, X5

0x4cfbf0 B.NE	4cffd4

0x4cfbf4 LDR	X24, [X19, #56]

0x4cfbf8 LDR	X0, [X23, #72]

0x4cfbfc ADD	X11, X24, #1

0x4cfc00 STR	X11, [X19, #56]

0x4cfc04 CBZ	X0, 4cfc50

0x4cfc08 LDR	D15, [SP, #88]

0x4cfc0c ORR	X1, XZR, X23

0x4cfc10 LDP	X19, X20, [SP, #16]

0x4cfc14 LDP	X23, X24, [SP, #48]

0x4cfc18 LDP	X25, X26, [SP, #64]

0x4cfc1c LDP	X21, X22, [SP, #32]

0x4cfc20 LDP	X29, X30, [SP], #96

0x4cfc24 B	4d5600

(1964) 0x4cfc28 ORR	X6, XZR, X22

(1964) 0x4cfc2c CMP	X6, X3

(1964) 0x4cfc30 B.LE	4cfbc0

(1964) 0x4cfc34 LDR	X26, [X26, #24]

(1964) 0x4cfc38 B	4cfbc8

(1968) 0x4cfc3c ORR	X14, XZR, X16

(1968) 0x4cfc40 CMP	X14, X13

(1968) 0x4cfc44 B.LE	4cfb40

(1968) 0x4cfc48 LDR	X15, [X15, #24]

(1968) 0x4cfc4c B	4cfb48

0x4cfc50 LDR	D15, [SP, #88]

0x4cfc54 LDP	X19, X20, [SP, #16]

0x4cfc58 LDP	X23, X24, [SP, #48]

0x4cfc5c LDP	X25, X26, [SP, #64]

0x4cfc60 B	4cf8f4

0x4cfc64 BL	410470

0x4cfc68 CMP	W0, #0

0x4cfc6c ORR	W19, WZR, W22

0x4cfc70 CCMP	W21, #0, #4, #0

0x4cfc74 CSINC	W20, WZR, WZR, #0

0x4cfc78 B	4cf95c

0x4cfc7c MOVZ	X0, #64

0x4cfc80 STR	X27, [SP, #80]

0x4cfc84 BL	4100f0

0x4cfc88 LDP	X12, X13, [X23, #80]

0x4cfc8c ADD	X22, X0, #32

0x4cfc90 ORR	X27, XZR, X0

0x4cfc94 ORR	X26, XZR, X0

0x4cfc98 LDR	X14, [X24, #40]

0x4cfc9c STP	X12, X13, [X0, #32]

0x4cfca0 LDR	X13, [X23, #96]

0x4cfca4 STP	X13, XZR, [X22, #16]

0x4cfca8 CBZ	X14, 4cfcd4

0x4cfcac LDR	X2, [X23, #184]

0x4cfcb0 LDR	X19, [X27, #32]

0x4cfcb4 LDR	X18, [X2, #32]

0x4cfcb8 ADD	X15, X2, #32

0x4cfcbc CMP	X18, X19

0x4cfcc0 B.NE	4d0474

0x4cfcc4 LDR	X16, [X15, #8]

0x4cfcc8 LDR	X4, [X22, #8]

0x4cfccc CMP	X16, X4

0x4cfcd0 B.NE	4d0454

0x4cfcd4 LDR	X19, [X24, #16]

0x4cfcd8 CBZ	X19, 4d03c8

0x4cfcdc LDR	X25, [X27, #32]

0x4cfce0 ORR	X5, XZR, X25

(1963) 0x4cfce4 LDR	X8, [X19, #32]

(1963) 0x4cfce8 ADD	X30, X19, #32

(1963) 0x4cfcec CMP	X25, X8

(1963) 0x4cfcf0 B.NE	4cfe3c

(1963) 0x4cfcf4 LDR	X1, [X30, #8]

(1963) 0x4cfcf8 LDR	X2, [X22, #8]

(1963) 0x4cfcfc CMP	X1, X2

(1963) 0x4cfd00 B.NE	4cfe44

(1963) 0x4cfd04 LDR	X7, [X19, #24]

(1963) 0x4cfd08 MOVZ	W6, #0

(1963) 0x4cfd0c CBZ	X7, 4cfdb8

(1963) 0x4cfd10 ORR	X19, XZR, X7

(1963) 0x4cfd14 B	4cfce4

0x4cfd18 MOVZ	X0, #64

0x4cfd1c STR	X27, [SP, #80]

0x4cfd20 BL	4100f0

0x4cfd24 LDP	X6, X7, [X23, #80]

0x4cfd28 ADD	X22, X0, #32

0x4cfd2c ORR	X26, XZR, X0

0x4cfd30 ORR	X27, XZR, X0

0x4cfd34 LDR	X5, [X23, #96]

0x4cfd38 STP	X6, X7, [X0, #32]

0x4cfd3c LDR	X7, [X24, #40]

0x4cfd40 STR	X5, [X22, #16]

0x4cfd44 STR	XZR, [X22, #24]

0x4cfd48 CBZ	X7, 4cfd74

0x4cfd4c LDR	X2, [X23, #136]

0x4cfd50 LDR	X19, [X26, #32]

0x4cfd54 LDR	X9, [X2, #32]

0x4cfd58 ADD	X8, X2, #32

0x4cfd5c CMP	X9, X19

0x4cfd60 B.NE	4d04cc

0x4cfd64 LDR	X10, [X8, #8]

0x4cfd68 LDR	X0, [X22, #8]

0x4cfd6c CMP	X10, X0

0x4cfd70 B.NE	4d04ac

0x4cfd74 LDR	X19, [X24, #16]

0x4cfd78 CBZ	X19, 4d03b0

0x4cfd7c LDR	X25, [X26, #32]

0x4cfd80 ORR	X4, XZR, X25

(1967) 0x4cfd84 LDR	X1, [X19, #32]

(1967) 0x4cfd88 ADD	X12, X19, #32

(1967) 0x4cfd8c CMP	X1, X25

(1967) 0x4cfd90 B.NE	4cfe20

(1967) 0x4cfd94 LDR	X13, [X12, #8]

(1967) 0x4cfd98 LDR	X14, [X22, #8]

(1967) 0x4cfd9c CMP	X13, X14

(1967) 0x4cfda0 B.NE	4cfe28

(1967) 0x4cfda4 LDR	X18, [X19, #24]

(1967) 0x4cfda8 MOVZ	W15, #0

(1967) 0x4cfdac CBZ	X18, 4cfdec

(1967) 0x4cfdb0 ORR	X19, XZR, X18

(1967) 0x4cfdb4 B	4cfd84

0x4cfdb8 ORR	X2, XZR, X19

0x4cfdbc TBNZ	W6, #0, 4d0258

0x4cfdc0 CMP	X25, X8

0x4cfdc4 B.NE	4d0390

0x4cfdc8 LDR	X5, [X22, #8]

0x4cfdcc LDR	X8, [X19, #40]

0x4cfdd0 CMP	X8, X5

0x4cfdd4 B.NE	4d0390

0x4cfdd8 ORR	X0, XZR, X26

0x4cfddc MOVZ	X1, #64

0x4cfde0 BL	4100d0

0x4cfde4 LDR	X27, [SP, #80]

0x4cfde8 B	4cfbf4

0x4cfdec ORR	X2, XZR, X19

0x4cfdf0 TBNZ	W15, #0, 4d0280

0x4cfdf4 CMP	X25, X1

0x4cfdf8 B.NE	4d03a0

0x4cfdfc LDR	X4, [X22, #8]

0x4cfe00 LDR	X1, [X19, #40]

0x4cfe04 CMP	X1, X4

0x4cfe08 B.NE	4d03a0

0x4cfe0c ORR	X0, XZR, X27

0x4cfe10 MOVZ	X1, #64

0x4cfe14 BL	4100d0

0x4cfe18 LDR	X27, [SP, #80]

0x4cfe1c B	4cfb74

(1967) 0x4cfe20 ORR	X13, XZR, X1

(1967) 0x4cfe24 ORR	X14, XZR, X25

(1967) 0x4cfe28 CMP	X13, X14

(1967) 0x4cfe2c B.LE	4cfda4

(1967) 0x4cfe30 LDR	X18, [X19, #16]

(1967) 0x4cfe34 ORR	W15, WZR, W21

(1967) 0x4cfe38 B	4cfdac

(1963) 0x4cfe3c ORR	X1, XZR, X8

(1963) 0x4cfe40 ORR	X2, XZR, X25

(1963) 0x4cfe44 CMP	X1, X2

(1963) 0x4cfe48 B.LE	4cfd04

(1963) 0x4cfe4c LDR	X7, [X19, #16]

(1963) 0x4cfe50 ORR	W6, WZR, W21

(1963) 0x4cfe54 B	4cfd0c

0x4cfe58 STR	X27, [SP, #80]

0x4cfe5c CMP	X16, X17

0x4cfe60 B.GE	4cfe18

0x4cfe64 MOVZ	X0, #64

0x4cfe68 BL	4100f0

0x4cfe6c LDP	X22, X18, [X23, #80]

0x4cfe70 ADD	X26, X0, #32

0x4cfe74 ORR	X27, XZR, X0

0x4cfe78 LDR	X1, [X23, #96]

0x4cfe7c STP	X22, X18, [X0, #32]

0x4cfe80 STP	X1, XZR, [X26, #16]

0x4cfe84 LDR	X2, [X19, #32]

0x4cfe88 CMP	X22, X2

0x4cfe8c B.NE	4cff14

0x4cfe90 LDR	X30, [X25, #8]

0x4cfe94 LDR	X3, [X26, #8]

0x4cfe98 CMP	X3, X30

0x4cfe9c B.LT	4cff18

0x4cfea0 B.EQ	4cfe0c

0x4cfea4 LDR	X4, [X23, #136]

0x4cfea8 CMP	X19, X4

0x4cfeac B.EQ	4d02b4

0x4cfeb0 ORR	X0, XZR, X19

0x4cfeb4 BL	4106c0

0x4cfeb8 LDR	X6, [X0, #32]

0x4cfebc ADD	X5, X0, #32

0x4cfec0 CMP	X6, X22

0x4cfec4 B.NE	4d0560

0x4cfec8 LDR	X7, [X5, #8]

0x4cfecc LDR	X8, [X26, #8]

0x4cfed0 CMP	X8, X7

0x4cfed4 B.NE	4d0548

0x4cfed8 LDR	X19, [X24, #16]

0x4cfedc CBZ	X19, 4d0578

(1969) 0x4cfee0 LDR	X15, [X19, #32]

(1969) 0x4cfee4 ADD	X10, X19, #32

(1969) 0x4cfee8 CMP	X15, X22

(1969) 0x4cfeec B.NE	4d0334

(1969) 0x4cfef0 LDR	X0, [X10, #8]

(1969) 0x4cfef4 LDR	X11, [X26, #8]

(1969) 0x4cfef8 CMP	X0, X11

(1969) 0x4cfefc B.NE	4d033c

(1969) 0x4cff00 LDR	X13, [X19, #24]

(1969) 0x4cff04 MOVZ	W12, #0

(1969) 0x4cff08 CBZ	X13, 4d02c0

(1969) 0x4cff0c ORR	X19, XZR, X13

(1969) 0x4cff10 B	4cfee0

0x4cff14 B.GE	4cfea4

0x4cff18 LDR	X25, [X23, #128]

0x4cff1c CMP	X19, X25

0x4cff20 B.EQ	4cffa8

0x4cff24 ORR	X0, XZR, X19

0x4cff28 BL	410330

0x4cff2c LDR	X18, [X0, #32]

0x4cff30 ORR	X2, XZR, X0

0x4cff34 CMP	X18, X22

0x4cff38 B.NE	4cff94

0x4cff3c LDR	X16, [X26, #8]

0x4cff40 LDR	X18, [X0, #40]

0x4cff44 CMP	X18, X16

0x4cff48 B.NE	4cff98

0x4cff4c LDR	X19, [X24, #16]

0x4cff50 CBZ	X19, 4d0438

0x4cff54 HINT	#0

0x4cff58 HINT	#0

0x4cff5c HINT	#0

(1970) 0x4cff60 LDR	X3, [X19, #32]

(1970) 0x4cff64 ADD	X17, X19, #32

(1970) 0x4cff68 CMP	X3, X22

(1970) 0x4cff6c B.NE	4d01d4

(1970) 0x4cff70 LDR	X1, [X17, #8]

(1970) 0x4cff74 LDR	X2, [X26, #8]

(1970) 0x4cff78 CMP	X1, X2

(1970) 0x4cff7c B.NE	4d01dc

(1970) 0x4cff80 LDR	X4, [X19, #24]

(1970) 0x4cff84 MOVZ	W30, #0

(1970) 0x4cff88 CBZ	X4, 4d01f0

(1970) 0x4cff8c ORR	X19, XZR, X4

(1970) 0x4cff90 B	4cff60

0x4cff94 ORR	X16, XZR, X22

0x4cff98 CMP	X18, X16

0x4cff9c B.GE	4cff4c

0x4cffa0 LDR	X26, [X2, #24]

0x4cffa4 CBZ	X26, 4d0218

0x4cffa8 ORR	X2, XZR, X19

0x4cffac ORR	W0, WZR, W21

0x4cffb0 ORR	X19, XZR, X27

0x4cffb4 ORR	X3, XZR, X20

0x4cffb8 ORR	X1, XZR, X19

0x4cffbc BL	410750

0x4cffc0 LDR	X20, [X24, #40]

0x4cffc4 LDR	X27, [SP, #80]

0x4cffc8 ADD	X2, X20, #1

0x4cffcc STR	X2, [X24, #40]

0x4cffd0 B	4cfb74

0x4cffd4 STR	X27, [SP, #80]

0x4cffd8 CMP	X22, X5

0x4cffdc B.GE	4cfde4

0x4cffe0 MOVZ	X0, #64

0x4cffe4 BL	4100f0

0x4cffe8 LDP	X22, X7, [X23, #80]

0x4cffec ADD	X27, X0, #32

0x4cfff0 ORR	X26, XZR, X0

0x4cfff4 LDR	X8, [X23, #96]

0x4cfff8 STP	X22, X7, [X0, #32]

0x4cfffc STP	X8, XZR, [X27, #16]

0x4d0000 LDR	X9, [X19, #32]

0x4d0004 CMP	X22, X9

0x4d0008 B.NE	4d0094

0x4d000c LDR	X10, [X25, #8]

0x4d0010 LDR	X0, [X27, #8]

0x4d0014 CMP	X0, X10

0x4d0018 B.LT	4d0098

0x4d001c B.EQ	4cfdd8

0x4d0020 LDR	X11, [X23, #184]

0x4d0024 CMP	X11, X19

0x4d0028 B.EQ	4d02a8

0x4d002c ORR	X0, XZR, X19

0x4d0030 BL	4106c0

0x4d0034 LDR	X13, [X0, #32]

0x4d0038 ORR	X9, XZR, X0

0x4d003c ADD	X12, X0, #32

0x4d0040 CMP	X13, X22

0x4d0044 B.NE	4d0504

0x4d0048 LDR	X14, [X12, #8]

0x4d004c LDR	X15, [X27, #8]

0x4d0050 CMP	X15, X14

0x4d0054 B.NE	4d0530

0x4d0058 LDR	X19, [X24, #16]

0x4d005c CBZ	X19, 4d051c

(1965) 0x4d0060 LDR	X3, [X19, #32]

(1965) 0x4d0064 ADD	X16, X19, #32

(1965) 0x4d0068 CMP	X3, X22

(1965) 0x4d006c B.NE	4d0318

(1965) 0x4d0070 LDR	X4, [X16, #8]

(1965) 0x4d0074 LDR	X17, [X27, #8]

(1965) 0x4d0078 CMP	X4, X17

(1965) 0x4d007c B.NE	4d0320

(1965) 0x4d0080 LDR	X2, [X19, #24]

(1965) 0x4d0084 MOVZ	W30, #0

(1965) 0x4d0088 CBZ	X2, 4d02ec

(1965) 0x4d008c ORR	X19, XZR, X2

(1965) 0x4d0090 B	4d0060

0x4d0094 B.GE	4d0020

0x4d0098 LDR	X25, [X23, #176]

0x4d009c CMP	X25, X19

0x4d00a0 B.EQ	4d0128

0x4d00a4 ORR	X0, XZR, X19

0x4d00a8 BL	410330

0x4d00ac LDR	X6, [X0, #32]

0x4d00b0 ORR	X2, XZR, X0

0x4d00b4 CMP	X6, X22

0x4d00b8 B.NE	4d0114

0x4d00bc LDR	X5, [X27, #8]

0x4d00c0 LDR	X6, [X0, #40]

0x4d00c4 CMP	X6, X5

0x4d00c8 B.NE	4d0118

0x4d00cc LDR	X19, [X24, #16]

0x4d00d0 CBZ	X19, 4d0428

0x4d00d4 HINT	#0

0x4d00d8 HINT	#0

0x4d00dc HINT	#0

(1966) 0x4d00e0 LDR	X11, [X19, #32]

(1966) 0x4d00e4 ADD	X7, X19, #32

(1966) 0x4d00e8 CMP	X11, X22

(1966) 0x4d00ec B.NE	4d0154

(1966) 0x4d00f0 LDR	X8, [X7, #8]

(1966) 0x4d00f4 LDR	X9, [X27, #8]

(1966) 0x4d00f8 CMP	X8, X9

(1966) 0x4d00fc B.NE	4d015c

(1966) 0x4d0100 LDR	X0, [X19, #24]

(1966) 0x4d0104 MOVZ	W10, #0

(1966) 0x4d0108 CBZ	X0, 4d0170

(1966) 0x4d010c ORR	X19, XZR, X0

(1966) 0x4d0110 B	4d00e0

0x4d0114 ORR	X5, XZR, X22

0x4d0118 CMP	X6, X5

0x4d011c B.GE	4d00cc

0x4d0120 LDR	X27, [X2, #24]

0x4d0124 CBZ	X27, 4d0198

0x4d0128 ORR	X2, XZR, X19

0x4d012c ORR	X19, XZR, X26

0x4d0130 ORR	X3, XZR, X20

0x4d0134 ORR	W0, WZR, W21

0x4d0138 ORR	X1, XZR, X19

0x4d013c BL	410750

0x4d0140 LDR	X20, [X24, #40]

0x4d0144 LDR	X27, [SP, #80]

0x4d0148 ADD	X21, X20, #1

0x4d014c STR	X21, [X24, #40]

0x4d0150 B	4cfbf4

(1966) 0x4d0154 ORR	X8, XZR, X11

(1966) 0x4d0158 ORR	X9, XZR, X22

(1966) 0x4d015c CMP	X8, X9

(1966) 0x4d0160 B.LE	4d0100

(1966) 0x4d0164 LDR	X0, [X19, #16]

(1966) 0x4d0168 ORR	W10, WZR, W21

(1966) 0x4d016c B	4d0108

0x4d0170 ORR	X2, XZR, X19

0x4d0174 TBNZ	W10, #0, 4d0370

0x4d0178 CMP	X22, X11

0x4d017c B.NE	4d0190

0x4d0180 LDR	X22, [X27, #8]

0x4d0184 LDR	X11, [X19, #40]

0x4d0188 CMP	X11, X22

0x4d018c B.EQ	4cfdd8

0x4d0190 CMP	X11, X22

0x4d0194 B.GE	4cfdd8

0x4d0198 ORR	X19, XZR, X26

0x4d019c CMP	X20, X2

0x4d01a0 B.EQ	4d0130

0x4d01a4 LDR	X10, [X2, #32]

0x4d01a8 LDR	X0, [X19, #32]

0x4d01ac CMP	X10, X0

0x4d01b0 B.NE	4d01c8

0x4d01b4 LDR	X10, [X2, #40]

0x4d01b8 MOVZ	W21, #0

0x4d01bc LDR	X0, [X19, #40]

0x4d01c0 CMP	X10, X0

0x4d01c4 B.EQ	4d0130

0x4d01c8 CMP	X0, X10

0x4d01cc CSINC	W21, WZR, WZR, #10

0x4d01d0 B	4d0130

(1970) 0x4d01d4 ORR	X1, XZR, X3

(1970) 0x4d01d8 ORR	X2, XZR, X22

(1970) 0x4d01dc CMP	X1, X2

(1970) 0x4d01e0 B.LE	4cff80

(1970) 0x4d01e4 LDR	X4, [X19, #16]

(1970) 0x4d01e8 ORR	W30, WZR, W21

(1970) 0x4d01ec B	4cff88

0x4d01f0 ORR	X2, XZR, X19

0x4d01f4 TBNZ	W30, #0, 4d0350

0x4d01f8 CMP	X3, X22

0x4d01fc B.NE	4d0210

0x4d0200 LDR	X22, [X26, #8]

0x4d0204 LDR	X3, [X19, #40]

0x4d0208 CMP	X3, X22

0x4d020c B.EQ	4cfe0c

0x4d0210 CMP	X3, X22

0x4d0214 B.GE	4cfe0c

0x4d0218 ORR	X19, XZR, X27

0x4d021c ORR	W0, WZR, W21

0x4d0220 CMP	X20, X2

0x4d0224 B.EQ	4cffb4

0x4d0228 LDR	X27, [X2, #32]

0x4d022c LDR	X17, [X19, #32]

0x4d0230 CMP	X17, X27

0x4d0234 B.NE	4d024c

0x4d0238 LDR	X27, [X2, #40]

0x4d023c MOVZ	W0, #0

0x4d0240 LDR	X17, [X19, #40]

0x4d0244 CMP	X17, X27

0x4d0248 B.EQ	4cffb4

0x4d024c CMP	X17, X27

0x4d0250 CSINC	W0, WZR, WZR, #10

0x4d0254 B	4cffb4

0x4d0258 LDR	X3, [X24, #24]

0x4d025c CMP	X3, X19

0x4d0260 B.EQ	4d0398

0x4d0264 ORR	X0, XZR, X19

0x4d0268 BL	410330

0x4d026c LDR	X8, [X0, #32]

0x4d0270 ORR	X2, XZR, X19

0x4d0274 ORR	X5, XZR, X25

0x4d0278 ORR	X19, XZR, X0

0x4d027c B	4cfdc0

0x4d0280 LDR	X16, [X24, #24]

0x4d0284 CMP	X16, X19

0x4d0288 B.EQ	4d03a8

0x4d028c ORR	X0, XZR, X19

0x4d0290 BL	410330

0x4d0294 LDR	X1, [X0, #32]

0x4d0298 ORR	X2, XZR, X19

0x4d029c ORR	X4, XZR, X25

0x4d02a0 ORR	X19, XZR, X0

0x4d02a4 B	4cfdf4

0x4d02a8 ORR	X2, XZR, X19

0x4d02ac ORR	X19, XZR, X26

0x4d02b0 B	4d01a4

0x4d02b4 ORR	X2, XZR, X19

0x4d02b8 ORR	X19, XZR, X27

0x4d02bc B	4d0228

0x4d02c0 ORR	X2, XZR, X19

0x4d02c4 TBNZ	W12, #0, 4d03e0

0x4d02c8 CMP	X22, X15

0x4d02cc B.NE	4d02e0

0x4d02d0 LDR	X22, [X26, #8]

0x4d02d4 LDR	X15, [X19, #40]

0x4d02d8 CMP	X15, X22

0x4d02dc B.EQ	4cfe0c

0x4d02e0 CMP	X15, X22

0x4d02e4 B.LT	4d0218

0x4d02e8 B	4cfe0c

0x4d02ec ORR	X2, XZR, X19

0x4d02f0 TBNZ	W30, #0, 4d0404

0x4d02f4 CMP	X22, X3

0x4d02f8 B.NE	4d030c

0x4d02fc LDR	X22, [X27, #8]

0x4d0300 LDR	X3, [X19, #40]

0x4d0304 CMP	X3, X22

0x4d0308 B.EQ	4cfdd8

0x4d030c CMP	X3, X22

0x4d0310 B.LT	4d0198

0x4d0314 B	4cfdd8

(1965) 0x4d0318 ORR	X4, XZR, X3

(1965) 0x4d031c ORR	X17, XZR, X22

(1965) 0x4d0320 CMP	X4, X17

(1965) 0x4d0324 B.LE	4d0080

(1965) 0x4d0328 LDR	X2, [X19, #16]

(1965) 0x4d032c ORR	W30, WZR, W21

(1965) 0x4d0330 B	4d0088

(1969) 0x4d0334 ORR	X0, XZR, X15

(1969) 0x4d0338 ORR	X11, XZR, X22

(1969) 0x4d033c CMP	X0, X11

(1969) 0x4d0340 B.LE	4cff00

(1969) 0x4d0344 LDR	X13, [X19, #16]

(1969) 0x4d0348 ORR	W12, WZR, W21

(1969) 0x4d034c B	4cff08

0x4d0350 CMP	X25, X19

0x4d0354 B.EQ	4d0218

0x4d0358 ORR	X0, XZR, X19

0x4d035c BL	410330

0x4d0360 LDR	X3, [X0, #32]

0x4d0364 ORR	X2, XZR, X19

0x4d0368 ORR	X19, XZR, X0

0x4d036c B	4d01f8

0x4d0370 CMP	X25, X19

0x4d0374 B.EQ	4d0198

0x4d0378 ORR	X0, XZR, X19

0x4d037c BL	410330

0x4d0380 LDR	X11, [X0, #32]

0x4d0384 ORR	X2, XZR, X19

0x4d0388 ORR	X19, XZR, X0

0x4d038c B	4d0178

0x4d0390 CMP	X8, X5

0x4d0394 B.GE	4cfdd8

0x4d0398 ORR	X19, XZR, X27

0x4d039c B	4d019c

0x4d03a0 CMP	X1, X4

0x4d03a4 B.GE	4cfe0c

0x4d03a8 ORR	X19, XZR, X26

0x4d03ac B	4d021c

0x4d03b0 LDR	X11, [X24, #24]

0x4d03b4 CMP	X20, X11

0x4d03b8 B.EQ	4d049c

0x4d03bc LDR	X25, [X26, #32]

0x4d03c0 ORR	X19, XZR, X20

0x4d03c4 B	4d028c

0x4d03c8 LDR	X17, [X24, #24]

0x4d03cc CMP	X20, X17

0x4d03d0 B.EQ	4d0448

0x4d03d4 LDR	X25, [X27, #32]

0x4d03d8 ORR	X19, XZR, X20

0x4d03dc B	4d0264

0x4d03e0 LDR	X14, [X24, #24]

0x4d03e4 CMP	X19, X14

0x4d03e8 B.EQ	4d0218

0x4d03ec ORR	X0, XZR, X19

0x4d03f0 BL	410330

0x4d03f4 LDR	X15, [X0, #32]

0x4d03f8 ORR	X2, XZR, X19

0x4d03fc ORR	X19, XZR, X0

0x4d0400 B	4d02c8

0x4d0404 LDR	X1, [X24, #24]

0x4d0408 CMP	X1, X19

0x4d040c B.EQ	4d0198

0x4d0410 ORR	X0, XZR, X19

0x4d0414 BL	410330

0x4d0418 LDR	X3, [X0, #32]

0x4d041c ORR	X2, XZR, X19

0x4d0420 ORR	X19, XZR, X0

0x4d0424 B	4d02f4

0x4d0428 CMP	X20, X25

0x4d042c B.EQ	4d058c

0x4d0430 ORR	X19, XZR, X20

0x4d0434 B	4d0378

0x4d0438 CMP	X20, X25

0x4d043c B.EQ	4d04f4

0x4d0440 ORR	X19, XZR, X20

0x4d0444 B	4d0358

0x4d0448 ORR	X19, XZR, X27

0x4d044c ORR	X2, XZR, X20

0x4d0450 B	4d0130

0x4d0454 B.GE	4cfcd4

0x4d0458 MOVZ	X9, #0

0x4d045c ORR	X19, XZR, X27

0x4d0460 CMP	X9, #0

0x4d0464 CCMP	X20, X2, #4, #0

0x4d0468 CSINC	W21, WZR, WZR, #1

0x4d046c B.EQ	4d0130

0x4d0470 B	4d01b4

0x4d0474 B.GE	4cfcd4

0x4d0478 MOVZ	X9, #0

0x4d047c ORR	X19, XZR, X27

0x4d0480 CMP	X9, #0

0x4d0484 CCMP	X20, X2, #4, #0

0x4d0488 CSINC	W21, WZR, WZR, #1

0x4d048c B.EQ	4d0130

0x4d0490 LDR	X10, [X2, #32]

0x4d0494 LDR	X0, [X19, #32]

0x4d0498 B	4d01c8

0x4d049c ORR	X19, XZR, X26

0x4d04a0 ORR	X2, XZR, X20

0x4d04a4 ORR	W0, WZR, W21

0x4d04a8 B	4cffb4

0x4d04ac B.GE	4cfd74

0x4d04b0 MOVZ	X0, #0

0x4d04b4 ORR	X19, XZR, X26

0x4d04b8 CMP	X0, #0

0x4d04bc CCMP	X20, X2, #4, #0

0x4d04c0 CSINC	W0, WZR, WZR, #1

0x4d04c4 B.EQ	4cffb4

0x4d04c8 B	4d0238

0x4d04cc B.GE	4cfd74

0x4d04d0 MOVZ	X0, #0

0x4d04d4 ORR	X19, XZR, X26

0x4d04d8 CMP	X0, #0

0x4d04dc CCMP	X20, X2, #4, #0

0x4d04e0 CSINC	W0, WZR, WZR, #1

0x4d04e4 B.EQ	4cffb4

0x4d04e8 LDR	X27, [X2, #32]

0x4d04ec LDR	X17, [X19, #32]

0x4d04f0 B	4d024c

0x4d04f4 ORR	X19, XZR, X27

0x4d04f8 ORR	X2, XZR, X20

0x4d04fc ORR	W0, WZR, W21

0x4d0500 B	4cffb4

0x4d0504 B.LE	4d0058

0x4d0508 LDR	X21, [X19, #24]

0x4d050c CBZ	X21, 4d02a8

0x4d0510 ORR	X19, XZR, X26

0x4d0514 ORR	X2, XZR, X0

0x4d0518 B	4d0480

0x4d051c LDR	X19, [X24, #24]

0x4d0520 CMP	X20, X19

0x4d0524 B.EQ	4d058c

0x4d0528 ORR	X19, XZR, X20

0x4d052c B	4d0410

0x4d0530 B.GE	4d0058

0x4d0534 LDR	X18, [X19, #24]

0x4d0538 CBZ	X18, 4d02a8

0x4d053c ORR	X19, XZR, X26

0x4d0540 ORR	X2, XZR, X0

0x4d0544 B	4d0460

0x4d0548 B.GE	4cfed8

0x4d054c LDR	X9, [X19, #24]

0x4d0550 CBZ	X9, 4d02b4

0x4d0554 ORR	X19, XZR, X27

0x4d0558 ORR	X2, XZR, X0

0x4d055c B	4d04b8

0x4d0560 B.LE	4cfed8

0x4d0564 LDR	X25, [X19, #24]

0x4d0568 CBZ	X25, 4d02b4

0x4d056c ORR	X19, XZR, X27

0x4d0570 ORR	X2, XZR, X0

0x4d0574 B	4d04d8

0x4d0578 LDR	X19, [X24, #24]

0x4d057c CMP	X20, X19

0x4d0580 B.EQ	4d04f4

0x4d0584 ORR	X19, XZR, X20

0x4d0588 B	4d03ec

0x4d058c ORR	X19, XZR, X26

0x4d0590 ORR	X2, XZR, X20

0x4d0594 B	4d0130

0x4d0598 HINT	#0

0x4d059c HINT	#0

Coverage (%)	Name	Source Location	Module
►8.78+	qmcplusplus::ParticleSet::upda[...]	NewTimer.h:249	exec
○	main._omp_fn.1	NonLocalPP.hpp:135	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►7.25+	qmcplusplus::SoaDistanceTableA[...]	NewTimer.h:249	exec
○	qmcplusplus::ParticleSet::upda[...]	stl_vector.h:993	exec
○	main._omp_fn.1	NonLocalPP.hpp:135	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►6.87+	miniqmcreference::einspline_sp[...]	NewTimer.h:249	exec
○	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:248	exec
○	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:992	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►5.15+	miniqmcreference::einspline_sp[...]	NewTimer.h:249	exec
○	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:248	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:266	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►4.77+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:219	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main._omp_fn.1	miniqmc.cpp:443	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►4.58+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:101	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main._omp_fn.1	miniqmc.cpp:443	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►4.01+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:101	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main._omp_fn.1	miniqmc.cpp:443	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►3.63+	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:248	exec
○	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:992	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►3.44+	miniqmcreference::einspline_sp[...]	einspline_spo_ref.hpp:219	exec
○	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:100	exec
○	qmcplusplus::WaveFunction::rat[...]	WaveFunction.cpp:196	exec
○	main._omp_fn.1	miniqmc.cpp:443	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►3.44+	qmcplusplus::SoaDistanceTableA[...]	NewTimer.h:249	exec
○	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:343	exec
○	main._omp_fn.1	stl_vector.h:1131	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►3.44+	qmcplusplus::ParticleSet::upda[...]	stl_vector.h:993	exec
○	main._omp_fn.1	NonLocalPP.hpp:135	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►2.67+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:90	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:183	exec
○	main._omp_fn.1	stl_vector.h:1131	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►2.67+	qmcplusplus::ParticleSet::make[...]	ParticleSet.cpp:269	exec
○	main._omp_fn.1	stl_vector.h:1131	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►2.48+	qmcplusplus::WaveFunction::acc[...]	stl_vector.h:992	exec
○	main._omp_fn.1	miniqmc.cpp:451	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►2.29+	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:266	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►2.29+	qmcplusplus::SoaDistanceTableA[...]	SoaDistanceTableABOMPTarget.h:233	exec
○	qmcplusplus::ParticleSet::upda[...]	stl_vector.h:993	exec
○	main._omp_fn.1	NonLocalPP.hpp:135	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.53+	qmcplusplus::WaveFunction::eva[...]	stl_vector.h:992	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.53+	miniqmcreference::DiracDetermi[...]	DiracDeterminantRef.cpp:90	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:183	exec
○	main._omp_fn.1	stl_vector.h:1131	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.34+	main._omp_fn.1	miniqmc.cpp:446	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6
►1.15+	miniqmcreference::DiracDetermi[...]	OhmmsVector.h:248	exec
○	qmcplusplus::WaveFunction::eva[...]	WaveFunction.cpp:266	exec
○	main._omp_fn.1	NonLocalPP.hpp:126	exec
○	omp_fulfill_event		libgomp.so.1.0.0
○	start_thread		libc.so.6
○	thread_start		libc.so.6

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.02% of application time for run gcc_0

Source file and lines	NewTimer.cpp:84-120
Module	exec

The function is defined in:

/usr/include/c++/14/bits/chrono.h:214,716
/usr/include/c++/14/bits/stl_map.h:511
/usr/include/c++/14/tuple:2887-2888
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:119-124
/usr/include/c++/14/bits/stl_tree.h:269,283,298-299,631,733,748,778,786,1636,1947-1949,2109-2125,2217-2230,2242-2246,2373-2383,2459
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:84-86,98-112,120
/usr/include/c++/14/bits/new_allocator.h:151,172

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 92.00 to 12.50 cycles (7.36x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 25% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 92.00 to 9.43 cycles (9.76x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 27 occurrences►
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:99
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:104
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/new_allocator.h:172
- /usr/include/c++/14/bits/new_allocator.h:172
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/stl_tree.h:283
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:2381
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/stl_tree.h:283
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:2381
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298

Conversion instructions

Detected expensive conversion instructions.

Details

SCVTF: 1 occurrences►
- /usr/include/c++/14/bits/chrono.h:214

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Matching between your function (in the source code) and the binary function

The binary function is composed of 3 FP arithmetical operations:

2: addition or subtraction
1: multiply

The binary function is loading 1 bytes.

Arithmetic intensity

Arithmetic intensity is 2.67 FP operations per loaded or stored byte.

General properties

nb instructions	615
nb uops	605
loop length	2460
used w registers	12
used x registers	31
used b registers	0
used h registers	0
used s registers	1
used d registers	6
used q registers	0
used v registers	0
used z registers	0
nb stack references	30
ADD-SUB / MUL ratio	2.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	75.63 cycles
front end	75.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	92.00	92.00	71.25	71.25	71.25	71.25	1.50	1.50	1.50	1.50	53.83	53.50	53.67	11.00	11.00
cycles	92.00	92.00	71.25	71.25	71.25	71.25	1.50	1.50	1.50	1.50	53.83	53.50	53.67	11.00	11.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	75.63
Dispatch	92.00
Overall L1	92.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	25%
load	26%
store	37%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
other	22%

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	25%
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	25%
load	26%
store	37%
mul	25%
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 92.00 cycles. At this rate:

0% of peak load performance is reached (0.01 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 4cf8e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDRB W21, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (3.1%)
TBNZ W21, #0, 4cf900 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR W20, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410730 <@plt_start@+0x710>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.LE 4cfacc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ANDS W1, W0, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
SUB W22, W0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B.EQ 4cf9f0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x110>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf9d4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf9bc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xdc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf9a4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf98c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf974 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.NE 4cfc64 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4cfab4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x1d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
TBNZ W20, #0, 4cfacc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X24, X23, #104	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X20, X23, #112	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR D15, [SP, #88]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (25.0%)
BL 4104e0 <@plt_start@+0x4c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADRP X8, <542ae4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR D15, [X8, #3352]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
LDR D0, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
SUB X0, X0, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X10, [X23, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SCVTF D1, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (25.0%)
LDR X15, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
FMUL D15, D1, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (25.0%)
STR X11, [X23, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
FADD D2, D0, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
STR D2, [X23, #8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (25.0%)
CBZ X15, 4cfd18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x438>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfd18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x438>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X25, X19, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X17, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cfe58 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x578>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X16, [X23, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cfe58 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x578>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D31, [X19, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
ADD X24, X23, #152	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X20, X23, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X26, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FADD D3, D31, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
STR D3, [X19, #56]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (25.0%)
CBZ X26, 4cfc7c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
HINT #0																			N/A
HINT #0																			N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfc7c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X25, X19, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X5, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cffd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X23, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cffd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X19, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X23, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X24, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X11, [X19, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X0, 4cfc50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x370>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D15, [SP, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
ORR X1, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
B 4d5600 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE9pop_timerEPS5_>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D15, [SP, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
B 4cf8f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
ORR W19, WZR, W22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CCMP W21, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cf95c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X12, X13, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD X22, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X27, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X14, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X12, X13, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X13, XZR, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 4cfcd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X23, #184]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X27, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X15, X2, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0474 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X15, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X4, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0454 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d03c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X27, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X5, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X6, X7, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ADD X22, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X27, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X5, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X6, X7, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X5, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR XZR, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X7, 4cfd74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x494>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X23, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X26, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X8, X2, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X9, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d04cc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X8, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X10, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d04ac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d03b0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xad0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X26, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X4, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W6, #0, 4d0258 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x978>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0390 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0390 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X1, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 4100d0 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4cfbf4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x314>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W15, #0, 4d0280 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d03a0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X1, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X1, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d03a0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X1, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 4100d0 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4cfb74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x294>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CMP X16, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfe18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x538>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X22, X18, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD X26, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X27, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X1, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X22, X18, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X1, XZR, [X26, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cff14 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X3, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4cff18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x638>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.EQ 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X23, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X19, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d02b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4106c0 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X5, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X6, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0560 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X7, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X8, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0548 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d0578 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfea4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x5c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X23, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X19, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cffa8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X18, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cff94 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X18, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X18, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cff98 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d0438 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb58>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ORR X16, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X18, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cff4c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x66c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X26, 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X3, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 410750 <@plt_start@+0x730>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X20, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X2, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 4cfb74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x294>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CMP X22, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfde4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x504>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X22, X7, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD X27, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X8, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X22, X7, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X8, XZR, [X27, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X22, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0094 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X0, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4d0098 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.EQ 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X23, #184]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X11, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d02a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4106c0 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X9, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X12, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X13, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0504 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X12, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X15, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0530 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d051c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4d0020 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x740>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X23, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X25, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0128 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x848>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X6, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0114 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x834>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X6, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0118 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x838>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d0428 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ORR X5, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X6, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4d00cc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X27, 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X3, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 410750 <@plt_start@+0x730>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X21, X20, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X21, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 4cfbf4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x314>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W10, #0, 4d0370 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa90>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0190 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X10, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d01c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X2, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ W21, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDR X0, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X10, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X0, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSINC W21, WZR, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W30, #0, 4d0350 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0210 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x930>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X17, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d024c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X17, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X17, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSINC W0, WZR, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0398 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xab8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X5, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cfdc0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d03a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X4, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cfdf4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x514>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d01a4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0228 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W12, #0, 4d03e0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d02e0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W30, #0, 4d0404 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d030c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d01f8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x918>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0178 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x898>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X8, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d019c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X1, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d021c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x93c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X20, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d049c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X26, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d028c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X20, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0448 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X27, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0264 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x984>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X19, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d02c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X1, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d02f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d058c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xcac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0378 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d04f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0358 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfcd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W21, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4d01b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfcd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W21, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4d01c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfd74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x494>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W0, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4d0238 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x958>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfd74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x494>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W0, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
B 4d024c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.LE 4d0058 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X21, 4d02a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0480 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d058c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xcac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0410 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4d0058 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X18, 4d02a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0460 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfed8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X9, 4d02b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d04b8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.LE 4cfed8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X25, 4d02b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d04d8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4d04f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d03ec <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A

The code analyzed by CQA in that panel excludes loops and represents 0.02% of application time for run gcc_0

Source file and lines	NewTimer.cpp:84-120
Module	exec

The function is defined in:

/usr/include/c++/14/bits/chrono.h:214,716
/usr/include/c++/14/bits/stl_map.h:511
/usr/include/c++/14/tuple:2887-2888
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.h:119-124
/usr/include/c++/14/bits/stl_tree.h:269,283,298-299,631,733,748,778,786,1636,1947-1949,2109-2125,2217-2230,2242-2246,2373-2383,2459
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:84-86,98-112,120
/usr/include/c++/14/bits/new_allocator.h:151,172

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

CALL instructions

Detected function call instructions.

Details

unknown: 27 occurrences►
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:99
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:104
- /home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Utilities/NewTimer.cpp:100
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/new_allocator.h:172
- /usr/include/c++/14/bits/new_allocator.h:172
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/stl_tree.h:283
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:2381
- /usr/include/c++/14/bits/new_allocator.h:151
- /usr/include/c++/14/bits/stl_tree.h:283
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:2381
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298
- /usr/include/c++/14/bits/stl_tree.h:298

Conversion instructions

Detected expensive conversion instructions.

Details

SCVTF: 1 occurrences►
- /usr/include/c++/14/bits/chrono.h:214

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Matching between your function (in the source code) and the binary function

The binary function is composed of 3 FP arithmetical operations:

2: addition or subtraction
1: multiply

The binary function is loading 1 bytes.

Arithmetic intensity

Arithmetic intensity is 2.67 FP operations per loaded or stored byte.

General properties

nb instructions	615
nb uops	605
loop length	2460
used w registers	12
used x registers	31
used b registers	0
used h registers	0
used s registers	1
used d registers	6
used q registers	0
used v registers	0
used z registers	0
nb stack references	30
ADD-SUB / MUL ratio	2.00

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	75.63 cycles
front end	75.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	92.00	92.00	71.25	71.25	71.25	71.25	1.50	1.50	1.50	1.50	53.83	53.50	53.67	11.00	11.00
cycles	92.00	92.00	71.25	71.25	71.25	71.25	1.50	1.50	1.50	1.50	53.83	53.50	53.67	11.00	11.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	75.63
Dispatch	92.00
Overall L1	92.00

Vectorization ratios

INT

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	25%
load	26%
store	37%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
other	22%

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	25%
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	25%
load	26%
store	37%
mul	25%
add-sub	25%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 92.00 cycles. At this rate:

0% of peak load performance is reached (0.01 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 4cf8e0

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #928]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDRB W21, [X0, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (3.1%)
TBNZ W21, #0, 4cf900 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x20>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR W20, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X23, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410730 <@plt_start@+0x710>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.LE 4cfacc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ANDS W1, W0, #0x7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
SUB W22, W0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B.EQ 4cf9f0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x110>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf9d4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xf4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf9bc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xdc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf9a4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf98c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.EQ 4cf974 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W1, #6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.NE 4cfc64 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x384>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
CCMP W20, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUBS W19, W19, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4cfab4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x1d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
TBNZ W20, #0, 4cfacc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x1ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X24, X23, #104	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X20, X23, #112	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR D15, [SP, #88]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (25.0%)
BL 4104e0 <@plt_start@+0x4c0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X23]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADRP X8, <542ae4>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR D15, [X8, #3352]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
LDR D0, [X23, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
SUB X0, X0, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X10, [X23, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SCVTF D1, X0	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	3	1	scal (25.0%)
LDR X15, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X10, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
FMUL D15, D1, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	3	0.25	scal (25.0%)
STR X11, [X23, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
FADD D2, D0, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
STR D2, [X23, #8]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (25.0%)
CBZ X15, 4cfd18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x438>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfd18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x438>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X25, X19, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X17, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cfe58 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x578>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X16, [X23, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cfe58 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x578>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D31, [X19, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
ADD X24, X23, #152	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X20, X23, #160	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X26, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
FADD D3, D31, D15	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
STR D3, [X19, #56]	1	0	0	0	0	0	0	0.50	0.50	0	0	0.50	0.50	0	0	0	2	0.50	scal (25.0%)
CBZ X26, 4cfc7c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
HINT #0																			N/A
HINT #0																			N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfc7c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x39c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X25, X19, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X5, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cffd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X22, [X23, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cffd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X24, [X19, #56]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X0, [X23, #72]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X11, X24, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X11, [X19, #56]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X0, 4cfc50 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x370>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D15, [SP, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
ORR X1, XZR, X23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP], #96	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
B 4d5600 <_ZN11qmcplusplus12TimerManagerINS_9TimerTypeINSt6chrono3_V212system_clockEEEE9pop_timerEPS5_>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR D15, [SP, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	scal (25.0%)
LDP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
B 4cf8f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
BL 410470 <@plt_start@+0x450>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
ORR W19, WZR, W22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CCMP W21, #0, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
CSINC W20, WZR, WZR, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cf95c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X12, X13, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD X22, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X27, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X14, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X12, X13, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X13, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X13, XZR, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
CBZ X14, 4cfcd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X23, #184]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X27, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X18, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X15, X2, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X18, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0474 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb94>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X15, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X4, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0454 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb74>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d03c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xae8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X27, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X5, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X6, X7, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
ADD X22, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X27, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X5, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X6, X7, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X7, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X5, [X22, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STR XZR, [X22, #24]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CBZ X7, 4cfd74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x494>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X2, [X23, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X19, [X26, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X9, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X8, X2, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X9, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d04cc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X8, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X10, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d04ac <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d03b0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xad0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X26, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X4, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W6, #0, 4d0258 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x978>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0390 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X8, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0390 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xab0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X1, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 4100d0 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4cfbf4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x314>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W15, #0, 4d0280 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9a0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d03a0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X22, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X1, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X1, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d03a0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
MOVZ X1, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 4100d0 <@plt_start@+0xb0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4cfb74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x294>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CMP X16, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfe18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x538>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X22, X18, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD X26, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X27, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X1, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STP X22, X18, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X1, XZR, [X26, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X2, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X22, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cff14 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x634>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X30, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X3, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X30	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4cff18 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x638>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.EQ 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X4, [X23, #136]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X19, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d02b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4106c0 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD X5, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X6, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0560 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X7, [X5, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X8, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X8, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0548 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d0578 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfea4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x5c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X23, #128]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X19, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cffa8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X18, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cff94 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X18, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X18, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4cff98 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d0438 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb58>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ORR X16, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X18, X16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cff4c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x66c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X26, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X26, 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X3, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 410750 <@plt_start@+0x730>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X2, X20, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
STR X2, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 4cfb74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x294>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
STR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
CMP X22, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfde4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x504>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #64	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4100f0 <@plt_start@+0xd0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDP X22, X7, [X23, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD X27, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X26, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X8, [X23, #96]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
STP X22, X7, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X8, XZR, [X27, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDR X9, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X22, X9	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0094 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7b4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X25, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X0, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4d0098 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.EQ 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X23, #184]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X11, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d02a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 4106c0 <@plt_start@+0x6a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X13, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X9, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X12, X0, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X13, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0504 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X12, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X15, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0530 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc50>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d051c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc3c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4d0020 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x740>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X23, #176]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X25, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0128 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x848>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X6, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X6, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0114 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x834>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X5, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X6, [X0, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X6, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0118 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x838>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #16]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X19, 4d0428 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb48>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
ORR X5, XZR, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X6, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4d00cc <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x7ec>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X27, 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X3, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X1, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
BL 410750 <@plt_start@+0x730>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X20, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X27, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ADD X21, X20, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STR X21, [X24, #40]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
B 4cfbf4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x314>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W10, #0, 4d0370 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa90>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0190 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X11, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X11, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X10, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d01c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X2, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
MOVZ W21, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
LDR X0, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X10, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X0, X10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSINC W21, WZR, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W30, #0, 4d0350 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa70>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d0210 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x930>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X17, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d024c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
MOVZ W0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
LDR X17, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X17, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X17, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CSINC W0, WZR, WZR, #10	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0398 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xab8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X8, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X5, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cfdc0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4e0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X16, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X16, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d03a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xac8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X4, XZR, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cfdf4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x514>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d01a4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8c4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0228 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x948>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W12, #0, 4d03e0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d02e0 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa00>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X26, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X15, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X15, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X15, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
TBNZ W30, #0, 4d0404 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb24>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X22, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.NE 4d030c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa2c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X22, [X27, #8]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X3, [X19, #40]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X3, X22	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.LT 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d01f8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x918>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X25, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0178 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x898>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X8, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfdd8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x4f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d019c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8bc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X1, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.GE 4cfe0c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x52c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d021c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x93c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X11, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X20, X11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d049c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbbc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X26, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d028c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9ac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X17, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X20, X17	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0448 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb68>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X27, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0264 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x984>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X14, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X19, X14	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0218 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x938>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X15, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d02c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X1, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CMP X1, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d0198 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8b8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X0, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
BL 410330 <@plt_start@+0x310>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X3, [X0, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ORR X2, XZR, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d02f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d058c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xcac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0378 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa98>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CMP X20, X25	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d04f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0358 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xa78>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfcd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W21, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4d01b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfcd4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x3f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X9, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W21, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
B.EQ 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X10, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X0, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
B 4d01c8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x8e8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfd74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x494>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W0, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B 4d0238 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x958>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfd74 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x494>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
CCMP X20, X2, #4, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CSINC W0, WZR, WZR, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B.EQ 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X27, [X2, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
LDR X17, [X19, #32]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
B 4d024c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x96c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR W0, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4cffb4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x6d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.LE 4d0058 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X21, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X21, 4d02a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0480 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xba0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 4d058c <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xcac>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0410 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb30>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4d0058 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x778>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X18, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X18, 4d02a8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9c8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0460 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb80>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.GE 4cfed8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X9, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
CBZ X9, 4d02b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d04b8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbd8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
B.LE 4cfed8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x5f8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X25, [X19, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CBZ X25, 4d02b4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x9d4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X27	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d04d8 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xbf8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X19, [X24, #24]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	N/A
CMP X20, X19	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.EQ 4d04f4 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xc14>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d03ec <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0xb0c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR X19, XZR, X26	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ORR X2, XZR, X20	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 4d0130 <_ZN11qmcplusplus9TimerTypeINSt6chrono3_V212system_clockEE4stopEv+0x850>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
HINT #0																			N/A
HINT #0																			N/A

Name	Coverage (%)	Time (s)
▼qmcplusplus::TimerType::stop()–	0.03	0.04
○Loop 1968 - stl_tree.h:786-1949 - exec	0.00	0.23
○Loop 1964 - stl_tree.h:786-1949 - exec	0.00	0.12
○Loop 1970 - stl_tree.h:778-2115 - exec	0.00	0.00
○Loop 1965 - stl_tree.h:778-2115 - exec	0.00	0.00
○Loop 1971 - NewTimer.cpp:99-100 - exec	0.00	0.00
○Loop 1967 - stl_tree.h:778-2115 - exec	0.00	0.00
○Loop 1969 - stl_tree.h:778-2115 - exec	0.00	0.00
○Loop 1963 - stl_tree.h:778-2115 - exec	0.00	0.00
○Loop 1966 - stl_tree.h:778-2115 - exec	0.00	0.00

Report Configuration

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FMA

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CALL instructions

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Conversion instructions

Details

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Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

FMA

Workaround

CALL instructions

Details

Conversion instructions

Details

Workaround

Matching between your function (in the source code) and the binary function

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code