| Loop Id: 915 | Module: exec | Source: MultiBsplineRef.hpp:64-71 | Coverage: 0.01% |
|---|
| Loop Id: 915 | Module: exec | Source: MultiBsplineRef.hpp:64-71 | Coverage: 0.01% |
|---|
0x45d058 LDR D27, [X26] |
0x45d05c SUB X22, X6, X14,LSL #1 |
0x45d060 MOVZ X3, #0 |
0x45d064 ADD X13, X6, X14 |
0x45d068 SUB X11, X6, X14 |
0x45d06c LD1RD {Z24.D}, P7/Z, [X26, #1] |
0x45d070 ADD X10, X6, X18 |
0x45d074 ADD X9, X6, X16 |
0x45d078 FMUL Z28.D, Z24.D, Z6.D |
0x45d07c ADD X8, X6, X15 |
0x45d080 ADD X7, X6, X17 |
0x45d084 ORR P3.B, P8/Z, P8.B, P8.B |
0x45d088 FMUL D26, D30, D27 |
0x45d08c DUP Z4.D, Z26.D[0] |
(914) 0x45d090 LD1D {Z2.D}, P3/Z, [X6, X3,LSL #3] |
(914) 0x45d094 LD1D {Z25.D}, P3/Z, [X13, X3,LSL #3] |
(914) 0x45d098 LD1D {Z0.D}, P3/Z, [X22, X3,LSL #3] |
(914) 0x45d09c LD1D {Z1.D}, P3/Z, [X11, X3,LSL #3] |
(914) 0x45d0a0 LD1D {Z7.D}, P3/Z, [X4, X3,LSL #3] |
(914) 0x45d0a4 ADD X5, X4, X3,LSL #3 |
(914) 0x45d0a8 FMUL Z23.D, Z3.D, Z2.D |
(914) 0x45d0ac FMUL Z22.D, Z12.D, Z0.D |
(914) 0x45d0b0 FMAD Z25.D, P7/M, Z15.D, Z23.D |
(914) 0x45d0b4 FMAD Z1.D, P7/M, Z19.D, Z22.D |
(914) 0x45d0b8 FADD Z5.D, Z1.D, Z25.D |
(914) 0x45d0bc FMAD Z5.D, P7/M, Z4.D, Z7.D |
(914) 0x45d0c0 ST1D {Z5.D}, P3, [X5, MUL VL] |
(914) 0x45d0c4 LD1D {Z16.D}, P3/Z, [X9, X3,LSL #3] |
(914) 0x45d0c8 LD1D {Z17.D}, P3/Z, [X10, X3,LSL #3] |
(914) 0x45d0cc LD1D {Z20.D}, P3/Z, [X7, X3,LSL #3] |
(914) 0x45d0d0 LD1D {Z31.D}, P3/Z, [X8, X3,LSL #3] |
(914) 0x45d0d4 FMUL Z18.D, Z16.D, Z3.D |
(914) 0x45d0d8 FMUL Z21.D, Z20.D, Z12.D |
(914) 0x45d0dc FMAD Z17.D, P7/M, Z15.D, Z18.D |
(914) 0x45d0e0 FMAD Z31.D, P7/M, Z19.D, Z21.D |
(914) 0x45d0e4 FADD Z29.D, Z31.D, Z17.D |
(914) 0x45d0e8 FMLA Z5.D, P7/M, Z29.D, Z28.D |
(914) 0x45d0ec ST1D {Z5.D}, P3, [X5, MUL VL] |
(914) 0x45d0f0 ADD X3, X3, X12 |
(914) 0x45d0f4 WHILELO P3.D, X3, X19 |
(914) 0x45d0f8 B.NE 45d090 |
0x45d0fc ADD X26, X26, #16 |
0x45d100 ADD X28, SP, #320 |
0x45d104 ADD X6, X6, X27 |
0x45d108 CMP X26, X28 |
0x45d10c B.NE 45d058 |
/home/eoseret/qaas/qaas_runs/178-212-9071/intel/miniqmc/build/miniqmc/src/Numerics/Spline2/MultiBsplineRef.hpp: 64 - 71 |
-------------------------------------------------------------------------------- |
64: for (size_t j = 0; j < 4; j++) |
65: { |
66: const T pre00 = a[i] * b[j]; |
67: const T* restrict coefs = spline_m->coefs + (ix + i) * xs + (iy + j) * ys + iz * zs; |
68: for (size_t n = 0; n < num_splines; n++) |
69: vals[n] += pre00 * |
70: (c[0] * coefs[n] + c[1] * coefs[n + zs] + c[2] * coefs[n + 2 * zs] + |
71: c[3] * coefs[n + 3 * zs]); |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►52.02+ | miniqmcreference::DiracDetermi[...] | OhmmsVector.h:248 | exec |
| ○ | qmcplusplus::WaveFunction::eva[...] | stl_vector.h:992 | exec |
| ○ | main._omp_fn.1 | NonLocalPP.hpp:126 | exec |
| ○ | omp_fulfill_event | libgomp.so.1.0.0 | |
| ○ | start_thread | libc.so.6 | |
| ○ | thread_start | libc.so.6 | |
| ►47.98+ | miniqmcreference::DiracDetermi[...] | OhmmsVector.h:248 | exec |
| ○ | qmcplusplus::WaveFunction::eva[...] | WaveFunction.cpp:266 | exec |
| ○ | main._omp_fn.1 | NonLocalPP.hpp:126 | exec |
| ○ | omp_fulfill_event | libgomp.so.1.0.0 | |
| ○ | start_thread | libc.so.6 | |
| ○ | thread_start | libc.so.6 |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| min | med | avg | max |
|---|---|---|---|
| Percentile Index | 10 | 20 | 30 | 40 | 50 | 60 | 70 | 80 | 90 | 100 |
|---|---|---|---|---|---|---|---|---|---|---|
| Value |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 3.25 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.08 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.37 |
| Bottlenecks | P2, P3, P4, P5, |
| Function | miniqmcreference::einspline_spo_ref |
| Source | MultiBsplineRef.hpp:64-66 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.25 |
| CQA cycles if no scalar integer | 1.00 |
| CQA cycles if FP arith vectorized | 3.25 |
| CQA cycles if fully vectorized | 1.56 |
| Front-end cycles | 2.38 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 3.25 |
| P3 cycles | 3.25 |
| P4 cycles | 3.25 |
| P5 cycles | 3.25 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 0.75 |
| P9 cycles | 0.75 |
| P10 cycles | 0.83 |
| P11 cycles | 0.50 |
| P12 cycles | 0.67 |
| P13 cycles | 0.00 |
| P14 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 19.00 |
| Nb uops | 19.00 |
| Nb loads | NA |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.54 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 5.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 0.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 0.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 10.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 20.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | 50.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 66.67 |
| Vector-efficiency ratio all | 34.17 |
| Vector-efficiency ratio load | 25.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | 62.50 |
| Vector-efficiency ratio add_sub | 25.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 45.83 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 3.25 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 2.08 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.37 |
| Bottlenecks | P2, P3, P4, P5, |
| Function | miniqmcreference::einspline_spo_ref |
| Source | MultiBsplineRef.hpp:64-66 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.25 |
| CQA cycles if no scalar integer | 1.00 |
| CQA cycles if FP arith vectorized | 3.25 |
| CQA cycles if fully vectorized | 1.56 |
| Front-end cycles | 2.38 |
| P0 cycles | 0.50 |
| P1 cycles | 0.50 |
| P2 cycles | 3.25 |
| P3 cycles | 3.25 |
| P4 cycles | 3.25 |
| P5 cycles | 3.25 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 0.75 |
| P9 cycles | 0.75 |
| P10 cycles | 0.83 |
| P11 cycles | 0.50 |
| P12 cycles | 0.67 |
| P13 cycles | 0.00 |
| P14 cycles | 0.00 |
| DIV/SQRT cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | NA |
| Stall cycles (UFS) | NA |
| Nb insns | 19.00 |
| Nb uops | 19.00 |
| Nb loads | NA |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.54 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 5.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 0.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 0.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 10.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 20.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | 50.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 66.67 |
| Vector-efficiency ratio all | 34.17 |
| Vector-efficiency ratio load | 25.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | 62.50 |
| Vector-efficiency ratio add_sub | 25.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 45.83 |
| Path / |
| Function | miniqmcreference::einspline_spo_ref |
| Source file and lines | MultiBsplineRef.hpp:64-71 |
| Module | exec |
 |
| nb instructions | 19 |
| nb uops | 19 |
| loop length | 76 |
| used w registers | 0 |
| used x registers | 17 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 1 |
| used d registers | 3 |
| used q registers | 0 |
| used v registers | 0 |
| used z registers | 5 |
| nb stack references | 0 |
| micro-operation queue | 2.38 cycles |
| front end | 2.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 3.25 | 3.25 | 3.25 | 3.25 | 1.00 | 1.00 | 0.50 | 0.50 | 0.83 | 0.50 | 0.67 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 3.25 | 3.25 | 3.25 | 3.25 | 1.00 | 1.00 | 0.75 | 0.75 | 0.83 | 0.50 | 0.67 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 2.38 |
| Dispatch | 3.25 |
| Data deps. | 1.00 |
| Overall L1 | 3.25 |
| all | 15% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 66% |
| all | 50% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 20% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 66% |
| all | 29% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 45% |
| all | 62% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 62% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 34% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 62% |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 45% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDR D27, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | scal (25.0%) |
| SUB X22, X6, X14,LSL #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| MOVZ X3, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X6, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| SUB X11, X6, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LD1RD {Z24.D}, P7/Z, [X26, #1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | scal (25.0%) |
| ADD X10, X6, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X9, X6, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| FMUL Z28.D, Z24.D, Z6.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| ADD X8, X6, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X7, X6, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR P3.B, P8/Z, P8.B, P8.B | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | vect (12.5%) |
| FMUL D26, D30, D27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (25.0%) |
| DUP Z4.D, Z26.D[0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| ADD X26, X26, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X28, SP, #320 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X6, X6, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CMP X26, X28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.NE 45d058 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x398> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
| Function | miniqmcreference::einspline_spo_ref |
| Source file and lines | MultiBsplineRef.hpp:64-71 |
| Module | exec |
|
| nb instructions | 19 |
| nb uops | 19 |
| loop length | 76 |
| used w registers | 0 |
| used x registers | 17 |
| used b registers | 0 |
| used h registers | 0 |
| used s registers | 1 |
| used d registers | 3 |
| used q registers | 0 |
| used v registers | 0 |
| used z registers | 5 |
| nb stack references | 0 |
| micro-operation queue | 2.38 cycles |
| front end | 2.38 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.50 | 0.50 | 3.25 | 3.25 | 3.25 | 3.25 | 1.00 | 1.00 | 0.50 | 0.50 | 0.83 | 0.50 | 0.67 | 0.00 | 0.00 |
| cycles | 0.50 | 0.50 | 3.25 | 3.25 | 3.25 | 3.25 | 1.00 | 1.00 | 0.75 | 0.75 | 0.83 | 0.50 | 0.67 | 0.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| Front-end | 2.38 |
| Dispatch | 3.25 |
| Data deps. | 1.00 |
| Overall L1 | 3.25 |
| all | 15% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 66% |
| all | 50% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 20% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 50% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 66% |
| all | 29% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 45% |
| all | 62% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 62% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 34% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 62% |
| add-sub | 25% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 45% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | P12 | P13 | P14 | Latency | Recip. throughput | Vectorization |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| LDR D27, [X26] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 6 | 0.33 | scal (25.0%) |
| SUB X22, X6, X14,LSL #1 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| MOVZ X3, #0 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X13, X6, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| SUB X11, X6, X14 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| LD1RD {Z24.D}, P7/Z, [X26, #1] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 6 | 0.50 | scal (25.0%) |
| ADD X10, X6, X18 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X9, X6, X16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| FMUL Z28.D, Z24.D, Z6.D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (100.0%) |
| ADD X8, X6, X15 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ADD X7, X6, X17 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| ORR P3.B, P8/Z, P8.B, P8.B | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | vect (12.5%) |
| FMUL D26, D30, D27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 3 | 0.25 | scal (25.0%) |
| DUP Z4.D, Z26.D[0] | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | vect (100.0%) |
| ADD X26, X26, #16 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X28, SP, #320 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
| ADD X6, X6, X27 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (25.0%) |
| CMP X26, X28 | 1 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
| B.NE 45d058 <_ZN16miniqmcreference17einspline_spo_refIdE8evaluateERKN11qmcplusplus11ParticleSetEiRNS2_6VectorIdSaIdEEE+0x398> | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |