Loops
ljForce.c: 191 - 256.73 %
| Run orig_default | Run icx_default | Run gcc_default | Run aocc_2 | Run icx_1 | Run gcc_10 | ||||||||||||||||||||||||||||||
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| ||||||||||||||||||||||||
| ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 101 | 3.52 | 2.90 | 38.29 | 30.69 | 16.34 | 97 | 3.27 | 2.66 | 36.01 | 35.93 | 16.99 | 94 | 2.91 | 3.82 | 55.58 | 6.06 | 13.26 | 102 | 3.52 | 2.90 | 38.16 | 34.23 | 16.78 | 97 | 3.20 | 2.55 | 34.64 | 35.93 | 16.99 | 88 | 3.11 | 3.84 | 54.06 | 6.25 | 13.28 |
| Sum on 1 analyzed binary loop (exec - 101) | Sum on 1 analyzed binary loop (exec - 97) | Sum on 1 analyzed binary loop (exec - 94) | Sum on 1 analyzed binary loop (exec - 102) | Sum on 1 analyzed binary loop (exec - 97) | Sum on 1 analyzed binary loop (exec - 88) | ||||||||||||||||||||||||||||||
| Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | ||||||||||||||||||||||||
| Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | ||||||||||||||||||||||||||||||
| Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | ||||||||||||||||||||||||
| Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | ||||||||||||||||||||||||||||||
| Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 0 | Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 0 | ||||||||||||||||||||||||
| Presence of more than 4 paths | 0 | Presence of more than 4 paths | 0 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 0 | Presence of more than 4 paths | 0 | Presence of more than 4 paths | 1 | ||||||||||||||||||||||||
| Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | ||||||||||||||||||||||||||||||
| Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | ||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | ||||||||||||||||||||||||||
| Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | ||||||||||||||||||||||||||||||
| Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 0 | Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 1 | Presence of 2 to 4 paths | 0 | ||||||||||||||||||||||||
| Presence of more than 4 paths | 0 | Presence of more than 4 paths | 0 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 0 | Presence of more than 4 paths | 0 | Presence of more than 4 paths | 1 | ||||||||||||||||||||||||
| Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | 0 | ||||||||||||||||||||||||
| Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | ||||||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | ||||||||||||||||||||||||||
haloExchange.c: 621 - 14.84 %
| Run orig_default | Run icx_default | Run gcc_default | Run aocc_2 | Run icx_1 | Run gcc_10 | ||||||||||||||||||||||||||||||
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| ||||||||||||||||||||||||
| ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 59 | 0.34 | 0.24 | 3.14 | 0 | 10.94 | 66 | 0.28 | 0.18 | 2.39 | 97.22 | 60.07 | 61 | 0.09 | 0.05 | 0.75 | 21.15 | 13.74 | 59 | 0.36 | 0.25 | 3.34 | 0 | 10.94 | 66 | 0.30 | 0.21 | 2.81 | 97.22 | 60.07 | 59 | 0.19 | 0.17 | 2.42 | 0 | 10.94 |
| Sum on 1 analyzed binary loop (exec - 59) | Sum on 1 analyzed binary loop (exec - 66) | Sum on 1 analyzed binary loop (exec - 61) | Sum on 1 analyzed binary loop (exec - 59) | Sum on 1 analyzed binary loop (exec - 66) | Sum on 1 analyzed binary loop (exec - 59) | ||||||||||||||||||||||||||||||
| Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | ||||||||||||||||||||||||
| Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | ||||||||||||||||||||||||||||||
| Presence of a large number of scalar integer instructions | 1 | Presence of a large number of scalar integer instructions | Presence of a large number of scalar integer instructions | 1 | Presence of a large number of scalar integer instructions | 1 | Presence of a large number of scalar integer instructions | Presence of a large number of scalar integer instructions | 1 | ||||||||||||||||||||||||||
| Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | ||||||||||||||||||||||||||||||
| Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | ||||||||||||||||||||||||||
| Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | ||||||||||||||||||||||||||
| More than 10% of the vector loads instructions are unaligned | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | 0 | ||||||||||||||||||||||||||
| Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | 0 | Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | 0 | ||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 0 | ||||||||||||||||||||||||||
| Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | ||||||||||||||||||||||||||||||
| Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | ||||||||||||||||||||||||||
| Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | ||||||||||||||||||||||||||
| Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | ||||||||||||||||||||||||||||||
| Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | 0 | Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | |||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | |||||||||||||||||||||||||||
| Use of masked instructions | Use of masked instructions | 1 | Use of masked instructions | 0 | Use of masked instructions | Use of masked instructions | 1 | Use of masked instructions | |||||||||||||||||||||||||||
timestep.c: 88 - 4.96 %
| Run orig_default | Run icx_default | Run gcc_default | Run aocc_2 | Run icx_1 | Run gcc_10 | ||||||||||||||||||||||||||||||
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| ||||||||||||||||||||||||
| ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 111 | 0.13 | 0.07 | 0.94 | 0 | 12.5 | 109 | 0.04 | 0.01 | 0.17 | 100 | 95.24 | 104 | 0.09 | 0.08 | 1.18 | 0 | 12.5 | 112 | 0.13 | 0.08 | 1.12 | 0 | 12.5 | 109 | 0.05 | 0.02 | 0.25 | 100 | 95.24 | 98 | 0.10 | 0.09 | 1.20 | 0 | 12.5 |
| 108 | 0.07 | 0.01 | 0.10 | 37.5 | 17.19 | ||||||||||||||||||||||||||||||
| Sum on 1 analyzed binary loop (exec - 111) | Sum on 1 analyzed binary loop (exec - 109) | Sum on 1 analyzed binary loop (exec - 104) | Sum on 1 analyzed binary loop (exec - 112) | Sum on 1 analyzed binary loop (exec - 109) | Sum on 1 analyzed binary loop (exec - 98) | ||||||||||||||||||||||||||||||
| Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | ||||||||||||||||||||||||
| Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | ||||||||||||||||||||||||||||||
| Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | ||||||||||||||||||||||||
| Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | ||||||||||||||||||||||||||||||
| Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | ||||||||||||||||||||||||||
| Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | ||||||||||||||||||||||||||
| More than 10% of the vector loads instructions are unaligned | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | 0 | ||||||||||||||||||||||||||
| Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | 0 | Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | 0 | ||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 0 | Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 0 | ||||||||||||||||||||||||||
| Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | ||||||||||||||||||||||||||||||
| Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | Presence of constant non-unit stride data access | Presence of constant non-unit stride data access | 0 | Presence of constant non-unit stride data access | 1 | ||||||||||||||||||||||||||
| Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | Presence of indirect access | Presence of indirect access | 1 | Presence of indirect access | 0 | ||||||||||||||||||||||||||
| Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | ||||||||||||||||||||||||||||||
| Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | Presence of expensive instructions: scatter/gather | 1 | Presence of expensive instructions: scatter/gather | ||||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | ||||||||||||||||||||||||||||