OV - Compare Loops

Loops

▶ljForce.c: 191 - 385.34 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191-191 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 197-216					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191-191 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 197-216					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191-191 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 197-216					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191-191 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 197-216					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191-191 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 197-216					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191-191 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 197-216
101	20.64	18.05	63.83	30.69	16.34	95	19.26	16.61	60.68	35.93	16.99	94	17.15	18.00	69.99	6.06	13.26	102	20.65	17.76	62.55	35.68	16.96	157	19.44	17.12	58.80	44.07	18.01	88	17.38	17.79	69.48	6.25	13.28

Sum on 1 analyzed binary loop (exec - 101)						Sum on 1 analyzed binary loop (exec - 95)						Sum on 1 analyzed binary loop (exec - 94)						Sum on 1 analyzed binary loop (exec - 102)						Sum on 1 analyzed binary loop (exec - 157)						Sum on 1 analyzed binary loop (exec - 88)
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count
Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues
Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1
Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0
Control Flow Issues						Control Flow Issues						Control Flow Issues						Control Flow Issues						Control Flow Issues						Control Flow Issues
Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					0	Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					0
Presence of more than 4 paths					0	Presence of more than 4 paths					0	Presence of more than 4 paths					1	Presence of more than 4 paths					0	Presence of more than 4 paths					0	Presence of more than 4 paths					1
Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues
Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access
More than 10% of the vector loads instructions are unaligned					0	More than 10% of the vector loads instructions are unaligned					0	More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned					0	More than 10% of the vector loads instructions are unaligned					1	More than 10% of the vector loads instructions are unaligned
Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port
Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks
Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					0	Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					1	Presence of 2 to 4 paths					0
Presence of more than 4 paths					0	Presence of more than 4 paths					0	Presence of more than 4 paths					1	Presence of more than 4 paths					0	Presence of more than 4 paths					0	Presence of more than 4 paths					1
Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					0	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					0
Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization
Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port

▶timestep.c: 88 - 8.22 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88-94					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88-94					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88-94					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88-94					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88-94					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88-94
111	0.45	0.38	1.36	0	12.5	104	0.29	0.19	0.71	100	96.95	104	0.45	0.45	1.75	0	12.5	112	0.45	0.39	1.36	0	12.5	166	0.46	0.39	1.35	7.69	13.46	98	0.44	0.43	1.69	0	12.5

Sum on 1 analyzed binary loop (exec - 111)						Sum on 1 analyzed binary loop (exec - 104)						Sum on 1 analyzed binary loop (exec - 104)						Sum on 1 analyzed binary loop (exec - 112)						Sum on 1 analyzed binary loop (exec - 166)						Sum on 1 analyzed binary loop (exec - 98)
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count
Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues
Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1	Presence of expensive FP instructions					1
Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0
Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues
Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					0	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access						Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					1
Presence of indirect access						Presence of indirect access					1	Presence of indirect access					0	Presence of indirect access						Presence of indirect access						Presence of indirect access					0
More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned					1	More than 10% of the vector loads instructions are unaligned					0	More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned					0
Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather					1	Presence of expensive instructions: scatter/gather					0	Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather					0
Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					0	Presence of special instructions executing on a single port						Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					0
Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks
Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					0	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access						Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					1
Presence of indirect access						Presence of indirect access					1	Presence of indirect access					0	Presence of indirect access						Presence of indirect access						Presence of indirect access					0
Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization
Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather					1	Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather
Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port						Presence of special instructions executing on a single port						Presence of special instructions executing on a single port						Presence of special instructions executing on a single port

▶ljForce.c: 161 - 8.08 %

ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default		Run icx_default		Run gcc_default						Run aocc_1		Run icx_3		Run gcc_10
Loop Source Regions		Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 161-161 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/mytype.h: 22-22					Loop Source Regions		Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 161-161 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/mytype.h: 22-24
				89	0.94	1.06	4.11	100	100					83	0.90	1.02	3.97	0	6.25

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		Sum on 1 analyzed binary loop (exec - 89)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		Sum on 1 analyzed binary loop (exec - 83)
Analysis	Count	Analysis	Count	Analysis					Count	Analysis	Count	Analysis	Count	Analysis					Count
				Data Access Issues										Data Access Issues
				Presence of constant non-unit stride data access					1					Presence of constant non-unit stride data access
				Vectorization Roadblocks										Vectorization Roadblocks
				Presence of constant non-unit stride data access					1					Presence of constant non-unit stride data access

▶timestep.c: 74 - 7.81 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74-78					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74-78					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74-78					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74-78					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74-78					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74-78
107	0.09	0.04	0.13	0	12.5	101	0.55	0.41	1.48	100	100	107	0.03	0.00	0.01	100	100	108	0.08	0.03	0.12	0	12.5	164	0.81	0.73	2.51	0	12.5	100	0.54	0.47	1.82	0	12.5
108	0.52	0.44	1.54	97.3	97.64
109	0.13	0.06	0.21	95.83	81.77

Sum on 3 analyzed binary loops (exec - 107, exec - 108, exec - 109)						Sum on 1 analyzed binary loop (exec - 101)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						Sum on 1 analyzed binary loop (exec - 108)						Sum on 1 analyzed binary loop (exec - 164)						Sum on 1 analyzed binary loop (exec - 100)
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count
Loop Computation Issues						Loop Computation Issues												Loop Computation Issues						Loop Computation Issues						Loop Computation Issues
Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA						Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA												Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA
Low iteration count						Low iteration count												Low iteration count					1	Low iteration count					0	Low iteration count
Control Flow Issues						Control Flow Issues												Control Flow Issues						Control Flow Issues						Control Flow Issues
Low iteration count						Low iteration count												Low iteration count					1	Low iteration count						Low iteration count
Data Access Issues						Data Access Issues												Data Access Issues						Data Access Issues						Data Access Issues
More than 10% of the vector loads instructions are unaligned					1	More than 10% of the vector loads instructions are unaligned					1							More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned
Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1							Presence of special instructions executing on a single port						Presence of special instructions executing on a single port						Presence of special instructions executing on a single port
Inefficient Vectorization						Inefficient Vectorization												Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization
Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1							Presence of special instructions executing on a single port						Presence of special instructions executing on a single port						Presence of special instructions executing on a single port

▶ljForce.c: 158 - 7.80 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default		Run aocc_1		Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 158-161 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/mytype.h: 23-23					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 157-158 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/mytype.h: 23-23					Loop Source Regions		Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 157-158 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/mytype.h: 23-23					Loop Source Regions
95	0.94	0.88	3.11	33.33	12.5	97	0.73	0.65	2.36	50	15.63					159	0.75	0.68	2.33	50	15.63

Sum on 1 analyzed binary loop (exec - 95)						Sum on 1 analyzed binary loop (exec - 97)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		Sum on 1 analyzed binary loop (exec - 159)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis					Count	Analysis					Count	Analysis	Count	Analysis	Count	Analysis					Count	Analysis	Count

▶haloExchange.c: 621 - 5.70 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621-630					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621-630					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621-628					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621-630					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621-630					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621-630
59	0.36	0.28	1.01	0	10.94	64	0.10	0.01	0.04	50	22.92	61	0.16	0.09	0.35	21.15	13.74	59	0.38	0.28	1.00	0	10.94	87	0.38	0.28	0.95	33.33	14.58	59	0.36	0.32	1.26	0	10.94
						65	0.40	0.30	1.10	96.3	70.83

Sum on 1 analyzed binary loop (exec - 59)						Sum on 1 analyzed binary loop (exec - 65)						Sum on 1 analyzed binary loop (exec - 61)						Sum on 1 analyzed binary loop (exec - 59)						Sum on 1 analyzed binary loop (exec - 87)						Sum on 1 analyzed binary loop (exec - 59)
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count
Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues
Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions						Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions					1
Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues
Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					0	Presence of constant non-unit stride data access					1
More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned					1	More than 10% of the vector loads instructions are unaligned					0	More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned					1	More than 10% of the vector loads instructions are unaligned					0
Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather					1	Presence of expensive instructions: scatter/gather					0	Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather					0	Presence of expensive instructions: scatter/gather					0
Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					0	Presence of special instructions executing on a single port					0
Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks
Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access						Presence of constant non-unit stride data access						Presence of constant non-unit stride data access					1
Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization						Inefficient Vectorization
Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather					1	Presence of expensive instructions: scatter/gather					0	Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather						Presence of expensive instructions: scatter/gather
Presence of special instructions executing on a single port						Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port						Presence of special instructions executing on a single port						Presence of special instructions executing on a single port
Use of masked instructions						Use of masked instructions					1	Use of masked instructions					0	Use of masked instructions						Use of masked instructions						Use of masked instructions

▶ljForce.c: 157 - 3.07 %

ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)
Run orig_default		Run icx_default		Run gcc_default		Run aocc_1						Run icx_3		Run gcc_10
Loop Source Regions		Loop Source Regions		Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 158-161 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/mytype.h: 23-23					Loop Source Regions		Loop Source Regions
						96	0.93	0.87	3.07	33.33	12.5

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		Sum on 1 analyzed binary loop (exec - 96)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis	Count	Analysis	Count	Analysis	Count	Analysis					Count	Analysis	Count	Analysis	Count

▶linkCells.c: 211 - 2.08 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 211-247 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 258-269 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 295-301 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 327-334 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 352-352 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 359-365 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 371-373					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 211-237 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 246-247 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 258-269 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 293-301 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 327-334 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 352-365 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 371-373					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 211-247 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 295-301 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 352-373					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 211-247 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 258-269 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 295-301 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 327-334 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 352-352 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 359-365 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 371-373					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 211-237 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 246-247 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 258-269 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 293-301 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 327-334 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 352-365 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 371-373					Loop Source Regions
90	3.27	0.10	0.35	17.14	12.32	88	3.66	0.11	0.40	17.91	12.5	84	3.98	0.15	0.57	0	10	91	3.35	0.10	0.36	17.65	12.32	139	4.35	0.11	0.39	16.67	12.58

Sum on 1 analyzed binary loop (exec - 90)						Sum on 1 analyzed binary loop (exec - 88)						Sum on 1 analyzed binary loop (exec - 84)						Sum on 1 analyzed binary loop (exec - 91)						Sum on 1 analyzed binary loop (exec - 139)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis	Count
Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues						Loop Computation Issues
Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1
Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions					1	Presence of a large number of scalar integer instructions					1
Control Flow Issues						Control Flow Issues						Control Flow Issues						Control Flow Issues						Control Flow Issues
Presence of calls					0	Presence of calls					0	Presence of calls					0	Presence of calls					0	Presence of calls					1
Presence of more than 4 paths					1	Presence of more than 4 paths					1	Presence of more than 4 paths					1	Presence of more than 4 paths					1	Presence of more than 4 paths					1
Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues						Data Access Issues
More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned						More than 10% of the vector loads instructions are unaligned					1
More than 20% of the loads are accessing the stack						More than 20% of the loads are accessing the stack						More than 20% of the loads are accessing the stack						More than 20% of the loads are accessing the stack						More than 20% of the loads are accessing the stack					1
Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks						Vectorization Roadblocks
Presence of calls					0	Presence of calls					0	Presence of calls					0	Presence of calls					0	Presence of calls					1
Presence of more than 4 paths					1	Presence of more than 4 paths					1	Presence of more than 4 paths					1	Presence of more than 4 paths					1	Presence of more than 4 paths					1

▶timestep.c: 76 - 1.74 %

ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)
Run orig_default		Run icx_default		Run gcc_default		Run aocc_1						Run icx_3		Run gcc_10
Loop Source Regions		Loop Source Regions		Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 76-78					Loop Source Regions		Loop Source Regions
						109	0.54	0.44	1.54	97.3	97.64
						110	0.12	0.06	0.21	95.83	81.77

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		Sum on 2 analyzed binary loops (exec - 109, exec - 110)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis	Count	Analysis	Count	Analysis	Count	Analysis					Count	Analysis	Count	Analysis	Count
						Data Access Issues
						More than 10% of the vector loads instructions are unaligned					1
						Presence of special instructions executing on a single port					1
						Inefficient Vectorization
						Presence of special instructions executing on a single port					1

▶timestep.c: 110 - 0.46 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 110-116					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 110-116					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 110-116					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 110-116					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 110-116					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 110-116
114	0.04	0.02	0.08	0	12.5	109	0.04	0.01	0.04	100	94.57	110	0.05	0.03	0.11	0	12.5	115	0.03	0.01	0.03	66.67	46.88	171	0.04	0.02	0.05	80.77	22.12	103	0.04	0.03	0.11	0	12.5
																		116	0.03	0.01	0.04	33.33	16.67

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						Sum on 1 analyzed binary loop (exec - 110)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						Sum on 1 analyzed binary loop (exec - 171)						Sum on 1 analyzed binary loop (exec - 103)
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count
												Loop Computation Issues												Loop Computation Issues						Loop Computation Issues
												Presence of expensive FP instructions					1							Presence of expensive FP instructions					1	Presence of expensive FP instructions					1
												Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0							Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1	Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					0
												Data Access Issues												Data Access Issues						Data Access Issues
												Presence of constant non-unit stride data access					1							Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1
												More than 10% of the vector loads instructions are unaligned					0							More than 10% of the vector loads instructions are unaligned					1	More than 10% of the vector loads instructions are unaligned					0
												Presence of special instructions executing on a single port					0							Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port					0
												Vectorization Roadblocks												Vectorization Roadblocks						Vectorization Roadblocks
												Presence of constant non-unit stride data access					1							Presence of constant non-unit stride data access					1	Presence of constant non-unit stride data access					1
												Inefficient Vectorization												Inefficient Vectorization						Inefficient Vectorization
												Presence of special instructions executing on a single port												Presence of special instructions executing on a single port					1	Presence of special instructions executing on a single port

▶haloExchange.c: 633 - 0.23 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633-642					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633-642					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633-642					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633-642					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633-642					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633-642
61	0.02	0.00	0.01	65.96	61.7	63	0.04	0.01	0.04	98.81	81.1	59	0.04	0.02	0.06	0	10.94	61	0.02	0.00	0.01	65.96	61.7	88	0.03	0.01	0.03	33.33	14.58	58	0.05	0.02	0.07	0	10.94
						62	0.03	0.00	0.01	33.33	14.58

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count

▶haloExchange.c: 380 - 0.22 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 380-389					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 380-389					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 380-390					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 380-389					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 380-389					Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 380-390
45	0.35	0.01	0.03	0	11.25	43	0.33	0.01	0.03	36.36	15.34	36	0.39	0.01	0.05	0	11.25	45	0.33	0.01	0.03	0	11.25	71	0.31	0.01	0.03	38.46	15.87	37	0.36	0.01	0.05	0	11.25

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						Sum on 1 analyzed binary loop (exec - 71)						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count
																								Loop Computation Issues
																								Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA					1
																								Presence of a large number of scalar integer instructions					1
																								Data Access Issues
																								More than 10% of the vector loads instructions are unaligned					1

▶<unknown>: 0 - 0.20 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default						Run gcc_default						Run aocc_1						Run icx_3						Run gcc_10
Loop Source Regions						Loop Source Regions						Loop Source Regions						Loop Source Regions						Loop Source Regions						Loop Source Regions
67	0.00	0.00	0.01	0	0	72	0.01	0.00	0.00	0	0	72	0.02	0.00	0.00	0	0	67	0.01	0.00	0.00	0	0	170	0.02	0.00	0.01	0	0	65	0.01	0.00	0.00	0	0
60	0.01	0.00	0.00	0	0	98	0.01	0.00	0.01	0	0	45	0.05	0.00	0.01	0	0	105	0.01	0.00	0.01	0	0	72	0.04	0.00	0.00	0	0	82	0.00	0.00	0.00	0	0
115	0.01	0.00	0.00	0	0	75	0.01	0.00	0.00	0	0	75	0.03	0.00	0.00	0	0	80	0.01	0.00	0.00	0	0	168	0.01	0.00	0.00	0	0	70	0.03	0.00	0.00	0	0
65	0.02	0.00	0.00	0	0	107	0.01	0.00	0.00	0	0	85	0.06	0.00	0.01	0	0	60	0.01	0.00	0.00	0	0	123	0.01	0.00	0.01	0	0	49	0.00	0.00	0.00	0	0
87	0.01	0.00	0.00	0	0	74	0.01	0.00	0.00	0	0	63	0.01	0.00	0.01	0	0	65	0.02	0.00	0.00	0	0	125	0.01	0.00	0.00	0	0	77	0.00	0.00	0.00	0	0
62	0.01	0.00	0.00	0	0	44	0.03	0.00	0.00	0	0	71	0.01	0.00	0.00	0	0	82	0.01	0.00	0.00	0	0	117	0.03	0.00	0.00	0	0	96	0.01	0.00	0.01	0	0
91	0.01	0.00	0.00	0	0	77	0.01	0.00	0.00	0	0	112	0.00	0.00	0.00	0	0	89	0.00	0.00	0.00	0	0	141	0.00	0.00	0.00	0	0	69	0.01	0.00	0.00	0	0
81	0.00	0.00	0.00	0	0	79	0.01	0.00	0.00	0	0	86	0.00	0.00	0.00	0	0	74	0.01	0.00	0.01	0	0	127	0.00	0.00	0.00	0	0	81	0.00	0.00	0.00	0	0
75	0.01	0.00	0.00	0	0	84	0.02	0.00	0.00	0	0	87	0.00	0.00	0.00	0	0	84	0.00	0.00	0.00	0	0	119	0.01	0.00	0.00	0	0	78	0.00	0.00	0.00	0	0
78	0.00	0.00	0.00	0	0	89	0.01	0.00	0.00	0	0	102	0.01	0.00	0.01	0	0	92	0.00	0.00	0.00	0	0	140	0.00	0.00	0.00	0	0	44	0.05	0.00	0.00	0	0
46	0.05	0.00	0.00	0	0	68	0.03	0.00	0.00	0	0	58	0.00	0.00	0.00	0	0	88	0.01	0.00	0.00	0	0	135	0.02	0.00	0.00	0	0	104	0.01	0.00	0.00	0	0
104	0.01	0.00	0.01	0	0	70	0.01	0.00	0.00	0	0	111	0.01	0.00	0.00	0	0	76	0.01	0.00	0.00	0	0	160	0.01	0.00	0.01	0	0	67	0.01	0.00	0.00	0	0
												69	0.01	0.00	0.00	0	0	117	0.01	0.00	0.00	0	0	121	0.00	0.00	0.00	0	0	73	0.03	0.00	0.00	0	0
												78	0.01	0.00	0.00	0	0	79	0.01	0.00	0.00	0	0
																		62	0.01	0.00	0.00	0	0
																		78	0.01	0.00	0.00	0	0
																		46	0.04	0.00	0.00	0	0
																		73	0.01	0.00	0.01	0	0

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count	Analysis					Count

▶linkCells.c: 295 - 0.07 %

ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default		Run icx_default		Run gcc_default		Run aocc_1		Run icx_3		Run gcc_10
Loop Source Regions		Loop Source Regions		Loop Source Regions		Loop Source Regions		Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/linkCells.c: 295-301
										80	0.58	0.02	0.07	0	9.06

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis	Count	Analysis	Count	Analysis	Count	Analysis	Count	Analysis	Count	Analysis					Count

▶initAtoms.c: 221 - 0.04 %

ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Vector Length Use (%)	ASM Loop ID	Max Time Over Threads (s)	Time w.r.t. Wall Time (s)	Cov (%)	Vect. Ratio (%)	Vector Length Use (%)
Run orig_default						Run icx_default		Run gcc_default						Run aocc_1		Run icx_3		Run gcc_10
Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 221-228					Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 221-221 /home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 228-228					Loop Source Regions		Loop Source Regions		Loop Source Regions	/home/eoseret/qaas_runs_ZEN5/174-043-3878/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 221-228
73	0.01	0.00	0.02	33.33	16.67			65	0.01	0.00	0.01	33.33	20.83					63	0.01	0.00	0.02	0	12.5

No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.						No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.		No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count.
Analysis					Count	Analysis	Count	Analysis					Count	Analysis	Count	Analysis	Count	Analysis					Count

Report Configuration

Loops

▶ljForce.c: 191 - 385.34 %

▶timestep.c: 88 - 8.22 %

▶ljForce.c: 161 - 8.08 %

▶timestep.c: 74 - 7.81 %

▶ljForce.c: 158 - 7.80 %

▶haloExchange.c: 621 - 5.70 %

▶ljForce.c: 157 - 3.07 %

▶linkCells.c: 211 - 2.08 %

▶timestep.c: 76 - 1.74 %

▶timestep.c: 110 - 0.46 %

▶haloExchange.c: 633 - 0.23 %

▶haloExchange.c: 380 - 0.22 %

▶<unknown>: 0 - 0.20 %

▶linkCells.c: 295 - 0.07 %

▶initAtoms.c: 221 - 0.04 %