Run orig_default | Run icx_default | Run gcc_default | Run aocc_10 | Run icx_10 | Run gcc_9 |
Loop Source Regions | - /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 137-137
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 334-334
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/Population.cpp: 58-58
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 88-90
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 96-106
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62-62
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp: 57-57
| Loop Source Regions | | Loop Source Regions | | Loop Source Regions | - /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 137-137
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 334-334
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/Population.cpp: 58-58
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 88-90
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 96-106
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62-62
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp: 57-57
| Loop Source Regions | - /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 137-137
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 88-90
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 96-106
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 334-334
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp: 57-57
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62-62
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/Population.cpp: 58-58
| Loop Source Regions | - /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/pattern/kernel/For.hpp: 137-137
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/SweepSubdomain.cpp: 88-106
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/TypedViewBase.hpp: 188-188
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 331-331
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Operators.hpp: 334-334
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62-62
- /home/eoseret/qaas_runs_ZEN5/173-940-2141/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp: 57-57
|
ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) |
1088 | 0.05 | 0.05 | 0.30 | 0 | 12.5 | | | 932 | 0.05 | 0.05 | 0.30 | 0 | 12.5 | 2277 | 0.26 | 0.21 | 1.00 | 6.25 | 13.28 | 2422 | 0.22 | 0.18 | 1.39 | 7.27 | 13.41 |
1309 | 0.27 | 0.22 | 1.37 | 14.71 | 14.34 | | | 1115 | 0.28 | 0.22 | 1.38 | 0 | 12.5 | 1429 | 0.78 | 0.72 | 3.41 | 0 | 12.5 | 1984 | 0.57 | 0.52 | 3.97 | 0 | 12.5 |
659 | 0.56 | 0.48 | 3.03 | 0 | 12.5 | | | 543 | 0.57 | 0.49 | 3.09 | 0 | 12.5 | 1691 | 0.55 | 0.45 | 2.13 | 0 | 12.5 | 1862 | 0.77 | 0.75 | 5.78 | 0 | 12.5 |
983 | 0.69 | 0.66 | 4.14 | 100 | 25 | | | 833 | 0.69 | 0.66 | 4.15 | 0 | 12.5 | 1856 | 0.05 | 0.05 | 0.22 | 0 | 12.5 | 2107 | 0.05 | 0.05 | 0.38 | 0 | 12.5 |
| | | | | |
Sum on 4 analyzed binary loops (exec - 1088, exec - 1309, exec - 659, exec - 983) | No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count. | No Optimizer analysis found for any assembly loop. More loops can be analyzed using option --optimizer-loop-count. | Sum on 4 analyzed binary loops (exec - 932, exec - 1115, exec - 543, exec - 833) | Sum on 4 analyzed binary loops (exec - 2277, exec - 1429, exec - 1691, exec - 1856) | Sum on 4 analyzed binary loops (exec - 2422, exec - 1984, exec - 1862, exec - 2107) |
Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count |
Loop Computation Issues | | | | | | Loop Computation Issues | | Loop Computation Issues | | Loop Computation Issues | |
Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | | | | | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | |
Data Access Issues | | | | | | Data Access Issues | | Data Access Issues | | Data Access Issues | |
More than 10% of the vector loads instructions are unaligned | 1 | | | | | More than 10% of the vector loads instructions are unaligned | | More than 10% of the vector loads instructions are unaligned | | More than 10% of the vector loads instructions are unaligned | |